cgbase.pas 24 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got,
  62. addr_load_indirect // only load symbol address via indirect symbol, not actual symbol data
  63. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  64. ,
  65. addr_low, // bits 48-63
  66. addr_high, // bits 32-47
  67. {$IF defined(POWERPC64)}
  68. addr_higher, // bits 16-31
  69. addr_highest, // bits 00-15
  70. {$ENDIF}
  71. addr_higha // bits 16-31, adjusted
  72. {$IF defined(POWERPC64)}
  73. ,
  74. addr_highera, // bits 32-47, adjusted
  75. addr_highesta // bits 48-63, adjusted
  76. {$ENDIF}
  77. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  78. {$IFDEF MIPS}
  79. ,
  80. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  81. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  82. addr_high_pic,
  83. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  84. addr_high_call
  85. {$ENDIF}
  86. {$IFDEF AVR}
  87. ,addr_lo8
  88. ,addr_lo8_gs
  89. ,addr_hi8
  90. ,addr_hi8_gs
  91. {$ENDIF}
  92. {$IFDEF i8086}
  93. ,addr_dgroup // the data segment group
  94. ,addr_fardataseg // the far data segment of the current pascal module (unit or program)
  95. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  96. {$ENDIF}
  97. {$IFDEF AARCH64}
  98. ,addr_page
  99. ,addr_pageoffset
  100. ,addr_gotpage
  101. ,addr_gotpageoffset
  102. {$ENDIF AARCH64}
  103. );
  104. {# Generic opcodes, which must be supported by all processors
  105. }
  106. topcg =
  107. (
  108. OP_NONE,
  109. OP_MOVE, { replaced operation with direct load }
  110. OP_ADD, { simple addition }
  111. OP_AND, { simple logical and }
  112. OP_DIV, { simple unsigned division }
  113. OP_IDIV, { simple signed division }
  114. OP_IMUL, { simple signed multiply }
  115. OP_MUL, { simple unsigned multiply }
  116. OP_NEG, { simple negate }
  117. OP_NOT, { simple logical not }
  118. OP_OR, { simple logical or }
  119. OP_SAR, { arithmetic shift-right }
  120. OP_SHL, { logical shift left }
  121. OP_SHR, { logical shift right }
  122. OP_SUB, { simple subtraction }
  123. OP_XOR, { simple exclusive or }
  124. OP_ROL, { rotate left }
  125. OP_ROR { rotate right }
  126. );
  127. {# Generic flag values - used for jump locations }
  128. TOpCmp =
  129. (
  130. OC_NONE,
  131. OC_EQ, { equality comparison }
  132. OC_GT, { greater than (signed) }
  133. OC_LT, { less than (signed) }
  134. OC_GTE, { greater or equal than (signed) }
  135. OC_LTE, { less or equal than (signed) }
  136. OC_NE, { not equal }
  137. OC_BE, { less or equal than (unsigned) }
  138. OC_B, { less than (unsigned) }
  139. OC_AE, { greater or equal than (unsigned) }
  140. OC_A { greater than (unsigned) }
  141. );
  142. { indirect symbol flags }
  143. tindsymflag = (is_data,is_weak);
  144. tindsymflags = set of tindsymflag;
  145. { OS_NO is also used memory references with large data that can
  146. not be loaded in a register directly }
  147. TCgSize = (OS_NO,
  148. { integer registers }
  149. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  150. { single,double,extended,comp,float128 }
  151. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  152. { multi-media sizes: split in byte, word, dword, ... }
  153. { entities, then the signed counterparts }
  154. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  155. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  156. { Register types }
  157. TRegisterType = (
  158. R_INVALIDREGISTER, { = 0 }
  159. R_INTREGISTER, { = 1 }
  160. R_FPUREGISTER, { = 2 }
  161. { used by Intel only }
  162. R_MMXREGISTER, { = 3 }
  163. R_MMREGISTER, { = 4 }
  164. R_SPECIALREGISTER, { = 5 }
  165. R_ADDRESSREGISTER, { = 6 }
  166. { used on llvm, every temp gets its own "base register" }
  167. R_TEMPREGISTER { = 7 }
  168. );
  169. { Sub registers }
  170. TSubRegister = (
  171. R_SUBNONE, { = 0; no sub register possible }
  172. R_SUBL, { = 1; 8 bits, Like AL }
  173. R_SUBH, { = 2; 8 bits, Like AH }
  174. R_SUBW, { = 3; 16 bits, Like AX }
  175. R_SUBD, { = 4; 32 bits, Like EAX }
  176. R_SUBQ, { = 5; 64 bits, Like RAX }
  177. { For Sparc floats that use F0:F1 to store doubles }
  178. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  179. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  180. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  181. R_SUBMMS, { = 9; single scalar in multi media register }
  182. R_SUBMMD, { = 10; double scalar in multi media register }
  183. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  184. { For Intel X86 AVX-Register }
  185. R_SUBMMX, { = 12; 128 BITS }
  186. R_SUBMMY { = 13; 256 BITS }
  187. );
  188. TSubRegisterSet = set of TSubRegister;
  189. TSuperRegister = type word;
  190. {
  191. The new register coding:
  192. SuperRegister (bits 0..15)
  193. Subregister (bits 16..23)
  194. Register type (bits 24..31)
  195. TRegister is defined as an enum to make it incompatible
  196. with TSuperRegister to avoid mixing them
  197. }
  198. TRegister = (
  199. TRegisterLowEnum := Low(longint),
  200. TRegisterHighEnum := High(longint)
  201. );
  202. TRegisterRec=packed record
  203. {$ifdef FPC_BIG_ENDIAN}
  204. regtype : Tregistertype;
  205. subreg : Tsubregister;
  206. supreg : Tsuperregister;
  207. {$else FPC_BIG_ENDIAN}
  208. supreg : Tsuperregister;
  209. subreg : Tsubregister;
  210. regtype : Tregistertype;
  211. {$endif FPC_BIG_ENDIAN}
  212. end;
  213. { A type to store register locations for 64 Bit values. }
  214. {$ifdef cpu64bitalu}
  215. tregister64 = tregister;
  216. tregister128 = record
  217. reglo,reghi : tregister;
  218. end;
  219. {$else cpu64bitalu}
  220. tregister64 = record
  221. reglo,reghi : tregister;
  222. end;
  223. {$endif cpu64bitalu}
  224. Tregistermmxset = record
  225. reg0,reg1,reg2,reg3:Tregister
  226. end;
  227. { Set type definition for registers }
  228. tsuperregisterset = array[byte] of set of byte;
  229. pmmshuffle = ^tmmshuffle;
  230. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  231. passed to an mm operation is nil, it means that the whole location is moved }
  232. tmmshuffle = record
  233. { describes how many shuffles are actually described, if len=0 then
  234. moving the scalar with index 0 to the scalar with index 0 is meant }
  235. len : byte;
  236. { lower nibble of each entry of this array describes index of the source data index while
  237. the upper nibble describes the destination index }
  238. shuffles : array[1..1] of byte;
  239. end;
  240. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  241. Psuperregisterarray=^Tsuperregisterarray;
  242. Tsuperregisterworklist=object
  243. buflength,
  244. buflengthinc,
  245. length:word;
  246. buf:Psuperregisterarray;
  247. constructor init;
  248. constructor copyfrom(const x:Tsuperregisterworklist);
  249. destructor done;
  250. procedure clear;
  251. procedure add(s:tsuperregister);
  252. function addnodup(s:tsuperregister): boolean;
  253. function get:tsuperregister;
  254. function readidx(i:word):tsuperregister;
  255. procedure deleteidx(i:word);
  256. function delete(s:tsuperregister):boolean;
  257. end;
  258. psuperregisterworklist=^tsuperregisterworklist;
  259. const
  260. { alias for easier understanding }
  261. R_SSEREGISTER = R_MMREGISTER;
  262. { Invalid register number }
  263. RS_INVALID = high(tsuperregister);
  264. NR_INVALID = tregister($fffffffff);
  265. tcgsize2size : Array[tcgsize] of integer =
  266. { integer values }
  267. (0,1,2,4,8,16,1,2,4,8,16,
  268. { floating point values }
  269. 4,8,10,8,16,
  270. { multimedia values }
  271. 1,2,4,8,16,32,1,2,4,8,16,32);
  272. tfloat2tcgsize: array[tfloattype] of tcgsize =
  273. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  274. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  275. (s32real,s64real,s80real,s64comp);
  276. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  277. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  278. {$if defined(cpu64bitalu)}
  279. { operand size describing an unsigned value in a pair of int registers }
  280. OS_PAIR = OS_128;
  281. { operand size describing an signed value in a pair of int registers }
  282. OS_SPAIR = OS_S128;
  283. {$elseif defined(cpu32bitalu)}
  284. { operand size describing an unsigned value in a pair of int registers }
  285. OS_PAIR = OS_64;
  286. { operand size describing an signed value in a pair of int registers }
  287. OS_SPAIR = OS_S64;
  288. {$elseif defined(cpu16bitalu)}
  289. { operand size describing an unsigned value in a pair of int registers }
  290. OS_PAIR = OS_32;
  291. { operand size describing an signed value in a pair of int registers }
  292. OS_SPAIR = OS_S32;
  293. {$elseif defined(cpu8bitalu)}
  294. { operand size describing an unsigned value in a pair of int registers }
  295. OS_PAIR = OS_16;
  296. { operand size describing an signed value in a pair of int registers }
  297. OS_SPAIR = OS_S16;
  298. {$endif}
  299. { Table to convert tcgsize variables to the correspondending
  300. unsigned types }
  301. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  302. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  303. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  304. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  305. OS_M64,OS_M128,OS_M256);
  306. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  307. OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  308. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  309. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  310. OS_M64,OS_M128,OS_M256);
  311. tcgloc2str : array[TCGLoc] of string[12] = (
  312. 'LOC_INVALID',
  313. 'LOC_VOID',
  314. 'LOC_CONST',
  315. 'LOC_JUMP',
  316. 'LOC_FLAGS',
  317. 'LOC_REG',
  318. 'LOC_CREG',
  319. 'LOC_FPUREG',
  320. 'LOC_CFPUREG',
  321. 'LOC_MMXREG',
  322. 'LOC_CMMXREG',
  323. 'LOC_MMREG',
  324. 'LOC_CMMREG',
  325. 'LOC_SSETREG',
  326. 'LOC_CSSETREG',
  327. 'LOC_SSETREF',
  328. 'LOC_CSSETREF',
  329. 'LOC_CREF',
  330. 'LOC_REF'
  331. );
  332. var
  333. mms_movescalar : pmmshuffle;
  334. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  335. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  336. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  337. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  338. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  339. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  340. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  341. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  342. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  343. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  344. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  345. function generic_regname(r:tregister):string;
  346. {# From a constant numeric value, return the abstract code generator
  347. size.
  348. }
  349. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  350. function int_float_cgsize(const a: tcgint): tcgsize;
  351. function tcgsize2str(cgsize: tcgsize):string;
  352. { return the inverse condition of opcmp }
  353. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  354. { return the opcmp needed when swapping the operands }
  355. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  356. { return whether op is commutative }
  357. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  358. { returns true, if shuffle describes a real shuffle operation and not only a move }
  359. function realshuffle(shuffle : pmmshuffle) : boolean;
  360. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  361. function shufflescalar(shuffle : pmmshuffle) : boolean;
  362. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  363. the source }
  364. procedure removeshuffles(var shuffle : tmmshuffle);
  365. implementation
  366. uses
  367. verbose;
  368. {******************************************************************************
  369. tsuperregisterworklist
  370. ******************************************************************************}
  371. constructor tsuperregisterworklist.init;
  372. begin
  373. length:=0;
  374. buflength:=0;
  375. buflengthinc:=16;
  376. buf:=nil;
  377. end;
  378. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  379. begin
  380. self:=x;
  381. if x.buf<>nil then
  382. begin
  383. getmem(buf,buflength*sizeof(Tsuperregister));
  384. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  385. end;
  386. end;
  387. destructor tsuperregisterworklist.done;
  388. begin
  389. if assigned(buf) then
  390. freemem(buf);
  391. end;
  392. procedure tsuperregisterworklist.add(s:tsuperregister);
  393. begin
  394. inc(length);
  395. { Need to increase buffer length? }
  396. if length>=buflength then
  397. begin
  398. inc(buflength,buflengthinc);
  399. buflengthinc:=buflengthinc*2;
  400. if buflengthinc>256 then
  401. buflengthinc:=256;
  402. reallocmem(buf,buflength*sizeof(Tsuperregister));
  403. end;
  404. buf^[length-1]:=s;
  405. end;
  406. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  407. begin
  408. addnodup := false;
  409. if indexword(buf^,length,s) = -1 then
  410. begin
  411. add(s);
  412. addnodup := true;
  413. end;
  414. end;
  415. procedure tsuperregisterworklist.clear;
  416. begin
  417. length:=0;
  418. end;
  419. procedure tsuperregisterworklist.deleteidx(i:word);
  420. begin
  421. if i>=length then
  422. internalerror(200310144);
  423. buf^[i]:=buf^[length-1];
  424. dec(length);
  425. end;
  426. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  427. begin
  428. if (i >= length) then
  429. internalerror(2005010601);
  430. result := buf^[i];
  431. end;
  432. function tsuperregisterworklist.get:tsuperregister;
  433. begin
  434. if length=0 then
  435. internalerror(200310142);
  436. get:=buf^[0];
  437. buf^[0]:=buf^[length-1];
  438. dec(length);
  439. end;
  440. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  441. var
  442. i:longint;
  443. begin
  444. delete:=false;
  445. { indexword in 1.0.x and 1.9.4 is broken }
  446. i:=indexword(buf^,length,s);
  447. if i<>-1 then
  448. begin
  449. deleteidx(i);
  450. delete := true;
  451. end;
  452. end;
  453. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  454. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  455. begin
  456. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  457. end;
  458. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  459. begin
  460. include(regs[s shr 8],(s and $ff));
  461. end;
  462. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  463. begin
  464. exclude(regs[s shr 8],(s and $ff));
  465. end;
  466. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  467. begin
  468. result:=(s and $ff) in regs[s shr 8];
  469. end;
  470. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  471. begin
  472. tregisterrec(result).regtype:=rt;
  473. tregisterrec(result).supreg:=sr;
  474. tregisterrec(result).subreg:=sb;
  475. end;
  476. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  477. begin
  478. result:=tregisterrec(r).subreg;
  479. end;
  480. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  481. begin
  482. result:=tregisterrec(r).supreg;
  483. end;
  484. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  485. begin
  486. result:=tregisterrec(r).regtype;
  487. end;
  488. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  489. begin
  490. tregisterrec(r).subreg:=sr;
  491. end;
  492. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  493. begin
  494. tregisterrec(r).supreg:=sr;
  495. end;
  496. function generic_regname(r:tregister):string;
  497. var
  498. nr : string[12];
  499. begin
  500. str(getsupreg(r),nr);
  501. case getregtype(r) of
  502. R_INTREGISTER:
  503. result:='ireg'+nr;
  504. R_FPUREGISTER:
  505. result:='freg'+nr;
  506. R_MMREGISTER:
  507. result:='mreg'+nr;
  508. R_MMXREGISTER:
  509. result:='xreg'+nr;
  510. R_ADDRESSREGISTER:
  511. result:='areg'+nr;
  512. R_SPECIALREGISTER:
  513. result:='sreg'+nr;
  514. else
  515. begin
  516. result:='INVALID';
  517. exit;
  518. end;
  519. end;
  520. case getsubreg(r) of
  521. R_SUBNONE:
  522. ;
  523. R_SUBL:
  524. result:=result+'l';
  525. R_SUBH:
  526. result:=result+'h';
  527. R_SUBW:
  528. result:=result+'w';
  529. R_SUBD:
  530. result:=result+'d';
  531. R_SUBQ:
  532. result:=result+'q';
  533. R_SUBFS:
  534. result:=result+'fs';
  535. R_SUBFD:
  536. result:=result+'fd';
  537. R_SUBMMD:
  538. result:=result+'md';
  539. R_SUBMMS:
  540. result:=result+'ms';
  541. R_SUBMMWHOLE:
  542. result:=result+'ma';
  543. R_SUBMMX:
  544. result:=result+'mx';
  545. R_SUBMMY:
  546. result:=result+'my';
  547. else
  548. internalerror(200308252);
  549. end;
  550. end;
  551. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  552. const
  553. size2cgsize : array[0..8] of tcgsize = (
  554. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  555. );
  556. begin
  557. {$ifdef cpu64bitalu}
  558. if a=16 then
  559. result:=OS_128
  560. else
  561. {$endif cpu64bitalu}
  562. if a>8 then
  563. result:=OS_NO
  564. else
  565. result:=size2cgsize[a];
  566. end;
  567. function int_float_cgsize(const a: tcgint): tcgsize;
  568. begin
  569. case a of
  570. 4 :
  571. result:=OS_F32;
  572. 8 :
  573. result:=OS_F64;
  574. 10 :
  575. result:=OS_F80;
  576. 16 :
  577. result:=OS_F128;
  578. else
  579. internalerror(200603211);
  580. end;
  581. end;
  582. function tcgsize2str(cgsize: tcgsize):string;
  583. begin
  584. Str(cgsize, Result);
  585. end;
  586. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  587. const
  588. list: array[TOpCmp] of TOpCmp =
  589. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  590. OC_B,OC_BE);
  591. begin
  592. inverse_opcmp := list[opcmp];
  593. end;
  594. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  595. const
  596. list: array[TOpCmp] of TOpCmp =
  597. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  598. OC_BE,OC_B);
  599. begin
  600. swap_opcmp := list[opcmp];
  601. end;
  602. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  603. const
  604. list: array[topcg] of boolean =
  605. (true,false,true,true,false,false,true,true,false,false,
  606. true,false,false,false,false,true,false,false);
  607. begin
  608. commutativeop := list[op];
  609. end;
  610. function realshuffle(shuffle : pmmshuffle) : boolean;
  611. var
  612. i : longint;
  613. begin
  614. realshuffle:=true;
  615. if (shuffle=nil) or (shuffle^.len=0) then
  616. realshuffle:=false
  617. else
  618. begin
  619. for i:=1 to shuffle^.len do
  620. begin
  621. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  622. exit;
  623. end;
  624. realshuffle:=false;
  625. end;
  626. end;
  627. function shufflescalar(shuffle : pmmshuffle) : boolean;
  628. begin
  629. result:=shuffle^.len=0;
  630. end;
  631. procedure removeshuffles(var shuffle : tmmshuffle);
  632. var
  633. i : longint;
  634. begin
  635. if shuffle.len=0 then
  636. exit;
  637. for i:=1 to shuffle.len do
  638. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  639. end;
  640. initialization
  641. new(mms_movescalar);
  642. mms_movescalar^.len:=0;
  643. finalization
  644. dispose(mms_movescalar);
  645. end.