| .. |
|
aoptcpu.pas
|
19c8abac0b
+ enable jump optimizer for i8086
|
12 tahun lalu |
|
aoptcpub.pas
|
19c8abac0b
+ enable jump optimizer for i8086
|
12 tahun lalu |
|
aoptcpud.pas
|
19c8abac0b
+ enable jump optimizer for i8086
|
12 tahun lalu |
|
cgcpu.pas
|
791cd932fd
+ support i8086 far data memory models in tcg8086.g_intf_wrapper
|
11 tahun lalu |
|
cpubase.inc
|
c48d572996
Implement support for saving and restoring address registers.
|
12 tahun lalu |
|
cpuinfo.pas
|
c003f934c5
* Included cs_opt_peephole into genericlevel1optimizerswitches, so it is re-enabled for all targets after r27106.
|
11 tahun lalu |
|
cpunode.pas
|
3cc8ff11e3
+ generate the stack segment for i8086 far data memory models from within fpc
|
11 tahun lalu |
|
cpupara.pas
|
3dfc6ac7e1
* fixed the passing of extended floating type parameters on i8086 for
|
11 tahun lalu |
|
cpupi.pas
|
c916105db8
- rm ti8086procinfo.allocate_got_register as it isn't used on the i8086
|
12 tahun lalu |
|
cputarg.pas
|
eff0894a66
all the extra i8086 units added
|
12 tahun lalu |
|
hlcgcpu.pas
|
24fcac9f87
+ added support for nested procvars in the i8086 far data memory models
|
11 tahun lalu |
|
i8086att.inc
|
dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
|
11 tahun lalu |
|
i8086atts.inc
|
dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
|
11 tahun lalu |
|
i8086int.inc
|
dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
|
11 tahun lalu |
|
i8086nop.inc
|
842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
|
11 tahun lalu |
|
i8086op.inc
|
dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
|
11 tahun lalu |
|
i8086prop.inc
|
dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
|
11 tahun lalu |
|
i8086tab.inc
|
842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
|
11 tahun lalu |
|
n8086add.pas
|
9f2e59de3a
+ implemented far pointer arithmetic in the i8086 add node simplify method
|
11 tahun lalu |
|
n8086cal.pas
|
8a606761cd
* don't push cs in ti8086callnode.extra_interrupt_code in the far code memory
|
11 tahun lalu |
|
n8086cnv.pas
|
e8b9d9bf41
* converted tcgtypeconvnode.second_nil_to_methodprocvar to the high level code
|
11 tahun lalu |
|
n8086con.pas
|
338c064beb
* moved x86-specific tpointerdef functionality to architecture-specific
|
11 tahun lalu |
|
n8086inl.pas
|
683478f00c
+ added a proper far pointer inc/dec implementation (operating only on the offset,
|
11 tahun lalu |
|
n8086ld.pas
|
f4a0c08736
* fixed nested access to parent local variables in i8086 far data memory models
|
11 tahun lalu |
|
n8086mat.pas
|
dc432918da
+ enabled the use of the DIV/IDIV instruction for 16-bit div/mod on i8086
|
11 tahun lalu |
|
n8086mem.pas
|
38aec68d6f
* ti8086vecnode.update_reference_reg_mul: remove the segment before calling
|
11 tahun lalu |
|
n8086tcon.pas
|
4832682c58
* fixed i8086 far pointer typed constants that are initialized with nil
|
11 tahun lalu |
|
n8086util.pas
|
1910177cf0
+ added heapmax support to the $M directive on i8086-msdos. It is currently
|
11 tahun lalu |
|
r8086ari.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086att.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086con.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086dwrf.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086int.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086iri.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086nasm.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086nor.inc
|
107a6f6552
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
|
12 tahun lalu |
|
r8086nri.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086num.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086ot.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086rni.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086sri.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
r8086stab.inc
|
107a6f6552
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
|
12 tahun lalu |
|
r8086std.inc
|
5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
|
12 tahun lalu |
|
ra8086att.pas
|
a04cbc09b0
* changed the default i8086 asmmode to Intel
|
12 tahun lalu |
|
ra8086int.pas
|
a04cbc09b0
* changed the default i8086 asmmode to Intel
|
12 tahun lalu |
|
rgcpu.pas
|
c9f8703679
+ set ref.segment to NR_SS for all temps/localvars on i8086. This allows the
|
11 tahun lalu |
|
symcpu.pas
|
597f110eb9
+ added support for units with code larger than 64kb in the far code i8086
|
11 tahun lalu |
|
tgcpu.pas
|
c9f8703679
+ set ref.segment to NR_SS for all temps/localvars on i8086. This allows the
|
11 tahun lalu |
nickysn
1910177cf0
+ added heapmax support to the $M directive on i8086-msdos. It is currently