daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  138. function RefsEqual(const R1, R2: TReference): Boolean;
  139. function isgp32reg(supreg: tsuperregister): Boolean;
  140. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  141. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  142. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function reginop(supreg: tsuperregister; const o:toper): boolean;
  145. function instrWritesFlags(p: tai): boolean;
  146. function instrReadsFlags(p: tai): boolean;
  147. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  148. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  149. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  150. const c: tcontent): boolean;
  151. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  152. const c: tcontent; var memwritedestroyed: boolean): boolean;
  153. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  154. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  155. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  156. procedure SkipHead(var p: tai);
  157. function labelCanBeSkipped(p: tai_label): boolean;
  158. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  159. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  160. hp: tai): boolean;
  161. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  162. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  163. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  164. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  165. function sizescompatible(loadsize,newsize: topsize): boolean;
  166. function OpsEqual(const o1,o2:toper): Boolean;
  167. type
  168. tdfaobj = class
  169. constructor create(_list: TAsmList); virtual;
  170. function pass_1(_blockstart: tai): tai;
  171. function pass_generate_code: boolean;
  172. procedure clear;
  173. function getlabelwithsym(sym: tasmlabel): tai;
  174. private
  175. { Walks through the list to find the lowest and highest label number, inits the }
  176. { labeltable and fixes/optimizes some regallocs }
  177. procedure initlabeltable;
  178. function initdfapass2: boolean;
  179. procedure dodfapass2;
  180. { asm list we're working on }
  181. list: TAsmList;
  182. { current part of the asm list }
  183. blockstart, blockend: tai;
  184. { the amount of taiObjects in the current part of the assembler list }
  185. nroftaiobjs: longint;
  186. { Array which holds all TtaiProps }
  187. taipropblock: ptaipropblock;
  188. { all labels in the current block: their value mapped to their location }
  189. lolab, hilab, labdif: longint;
  190. labeltable: plabeltable;
  191. end;
  192. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  193. procedure incState(var S: Byte; amount: longint);
  194. {******************************* Variables *******************************}
  195. var
  196. dfa: tdfaobj;
  197. {*********************** end of Interface section ************************}
  198. Implementation
  199. Uses
  200. {$ifdef csdebug}
  201. cutils,
  202. {$else}
  203. {$ifdef statedebug}
  204. cutils,
  205. {$else}
  206. {$ifdef allocregdebug}
  207. cutils,
  208. {$endif}
  209. {$endif}
  210. {$endif}
  211. globals, systems, verbose, symconst, cgobj,procinfo;
  212. Type
  213. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  214. var
  215. {How many instructions are between the current instruction and the last one
  216. that modified the register}
  217. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  218. {$ifdef tempOpts}
  219. constructor TSearchLinkedListItem.init;
  220. begin
  221. end;
  222. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  223. begin
  224. equals := false;
  225. end;
  226. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  227. begin
  228. int1 := _int1;
  229. int2 := _int2;
  230. end;
  231. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  232. begin
  233. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  234. (TSearchDoubleIntItem(p).int2 = int2);
  235. end;
  236. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  237. var temp: PSearchLinkedListItem;
  238. begin
  239. temp := first;
  240. while (temp <> last.next) and
  241. not(temp.equals(p)) do
  242. temp := temp.next;
  243. searchByValue := temp <> last.next;
  244. end;
  245. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  246. begin
  247. temp := first;
  248. while (temp <> last.next) and
  249. not(temp.equals(p)) do
  250. temp := temp.next;
  251. if temp <> last.next then
  252. begin
  253. remove(temp);
  254. dispose(temp,done);
  255. end;
  256. end;
  257. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  258. {updates UsedRegs with the RegAlloc Information coming after p}
  259. begin
  260. repeat
  261. while assigned(p) and
  262. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  263. ((p.typ = ait_label) and
  264. labelCanBeSkipped(tai_label(current)))) Do
  265. p := tai(p.next);
  266. while assigned(p) and
  267. (p.typ=ait_RegAlloc) Do
  268. begin
  269. case tai_regalloc(p).ratype of
  270. ra_alloc :
  271. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  272. ra_dealloc :
  273. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  274. end;
  275. p := tai(p.next);
  276. end;
  277. until not(assigned(p)) or
  278. (not(p.typ in SkipInstr) and
  279. not((p.typ = ait_label) and
  280. labelCanBeSkipped(tai_label(current))));
  281. end;
  282. {$endif tempOpts}
  283. {************************ Create the Label table ************************}
  284. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  285. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  286. { starting with Starttai and ending with the next "real" instruction }
  287. begin
  288. findregalloc := false;
  289. repeat
  290. while assigned(starttai) and
  291. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  292. ((starttai.typ = ait_label) and
  293. labelcanbeskipped(tai_label(starttai)))) do
  294. starttai := tai(starttai.next);
  295. if assigned(starttai) and
  296. (starttai.typ = ait_regalloc) then
  297. begin
  298. if (tai_regalloc(Starttai).ratype = ratyp) and
  299. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  300. begin
  301. findregalloc:=true;
  302. break;
  303. end;
  304. starttai := tai(starttai.next);
  305. end
  306. else
  307. break;
  308. until false;
  309. end;
  310. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  311. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  312. var
  313. hp2: tai;
  314. begin
  315. hp2 := p;
  316. repeat
  317. hp2 := tai(hp2.previous);
  318. if assigned(hp2) and
  319. (hp2.typ = ait_regalloc) and
  320. (tai_regalloc(hp2).ratype=ra_dealloc) and
  321. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  322. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  323. begin
  324. asml.remove(hp2);
  325. hp2.free;
  326. break;
  327. end;
  328. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  329. end;
  330. begin
  331. case current_procinfo.procdef.returndef.deftype of
  332. arraydef,recorddef,pointerdef,
  333. stringdef,enumdef,procdef,objectdef,errordef,
  334. filedef,setdef,procvardef,
  335. classrefdef,forwarddef:
  336. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  337. orddef:
  338. if current_procinfo.procdef.returndef.size <> 0 then
  339. begin
  340. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  341. { for int64/qword }
  342. if current_procinfo.procdef.returndef.size = 8 then
  343. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  344. end;
  345. end;
  346. end;
  347. procedure getNoDeallocRegs(var regs: tregset);
  348. var
  349. regCounter: TSuperRegister;
  350. begin
  351. regs := [];
  352. case current_procinfo.procdef.returndef.deftype of
  353. arraydef,recorddef,pointerdef,
  354. stringdef,enumdef,procdef,objectdef,errordef,
  355. filedef,setdef,procvardef,
  356. classrefdef,forwarddef:
  357. regs := [RS_EAX];
  358. orddef:
  359. if current_procinfo.procdef.returndef.size <> 0 then
  360. begin
  361. regs := [RS_EAX];
  362. { for int64/qword }
  363. if current_procinfo.procdef.returndef.size = 8 then
  364. regs := regs + [RS_EDX];
  365. end;
  366. end;
  367. for regCounter := RS_EAX to RS_EBX do
  368. { if not(regCounter in rg.usableregsint) then}
  369. include(regs,regcounter);
  370. end;
  371. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  372. var
  373. hp1: tai;
  374. funcResRegs: tregset;
  375. funcResReg: boolean;
  376. begin
  377. { if not(supreg in rg.usableregsint) then
  378. exit;}
  379. { if not(supreg in [RS_EDI]) then
  380. exit;}
  381. getNoDeallocRegs(funcresregs);
  382. { funcResRegs := funcResRegs - rg.usableregsint;}
  383. { funcResRegs := funcResRegs - [RS_EDI];}
  384. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  385. funcResReg := getsupreg(reg) in funcresregs;
  386. hp1 := p;
  387. {
  388. while not(funcResReg and
  389. (p.typ = ait_instruction) and
  390. (taicpu(p).opcode = A_JMP) and
  391. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  392. getLastInstruction(p, p) and
  393. not(regInInstruction(supreg, p)) do
  394. hp1 := p;
  395. }
  396. { don't insert a dealloc for registers which contain the function result }
  397. { if they are followed by a jump to the exit label (for exit(...)) }
  398. { if not(funcResReg) or
  399. not((hp1.typ = ait_instruction) and
  400. (taicpu(hp1).opcode = A_JMP) and
  401. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  402. begin
  403. p := tai_regalloc.deAlloc(reg,nil);
  404. insertLLItem(AsmL, hp1.previous, hp1, p);
  405. end;
  406. end;
  407. {************************ Search the Label table ************************}
  408. function findlabel(l: tasmlabel; var hp: tai): boolean;
  409. {searches for the specified label starting from hp as long as the
  410. encountered instructions are labels, to be able to optimize constructs like
  411. jne l2 jmp l2
  412. jmp l3 and l1:
  413. l1: l2:
  414. l2:}
  415. var
  416. p: tai;
  417. begin
  418. p := hp;
  419. while assigned(p) and
  420. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  421. if (p.typ <> ait_Label) or
  422. (tai_label(p).labsym <> l) then
  423. GetNextInstruction(p, p)
  424. else
  425. begin
  426. hp := p;
  427. findlabel := true;
  428. exit
  429. end;
  430. findlabel := false;
  431. end;
  432. {************************ Some general functions ************************}
  433. function tch2reg(ch: tinschange): tsuperregister;
  434. {converts a TChange variable to a TRegister}
  435. const
  436. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  437. begin
  438. if (ch <= CH_REDI) then
  439. tch2reg := ch2reg[ch]
  440. else if (ch <= CH_WEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  442. else if (ch <= CH_RWEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  444. else if (ch <= CH_MEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  446. else
  447. InternalError($db)
  448. end;
  449. { inserts new_one between prev and foll }
  450. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  451. begin
  452. if assigned(prev) then
  453. if assigned(foll) then
  454. begin
  455. if assigned(new_one) then
  456. begin
  457. new_one.previous := prev;
  458. new_one.next := foll;
  459. prev.next := new_one;
  460. foll.previous := new_one;
  461. { shgould we update line information }
  462. if (not (tai(new_one).typ in SkipLineInfo)) and
  463. (not (tai(foll).typ in SkipLineInfo)) then
  464. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  465. end;
  466. end
  467. else
  468. asml.Concat(new_one)
  469. else
  470. if assigned(foll) then
  471. asml.Insert(new_one)
  472. end;
  473. {********************* Compare parts of tai objects *********************}
  474. function regssamesize(reg1, reg2: tregister): boolean;
  475. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  476. 8bit, 16bit or 32bit)}
  477. begin
  478. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  479. internalerror(2003111602);
  480. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  481. end;
  482. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  483. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  484. OldReg and NewReg have the same size (has to be chcked in advance with
  485. RegsSameSize) and that neither equals RS_INVALID}
  486. var
  487. newsupreg, oldsupreg: tsuperregister;
  488. begin
  489. if (newreg = NR_NO) or (oldreg = NR_NO) then
  490. internalerror(2003111601);
  491. newsupreg := getsupreg(newreg);
  492. oldsupreg := getsupreg(oldreg);
  493. with RegInfo Do
  494. begin
  495. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  496. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  497. New2OldReg[newsupreg] := oldsupreg;
  498. end;
  499. end;
  500. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  501. begin
  502. case o.typ Of
  503. top_reg:
  504. if (o.reg <> NR_NO) then
  505. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  506. top_ref:
  507. begin
  508. if o.ref^.base <> NR_NO then
  509. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  510. if o.ref^.index <> NR_NO then
  511. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  512. end;
  513. end;
  514. end;
  515. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  516. begin
  517. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  518. if RegsSameSize(oldreg, newreg) then
  519. with reginfo do
  520. {here we always check for the 32 bit component, because it is possible that
  521. the 8 bit component has not been set, event though NewReg already has been
  522. processed. This happens if it has been compared with a register that doesn't
  523. have an 8 bit component (such as EDI). in that case the 8 bit component is
  524. still set to RS_NO and the comparison in the else-part will fail}
  525. if (getsupreg(oldReg) in OldRegsEncountered) then
  526. if (getsupreg(NewReg) in NewRegsEncountered) then
  527. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  528. { if we haven't encountered the new register yet, but we have encountered the
  529. old one already, the new one can only be correct if it's being written to
  530. (and consequently the old one is also being written to), otherwise
  531. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  532. movl (%eax), %eax movl (%edx), %edx
  533. are considered equivalent}
  534. else
  535. if (opact = opact_write) then
  536. begin
  537. AddReg2RegInfo(oldreg, newreg, reginfo);
  538. RegsEquivalent := true
  539. end
  540. else
  541. Regsequivalent := false
  542. else
  543. if not(getsupreg(newreg) in NewRegsEncountered) and
  544. ((opact = opact_write) or
  545. ((newreg = oldreg) and
  546. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  547. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  548. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  549. begin
  550. AddReg2RegInfo(oldreg, newreg, reginfo);
  551. RegsEquivalent := true
  552. end
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := oldreg = newreg
  559. end;
  560. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  561. begin
  562. RefsEquivalent :=
  563. (r1.offset = r2.offset) and
  564. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  565. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  566. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  567. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  568. (r1.relsymbol = r2.relsymbol);
  569. end;
  570. function refsequal(const r1, r2: treference): boolean;
  571. begin
  572. refsequal :=
  573. (r1.offset = r2.offset) and
  574. (r1.segment = r2.segment) and (r1.base = r2.base) and
  575. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  576. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  577. (r1.relsymbol = r2.relsymbol);
  578. end;
  579. {$ifdef q+}
  580. {$q-}
  581. {$define overflowon}
  582. {$endif q+}
  583. // checks whether a write to r2 of size "size" contains address r1
  584. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  585. var
  586. realsize1, realsize2: aint;
  587. begin
  588. realsize1 := tcgsize2size[size1];
  589. realsize2 := tcgsize2size[size2];
  590. refsoverlapping :=
  591. (r2.offset <= r1.offset+realsize1) and
  592. (r1.offset <= r2.offset+realsize2) and
  593. (r1.segment = r2.segment) and (r1.base = r2.base) and
  594. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  595. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  596. (r1.relsymbol = r2.relsymbol);
  597. end;
  598. {$ifdef overflowon}
  599. {$q+}
  600. {$undef overflowon}
  601. {$endif overflowon}
  602. function isgp32reg(supreg: tsuperregister): boolean;
  603. {Checks if the register is a 32 bit general purpose register}
  604. begin
  605. isgp32reg := false;
  606. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  607. isgp32reg := true
  608. end;
  609. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  610. begin {checks whether ref contains a reference to reg}
  611. reginref :=
  612. ((ref.base <> NR_NO) and
  613. (getsupreg(ref.base) = supreg)) or
  614. ((ref.index <> NR_NO) and
  615. (getsupreg(ref.index) = supreg))
  616. end;
  617. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  618. var
  619. p: taicpu;
  620. opcount: longint;
  621. begin
  622. RegReadByInstruction := false;
  623. if hp.typ <> ait_instruction then
  624. exit;
  625. p := taicpu(hp);
  626. case p.opcode of
  627. A_CALL:
  628. regreadbyinstruction := true;
  629. A_IMUL:
  630. case p.ops of
  631. 1:
  632. regReadByInstruction :=
  633. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  634. 2,3:
  635. regReadByInstruction :=
  636. reginop(supreg,p.oper[0]^) or
  637. reginop(supreg,p.oper[1]^);
  638. end;
  639. A_IDIV,A_DIV,A_MUL:
  640. begin
  641. regReadByInstruction :=
  642. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  643. end;
  644. else
  645. begin
  646. for opcount := 0 to p.ops-1 do
  647. if (p.oper[opCount]^.typ = top_ref) and
  648. reginref(supreg,p.oper[opcount]^.ref^) then
  649. begin
  650. RegReadByInstruction := true;
  651. exit
  652. end;
  653. for opcount := 1 to maxinschanges do
  654. case insprop[p.opcode].ch[opcount] of
  655. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  656. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  657. begin
  658. RegReadByInstruction := true;
  659. exit
  660. end;
  661. CH_RWOP1,CH_ROP1,CH_MOP1:
  662. if //(p.oper[0]^.typ = top_reg) and
  663. reginop(supreg,p.oper[0]^) then
  664. begin
  665. RegReadByInstruction := true;
  666. exit
  667. end;
  668. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  669. if //(p.oper[1]^.typ = top_reg) and
  670. reginop(supreg,p.oper[1]^) then
  671. begin
  672. RegReadByInstruction := true;
  673. exit
  674. end;
  675. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  676. if //(p.oper[2]^.typ = top_reg) and
  677. reginop(supreg,p.oper[2]^) then
  678. begin
  679. RegReadByInstruction := true;
  680. exit
  681. end;
  682. end;
  683. end;
  684. end;
  685. end;
  686. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  687. { Checks if reg is used by the instruction p1 }
  688. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  689. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  690. var
  691. p: taicpu;
  692. opcount: longint;
  693. begin
  694. regInInstruction := false;
  695. if p1.typ <> ait_instruction then
  696. exit;
  697. p := taicpu(p1);
  698. case p.opcode of
  699. A_CALL:
  700. regininstruction := true;
  701. A_IMUL:
  702. case p.ops of
  703. 1:
  704. regInInstruction :=
  705. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  706. 2,3:
  707. regInInstruction :=
  708. reginop(supreg,p.oper[0]^) or
  709. reginop(supreg,p.oper[1]^) or
  710. (assigned(p.oper[2]) and
  711. reginop(supreg,p.oper[2]^));
  712. end;
  713. A_IDIV,A_DIV,A_MUL:
  714. regInInstruction :=
  715. reginop(supreg,p.oper[0]^) or
  716. (supreg in [RS_EAX,RS_EDX])
  717. else
  718. begin
  719. for opcount := 0 to p.ops-1 do
  720. if (p.oper[opCount]^.typ = top_ref) and
  721. reginref(supreg,p.oper[opcount]^.ref^) then
  722. begin
  723. regInInstruction := true;
  724. exit
  725. end;
  726. for opcount := 1 to maxinschanges do
  727. case insprop[p.opcode].Ch[opCount] of
  728. CH_REAX..CH_MEDI:
  729. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  730. begin
  731. regInInstruction := true;
  732. exit;
  733. end;
  734. CH_ROp1..CH_MOp1:
  735. if reginop(supreg,p.oper[0]^) then
  736. begin
  737. regInInstruction := true;
  738. exit
  739. end;
  740. Ch_ROp2..Ch_MOp2:
  741. if reginop(supreg,p.oper[1]^) then
  742. begin
  743. regInInstruction := true;
  744. exit
  745. end;
  746. Ch_ROp3..Ch_MOp3:
  747. if reginop(supreg,p.oper[2]^) then
  748. begin
  749. regInInstruction := true;
  750. exit
  751. end;
  752. end;
  753. end;
  754. end;
  755. end;
  756. function reginop(supreg: tsuperregister; const o:toper): boolean;
  757. begin
  758. reginop := false;
  759. case o.typ Of
  760. top_reg:
  761. reginop :=
  762. (getregtype(o.reg) = R_INTREGISTER) and
  763. (supreg = getsupreg(o.reg));
  764. top_ref:
  765. reginop :=
  766. ((o.ref^.base <> NR_NO) and
  767. (supreg = getsupreg(o.ref^.base))) or
  768. ((o.ref^.index <> NR_NO) and
  769. (supreg = getsupreg(o.ref^.index)));
  770. end;
  771. end;
  772. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  773. var
  774. InstrProp: TInsProp;
  775. TmpResult: Boolean;
  776. Cnt: Word;
  777. begin
  778. TmpResult := False;
  779. if supreg = RS_INVALID then
  780. exit;
  781. if (p1.typ = ait_instruction) then
  782. case taicpu(p1).opcode of
  783. A_IMUL:
  784. With taicpu(p1) Do
  785. TmpResult :=
  786. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  787. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  788. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  789. A_DIV, A_IDIV, A_MUL:
  790. With taicpu(p1) Do
  791. TmpResult :=
  792. (supreg in [RS_EAX,RS_EDX]);
  793. else
  794. begin
  795. Cnt := 1;
  796. InstrProp := InsProp[taicpu(p1).OpCode];
  797. while (Cnt <= maxinschanges) and
  798. (InstrProp.Ch[Cnt] <> Ch_None) and
  799. not(TmpResult) Do
  800. begin
  801. case InstrProp.Ch[Cnt] Of
  802. Ch_WEAX..Ch_MEDI:
  803. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  804. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  805. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  806. reginop(supreg,taicpu(p1).oper[0]^);
  807. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  808. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  809. reginop(supreg,taicpu(p1).oper[1]^);
  810. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  811. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  812. reginop(supreg,taicpu(p1).oper[2]^);
  813. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  814. Ch_ALL: TmpResult := true;
  815. end;
  816. inc(Cnt)
  817. end
  818. end
  819. end;
  820. RegModifiedByInstruction := TmpResult
  821. end;
  822. function instrWritesFlags(p: tai): boolean;
  823. var
  824. l: longint;
  825. begin
  826. instrWritesFlags := true;
  827. case p.typ of
  828. ait_instruction:
  829. begin
  830. for l := 1 to maxinschanges do
  831. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  832. exit;
  833. end;
  834. ait_label:
  835. exit;
  836. end;
  837. instrWritesFlags := false;
  838. end;
  839. function instrReadsFlags(p: tai): boolean;
  840. var
  841. l: longint;
  842. begin
  843. instrReadsFlags := true;
  844. case p.typ of
  845. ait_instruction:
  846. begin
  847. for l := 1 to maxinschanges do
  848. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  849. exit;
  850. end;
  851. ait_label:
  852. exit;
  853. end;
  854. instrReadsFlags := false;
  855. end;
  856. {********************* GetNext and GetLastInstruction *********************}
  857. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  858. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  859. { next tai object in Next. Returns false if there isn't any }
  860. begin
  861. repeat
  862. if (Current.typ = ait_marker) and
  863. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  864. begin
  865. GetNextInstruction := False;
  866. Next := Nil;
  867. Exit
  868. end;
  869. Current := tai(current.Next);
  870. while assigned(Current) and
  871. ((current.typ in skipInstr) or
  872. ((current.typ = ait_label) and
  873. labelCanBeSkipped(tai_label(current)))) do
  874. Current := tai(current.Next);
  875. { if assigned(Current) and
  876. (current.typ = ait_Marker) and
  877. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  878. begin
  879. while assigned(Current) and
  880. ((current.typ <> ait_Marker) or
  881. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  882. Current := tai(current.Next);
  883. end;}
  884. until not(assigned(Current)) or
  885. (current.typ <> ait_Marker) or
  886. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  887. Next := Current;
  888. if assigned(Current) and
  889. not((current.typ in SkipInstr) or
  890. ((current.typ = ait_label) and
  891. labelCanBeSkipped(tai_label(current))))
  892. then
  893. GetNextInstruction :=
  894. not((current.typ = ait_marker) and
  895. (tai_marker(current).kind = mark_AsmBlockStart))
  896. else
  897. begin
  898. GetNextInstruction := False;
  899. Next := nil;
  900. end;
  901. end;
  902. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  903. {skips the ait-types in SkipInstr puts the previous tai object in
  904. Last. Returns false if there isn't any}
  905. begin
  906. repeat
  907. Current := tai(current.previous);
  908. while assigned(Current) and
  909. (((current.typ = ait_Marker) and
  910. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  911. (current.typ in SkipInstr) or
  912. ((current.typ = ait_label) and
  913. labelCanBeSkipped(tai_label(current)))) Do
  914. Current := tai(current.previous);
  915. { if assigned(Current) and
  916. (current.typ = ait_Marker) and
  917. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  918. begin
  919. while assigned(Current) and
  920. ((current.typ <> ait_Marker) or
  921. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  922. Current := tai(current.previous);
  923. end;}
  924. until not(assigned(Current)) or
  925. (current.typ <> ait_Marker) or
  926. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  927. if not(assigned(Current)) or
  928. (current.typ in SkipInstr) or
  929. ((current.typ = ait_label) and
  930. labelCanBeSkipped(tai_label(current))) or
  931. ((current.typ = ait_Marker) and
  932. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  933. then
  934. begin
  935. Last := nil;
  936. GetLastInstruction := False
  937. end
  938. else
  939. begin
  940. Last := Current;
  941. GetLastInstruction := True;
  942. end;
  943. end;
  944. procedure SkipHead(var p: tai);
  945. var
  946. oldp: tai;
  947. begin
  948. repeat
  949. oldp := p;
  950. if (p.typ in SkipInstr) or
  951. ((p.typ = ait_marker) and
  952. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd])) then
  953. GetNextInstruction(p,p)
  954. else if ((p.Typ = Ait_Marker) and
  955. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  956. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  957. TAsmList list}
  958. GetNextInstruction(tai(p.previous),p);
  959. until p = oldp
  960. end;
  961. function labelCanBeSkipped(p: tai_label): boolean;
  962. begin
  963. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  964. end;
  965. {******************* The Data Flow Analyzer functions ********************}
  966. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  967. hp: tai): boolean;
  968. { assumes reg is a 32bit register }
  969. var
  970. p: taicpu;
  971. begin
  972. if not assigned(hp) or
  973. (hp.typ <> ait_instruction) then
  974. begin
  975. regLoadedWithNewValue := false;
  976. exit;
  977. end;
  978. p := taicpu(hp);
  979. regLoadedWithNewValue :=
  980. (((p.opcode = A_MOV) or
  981. (p.opcode = A_MOVZX) or
  982. (p.opcode = A_MOVSX) or
  983. (p.opcode = A_LEA)) and
  984. (p.oper[1]^.typ = top_reg) and
  985. (getsupreg(p.oper[1]^.reg) = supreg) and
  986. (canDependOnPrevValue or
  987. (p.oper[0]^.typ <> top_ref) or
  988. not regInRef(supreg,p.oper[0]^.ref^)) or
  989. ((p.opcode = A_POP) and
  990. (getsupreg(p.oper[0]^.reg) = supreg)));
  991. end;
  992. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  993. {updates UsedRegs with the RegAlloc Information coming after p}
  994. begin
  995. repeat
  996. while assigned(p) and
  997. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  998. ((p.typ = ait_label) and
  999. labelCanBeSkipped(tai_label(p))) or
  1000. ((p.typ = ait_marker) and
  1001. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_InlineStart,mark_InlineEnd]))) do
  1002. p := tai(p.next);
  1003. while assigned(p) and
  1004. (p.typ=ait_RegAlloc) Do
  1005. begin
  1006. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1007. begin
  1008. case tai_regalloc(p).ratype of
  1009. ra_alloc :
  1010. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1011. ra_dealloc :
  1012. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1013. end;
  1014. end;
  1015. p := tai(p.next);
  1016. end;
  1017. until not(assigned(p)) or
  1018. (not(p.typ in SkipInstr) and
  1019. not((p.typ = ait_label) and
  1020. labelCanBeSkipped(tai_label(p))));
  1021. end;
  1022. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1023. { allocates register reg between (and including) instructions p1 and p2 }
  1024. { the type of p1 and p2 must not be in SkipInstr }
  1025. { note that this routine is both called from the peephole optimizer }
  1026. { where optinfo is not yet initialised) and from the cse (where it is) }
  1027. var
  1028. hp, start: tai;
  1029. removedsomething,
  1030. firstRemovedWasAlloc,
  1031. lastRemovedWasDealloc: boolean;
  1032. supreg: tsuperregister;
  1033. begin
  1034. {$ifdef EXTDEBUG}
  1035. if assigned(p1.optinfo) and
  1036. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1037. internalerror(2004101010);
  1038. {$endif EXTDEBUG}
  1039. start := p1;
  1040. if (reg = NR_ESP) or
  1041. (reg = current_procinfo.framepointer) or
  1042. not(assigned(p1)) then
  1043. { this happens with registers which are loaded implicitely, outside the }
  1044. { current block (e.g. esi with self) }
  1045. exit;
  1046. supreg := getsupreg(reg);
  1047. { make sure we allocate it for this instruction }
  1048. getnextinstruction(p2,p2);
  1049. lastRemovedWasDealloc := false;
  1050. removedSomething := false;
  1051. firstRemovedWasAlloc := false;
  1052. {$ifdef allocregdebug}
  1053. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1054. ' from here...'));
  1055. insertllitem(asml,p1.previous,p1,hp);
  1056. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1057. ' till here...'));
  1058. insertllitem(asml,p2,p2.next,hp);
  1059. {$endif allocregdebug}
  1060. if not(supreg in initialusedregs) then
  1061. begin
  1062. hp := tai_regalloc.alloc(reg,nil);
  1063. insertllItem(asmL,p1.previous,p1,hp);
  1064. end;
  1065. while assigned(p1) and
  1066. (p1 <> p2) do
  1067. begin
  1068. if assigned(p1.optinfo) then
  1069. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1070. p1 := tai(p1.next);
  1071. repeat
  1072. while assigned(p1) and
  1073. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1074. p1 := tai(p1.next);
  1075. { remove all allocation/deallocation info about the register in between }
  1076. if assigned(p1) and
  1077. (p1.typ = ait_regalloc) then
  1078. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1079. begin
  1080. if not removedSomething then
  1081. begin
  1082. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1083. removedSomething := true;
  1084. end;
  1085. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1086. hp := tai(p1.Next);
  1087. asml.Remove(p1);
  1088. p1.free;
  1089. p1 := hp;
  1090. end
  1091. else p1 := tai(p1.next);
  1092. until not(assigned(p1)) or
  1093. not(p1.typ in SkipInstr);
  1094. end;
  1095. if assigned(p1) then
  1096. begin
  1097. if firstRemovedWasAlloc then
  1098. begin
  1099. hp := tai_regalloc.Alloc(reg,nil);
  1100. insertLLItem(asmL,start.previous,start,hp);
  1101. end;
  1102. if lastRemovedWasDealloc then
  1103. begin
  1104. hp := tai_regalloc.DeAlloc(reg,nil);
  1105. insertLLItem(asmL,p1.previous,p1,hp);
  1106. end;
  1107. end;
  1108. end;
  1109. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1110. var
  1111. hp: tai;
  1112. first: boolean;
  1113. begin
  1114. findregdealloc := false;
  1115. first := true;
  1116. while assigned(p.previous) and
  1117. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1118. ((tai(p.previous).typ = ait_label) and
  1119. labelCanBeSkipped(tai_label(p.previous)))) do
  1120. begin
  1121. p := tai(p.previous);
  1122. if (p.typ = ait_regalloc) and
  1123. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1124. if (tai_regalloc(p).ratype=ra_dealloc) then
  1125. if first then
  1126. begin
  1127. findregdealloc := true;
  1128. break;
  1129. end
  1130. else
  1131. begin
  1132. findRegDealloc :=
  1133. getNextInstruction(p,hp) and
  1134. regLoadedWithNewValue(supreg,false,hp);
  1135. break
  1136. end
  1137. else
  1138. first := false;
  1139. end
  1140. end;
  1141. procedure incState(var S: Byte; amount: longint);
  1142. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1143. errors}
  1144. begin
  1145. if (s <= $ff - amount) then
  1146. inc(s, amount)
  1147. else s := longint(s) + amount - $ff;
  1148. end;
  1149. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1150. { Content is the sequence of instructions that describes the contents of }
  1151. { seqReg. reg is being overwritten by the current instruction. if the }
  1152. { content of seqReg depends on reg (ie. because of a }
  1153. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1154. var
  1155. p: tai;
  1156. Counter: Word;
  1157. TmpResult: Boolean;
  1158. RegsChecked: TRegSet;
  1159. begin
  1160. RegsChecked := [];
  1161. p := Content.StartMod;
  1162. TmpResult := False;
  1163. Counter := 1;
  1164. while not(TmpResult) and
  1165. (Counter <= Content.NrOfMods) Do
  1166. begin
  1167. if (p.typ = ait_instruction) and
  1168. ((taicpu(p).opcode = A_MOV) or
  1169. (taicpu(p).opcode = A_MOVZX) or
  1170. (taicpu(p).opcode = A_MOVSX) or
  1171. (taicpu(p).opcode = A_LEA)) and
  1172. (taicpu(p).oper[0]^.typ = top_ref) then
  1173. With taicpu(p).oper[0]^.ref^ Do
  1174. if ((base = current_procinfo.FramePointer) or
  1175. (assigned(symbol) and (base = NR_NO))) and
  1176. (index = NR_NO) then
  1177. begin
  1178. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1179. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1180. break;
  1181. end
  1182. else
  1183. tmpResult :=
  1184. regReadByInstruction(supreg,p) and
  1185. regModifiedByInstruction(seqReg,p)
  1186. else
  1187. tmpResult :=
  1188. regReadByInstruction(supreg,p) and
  1189. regModifiedByInstruction(seqReg,p);
  1190. inc(Counter);
  1191. GetNextInstruction(p,p)
  1192. end;
  1193. sequenceDependsonReg := TmpResult
  1194. end;
  1195. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1196. var
  1197. counter: tsuperregister;
  1198. begin
  1199. for counter := RS_EAX to RS_EDI do
  1200. if counter <> supreg then
  1201. with p1^.regs[counter] Do
  1202. begin
  1203. if (typ in [con_ref,con_noRemoveRef]) and
  1204. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1205. if typ in [con_ref, con_invalid] then
  1206. typ := con_invalid
  1207. { con_noRemoveRef = con_unknown }
  1208. else
  1209. typ := con_unknown;
  1210. if assigned(memwrite) and
  1211. regInRef(counter,memwrite.oper[1]^.ref^) then
  1212. memwrite := nil;
  1213. end;
  1214. end;
  1215. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1216. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1217. contents of registers are loaded with a memory location based on reg.
  1218. doincState is false when this register has to be destroyed not because
  1219. it's contents are directly modified/overwritten, but because of an indirect
  1220. action (e.g. this register holds the contents of a variable and the value
  1221. of the variable in memory is changed) }
  1222. begin
  1223. { the following happens for fpu registers }
  1224. if (supreg < low(NrOfInstrSinceLastMod)) or
  1225. (supreg > high(NrOfInstrSinceLastMod)) then
  1226. exit;
  1227. NrOfInstrSinceLastMod[supreg] := 0;
  1228. with p1^.regs[supreg] do
  1229. begin
  1230. if doincState then
  1231. begin
  1232. incState(wstate,1);
  1233. typ := con_unknown;
  1234. startmod := nil;
  1235. end
  1236. else
  1237. if typ in [con_ref,con_const,con_invalid] then
  1238. typ := con_invalid
  1239. { con_noRemoveRef = con_unknown }
  1240. else
  1241. typ := con_unknown;
  1242. memwrite := nil;
  1243. end;
  1244. invalidateDependingRegs(p1,supreg);
  1245. end;
  1246. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1247. begin
  1248. if (p.typ = ait_instruction) then
  1249. begin
  1250. case taicpu(p).oper[0]^.typ Of
  1251. top_reg:
  1252. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1253. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1254. top_ref:
  1255. With TReference(taicpu(p).oper[0]^) Do
  1256. begin
  1257. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1258. then RegSet := RegSet + [base];
  1259. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1260. then RegSet := RegSet + [index];
  1261. end;
  1262. end;
  1263. case taicpu(p).oper[1]^.typ Of
  1264. top_reg:
  1265. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1266. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1267. top_ref:
  1268. With TReference(taicpu(p).oper[1]^) Do
  1269. begin
  1270. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1271. then RegSet := RegSet + [base];
  1272. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1273. then RegSet := RegSet + [index];
  1274. end;
  1275. end;
  1276. end;
  1277. end;}
  1278. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1279. begin {checks whether the two ops are equivalent}
  1280. OpsEquivalent := False;
  1281. if o1.typ=o2.typ then
  1282. case o1.typ Of
  1283. top_reg:
  1284. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1285. top_ref:
  1286. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1287. Top_Const:
  1288. OpsEquivalent := o1.val = o2.val;
  1289. Top_None:
  1290. OpsEquivalent := True
  1291. end;
  1292. end;
  1293. function OpsEqual(const o1,o2:toper): Boolean;
  1294. begin {checks whether the two ops are equal}
  1295. OpsEqual := False;
  1296. if o1.typ=o2.typ then
  1297. case o1.typ Of
  1298. top_reg :
  1299. OpsEqual:=o1.reg=o2.reg;
  1300. top_ref :
  1301. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1302. Top_Const :
  1303. OpsEqual:=o1.val=o2.val;
  1304. Top_None :
  1305. OpsEqual := True
  1306. end;
  1307. end;
  1308. function sizescompatible(loadsize,newsize: topsize): boolean;
  1309. begin
  1310. case loadsize of
  1311. S_B,S_BW,S_BL:
  1312. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1313. S_W,S_WL:
  1314. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1315. else
  1316. sizescompatible := newsize = S_L;
  1317. end;
  1318. end;
  1319. function opscompatible(p1,p2: taicpu): boolean;
  1320. begin
  1321. case p1.opcode of
  1322. A_MOVZX,A_MOVSX:
  1323. opscompatible :=
  1324. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1325. sizescompatible(p1.opsize,p2.opsize);
  1326. else
  1327. opscompatible :=
  1328. (p1.opcode = p2.opcode) and
  1329. (p1.ops = p2.ops) and
  1330. (p1.opsize = p2.opsize);
  1331. end;
  1332. end;
  1333. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1334. {$ifdef csdebug}
  1335. var
  1336. hp: tai;
  1337. {$endif csdebug}
  1338. begin {checks whether two taicpu instructions are equal}
  1339. if assigned(p1) and assigned(p2) and
  1340. (tai(p1).typ = ait_instruction) and
  1341. (tai(p2).typ = ait_instruction) and
  1342. opscompatible(taicpu(p1),taicpu(p2)) and
  1343. (not(assigned(taicpu(p1).oper[0])) or
  1344. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1345. (not(assigned(taicpu(p1).oper[1])) or
  1346. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1347. (not(assigned(taicpu(p1).oper[2])) or
  1348. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1349. {both instructions have the same structure:
  1350. "<operator> <operand of type1>, <operand of type 2>"}
  1351. if ((taicpu(p1).opcode = A_MOV) or
  1352. (taicpu(p1).opcode = A_MOVZX) or
  1353. (taicpu(p1).opcode = A_MOVSX) or
  1354. (taicpu(p1).opcode = A_LEA)) and
  1355. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1356. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1357. {the "old" instruction is a load of a register with a new value, not with
  1358. a value based on the contents of this register (so no "mov (reg), reg")}
  1359. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1360. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1361. {the "new" instruction is also a load of a register with a new value, and
  1362. this value is fetched from the same memory location}
  1363. begin
  1364. With taicpu(p2).oper[0]^.ref^ Do
  1365. begin
  1366. if (base <> NR_NO) and
  1367. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1368. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1369. if (index <> NR_NO) and
  1370. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1371. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1372. end;
  1373. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1374. from the reference are the same in the old and in the new instruction
  1375. sequence}
  1376. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1377. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1378. InstructionsEquivalent :=
  1379. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1380. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1381. end
  1382. {the registers are loaded with values from different memory locations. if
  1383. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1384. would be considered equivalent}
  1385. else
  1386. InstructionsEquivalent := False
  1387. else
  1388. {load register with a value based on the current value of this register}
  1389. begin
  1390. With taicpu(p2).oper[0]^.ref^ Do
  1391. begin
  1392. if (base <> NR_NO) and
  1393. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1394. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1395. {it won't do any harm if the register is already in RegsLoadedForRef}
  1396. begin
  1397. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1398. {$ifdef csdebug}
  1399. Writeln(std_regname(base), ' added');
  1400. {$endif csdebug}
  1401. end;
  1402. if (index <> NR_NO) and
  1403. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1404. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1405. begin
  1406. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1407. {$ifdef csdebug}
  1408. Writeln(std_regname(index), ' added');
  1409. {$endif csdebug}
  1410. end;
  1411. end;
  1412. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1413. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1414. begin
  1415. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1416. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1417. {$ifdef csdebug}
  1418. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1419. {$endif csdebug}
  1420. end;
  1421. InstructionsEquivalent :=
  1422. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1423. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1424. end
  1425. else
  1426. {an instruction <> mov, movzx, movsx}
  1427. begin
  1428. {$ifdef csdebug}
  1429. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1430. hp.previous := p2;
  1431. hp.next := p2.next;
  1432. p2.next.previous := hp;
  1433. p2.next := hp;
  1434. {$endif csdebug}
  1435. InstructionsEquivalent :=
  1436. (not(assigned(taicpu(p1).oper[0])) or
  1437. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1438. (not(assigned(taicpu(p1).oper[1])) or
  1439. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1440. (not(assigned(taicpu(p1).oper[2])) or
  1441. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1442. end
  1443. {the instructions haven't even got the same structure, so they're certainly
  1444. not equivalent}
  1445. else
  1446. begin
  1447. {$ifdef csdebug}
  1448. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1449. hp.previous := p2;
  1450. hp.next := p2.next;
  1451. p2.next.previous := hp;
  1452. p2.next := hp;
  1453. {$endif csdebug}
  1454. InstructionsEquivalent := False;
  1455. end;
  1456. {$ifdef csdebug}
  1457. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1458. hp.previous := p2;
  1459. hp.next := p2.next;
  1460. p2.next.previous := hp;
  1461. p2.next := hp;
  1462. {$endif csdebug}
  1463. end;
  1464. (*
  1465. function InstructionsEqual(p1, p2: tai): Boolean;
  1466. begin {checks whether two taicpu instructions are equal}
  1467. InstructionsEqual :=
  1468. assigned(p1) and assigned(p2) and
  1469. ((tai(p1).typ = ait_instruction) and
  1470. (tai(p1).typ = ait_instruction) and
  1471. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1472. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1473. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1474. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1475. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1476. end;
  1477. *)
  1478. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1479. begin
  1480. if supreg in [RS_EAX..RS_EDI] then
  1481. incState(p^.regs[supreg].rstate,1)
  1482. end;
  1483. procedure readref(p: ptaiprop; const ref: preference);
  1484. begin
  1485. if ref^.base <> NR_NO then
  1486. readreg(p, getsupreg(ref^.base));
  1487. if ref^.index <> NR_NO then
  1488. readreg(p, getsupreg(ref^.index));
  1489. end;
  1490. procedure ReadOp(p: ptaiprop;const o:toper);
  1491. begin
  1492. case o.typ Of
  1493. top_reg: readreg(p, getsupreg(o.reg));
  1494. top_ref: readref(p, o.ref);
  1495. end;
  1496. end;
  1497. function RefInInstruction(const ref: TReference; p: tai;
  1498. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1499. {checks whehter ref is used in p}
  1500. var
  1501. mysize: tcgsize;
  1502. TmpResult: Boolean;
  1503. begin
  1504. TmpResult := False;
  1505. if (p.typ = ait_instruction) then
  1506. begin
  1507. mysize := topsize2tcgsize[taicpu(p).opsize];
  1508. if (taicpu(p).ops >= 1) and
  1509. (taicpu(p).oper[0]^.typ = top_ref) then
  1510. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1511. if not(TmpResult) and
  1512. (taicpu(p).ops >= 2) and
  1513. (taicpu(p).oper[1]^.typ = top_ref) then
  1514. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1515. if not(TmpResult) and
  1516. (taicpu(p).ops >= 3) and
  1517. (taicpu(p).oper[2]^.typ = top_ref) then
  1518. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1519. end;
  1520. RefInInstruction := TmpResult;
  1521. end;
  1522. function RefInSequence(const ref: TReference; Content: TContent;
  1523. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1524. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1525. tai objects) to see whether ref is used somewhere}
  1526. var p: tai;
  1527. Counter: Word;
  1528. TmpResult: Boolean;
  1529. begin
  1530. p := Content.StartMod;
  1531. TmpResult := False;
  1532. Counter := 1;
  1533. while not(TmpResult) and
  1534. (Counter <= Content.NrOfMods) Do
  1535. begin
  1536. if (p.typ = ait_instruction) and
  1537. RefInInstruction(ref, p, RefsEq, size)
  1538. then TmpResult := True;
  1539. inc(Counter);
  1540. GetNextInstruction(p,p)
  1541. end;
  1542. RefInSequence := TmpResult
  1543. end;
  1544. {$ifdef q+}
  1545. {$q-}
  1546. {$define overflowon}
  1547. {$endif q+}
  1548. // checks whether a write to r2 of size "size" contains address r1
  1549. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1550. var
  1551. realsize1, realsize2: aint;
  1552. begin
  1553. realsize1 := tcgsize2size[size1];
  1554. realsize2 := tcgsize2size[size2];
  1555. arrayrefsoverlapping :=
  1556. (r2.offset <= r1.offset+realsize1) and
  1557. (r1.offset <= r2.offset+realsize2) and
  1558. (r1.segment = r2.segment) and
  1559. (r1.symbol=r2.symbol) and
  1560. (r1.base = r2.base)
  1561. end;
  1562. {$ifdef overflowon}
  1563. {$q+}
  1564. {$undef overflowon}
  1565. {$endif overflowon}
  1566. function isSimpleRef(const ref: treference): boolean;
  1567. { returns true if ref is reference to a local or global variable, to a }
  1568. { parameter or to an object field (this includes arrays). Returns false }
  1569. { otherwise. }
  1570. begin
  1571. isSimpleRef :=
  1572. assigned(ref.symbol) or
  1573. (ref.base = current_procinfo.framepointer);
  1574. end;
  1575. function containsPointerRef(p: tai): boolean;
  1576. { checks if an instruction contains a reference which is a pointer location }
  1577. var
  1578. hp: taicpu;
  1579. count: longint;
  1580. begin
  1581. containsPointerRef := false;
  1582. if p.typ <> ait_instruction then
  1583. exit;
  1584. hp := taicpu(p);
  1585. for count := 0 to hp.ops-1 do
  1586. begin
  1587. case hp.oper[count]^.typ of
  1588. top_ref:
  1589. if not isSimpleRef(hp.oper[count]^.ref^) then
  1590. begin
  1591. containsPointerRef := true;
  1592. exit;
  1593. end;
  1594. top_none:
  1595. exit;
  1596. end;
  1597. end;
  1598. end;
  1599. function containsPointerLoad(c: tcontent): boolean;
  1600. { checks whether the contents of a register contain a pointer reference }
  1601. var
  1602. p: tai;
  1603. count: longint;
  1604. begin
  1605. containsPointerLoad := false;
  1606. p := c.startmod;
  1607. for count := c.nrOfMods downto 1 do
  1608. begin
  1609. if containsPointerRef(p) then
  1610. begin
  1611. containsPointerLoad := true;
  1612. exit;
  1613. end;
  1614. getnextinstruction(p,p);
  1615. end;
  1616. end;
  1617. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1618. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1619. { returns whether the contents c of reg are invalid after regWritten is }
  1620. { is written to ref }
  1621. var
  1622. refsEq: trefCompare;
  1623. begin
  1624. if isSimpleRef(ref) then
  1625. begin
  1626. if (ref.index <> NR_NO) or
  1627. (assigned(ref.symbol) and
  1628. (ref.base <> NR_NO)) then
  1629. { local/global variable or parameter which is an array }
  1630. refsEq := @arrayRefsOverlapping
  1631. else
  1632. { local/global variable or parameter which is not an array }
  1633. refsEq := @refsOverlapping;
  1634. invalsmemwrite :=
  1635. assigned(c.memwrite) and
  1636. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1637. containsPointerRef(c.memwrite)) or
  1638. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1639. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1640. begin
  1641. writeToMemDestroysContents := false;
  1642. exit;
  1643. end;
  1644. { write something to a parameter, a local or global variable, so }
  1645. { * with uncertain optimizations on: }
  1646. { - destroy the contents of registers whose contents have somewhere a }
  1647. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1648. { are being written to memory) is not destroyed if it's StartMod is }
  1649. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1650. { expression based on ref) }
  1651. { * with uncertain optimizations off: }
  1652. { - also destroy registers that contain any pointer }
  1653. with c do
  1654. writeToMemDestroysContents :=
  1655. (typ in [con_ref,con_noRemoveRef]) and
  1656. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1657. containsPointerLoad(c)
  1658. ) or
  1659. (refInSequence(ref,c,refsEq,size) and
  1660. ((supreg <> regWritten) or
  1661. not((nrOfMods = 1) and
  1662. {StarMod is always of the type ait_instruction}
  1663. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1664. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1665. )
  1666. )
  1667. )
  1668. );
  1669. end
  1670. else
  1671. { write something to a pointer location, so }
  1672. { * with uncertain optimzations on: }
  1673. { - do not destroy registers which contain a local/global variable or }
  1674. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1675. { * with uncertain optimzations off: }
  1676. { - destroy every register which contains a memory location }
  1677. begin
  1678. invalsmemwrite :=
  1679. assigned(c.memwrite) and
  1680. (not(cs_opt_size in current_settings.optimizerswitches) or
  1681. containsPointerRef(c.memwrite));
  1682. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1683. begin
  1684. writeToMemDestroysContents := false;
  1685. exit;
  1686. end;
  1687. with c do
  1688. writeToMemDestroysContents :=
  1689. (typ in [con_ref,con_noRemoveRef]) and
  1690. (not(cs_opt_size in current_settings.optimizerswitches) or
  1691. { for movsl }
  1692. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1693. { don't destroy if reg contains a parameter, local or global variable }
  1694. containsPointerLoad(c)
  1695. );
  1696. end;
  1697. end;
  1698. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1699. const c: tcontent): boolean;
  1700. { returns whether the contents c of reg are invalid after destReg is }
  1701. { modified }
  1702. begin
  1703. writeToRegDestroysContents :=
  1704. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1705. sequenceDependsOnReg(c,supreg,destReg);
  1706. end;
  1707. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1708. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1709. { returns whether the contents c of reg are invalid after regWritten is }
  1710. { is written to op }
  1711. begin
  1712. memwritedestroyed := false;
  1713. case op.typ of
  1714. top_reg:
  1715. writeDestroysContents :=
  1716. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1717. top_ref:
  1718. writeDestroysContents :=
  1719. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1720. else
  1721. writeDestroysContents := false;
  1722. end;
  1723. end;
  1724. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1725. { destroys all registers which possibly contain a reference to ref, regWritten }
  1726. { is the register whose contents are being written to memory (if this proc }
  1727. { is called because of a "mov?? %reg, (mem)" instruction) }
  1728. var
  1729. counter: tsuperregister;
  1730. destroymemwrite: boolean;
  1731. begin
  1732. for counter := RS_EAX to RS_EDI Do
  1733. begin
  1734. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1735. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1736. destroyReg(ptaiprop(p.optInfo), counter, false)
  1737. else if destroymemwrite then
  1738. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1739. end;
  1740. end;
  1741. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1742. var Counter: tsuperregister;
  1743. begin {initializes/desrtoys all registers}
  1744. For Counter := RS_EAX To RS_EDI Do
  1745. begin
  1746. if read then
  1747. readreg(p, Counter);
  1748. DestroyReg(p, Counter, written);
  1749. p^.regs[counter].MemWrite := nil;
  1750. end;
  1751. p^.DirFlag := F_Unknown;
  1752. end;
  1753. procedure DestroyOp(taiObj: tai; const o:Toper);
  1754. {$ifdef statedebug}
  1755. var
  1756. hp: tai;
  1757. {$endif statedebug}
  1758. begin
  1759. case o.typ Of
  1760. top_reg:
  1761. begin
  1762. {$ifdef statedebug}
  1763. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1764. hp.next := taiobj.next;
  1765. hp.previous := taiobj;
  1766. taiobj.next := hp;
  1767. if assigned(hp.next) then
  1768. hp.next.previous := hp;
  1769. {$endif statedebug}
  1770. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1771. end;
  1772. top_ref:
  1773. begin
  1774. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1775. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1776. end;
  1777. end;
  1778. end;
  1779. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1780. p: taicpu; supreg: tsuperregister);
  1781. {$ifdef statedebug}
  1782. var
  1783. hp: tai;
  1784. {$endif statedebug}
  1785. begin
  1786. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1787. if (typ in [con_ref,con_noRemoveRef]) then
  1788. begin
  1789. incState(wstate,1);
  1790. { also store how many instructions are part of the sequence in the first }
  1791. { instructions ptaiprop, so it can be easily accessed from within }
  1792. { CheckSequence}
  1793. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1794. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1795. NrOfInstrSinceLastMod[supreg] := 0;
  1796. invalidateDependingRegs(p.optinfo,supreg);
  1797. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1798. {$ifdef StateDebug}
  1799. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1800. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1801. InsertLLItem(AsmL, p, p.next, hp);
  1802. {$endif StateDebug}
  1803. end
  1804. else
  1805. begin
  1806. {$ifdef statedebug}
  1807. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1808. insertllitem(asml,p,p.next,hp);
  1809. {$endif statedebug}
  1810. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1811. {$ifdef StateDebug}
  1812. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1813. InsertLLItem(AsmL, p, p.next, hp);
  1814. {$endif StateDebug}
  1815. end
  1816. end;
  1817. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1818. p: taicpu; const oper: TOper);
  1819. begin
  1820. if oper.typ = top_reg then
  1821. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1822. else
  1823. begin
  1824. ReadOp(ptaiprop(p.optinfo), oper);
  1825. DestroyOp(p, oper);
  1826. end
  1827. end;
  1828. {*************************************************************************************}
  1829. {************************************** TDFAOBJ **************************************}
  1830. {*************************************************************************************}
  1831. constructor tdfaobj.create(_list: TAsmList);
  1832. begin
  1833. list := _list;
  1834. blockstart := nil;
  1835. blockend := nil;
  1836. nroftaiobjs := 0;
  1837. taipropblock := nil;
  1838. lolab := 0;
  1839. hilab := 0;
  1840. labdif := 0;
  1841. labeltable := nil;
  1842. end;
  1843. procedure tdfaobj.initlabeltable;
  1844. var
  1845. labelfound: boolean;
  1846. p, prev: tai;
  1847. hp1, hp2: tai;
  1848. {$ifdef i386}
  1849. regcounter,
  1850. supreg : tsuperregister;
  1851. {$endif i386}
  1852. usedregs, nodeallocregs: tregset;
  1853. begin
  1854. labelfound := false;
  1855. lolab := maxlongint;
  1856. hilab := 0;
  1857. p := blockstart;
  1858. prev := p;
  1859. while assigned(p) do
  1860. begin
  1861. if (tai(p).typ = ait_label) then
  1862. if not labelcanbeskipped(tai_label(p)) then
  1863. begin
  1864. labelfound := true;
  1865. if (tai_Label(p).labsym.labelnr < lolab) then
  1866. lolab := tai_label(p).labsym.labelnr;
  1867. if (tai_Label(p).labsym.labelnr > hilab) then
  1868. hilab := tai_label(p).labsym.labelnr;
  1869. end;
  1870. prev := p;
  1871. getnextinstruction(p, p);
  1872. end;
  1873. if (prev.typ = ait_marker) and
  1874. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1875. blockend := prev
  1876. else blockend := nil;
  1877. if labelfound then
  1878. labdif := hilab+1-lolab
  1879. else labdif := 0;
  1880. usedregs := [];
  1881. if (labdif <> 0) then
  1882. begin
  1883. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1884. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1885. end;
  1886. p := blockstart;
  1887. prev := p;
  1888. while (p <> blockend) do
  1889. begin
  1890. case p.typ of
  1891. ait_label:
  1892. if not labelcanbeskipped(tai_label(p)) then
  1893. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1894. {$ifdef i386}
  1895. ait_regalloc:
  1896. begin
  1897. supreg:=getsupreg(tai_regalloc(p).reg);
  1898. case tai_regalloc(p).ratype of
  1899. ra_alloc :
  1900. begin
  1901. if not(supreg in usedregs) then
  1902. include(usedregs, supreg)
  1903. else
  1904. begin
  1905. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1906. hp1 := tai(p.previous);
  1907. list.remove(p);
  1908. p.free;
  1909. p := hp1;
  1910. end;
  1911. end;
  1912. ra_dealloc :
  1913. begin
  1914. exclude(usedregs, supreg);
  1915. hp1 := p;
  1916. hp2 := nil;
  1917. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1918. getnextinstruction(hp1, hp1) and
  1919. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1920. hp2 := hp1;
  1921. if hp2 <> nil then
  1922. begin
  1923. hp1 := tai(p.previous);
  1924. list.remove(p);
  1925. insertllitem(list, hp2, tai(hp2.next), p);
  1926. p := hp1;
  1927. end
  1928. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1929. and getnextinstruction(p,hp1) then
  1930. begin
  1931. hp1 := tai(p.previous);
  1932. list.remove(p);
  1933. p.free;
  1934. p := hp1;
  1935. // don't include here, since then the allocation will be removed when it's processed
  1936. // include(usedregs,supreg);
  1937. end;
  1938. end;
  1939. end;
  1940. end;
  1941. {$endif i386}
  1942. end;
  1943. repeat
  1944. prev := p;
  1945. p := tai(p.next);
  1946. until not(assigned(p)) or
  1947. (p = blockend) or
  1948. not(p.typ in (skipinstr - [ait_regalloc]));
  1949. end;
  1950. {$ifdef i386}
  1951. { don't add deallocation for function result variable or for regvars}
  1952. getNoDeallocRegs(noDeallocRegs);
  1953. usedRegs := usedRegs - noDeallocRegs;
  1954. for regCounter := RS_EAX to RS_EDI do
  1955. if regCounter in usedRegs then
  1956. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1957. {$endif i386}
  1958. end;
  1959. function tdfaobj.pass_1(_blockstart: tai): tai;
  1960. begin
  1961. blockstart := _blockstart;
  1962. initlabeltable;
  1963. pass_1 := blockend;
  1964. end;
  1965. function tdfaobj.initdfapass2: boolean;
  1966. {reserves memory for the PtaiProps in one big memory block when not using
  1967. TP, returns False if not enough memory is available for the optimizer in all
  1968. cases}
  1969. var
  1970. p: tai;
  1971. count: Longint;
  1972. { TmpStr: String; }
  1973. begin
  1974. p := blockstart;
  1975. skiphead(p);
  1976. nroftaiobjs := 0;
  1977. while (p <> blockend) do
  1978. begin
  1979. {$ifDef JumpAnal}
  1980. case p.typ of
  1981. ait_label:
  1982. begin
  1983. if not labelcanbeskipped(tai_label(p)) then
  1984. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1985. end;
  1986. ait_instruction:
  1987. begin
  1988. if taicpu(p).is_jmp then
  1989. begin
  1990. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1991. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1992. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1993. end;
  1994. end;
  1995. { ait_instruction:
  1996. begin
  1997. if (taicpu(p).opcode = A_PUSH) and
  1998. (taicpu(p).oper[0]^.typ = top_symbol) and
  1999. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2000. begin
  2001. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2002. if}
  2003. end;
  2004. {$endif JumpAnal}
  2005. inc(NrOftaiObjs);
  2006. getnextinstruction(p,p);
  2007. end;
  2008. if nroftaiobjs <> 0 then
  2009. begin
  2010. initdfapass2 := True;
  2011. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2012. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2013. p := blockstart;
  2014. skiphead(p);
  2015. for count := 1 To nroftaiobjs do
  2016. begin
  2017. ptaiprop(p.optinfo) := @taipropblock^[count];
  2018. getnextinstruction(p, p);
  2019. end;
  2020. end
  2021. else
  2022. initdfapass2 := false;
  2023. end;
  2024. procedure tdfaobj.dodfapass2;
  2025. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2026. contents for the instructions starting with p. Returns the last tai which has
  2027. been processed}
  2028. var
  2029. curprop, LastFlagsChangeProp: ptaiprop;
  2030. Cnt, InstrCnt : Longint;
  2031. InstrProp: TInsProp;
  2032. UsedRegs: TRegSet;
  2033. prev,p : tai;
  2034. tmpref: TReference;
  2035. tmpsupreg: tsuperregister;
  2036. {$ifdef statedebug}
  2037. hp : tai;
  2038. {$endif}
  2039. {$ifdef AnalyzeLoops}
  2040. hp : tai;
  2041. TmpState: Byte;
  2042. {$endif AnalyzeLoops}
  2043. begin
  2044. p := BlockStart;
  2045. LastFlagsChangeProp := nil;
  2046. prev := nil;
  2047. UsedRegs := [];
  2048. UpdateUsedregs(UsedRegs, p);
  2049. SkipHead(p);
  2050. BlockStart := p;
  2051. InstrCnt := 1;
  2052. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2053. while (p <> Blockend) Do
  2054. begin
  2055. curprop := @taiPropBlock^[InstrCnt];
  2056. if assigned(prev)
  2057. then
  2058. begin
  2059. {$ifdef JumpAnal}
  2060. if (p.Typ <> ait_label) then
  2061. {$endif JumpAnal}
  2062. begin
  2063. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2064. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2065. curprop^.FlagsUsed := false;
  2066. end
  2067. end
  2068. else
  2069. begin
  2070. fillchar(curprop^, SizeOf(curprop^), 0);
  2071. { For tmpreg := RS_EAX to RS_EDI Do
  2072. curprop^.regs[tmpreg].WState := 1;}
  2073. end;
  2074. curprop^.UsedRegs := UsedRegs;
  2075. curprop^.CanBeRemoved := False;
  2076. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2077. For tmpsupreg := RS_EAX To RS_EDI Do
  2078. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2079. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2080. else
  2081. begin
  2082. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2083. curprop^.regs[tmpsupreg].typ := con_unknown;
  2084. end;
  2085. case p.typ Of
  2086. ait_marker:;
  2087. ait_label:
  2088. {$ifndef JumpAnal}
  2089. if not labelCanBeSkipped(tai_label(p)) then
  2090. DestroyAllRegs(curprop,false,false);
  2091. {$else JumpAnal}
  2092. begin
  2093. if not labelCanBeSkipped(tai_label(p)) then
  2094. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2095. {$ifDef AnalyzeLoops}
  2096. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2097. {$else AnalyzeLoops}
  2098. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2099. {$endif AnalyzeLoops}
  2100. then
  2101. {all jumps to this label have been found}
  2102. {$ifDef AnalyzeLoops}
  2103. if (JmpsProcessed > 0)
  2104. then
  2105. {$endif AnalyzeLoops}
  2106. {we've processed at least one jump to this label}
  2107. begin
  2108. if (GetLastInstruction(p, hp) and
  2109. not(((hp.typ = ait_instruction)) and
  2110. (taicpu_labeled(hp).is_jmp))
  2111. then
  2112. {previous instruction not a JMP -> the contents of the registers after the
  2113. previous intruction has been executed have to be taken into account as well}
  2114. For tmpsupreg := RS_EAX to RS_EDI Do
  2115. begin
  2116. if (curprop^.regs[tmpsupreg].WState <>
  2117. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2118. then DestroyReg(curprop, tmpsupreg, true)
  2119. end
  2120. end
  2121. {$ifDef AnalyzeLoops}
  2122. else
  2123. {a label from a backward jump (e.g. a loop), no jump to this label has
  2124. already been processed}
  2125. if GetLastInstruction(p, hp) and
  2126. not(hp.typ = ait_instruction) and
  2127. (taicpu_labeled(hp).opcode = A_JMP))
  2128. then
  2129. {previous instruction not a jmp, so keep all the registers' contents from the
  2130. previous instruction}
  2131. begin
  2132. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2133. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2134. end
  2135. else
  2136. {previous instruction a jmp and no jump to this label processed yet}
  2137. begin
  2138. hp := p;
  2139. Cnt := InstrCnt;
  2140. {continue until we find a jump to the label or a label which has already
  2141. been processed}
  2142. while GetNextInstruction(hp, hp) and
  2143. not((hp.typ = ait_instruction) and
  2144. (taicpu(hp).is_jmp) and
  2145. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2146. not((hp.typ = ait_label) and
  2147. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2148. = tai_Label(hp).labsym^.RefCount) and
  2149. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2150. inc(Cnt);
  2151. if (hp.typ = ait_label)
  2152. then
  2153. {there's a processed label after the current one}
  2154. begin
  2155. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2156. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2157. end
  2158. else
  2159. {there's no label anymore after the current one, or they haven't been
  2160. processed yet}
  2161. begin
  2162. GetLastInstruction(p, hp);
  2163. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2164. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2165. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2166. end
  2167. end
  2168. {$endif AnalyzeLoops}
  2169. else
  2170. {not all references to this label have been found, so destroy all registers}
  2171. begin
  2172. GetLastInstruction(p, hp);
  2173. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2174. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2175. DestroyAllRegs(curprop,true,true)
  2176. end;
  2177. end;
  2178. {$endif JumpAnal}
  2179. ait_stab, ait_force_line, ait_function_name:;
  2180. ait_align: ; { may destroy flags !!! }
  2181. ait_instruction:
  2182. begin
  2183. if taicpu(p).is_jmp or
  2184. (taicpu(p).opcode = A_JMP) then
  2185. begin
  2186. {$ifNDef JumpAnal}
  2187. for tmpsupreg := RS_EAX to RS_EDI do
  2188. with curprop^.regs[tmpsupreg] do
  2189. case typ of
  2190. con_ref: typ := con_noRemoveRef;
  2191. con_const: typ := con_noRemoveConst;
  2192. con_invalid: typ := con_unknown;
  2193. end;
  2194. {$else JumpAnal}
  2195. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2196. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2197. begin
  2198. if (InstrCnt < InstrNr)
  2199. then
  2200. {forward jump}
  2201. if (JmpsProcessed = 0) then
  2202. {no jump to this label has been processed yet}
  2203. begin
  2204. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2205. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2206. inc(JmpsProcessed);
  2207. end
  2208. else
  2209. begin
  2210. For tmpreg := RS_EAX to RS_EDI Do
  2211. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2212. curprop^.regs[tmpreg].WState) then
  2213. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2214. inc(JmpsProcessed);
  2215. end
  2216. {$ifdef AnalyzeLoops}
  2217. else
  2218. { backward jump, a loop for example}
  2219. { if (JmpsProcessed > 0) or
  2220. not(GetLastInstruction(taiObj, hp) and
  2221. (hp.typ = ait_labeled_instruction) and
  2222. (taicpu_labeled(hp).opcode = A_JMP))
  2223. then}
  2224. {instruction prior to label is not a jmp, or at least one jump to the label
  2225. has yet been processed}
  2226. begin
  2227. inc(JmpsProcessed);
  2228. For tmpreg := RS_EAX to RS_EDI Do
  2229. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2230. curprop^.regs[tmpreg].WState)
  2231. then
  2232. begin
  2233. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2234. Cnt := InstrNr;
  2235. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2236. begin
  2237. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2238. inc(Cnt);
  2239. end;
  2240. while (Cnt <= InstrCnt) Do
  2241. begin
  2242. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2243. inc(Cnt)
  2244. end
  2245. end;
  2246. end
  2247. { else }
  2248. {instruction prior to label is a jmp and no jumps to the label have yet been
  2249. processed}
  2250. { begin
  2251. inc(JmpsProcessed);
  2252. For tmpreg := RS_EAX to RS_EDI Do
  2253. begin
  2254. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2255. Cnt := InstrNr;
  2256. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2257. begin
  2258. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2259. inc(Cnt);
  2260. end;
  2261. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2262. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2263. begin
  2264. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2265. inc(Cnt);
  2266. end;
  2267. while (Cnt <= InstrCnt) Do
  2268. begin
  2269. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2270. inc(Cnt)
  2271. end
  2272. end
  2273. end}
  2274. {$endif AnalyzeLoops}
  2275. end;
  2276. {$endif JumpAnal}
  2277. end
  2278. else
  2279. begin
  2280. InstrProp := InsProp[taicpu(p).opcode];
  2281. case taicpu(p).opcode Of
  2282. A_MOV, A_MOVZX, A_MOVSX:
  2283. begin
  2284. case taicpu(p).oper[0]^.typ Of
  2285. top_ref, top_reg:
  2286. case taicpu(p).oper[1]^.typ Of
  2287. top_reg:
  2288. begin
  2289. {$ifdef statedebug}
  2290. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2291. insertllitem(list,p,p.next,hp);
  2292. {$endif statedebug}
  2293. readOp(curprop, taicpu(p).oper[0]^);
  2294. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2295. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2296. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2297. begin
  2298. with curprop^.regs[tmpsupreg] Do
  2299. begin
  2300. incState(wstate,1);
  2301. { also store how many instructions are part of the sequence in the first }
  2302. { instruction's ptaiprop, so it can be easily accessed from within }
  2303. { CheckSequence }
  2304. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2305. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2306. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2307. { Destroy the contents of the registers }
  2308. { that depended on the previous value of }
  2309. { this register }
  2310. invalidateDependingRegs(curprop,tmpsupreg);
  2311. curprop^.regs[tmpsupreg].memwrite := nil;
  2312. end;
  2313. end
  2314. else
  2315. begin
  2316. {$ifdef statedebug}
  2317. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2318. insertllitem(list,p,p.next,hp);
  2319. {$endif statedebug}
  2320. destroyReg(curprop, tmpsupreg, true);
  2321. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2322. with curprop^.regs[tmpsupreg] Do
  2323. begin
  2324. typ := con_ref;
  2325. startmod := p;
  2326. nrOfMods := 1;
  2327. end
  2328. end;
  2329. {$ifdef StateDebug}
  2330. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2331. insertllitem(list,p,p.next,hp);
  2332. {$endif StateDebug}
  2333. end;
  2334. top_ref:
  2335. begin
  2336. readref(curprop, taicpu(p).oper[1]^.ref);
  2337. if taicpu(p).oper[0]^.typ = top_reg then
  2338. begin
  2339. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2340. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2341. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2342. taicpu(p);
  2343. end
  2344. else
  2345. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2346. end;
  2347. end;
  2348. top_Const:
  2349. begin
  2350. case taicpu(p).oper[1]^.typ Of
  2351. top_reg:
  2352. begin
  2353. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2354. {$ifdef statedebug}
  2355. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2356. insertllitem(list,p,p.next,hp);
  2357. {$endif statedebug}
  2358. With curprop^.regs[tmpsupreg] Do
  2359. begin
  2360. DestroyReg(curprop, tmpsupreg, true);
  2361. typ := Con_Const;
  2362. StartMod := p;
  2363. nrOfMods := 1;
  2364. end
  2365. end;
  2366. top_ref:
  2367. begin
  2368. readref(curprop, taicpu(p).oper[1]^.ref);
  2369. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2370. end;
  2371. end;
  2372. end;
  2373. end;
  2374. end;
  2375. A_DIV, A_IDIV, A_MUL:
  2376. begin
  2377. ReadOp(curprop, taicpu(p).oper[0]^);
  2378. readreg(curprop,RS_EAX);
  2379. if (taicpu(p).OpCode = A_IDIV) or
  2380. (taicpu(p).OpCode = A_DIV) then
  2381. begin
  2382. readreg(curprop,RS_EDX);
  2383. end;
  2384. {$ifdef statedebug}
  2385. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2386. insertllitem(list,p,p.next,hp);
  2387. {$endif statedebug}
  2388. { DestroyReg(curprop, RS_EAX, true);}
  2389. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2390. taicpu(p), RS_EAX);
  2391. DestroyReg(curprop, RS_EDX, true);
  2392. LastFlagsChangeProp := curprop;
  2393. end;
  2394. A_IMUL:
  2395. begin
  2396. ReadOp(curprop,taicpu(p).oper[0]^);
  2397. if (taicpu(p).ops >= 2) then
  2398. ReadOp(curprop,taicpu(p).oper[1]^);
  2399. if (taicpu(p).ops <= 2) then
  2400. if (taicpu(p).ops=1) then
  2401. begin
  2402. readreg(curprop,RS_EAX);
  2403. {$ifdef statedebug}
  2404. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2405. insertllitem(list,p,p.next,hp);
  2406. {$endif statedebug}
  2407. { DestroyReg(curprop, RS_EAX, true); }
  2408. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2409. taicpu(p), RS_EAX);
  2410. DestroyReg(curprop,RS_EDX, true)
  2411. end
  2412. else
  2413. AddInstr2OpContents(
  2414. {$ifdef statedebug}list,{$endif}
  2415. taicpu(p), taicpu(p).oper[1]^)
  2416. else
  2417. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2418. taicpu(p), taicpu(p).oper[2]^);
  2419. LastFlagsChangeProp := curprop;
  2420. end;
  2421. A_LEA:
  2422. begin
  2423. readop(curprop,taicpu(p).oper[0]^);
  2424. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2425. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2426. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2427. else
  2428. begin
  2429. {$ifdef statedebug}
  2430. hp := tai_comment.Create(strpnew('destroying & initing'+
  2431. std_regname(taicpu(p).oper[1]^.reg)));
  2432. insertllitem(list,p,p.next,hp);
  2433. {$endif statedebug}
  2434. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2435. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2436. begin
  2437. typ := con_ref;
  2438. startmod := p;
  2439. nrOfMods := 1;
  2440. end
  2441. end;
  2442. end;
  2443. else
  2444. begin
  2445. Cnt := 1;
  2446. while (Cnt <= maxinschanges) and
  2447. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2448. begin
  2449. case InstrProp.Ch[Cnt] Of
  2450. Ch_REAX..Ch_REDI:
  2451. begin
  2452. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2453. readreg(curprop,tmpsupreg);
  2454. end;
  2455. Ch_WEAX..Ch_RWEDI:
  2456. begin
  2457. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2458. begin
  2459. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2460. readreg(curprop,tmpsupreg);
  2461. end;
  2462. {$ifdef statedebug}
  2463. hp := tai_comment.Create(strpnew('destroying '+
  2464. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2465. insertllitem(list,p,p.next,hp);
  2466. {$endif statedebug}
  2467. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2468. DestroyReg(curprop,tmpsupreg, true);
  2469. end;
  2470. Ch_MEAX..Ch_MEDI:
  2471. begin
  2472. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2473. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2474. taicpu(p),tmpsupreg);
  2475. end;
  2476. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2477. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2478. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2479. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2480. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2481. Ch_Wop1..Ch_RWop1:
  2482. begin
  2483. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2484. ReadOp(curprop, taicpu(p).oper[0]^);
  2485. DestroyOp(p, taicpu(p).oper[0]^);
  2486. end;
  2487. Ch_Mop1:
  2488. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2489. taicpu(p), taicpu(p).oper[0]^);
  2490. Ch_Wop2..Ch_RWop2:
  2491. begin
  2492. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2493. ReadOp(curprop, taicpu(p).oper[1]^);
  2494. DestroyOp(p, taicpu(p).oper[1]^);
  2495. end;
  2496. Ch_Mop2:
  2497. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2498. taicpu(p), taicpu(p).oper[1]^);
  2499. Ch_WOp3..Ch_RWOp3:
  2500. begin
  2501. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2502. ReadOp(curprop, taicpu(p).oper[2]^);
  2503. DestroyOp(p, taicpu(p).oper[2]^);
  2504. end;
  2505. Ch_Mop3:
  2506. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2507. taicpu(p), taicpu(p).oper[2]^);
  2508. Ch_WMemEDI:
  2509. begin
  2510. readreg(curprop, RS_EDI);
  2511. fillchar(tmpref, SizeOf(tmpref), 0);
  2512. tmpref.base := NR_EDI;
  2513. tmpref.index := NR_EDI;
  2514. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2515. end;
  2516. Ch_RFlags:
  2517. if assigned(LastFlagsChangeProp) then
  2518. LastFlagsChangeProp^.FlagsUsed := true;
  2519. Ch_WFlags:
  2520. LastFlagsChangeProp := curprop;
  2521. Ch_RWFlags:
  2522. begin
  2523. if assigned(LastFlagsChangeProp) then
  2524. LastFlagsChangeProp^.FlagsUsed := true;
  2525. LastFlagsChangeProp := curprop;
  2526. end;
  2527. Ch_FPU:;
  2528. else
  2529. begin
  2530. {$ifdef statedebug}
  2531. hp := tai_comment.Create(strpnew(
  2532. 'destroying all regs for prev instruction'));
  2533. insertllitem(list,p, p.next,hp);
  2534. {$endif statedebug}
  2535. DestroyAllRegs(curprop,true,true);
  2536. LastFlagsChangeProp := curprop;
  2537. end;
  2538. end;
  2539. inc(Cnt);
  2540. end
  2541. end;
  2542. end;
  2543. end;
  2544. end
  2545. else
  2546. begin
  2547. {$ifdef statedebug}
  2548. hp := tai_comment.Create(strpnew(
  2549. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2550. insertllitem(list,p, p.next,hp);
  2551. {$endif statedebug}
  2552. DestroyAllRegs(curprop,true,true);
  2553. end;
  2554. end;
  2555. inc(InstrCnt);
  2556. prev := p;
  2557. GetNextInstruction(p, p);
  2558. end;
  2559. end;
  2560. function tdfaobj.pass_generate_code: boolean;
  2561. begin
  2562. if initdfapass2 then
  2563. begin
  2564. dodfapass2;
  2565. pass_generate_code := true
  2566. end
  2567. else
  2568. pass_generate_code := false;
  2569. end;
  2570. {$ifopt r+}
  2571. {$define rangewason}
  2572. {$r-}
  2573. {$endif}
  2574. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2575. begin
  2576. if (sym.labelnr >= lolab) and
  2577. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2578. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2579. else
  2580. getlabelwithsym := nil;
  2581. end;
  2582. {$ifdef rangewason}
  2583. {$r+}
  2584. {$undef rangewason}
  2585. {$endif}
  2586. procedure tdfaobj.clear;
  2587. begin
  2588. if labdif <> 0 then
  2589. begin
  2590. freemem(labeltable);
  2591. labeltable := nil;
  2592. end;
  2593. if assigned(taipropblock) then
  2594. begin
  2595. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2596. taipropblock := nil;
  2597. end;
  2598. end;
  2599. end.