n386add.pas 24 KB

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  1. {
  2. $Id$
  3. Copyright (c) 2000-2002 by Florian Klaempfl
  4. Code generation for add nodes on the i386
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit n386add;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. node,nadd,cpubase,nx86add;
  23. type
  24. ti386addnode = class(tx86addnode)
  25. {$ifdef SUPPORT_MMX}
  26. procedure second_addmmxset;override;
  27. procedure second_addmmx;override;
  28. {$endif SUPPORT_MMX}
  29. procedure second_add64bit;override;
  30. procedure second_cmp64bit;override;
  31. procedure second_mul;override;
  32. end;
  33. implementation
  34. uses
  35. globtype,systems,
  36. cutils,verbose,globals,
  37. cpuinfo,
  38. symconst,symdef,paramgr,
  39. aasmbase,aasmtai,aasmcpu,
  40. cgbase,
  41. ncon,nset,
  42. cga,ncgutil,cgobj,cg64f32;
  43. {*****************************************************************************
  44. addmmxset
  45. *****************************************************************************}
  46. {$ifdef SUPPORT_MMX}
  47. procedure ti386addnode.second_addmmxset;
  48. var opsize : TCGSize;
  49. op : TAsmOp;
  50. cmpop,
  51. pushedfpu,
  52. noswap : boolean;
  53. begin
  54. pass_left_and_right(pushedfpu);
  55. cmpop:=false;
  56. noswap:=false;
  57. opsize:=OS_32;
  58. case nodetype of
  59. addn:
  60. begin
  61. { are we adding set elements ? }
  62. if right.nodetype=setelementn then
  63. begin
  64. { adding elements is not commutative }
  65. { if nf_swaped in flags then
  66. swapleftright;}
  67. { bts requires both elements to be registers }
  68. { location_force_reg(exprasmlist,left.location,opsize_2_cgsize[opsize],false);
  69. location_force_reg(exprasmlist,right.location,opsize_2_cgsize[opsize],true);
  70. op:=A_BTS;
  71. noswap:=true;}
  72. end
  73. else
  74. op:=A_POR;
  75. end;
  76. symdifn :
  77. op:=A_PXOR;
  78. muln:
  79. op:=A_PAND;
  80. subn:
  81. op:=A_PANDN;
  82. equaln,
  83. unequaln :
  84. begin
  85. op:=A_PCMPEQD;
  86. cmpop:=true;
  87. end;
  88. lten,gten:
  89. begin
  90. if (not(nf_swaped in flags) and (nodetype = lten)) or
  91. ((nf_swaped in flags) and (nodetype = gten)) then
  92. swapleftright;
  93. location_force_reg(exprasmlist,left.location,opsize,true);
  94. emit_op_right_left(A_AND,TCGSize2Opsize[opsize]);
  95. op:=A_PCMPEQD;
  96. cmpop:=true;
  97. { warning: ugly hack, we need a JE so change the node to equaln }
  98. nodetype:=equaln;
  99. end;
  100. xorn :
  101. op:=A_PXOR;
  102. orn :
  103. op:=A_POR;
  104. andn :
  105. op:=A_PAND;
  106. else
  107. internalerror(2003042215);
  108. end;
  109. { left must be a register }
  110. left_must_be_reg(opsize,noswap);
  111. { emit_generic_code(op,opsize,true,extra_not,false);}
  112. location_freetemp(exprasmlist,right.location);
  113. location_release(exprasmlist,right.location);
  114. if cmpop then
  115. begin
  116. location_freetemp(exprasmlist,left.location);
  117. location_release(exprasmlist,left.location);
  118. end;
  119. set_result_location(cmpop,true);
  120. end;
  121. {$endif SUPPORT_MMX}
  122. {*****************************************************************************
  123. Add64bit
  124. *****************************************************************************}
  125. procedure ti386addnode.second_add64bit;
  126. var
  127. op : TOpCG;
  128. op1,op2 : TAsmOp;
  129. opsize : TOpSize;
  130. hregister,
  131. hregister2 : tregister;
  132. hl4 : tasmlabel;
  133. mboverflow,
  134. unsigned:boolean;
  135. r:Tregister;
  136. begin
  137. firstcomplex(self);
  138. pass_left_right;
  139. op1:=A_NONE;
  140. op2:=A_NONE;
  141. mboverflow:=false;
  142. opsize:=S_L;
  143. unsigned:=((left.resulttype.def.deftype=orddef) and
  144. (torddef(left.resulttype.def).typ=u64bit)) or
  145. ((right.resulttype.def.deftype=orddef) and
  146. (torddef(right.resulttype.def).typ=u64bit));
  147. case nodetype of
  148. addn :
  149. begin
  150. op:=OP_ADD;
  151. mboverflow:=true;
  152. end;
  153. subn :
  154. begin
  155. op:=OP_SUB;
  156. op1:=A_SUB;
  157. op2:=A_SBB;
  158. mboverflow:=true;
  159. end;
  160. xorn:
  161. op:=OP_XOR;
  162. orn:
  163. op:=OP_OR;
  164. andn:
  165. op:=OP_AND;
  166. else
  167. begin
  168. { everything should be handled in pass_1 (JM) }
  169. internalerror(200109051);
  170. end;
  171. end;
  172. { left and right no register? }
  173. { then one must be demanded }
  174. if (left.location.loc<>LOC_REGISTER) then
  175. begin
  176. if (right.location.loc<>LOC_REGISTER) then
  177. begin
  178. hregister:=cg.getintregister(exprasmlist,OS_INT);
  179. hregister2:=cg.getintregister(exprasmlist,OS_INT);
  180. cg64.a_load64_loc_reg(exprasmlist,left.location,joinreg64(hregister,hregister2));
  181. location_reset(left.location,LOC_REGISTER,OS_64);
  182. left.location.registerlow:=hregister;
  183. left.location.registerhigh:=hregister2;
  184. end
  185. else
  186. begin
  187. location_swap(left.location,right.location);
  188. toggleflag(nf_swaped);
  189. end;
  190. end;
  191. { at this point, left.location.loc should be LOC_REGISTER }
  192. if right.location.loc=LOC_REGISTER then
  193. begin
  194. { when swapped another result register }
  195. if (nodetype=subn) and (nf_swaped in flags) then
  196. begin
  197. cg64.a_op64_reg_reg(exprasmlist,op,
  198. left.location.register64,
  199. right.location.register64);
  200. location_swap(left.location,right.location);
  201. toggleflag(nf_swaped);
  202. end
  203. else
  204. begin
  205. cg64.a_op64_reg_reg(exprasmlist,op,
  206. right.location.register64,
  207. left.location.register64);
  208. end;
  209. location_release(exprasmlist,right.location);
  210. end
  211. else
  212. begin
  213. { right.location<>LOC_REGISTER }
  214. if (nodetype=subn) and (nf_swaped in flags) then
  215. begin
  216. r:=cg.getintregister(exprasmlist,OS_INT);
  217. cg64.a_load64low_loc_reg(exprasmlist,right.location,r);
  218. emit_reg_reg(op1,opsize,left.location.registerlow,r);
  219. emit_reg_reg(A_MOV,opsize,r,left.location.registerlow);
  220. cg64.a_load64high_loc_reg(exprasmlist,right.location,r);
  221. { the carry flag is still ok }
  222. emit_reg_reg(op2,opsize,left.location.registerhigh,r);
  223. emit_reg_reg(A_MOV,opsize,r,left.location.registerhigh);
  224. cg.ungetregister(exprasmlist,r);
  225. if right.location.loc<>LOC_CREGISTER then
  226. begin
  227. location_freetemp(exprasmlist,right.location);
  228. location_release(exprasmlist,right.location);
  229. end;
  230. end
  231. else
  232. begin
  233. cg64.a_op64_loc_reg(exprasmlist,op,right.location,
  234. left.location.register64);
  235. if (right.location.loc<>LOC_CREGISTER) then
  236. begin
  237. location_freetemp(exprasmlist,right.location);
  238. location_release(exprasmlist,right.location);
  239. end;
  240. end;
  241. end;
  242. { only in case of overflow operations }
  243. { produce overflow code }
  244. { we must put it here directly, because sign of operation }
  245. { is in unsigned VAR!! }
  246. if mboverflow then
  247. begin
  248. if cs_check_overflow in aktlocalswitches then
  249. begin
  250. objectlibrary.getlabel(hl4);
  251. if unsigned then
  252. cg.a_jmp_flags(exprasmlist,F_AE,hl4)
  253. else
  254. cg.a_jmp_flags(exprasmlist,F_NO,hl4);
  255. cg.a_call_name(exprasmlist,'FPC_OVERFLOW');
  256. cg.a_label(exprasmlist,hl4);
  257. end;
  258. end;
  259. location_copy(location,left.location);
  260. end;
  261. procedure ti386addnode.second_cmp64bit;
  262. var
  263. hregister,
  264. hregister2 : tregister;
  265. href : treference;
  266. unsigned : boolean;
  267. procedure firstjmp64bitcmp;
  268. var
  269. oldnodetype : tnodetype;
  270. begin
  271. {$ifdef OLDREGVARS}
  272. load_all_regvars(exprasmlist);
  273. {$endif OLDREGVARS}
  274. { the jump the sequence is a little bit hairy }
  275. case nodetype of
  276. ltn,gtn:
  277. begin
  278. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),truelabel);
  279. { cheat a little bit for the negative test }
  280. toggleflag(nf_swaped);
  281. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),falselabel);
  282. toggleflag(nf_swaped);
  283. end;
  284. lten,gten:
  285. begin
  286. oldnodetype:=nodetype;
  287. if nodetype=lten then
  288. nodetype:=ltn
  289. else
  290. nodetype:=gtn;
  291. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),truelabel);
  292. { cheat for the negative test }
  293. if nodetype=ltn then
  294. nodetype:=gtn
  295. else
  296. nodetype:=ltn;
  297. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),falselabel);
  298. nodetype:=oldnodetype;
  299. end;
  300. equaln:
  301. cg.a_jmp_flags(exprasmlist,F_NE,falselabel);
  302. unequaln:
  303. cg.a_jmp_flags(exprasmlist,F_NE,truelabel);
  304. end;
  305. end;
  306. procedure secondjmp64bitcmp;
  307. begin
  308. { the jump the sequence is a little bit hairy }
  309. case nodetype of
  310. ltn,gtn,lten,gten:
  311. begin
  312. { the comparisaion of the low dword have to be }
  313. { always unsigned! }
  314. cg.a_jmp_flags(exprasmlist,getresflags(true),truelabel);
  315. cg.a_jmp_always(exprasmlist,falselabel);
  316. end;
  317. equaln:
  318. begin
  319. cg.a_jmp_flags(exprasmlist,F_NE,falselabel);
  320. cg.a_jmp_always(exprasmlist,truelabel);
  321. end;
  322. unequaln:
  323. begin
  324. cg.a_jmp_flags(exprasmlist,F_NE,truelabel);
  325. cg.a_jmp_always(exprasmlist,falselabel);
  326. end;
  327. end;
  328. end;
  329. begin
  330. firstcomplex(self);
  331. pass_left_right;
  332. unsigned:=((left.resulttype.def.deftype=orddef) and
  333. (torddef(left.resulttype.def).typ=u64bit)) or
  334. ((right.resulttype.def.deftype=orddef) and
  335. (torddef(right.resulttype.def).typ=u64bit));
  336. { left and right no register? }
  337. { then one must be demanded }
  338. if (left.location.loc<>LOC_REGISTER) then
  339. begin
  340. if (right.location.loc<>LOC_REGISTER) then
  341. begin
  342. { we can reuse a CREGISTER for comparison }
  343. if (left.location.loc<>LOC_CREGISTER) then
  344. begin
  345. hregister:=cg.getintregister(exprasmlist,OS_INT);
  346. hregister2:=cg.getintregister(exprasmlist,OS_INT);
  347. cg64.a_load64_loc_reg(exprasmlist,left.location,joinreg64(hregister,hregister2));
  348. location_reset(left.location,LOC_REGISTER,OS_64);
  349. left.location.registerlow:=hregister;
  350. left.location.registerhigh:=hregister2;
  351. end;
  352. end
  353. else
  354. begin
  355. location_swap(left.location,right.location);
  356. toggleflag(nf_swaped);
  357. end;
  358. end;
  359. { at this point, left.location.loc should be LOC_REGISTER }
  360. if right.location.loc=LOC_REGISTER then
  361. begin
  362. emit_reg_reg(A_CMP,S_L,right.location.registerhigh,left.location.registerhigh);
  363. firstjmp64bitcmp;
  364. emit_reg_reg(A_CMP,S_L,right.location.registerlow,left.location.registerlow);
  365. secondjmp64bitcmp;
  366. location_release(exprasmlist,right.location);
  367. end
  368. else
  369. begin
  370. case right.location.loc of
  371. LOC_CREGISTER :
  372. begin
  373. emit_reg_reg(A_CMP,S_L,right.location.registerhigh,left.location.registerhigh);
  374. firstjmp64bitcmp;
  375. emit_reg_reg(A_CMP,S_L,right.location.registerlow,left.location.registerlow);
  376. secondjmp64bitcmp;
  377. end;
  378. LOC_CREFERENCE,
  379. LOC_REFERENCE :
  380. begin
  381. href:=right.location.reference;
  382. inc(href.offset,4);
  383. emit_ref_reg(A_CMP,S_L,href,left.location.registerhigh);
  384. firstjmp64bitcmp;
  385. emit_ref_reg(A_CMP,S_L,right.location.reference,left.location.registerlow);
  386. secondjmp64bitcmp;
  387. cg.a_jmp_always(exprasmlist,falselabel);
  388. location_freetemp(exprasmlist,right.location);
  389. location_release(exprasmlist,right.location);
  390. end;
  391. LOC_CONSTANT :
  392. begin
  393. exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,aint(hi(right.location.value64)),left.location.registerhigh));
  394. firstjmp64bitcmp;
  395. exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,aint(lo(right.location.value64)),left.location.registerlow));
  396. secondjmp64bitcmp;
  397. end;
  398. else
  399. internalerror(200203282);
  400. end;
  401. end;
  402. if (left.location.loc<>LOC_CREGISTER) then
  403. begin
  404. location_freetemp(exprasmlist,left.location);
  405. location_release(exprasmlist,left.location);
  406. end;
  407. { we have LOC_JUMP as result }
  408. location_reset(location,LOC_JUMP,OS_NO)
  409. end;
  410. {*****************************************************************************
  411. AddMMX
  412. *****************************************************************************}
  413. {$ifdef SUPPORT_MMX}
  414. procedure ti386addnode.second_addmmx;
  415. var
  416. op : TAsmOp;
  417. pushedfpu,
  418. cmpop : boolean;
  419. mmxbase : tmmxtype;
  420. hreg,
  421. hregister : tregister;
  422. begin
  423. pass_left_and_right(pushedfpu);
  424. cmpop:=false;
  425. mmxbase:=mmx_type(left.resulttype.def);
  426. case nodetype of
  427. addn :
  428. begin
  429. if (cs_mmx_saturation in aktlocalswitches) then
  430. begin
  431. case mmxbase of
  432. mmxs8bit:
  433. op:=A_PADDSB;
  434. mmxu8bit:
  435. op:=A_PADDUSB;
  436. mmxs16bit,mmxfixed16:
  437. op:=A_PADDSB;
  438. mmxu16bit:
  439. op:=A_PADDUSW;
  440. end;
  441. end
  442. else
  443. begin
  444. case mmxbase of
  445. mmxs8bit,mmxu8bit:
  446. op:=A_PADDB;
  447. mmxs16bit,mmxu16bit,mmxfixed16:
  448. op:=A_PADDW;
  449. mmxs32bit,mmxu32bit:
  450. op:=A_PADDD;
  451. end;
  452. end;
  453. end;
  454. muln :
  455. begin
  456. case mmxbase of
  457. mmxs16bit,mmxu16bit:
  458. op:=A_PMULLW;
  459. mmxfixed16:
  460. op:=A_PMULHW;
  461. end;
  462. end;
  463. subn :
  464. begin
  465. if (cs_mmx_saturation in aktlocalswitches) then
  466. begin
  467. case mmxbase of
  468. mmxs8bit:
  469. op:=A_PSUBSB;
  470. mmxu8bit:
  471. op:=A_PSUBUSB;
  472. mmxs16bit,mmxfixed16:
  473. op:=A_PSUBSB;
  474. mmxu16bit:
  475. op:=A_PSUBUSW;
  476. end;
  477. end
  478. else
  479. begin
  480. case mmxbase of
  481. mmxs8bit,mmxu8bit:
  482. op:=A_PSUBB;
  483. mmxs16bit,mmxu16bit,mmxfixed16:
  484. op:=A_PSUBW;
  485. mmxs32bit,mmxu32bit:
  486. op:=A_PSUBD;
  487. end;
  488. end;
  489. end;
  490. xorn:
  491. op:=A_PXOR;
  492. orn:
  493. op:=A_POR;
  494. andn:
  495. op:=A_PAND;
  496. else
  497. internalerror(2003042214);
  498. end;
  499. { left and right no register? }
  500. { then one must be demanded }
  501. if (left.location.loc<>LOC_MMXREGISTER) then
  502. begin
  503. if (right.location.loc=LOC_MMXREGISTER) then
  504. begin
  505. location_swap(left.location,right.location);
  506. toggleflag(nf_swaped);
  507. end
  508. else
  509. begin
  510. { register variable ? }
  511. if (left.location.loc=LOC_CMMXREGISTER) then
  512. begin
  513. hregister:=cg.getmmxregister(exprasmlist,OS_M64);
  514. emit_reg_reg(A_MOVQ,S_NO,left.location.register,hregister);
  515. end
  516. else
  517. begin
  518. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  519. internalerror(200203245);
  520. location_release(exprasmlist,left.location);
  521. hregister:=cg.getmmxregister(exprasmlist,OS_M64);
  522. emit_ref_reg(A_MOVQ,S_NO,left.location.reference,hregister);
  523. end;
  524. location_reset(left.location,LOC_MMXREGISTER,OS_NO);
  525. left.location.register:=hregister;
  526. end;
  527. end;
  528. { at this point, left.location.loc should be LOC_MMXREGISTER }
  529. if right.location.loc<>LOC_MMXREGISTER then
  530. begin
  531. if (nodetype=subn) and (nf_swaped in flags) then
  532. begin
  533. if right.location.loc=LOC_CMMXREGISTER then
  534. begin
  535. hreg:=cg.getmmxregister(exprasmlist,OS_M64);
  536. emit_reg_reg(A_MOVQ,S_NO,right.location.register,hreg);
  537. emit_reg_reg(op,S_NO,left.location.register,hreg);
  538. cg.ungetregister(exprasmlist,hreg);
  539. emit_reg_reg(A_MOVQ,S_NO,hreg,left.location.register);
  540. end
  541. else
  542. begin
  543. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  544. internalerror(200203247);
  545. location_release(exprasmlist,right.location);
  546. hreg:=cg.getmmxregister(exprasmlist,OS_M64);
  547. emit_ref_reg(A_MOVQ,S_NO,right.location.reference,hreg);
  548. emit_reg_reg(op,S_NO,left.location.register,hreg);
  549. cg.ungetregister(exprasmlist,hreg);
  550. emit_reg_reg(A_MOVQ,S_NO,hreg,left.location.register);
  551. end;
  552. end
  553. else
  554. begin
  555. if (right.location.loc=LOC_CMMXREGISTER) then
  556. emit_reg_reg(op,S_NO,right.location.register,left.location.register)
  557. else
  558. begin
  559. if not(right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  560. internalerror(200203246);
  561. emit_ref_reg(op,S_NO,right.location.reference,left.location.register);
  562. location_release(exprasmlist,right.location);
  563. end;
  564. end;
  565. end
  566. else
  567. begin
  568. { right.location=LOC_MMXREGISTER }
  569. if (nodetype=subn) and (nf_swaped in flags) then
  570. begin
  571. emit_reg_reg(op,S_NO,left.location.register,right.location.register);
  572. location_swap(left.location,right.location);
  573. toggleflag(nf_swaped);
  574. end
  575. else
  576. begin
  577. emit_reg_reg(op,S_NO,right.location.register,left.location.register);
  578. end;
  579. end;
  580. location_freetemp(exprasmlist,right.location);
  581. location_release(exprasmlist,right.location);
  582. if cmpop then
  583. begin
  584. location_freetemp(exprasmlist,left.location);
  585. location_release(exprasmlist,left.location);
  586. end;
  587. set_result_location(cmpop,true);
  588. end;
  589. {$endif SUPPORT_MMX}
  590. {*****************************************************************************
  591. x86 MUL
  592. *****************************************************************************}
  593. procedure ti386addnode.second_mul;
  594. var r:Tregister;
  595. hl4 : tasmlabel;
  596. begin
  597. {The location.register will be filled in later (JM)}
  598. location_reset(location,LOC_REGISTER,OS_INT);
  599. {Get a temp register and load the left value into it
  600. and free the location.}
  601. r:=cg.getintregister(exprasmlist,OS_INT);
  602. cg.a_load_loc_reg(exprasmlist,OS_INT,left.location,r);
  603. location_release(exprasmlist,left.location);
  604. {Allocate EAX.}
  605. cg.getexplicitregister(exprasmlist,NR_EAX);
  606. {Load the right value.}
  607. cg.a_load_loc_reg(exprasmlist,OS_INT,right.location,NR_EAX);
  608. location_release(exprasmlist,right.location);
  609. {The mul instruction frees register r.}
  610. cg.ungetregister(exprasmlist,r);
  611. {Also allocate EDX, since it is also modified by a mul (JM).}
  612. cg.getexplicitregister(exprasmlist,NR_EDX);
  613. emit_reg(A_MUL,S_L,r);
  614. if cs_check_overflow in aktlocalswitches then
  615. begin
  616. objectlibrary.getlabel(hl4);
  617. cg.a_jmp_flags(exprasmlist,F_AE,hl4);
  618. cg.a_call_name(exprasmlist,'FPC_OVERFLOW');
  619. cg.a_label(exprasmlist,hl4);
  620. end;
  621. {Free EDX}
  622. cg.ungetregister(exprasmlist,NR_EDX);
  623. {Free EAX}
  624. cg.ungetregister(exprasmlist,NR_EAX);
  625. {Allocate a new register and store the result in EAX in it.}
  626. location.register:=cg.getintregister(exprasmlist,OS_INT);
  627. emit_reg_reg(A_MOV,S_L,NR_EAX,location.register);
  628. location_freetemp(exprasmlist,left.location);
  629. location_freetemp(exprasmlist,right.location);
  630. end;
  631. begin
  632. caddnode:=ti386addnode;
  633. end.
  634. {
  635. $Log$
  636. Revision 1.98 2004-06-20 08:55:31 florian
  637. * logs truncated
  638. Revision 1.97 2004/06/16 20:07:10 florian
  639. * dwarf branch merged
  640. Revision 1.96 2004/05/19 23:30:18 peter
  641. * extra typecast to prevent range check
  642. Revision 1.95.2.1 2004/04/29 19:07:22 peter
  643. * compile fixes
  644. Revision 1.95 2004/02/04 19:22:27 peter
  645. *** empty log message ***
  646. Revision 1.94 2004/01/20 12:59:37 florian
  647. * common addnode code for x86-64 and i386
  648. }