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daopt386.pas 96 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  4. development team
  5. This unit contains the data flow analyzer and several helper procedures
  6. and functions.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. unit daopt386;
  21. {$i fpcdefs.inc}
  22. interface
  23. uses
  24. globtype,
  25. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  26. cpubase,optbase;
  27. {******************************* Constants *******************************}
  28. const
  29. { Possible register content types }
  30. con_Unknown = 0;
  31. con_ref = 1;
  32. con_const = 2;
  33. { The contents aren't usable anymore for CSE, but they may still be }
  34. { usefull for detecting whether the result of a load is actually used }
  35. con_invalid = 3;
  36. { the reverse of the above (in case a (conditional) jump is encountered): }
  37. { CSE is still possible, but the original instruction can't be removed }
  38. con_noRemoveRef = 4;
  39. { same, but for constants }
  40. con_noRemoveConst = 5;
  41. const
  42. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  43. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  44. OS_16,OS_32,OS_64,
  45. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  46. OS_M32,
  47. OS_ADDR,OS_NO,OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  52. TRegSet = Set of RS_EAX..RS_ESP;
  53. toptreginfo = Record
  54. NewRegsEncountered, OldRegsEncountered: TRegSet;
  55. RegsLoadedForRef: TRegSet;
  56. lastReload: array[RS_EAX..RS_ESP] of tai;
  57. New2OldReg: TRegArray;
  58. end;
  59. {possible actions on an operand: read, write or modify (= read & write)}
  60. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  61. {the possible states of a flag}
  62. TFlagContents = (F_Unknown, F_notSet, F_Set);
  63. TContent = Packed Record
  64. {start and end of block instructions that defines the
  65. content of this register.}
  66. StartMod: tai;
  67. MemWrite: taicpu;
  68. {how many instructions starting with StarMod does the block consist of}
  69. NrOfMods: Word;
  70. {the type of the content of the register: unknown, memory, constant}
  71. Typ: Byte;
  72. case byte of
  73. {starts at 0, gets increased everytime the register is written to}
  74. 1: (WState: Byte;
  75. {starts at 0, gets increased everytime the register is read from}
  76. RState: Byte);
  77. { to compare both states in one operation }
  78. 2: (state: word);
  79. end;
  80. {Contents of the integer registers}
  81. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  82. {contents of the FPU registers}
  83. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  84. {$ifdef tempOpts}
  85. { linked list which allows searching/deleting based on value, no extra frills}
  86. PSearchLinkedListItem = ^TSearchLinkedListItem;
  87. TSearchLinkedListItem = object(TLinkedList_Item)
  88. constructor init;
  89. function equals(p: PSearchLinkedListItem): boolean; virtual;
  90. end;
  91. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  92. TSearchDoubleIntItem = object(TLinkedList_Item)
  93. constructor init(_int1,_int2: longint);
  94. function equals(p: PSearchLinkedListItem): boolean; virtual;
  95. private
  96. int1, int2: longint;
  97. end;
  98. PSearchLinkedList = ^TSearchLinkedList;
  99. TSearchLinkedList = object(TLinkedList)
  100. function searchByValue(p: PSearchLinkedListItem): boolean;
  101. procedure removeByValue(p: PSearchLinkedListItem);
  102. end;
  103. {$endif tempOpts}
  104. {information record with the contents of every register. Every tai object
  105. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  106. TtaiProp = Record
  107. Regs: TRegContent;
  108. { FPURegs: TRegFPUContent;} {currently not yet used}
  109. { allocated Registers }
  110. UsedRegs: TRegSet;
  111. { status of the direction flag }
  112. DirFlag: TFlagContents;
  113. {$ifdef tempOpts}
  114. { currently used temps }
  115. tempAllocs: PSearchLinkedList;
  116. {$endif tempOpts}
  117. { can this instruction be removed? }
  118. CanBeRemoved: Boolean;
  119. { are the resultflags set by this instruction used? }
  120. FlagsUsed: Boolean;
  121. end;
  122. ptaiprop = ^TtaiProp;
  123. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  124. PtaiPropBlock = ^TtaiPropBlock;
  125. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  126. TLabelTableItem = Record
  127. taiObj: tai;
  128. {$ifDef JumpAnal}
  129. InstrNr: Longint;
  130. RefsFound: Word;
  131. JmpsProcessed: Word
  132. {$endif JumpAnal}
  133. end;
  134. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  135. PLabelTable = ^TLabelTable;
  136. {*********************** procedures and functions ************************}
  137. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  138. function RefsEquivalent(const R1, R2: TReference; var RegInfo: toptreginfo; OpAct: TOpAction): Boolean;
  139. function RefsEqual(const R1, R2: TReference): Boolean;
  140. function isgp32reg(supreg: tsuperregister): Boolean;
  141. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  142. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  143. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function reginop(supreg: tsuperregister; const o:toper): boolean;
  146. function instrWritesFlags(p: tai): boolean;
  147. function instrReadsFlags(p: tai): boolean;
  148. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  149. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  150. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  151. const c: tcontent): boolean;
  152. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  153. const c: tcontent; var memwritedestroyed: boolean): boolean;
  154. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  155. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  156. procedure SkipHead(var p: tai);
  157. function labelCanBeSkipped(p: tai_label): boolean;
  158. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  159. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  160. hp: tai): boolean;
  161. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  162. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  163. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  164. //function RegsEquivalent(OldReg, NewReg: tregister; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  165. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  166. function sizescompatible(loadsize,newsize: topsize): boolean;
  167. function OpsEqual(const o1,o2:toper): Boolean;
  168. type
  169. tdfaobj = class
  170. constructor create(_list: taasmoutput); virtual;
  171. function pass_1(_blockstart: tai): tai;
  172. function pass_2: boolean;
  173. procedure clear;
  174. function getlabelwithsym(sym: tasmlabel): tai;
  175. private
  176. { Walks through the list to find the lowest and highest label number, inits the }
  177. { labeltable and fixes/optimizes some regallocs }
  178. procedure initlabeltable;
  179. function initdfapass2: boolean;
  180. procedure dodfapass2;
  181. { asm list we're working on }
  182. list: taasmoutput;
  183. { current part of the asm list }
  184. blockstart, blockend: tai;
  185. { the amount of taiObjects in the current part of the assembler list }
  186. nroftaiobjs: longint;
  187. { Array which holds all TtaiProps }
  188. taipropblock: ptaipropblock;
  189. { all labels in the current block: their value mapped to their location }
  190. lolab, hilab, labdif: longint;
  191. labeltable: plabeltable;
  192. end;
  193. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  194. procedure incState(var S: Byte; amount: longint);
  195. {******************************* Variables *******************************}
  196. var
  197. dfa: tdfaobj;
  198. {*********************** end of Interface section ************************}
  199. Implementation
  200. Uses
  201. {$ifdef csdebug}
  202. cutils,
  203. {$else}
  204. {$ifdef statedebug}
  205. cutils,
  206. {$else}
  207. {$ifdef allocregdebug}
  208. cutils,
  209. {$endif}
  210. {$endif}
  211. {$endif}
  212. globals, systems, verbose, symconst, cgobj,procinfo;
  213. Type
  214. TRefCompare = function(const r1, r2: treference; size: tcgsize): boolean;
  215. var
  216. {How many instructions are between the current instruction and the last one
  217. that modified the register}
  218. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  219. {$ifdef tempOpts}
  220. constructor TSearchLinkedListItem.init;
  221. begin
  222. end;
  223. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  224. begin
  225. equals := false;
  226. end;
  227. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  228. begin
  229. int1 := _int1;
  230. int2 := _int2;
  231. end;
  232. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  233. begin
  234. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  235. (TSearchDoubleIntItem(p).int2 = int2);
  236. end;
  237. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  238. var temp: PSearchLinkedListItem;
  239. begin
  240. temp := first;
  241. while (temp <> last.next) and
  242. not(temp.equals(p)) do
  243. temp := temp.next;
  244. searchByValue := temp <> last.next;
  245. end;
  246. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  247. begin
  248. temp := first;
  249. while (temp <> last.next) and
  250. not(temp.equals(p)) do
  251. temp := temp.next;
  252. if temp <> last.next then
  253. begin
  254. remove(temp);
  255. dispose(temp,done);
  256. end;
  257. end;
  258. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  259. {updates UsedRegs with the RegAlloc Information coming after p}
  260. begin
  261. repeat
  262. while assigned(p) and
  263. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  264. ((p.typ = ait_label) and
  265. labelCanBeSkipped(tai_label(current)))) Do
  266. p := tai(p.next);
  267. while assigned(p) and
  268. (p.typ=ait_RegAlloc) Do
  269. begin
  270. case tai_regalloc(p).ratype of
  271. ra_alloc :
  272. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  273. ra_dealloc :
  274. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  275. end;
  276. p := tai(p.next);
  277. end;
  278. until not(assigned(p)) or
  279. (not(p.typ in SkipInstr) and
  280. not((p.typ = ait_label) and
  281. labelCanBeSkipped(tai_label(current))));
  282. end;
  283. {$endif tempOpts}
  284. {************************ Create the Label table ************************}
  285. function findregalloc(reg: tregister; starttai: tai; ratyp: tregalloctype): boolean;
  286. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  287. { starting with Starttai and ending with the next "real" instruction }
  288. var
  289. supreg: tsuperregister;
  290. begin
  291. findregalloc := false;
  292. supreg := getsupreg(reg);
  293. repeat
  294. while assigned(starttai) and
  295. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  296. ((starttai.typ = ait_label) and
  297. labelcanbeskipped(tai_label(starttai)))) do
  298. starttai := tai(starttai.next);
  299. if assigned(starttai) and
  300. (starttai.typ = ait_regalloc) then
  301. begin
  302. if (tai_regalloc(Starttai).ratype = ratyp) and
  303. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  304. begin
  305. findregalloc:=true;
  306. break;
  307. end;
  308. starttai := tai(starttai.next);
  309. end
  310. else
  311. break;
  312. until false;
  313. end;
  314. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  315. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  316. var
  317. hp2: tai;
  318. begin
  319. hp2 := p;
  320. repeat
  321. hp2 := tai(hp2.previous);
  322. if assigned(hp2) and
  323. (hp2.typ = ait_regalloc) and
  324. (tai_regalloc(hp2).ratype=ra_dealloc) and
  325. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  326. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  327. begin
  328. asml.remove(hp2);
  329. hp2.free;
  330. break;
  331. end;
  332. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  333. end;
  334. begin
  335. case current_procinfo.procdef.rettype.def.deftype of
  336. arraydef,recorddef,pointerdef,
  337. stringdef,enumdef,procdef,objectdef,errordef,
  338. filedef,setdef,procvardef,
  339. classrefdef,forwarddef:
  340. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  341. orddef:
  342. if current_procinfo.procdef.rettype.def.size <> 0 then
  343. begin
  344. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  345. { for int64/qword }
  346. if current_procinfo.procdef.rettype.def.size = 8 then
  347. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  348. end;
  349. end;
  350. end;
  351. procedure getNoDeallocRegs(var regs: tregset);
  352. var
  353. regCounter: TSuperRegister;
  354. begin
  355. regs := [];
  356. case current_procinfo.procdef.rettype.def.deftype of
  357. arraydef,recorddef,pointerdef,
  358. stringdef,enumdef,procdef,objectdef,errordef,
  359. filedef,setdef,procvardef,
  360. classrefdef,forwarddef:
  361. regs := [RS_EAX];
  362. orddef:
  363. if current_procinfo.procdef.rettype.def.size <> 0 then
  364. begin
  365. regs := [RS_EAX];
  366. { for int64/qword }
  367. if current_procinfo.procdef.rettype.def.size = 8 then
  368. regs := regs + [RS_EDX];
  369. end;
  370. end;
  371. for regCounter := RS_EAX to RS_EBX do
  372. { if not(regCounter in rg.usableregsint) then}
  373. include(regs,regcounter);
  374. end;
  375. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  376. var
  377. hp1: tai;
  378. funcResRegs: tregset;
  379. funcResReg: boolean;
  380. begin
  381. { if not(supreg in rg.usableregsint) then
  382. exit;}
  383. { if not(supreg in [RS_EDI]) then
  384. exit;}
  385. getNoDeallocRegs(funcresregs);
  386. { funcResRegs := funcResRegs - rg.usableregsint;}
  387. { funcResRegs := funcResRegs - [RS_EDI];}
  388. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  389. funcResReg := getsupreg(reg) in funcresregs;
  390. hp1 := p;
  391. {
  392. while not(funcResReg and
  393. (p.typ = ait_instruction) and
  394. (taicpu(p).opcode = A_JMP) and
  395. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  396. getLastInstruction(p, p) and
  397. not(regInInstruction(supreg, p)) do
  398. hp1 := p;
  399. }
  400. { don't insert a dealloc for registers which contain the function result }
  401. { if they are followed by a jump to the exit label (for exit(...)) }
  402. { if not(funcResReg) or
  403. not((hp1.typ = ait_instruction) and
  404. (taicpu(hp1).opcode = A_JMP) and
  405. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  406. begin
  407. p := tai_regalloc.deAlloc(reg,nil);
  408. insertLLItem(AsmL, hp1.previous, hp1, p);
  409. end;
  410. end;
  411. {************************ Search the Label table ************************}
  412. function findlabel(l: tasmlabel; var hp: tai): boolean;
  413. {searches for the specified label starting from hp as long as the
  414. encountered instructions are labels, to be able to optimize constructs like
  415. jne l2 jmp l2
  416. jmp l3 and l1:
  417. l1: l2:
  418. l2:}
  419. var
  420. p: tai;
  421. begin
  422. p := hp;
  423. while assigned(p) and
  424. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  425. if (p.typ <> ait_Label) or
  426. (tai_label(p).l <> l) then
  427. GetNextInstruction(p, p)
  428. else
  429. begin
  430. hp := p;
  431. findlabel := true;
  432. exit
  433. end;
  434. findlabel := false;
  435. end;
  436. {************************ Some general functions ************************}
  437. function tch2reg(ch: tinschange): tsuperregister;
  438. {converts a TChange variable to a TRegister}
  439. const
  440. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  441. begin
  442. if (ch <= CH_REDI) then
  443. tch2reg := ch2reg[ch]
  444. else if (ch <= CH_WEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  446. else if (ch <= CH_RWEDI) then
  447. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  448. else if (ch <= CH_MEDI) then
  449. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  450. else
  451. InternalError($db)
  452. end;
  453. { inserts new_one between prev and foll }
  454. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  455. begin
  456. if assigned(prev) then
  457. if assigned(foll) then
  458. begin
  459. if assigned(new_one) then
  460. begin
  461. new_one.previous := prev;
  462. new_one.next := foll;
  463. prev.next := new_one;
  464. foll.previous := new_one;
  465. { shgould we update line information }
  466. if (not (tai(new_one).typ in SkipLineInfo)) and
  467. (not (tai(foll).typ in SkipLineInfo)) then
  468. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  469. end;
  470. end
  471. else
  472. asml.Concat(new_one)
  473. else
  474. if assigned(foll) then
  475. asml.Insert(new_one)
  476. end;
  477. {********************* Compare parts of tai objects *********************}
  478. function regssamesize(reg1, reg2: tregister): boolean;
  479. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  480. 8bit, 16bit or 32bit)}
  481. begin
  482. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  483. internalerror(2003111602);
  484. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  485. end;
  486. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  487. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  488. OldReg and NewReg have the same size (has to be chcked in advance with
  489. RegsSameSize) and that neither equals RS_INVALID}
  490. var
  491. newsupreg, oldsupreg: tsuperregister;
  492. begin
  493. if (newreg = NR_NO) or (oldreg = NR_NO) then
  494. internalerror(2003111601);
  495. newsupreg := getsupreg(newreg);
  496. oldsupreg := getsupreg(oldreg);
  497. with RegInfo Do
  498. begin
  499. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  500. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  501. New2OldReg[newsupreg] := oldsupreg;
  502. end;
  503. end;
  504. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  505. begin
  506. case o.typ Of
  507. top_reg:
  508. if (o.reg <> NR_NO) then
  509. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  510. top_ref:
  511. begin
  512. if o.ref^.base <> NR_NO then
  513. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  514. if o.ref^.index <> NR_NO then
  515. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  516. end;
  517. end;
  518. end;
  519. function RegsEquivalent(oldreg, newreg: tregister; var reginfo: toptreginfo; opact: topaction): Boolean;
  520. begin
  521. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  522. if RegsSameSize(oldreg, newreg) then
  523. with reginfo do
  524. {here we always check for the 32 bit component, because it is possible that
  525. the 8 bit component has not been set, event though NewReg already has been
  526. processed. This happens if it has been compared with a register that doesn't
  527. have an 8 bit component (such as EDI). in that case the 8 bit component is
  528. still set to RS_NO and the comparison in the else-part will fail}
  529. if (getsupreg(oldReg) in OldRegsEncountered) then
  530. if (getsupreg(NewReg) in NewRegsEncountered) then
  531. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  532. { if we haven't encountered the new register yet, but we have encountered the
  533. old one already, the new one can only be correct if it's being written to
  534. (and consequently the old one is also being written to), otherwise
  535. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  536. movl (%eax), %eax movl (%edx), %edx
  537. are considered equivalent}
  538. else
  539. if (opact = opact_write) then
  540. begin
  541. AddReg2RegInfo(oldreg, newreg, reginfo);
  542. RegsEquivalent := true
  543. end
  544. else
  545. Regsequivalent := false
  546. else
  547. if not(getsupreg(newreg) in NewRegsEncountered) and
  548. ((opact = opact_write) or
  549. (newreg = oldreg)) then
  550. begin
  551. AddReg2RegInfo(oldreg, newreg, reginfo);
  552. RegsEquivalent := true
  553. end
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := false
  558. else
  559. RegsEquivalent := oldreg = newreg
  560. end;
  561. function RefsEquivalent(const r1, r2: treference; var regInfo: toptreginfo; opact: topaction): boolean;
  562. begin
  563. RefsEquivalent :=
  564. (r1.offset = r2.offset) and
  565. RegsEquivalent(r1.base, r2.base, reginfo, opact) and
  566. RegsEquivalent(r1.index, r2.index, reginfo, opact) and
  567. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  568. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  569. (r1.relsymbol = r2.relsymbol);
  570. end;
  571. function refsequal(const r1, r2: treference): boolean;
  572. begin
  573. refsequal :=
  574. (r1.offset = r2.offset) and
  575. (r1.segment = r2.segment) and (r1.base = r2.base) and
  576. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  577. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  578. (r1.relsymbol = r2.relsymbol);
  579. end;
  580. {$ifdef q+}
  581. {$q-}
  582. {$define overflowon}
  583. {$endif q+}
  584. // checks whether a write to r2 of size "size" contains address r1
  585. function refsoverlapping(const r1, r2: treference; size: tcgsize): boolean;
  586. var
  587. realsize: aword;
  588. begin
  589. realsize := tcgsize2size[size];
  590. refsoverlapping :=
  591. (aword(r1.offset-r2.offset) <= realsize) and
  592. (r1.segment = r2.segment) and (r1.base = r2.base) and
  593. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  594. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  595. (r1.relsymbol = r2.relsymbol);
  596. end;
  597. {$ifdef overflowon}
  598. {$q+}
  599. {$undef overflowon}
  600. {$endif overflowon}
  601. function isgp32reg(supreg: tsuperregister): boolean;
  602. {Checks if the register is a 32 bit general purpose register}
  603. begin
  604. isgp32reg := false;
  605. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  606. isgp32reg := true
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: Word;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 1 to maxinschanges do
  719. case insprop[p.opcode].Ch[opCount] of
  720. CH_REAX..CH_MEDI:
  721. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  722. begin
  723. regInInstruction := true;
  724. exit;
  725. end;
  726. CH_ROp1..CH_MOp1:
  727. if reginop(supreg,p.oper[0]^) then
  728. begin
  729. regInInstruction := true;
  730. exit
  731. end;
  732. Ch_ROp2..Ch_MOp2:
  733. if reginop(supreg,p.oper[1]^) then
  734. begin
  735. regInInstruction := true;
  736. exit
  737. end;
  738. Ch_ROp3..Ch_MOp3:
  739. if reginop(supreg,p.oper[2]^) then
  740. begin
  741. regInInstruction := true;
  742. exit
  743. end;
  744. end;
  745. end;
  746. end;
  747. end;
  748. function reginop(supreg: tsuperregister; const o:toper): boolean;
  749. begin
  750. reginop := false;
  751. case o.typ Of
  752. top_reg:
  753. reginop :=
  754. (getregtype(o.reg) = R_INTREGISTER) and
  755. (supreg = getsupreg(o.reg));
  756. top_ref:
  757. reginop :=
  758. ((o.ref^.base <> NR_NO) and
  759. (supreg = getsupreg(o.ref^.base))) or
  760. ((o.ref^.index <> NR_NO) and
  761. (supreg = getsupreg(o.ref^.index)));
  762. end;
  763. end;
  764. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  765. var
  766. InstrProp: TInsProp;
  767. TmpResult: Boolean;
  768. Cnt: Word;
  769. begin
  770. TmpResult := False;
  771. if supreg = RS_INVALID then
  772. exit;
  773. if (p1.typ = ait_instruction) then
  774. case taicpu(p1).opcode of
  775. A_IMUL:
  776. With taicpu(p1) Do
  777. TmpResult :=
  778. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  779. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  780. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  781. A_DIV, A_IDIV, A_MUL:
  782. With taicpu(p1) Do
  783. TmpResult :=
  784. (supreg in [RS_EAX,RS_EDX]);
  785. else
  786. begin
  787. Cnt := 1;
  788. InstrProp := InsProp[taicpu(p1).OpCode];
  789. while (Cnt <= maxinschanges) and
  790. (InstrProp.Ch[Cnt] <> Ch_None) and
  791. not(TmpResult) Do
  792. begin
  793. case InstrProp.Ch[Cnt] Of
  794. Ch_WEAX..Ch_MEDI:
  795. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  796. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  797. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  798. reginop(supreg,taicpu(p1).oper[0]^);
  799. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  800. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  801. reginop(supreg,taicpu(p1).oper[1]^);
  802. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  803. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  804. reginop(supreg,taicpu(p1).oper[2]^);
  805. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  806. Ch_ALL: TmpResult := true;
  807. end;
  808. inc(Cnt)
  809. end
  810. end
  811. end;
  812. RegModifiedByInstruction := TmpResult
  813. end;
  814. function instrWritesFlags(p: tai): boolean;
  815. var
  816. l: longint;
  817. begin
  818. instrWritesFlags := true;
  819. case p.typ of
  820. ait_instruction:
  821. begin
  822. for l := 1 to maxinschanges do
  823. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  824. exit;
  825. end;
  826. ait_label:
  827. exit;
  828. end;
  829. instrWritesFlags := false;
  830. end;
  831. function instrReadsFlags(p: tai): boolean;
  832. var
  833. l: longint;
  834. begin
  835. instrReadsFlags := true;
  836. case p.typ of
  837. ait_instruction:
  838. begin
  839. for l := 1 to maxinschanges do
  840. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  841. exit;
  842. end;
  843. ait_label:
  844. exit;
  845. end;
  846. instrReadsFlags := false;
  847. end;
  848. {********************* GetNext and GetLastInstruction *********************}
  849. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  850. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  851. { next tai object in Next. Returns false if there isn't any }
  852. begin
  853. repeat
  854. if (Current.typ = ait_marker) and
  855. (tai_Marker(current).Kind = AsmBlockStart) then
  856. begin
  857. GetNextInstruction := False;
  858. Next := Nil;
  859. Exit
  860. end;
  861. Current := tai(current.Next);
  862. while assigned(Current) and
  863. ((current.typ in skipInstr) or
  864. ((current.typ = ait_label) and
  865. labelCanBeSkipped(tai_label(current)))) do
  866. Current := tai(current.Next);
  867. { if assigned(Current) and
  868. (current.typ = ait_Marker) and
  869. (tai_Marker(current).Kind = NoPropInfoStart) then
  870. begin
  871. while assigned(Current) and
  872. ((current.typ <> ait_Marker) or
  873. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  874. Current := tai(current.Next);
  875. end;}
  876. until not(assigned(Current)) or
  877. (current.typ <> ait_Marker) or
  878. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  879. Next := Current;
  880. if assigned(Current) and
  881. not((current.typ in SkipInstr) or
  882. ((current.typ = ait_label) and
  883. labelCanBeSkipped(tai_label(current))))
  884. then
  885. GetNextInstruction :=
  886. not((current.typ = ait_marker) and
  887. (tai_marker(current).kind = asmBlockStart))
  888. else
  889. begin
  890. GetNextInstruction := False;
  891. Next := nil;
  892. end;
  893. end;
  894. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  895. {skips the ait-types in SkipInstr puts the previous tai object in
  896. Last. Returns false if there isn't any}
  897. begin
  898. repeat
  899. Current := tai(current.previous);
  900. while assigned(Current) and
  901. (((current.typ = ait_Marker) and
  902. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  903. (current.typ in SkipInstr) or
  904. ((current.typ = ait_label) and
  905. labelCanBeSkipped(tai_label(current)))) Do
  906. Current := tai(current.previous);
  907. { if assigned(Current) and
  908. (current.typ = ait_Marker) and
  909. (tai_Marker(current).Kind = NoPropInfoend) then
  910. begin
  911. while assigned(Current) and
  912. ((current.typ <> ait_Marker) or
  913. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  914. Current := tai(current.previous);
  915. end;}
  916. until not(assigned(Current)) or
  917. (current.typ <> ait_Marker) or
  918. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  919. if not(assigned(Current)) or
  920. (current.typ in SkipInstr) or
  921. ((current.typ = ait_label) and
  922. labelCanBeSkipped(tai_label(current))) or
  923. ((current.typ = ait_Marker) and
  924. (tai_Marker(current).Kind = AsmBlockend))
  925. then
  926. begin
  927. Last := nil;
  928. GetLastInstruction := False
  929. end
  930. else
  931. begin
  932. Last := Current;
  933. GetLastInstruction := True;
  934. end;
  935. end;
  936. procedure SkipHead(var p: tai);
  937. var
  938. oldp: tai;
  939. begin
  940. repeat
  941. oldp := p;
  942. if (p.typ in SkipInstr) or
  943. ((p.typ = ait_marker) and
  944. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  945. GetNextInstruction(p,p)
  946. else if ((p.Typ = Ait_Marker) and
  947. (tai_Marker(p).Kind = nopropinfostart)) then
  948. {a marker of the NoPropInfoStart can't be the first instruction of a
  949. TAAsmoutput list}
  950. GetNextInstruction(tai(p.previous),p);
  951. until p = oldp
  952. end;
  953. function labelCanBeSkipped(p: tai_label): boolean;
  954. begin
  955. labelCanBeSkipped := not(p.l.is_used) or p.l.is_addr;
  956. end;
  957. {******************* The Data Flow Analyzer functions ********************}
  958. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  959. hp: tai): boolean;
  960. { assumes reg is a 32bit register }
  961. var
  962. p: taicpu;
  963. begin
  964. if not assigned(hp) or
  965. (hp.typ <> ait_instruction) then
  966. begin
  967. regLoadedWithNewValue := false;
  968. exit;
  969. end;
  970. p := taicpu(hp);
  971. regLoadedWithNewValue :=
  972. (((p.opcode = A_MOV) or
  973. (p.opcode = A_MOVZX) or
  974. (p.opcode = A_MOVSX) or
  975. (p.opcode = A_LEA)) and
  976. (p.oper[1]^.typ = top_reg) and
  977. (getsupreg(p.oper[1]^.reg) = supreg) and
  978. (canDependOnPrevValue or
  979. (p.oper[0]^.typ <> top_ref) or
  980. not regInRef(supreg,p.oper[0]^.ref^)) or
  981. ((p.opcode = A_POP) and
  982. (getsupreg(p.oper[0]^.reg) = supreg)));
  983. end;
  984. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  985. {updates UsedRegs with the RegAlloc Information coming after p}
  986. begin
  987. repeat
  988. while assigned(p) and
  989. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  990. ((p.typ = ait_label) and
  991. labelCanBeSkipped(tai_label(p)))) Do
  992. p := tai(p.next);
  993. while assigned(p) and
  994. (p.typ=ait_RegAlloc) Do
  995. begin
  996. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  997. begin
  998. case tai_regalloc(p).ratype of
  999. ra_alloc :
  1000. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1001. ra_dealloc :
  1002. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1003. end;
  1004. end;
  1005. p := tai(p.next);
  1006. end;
  1007. until not(assigned(p)) or
  1008. (not(p.typ in SkipInstr) and
  1009. not((p.typ = ait_label) and
  1010. labelCanBeSkipped(tai_label(p))));
  1011. end;
  1012. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1013. { allocates register reg between (and including) instructions p1 and p2 }
  1014. { the type of p1 and p2 must not be in SkipInstr }
  1015. { note that this routine is both called from the peephole optimizer }
  1016. { where optinfo is not yet initialised) and from the cse (where it is) }
  1017. var
  1018. hp: tai;
  1019. lastRemovedWasDealloc: boolean;
  1020. supreg: tsuperregister;
  1021. begin
  1022. {$ifdef EXTDEBUG}
  1023. if assigned(p1.optinfo) and
  1024. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1025. internalerror(2004101010);
  1026. {$endif EXTDEBUG}
  1027. supreg := getsupreg(reg);
  1028. { if not(supreg in rg.usableregsint+[RS_EDI,RS_ESI]) or
  1029. not(assigned(p1)) then}
  1030. if not(supreg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_EDI,RS_ESI]) or
  1031. not(assigned(p1)) then
  1032. { this happens with registers which are loaded implicitely, outside the }
  1033. { current block (e.g. esi with self) }
  1034. exit;
  1035. { make sure we allocate it for this instruction }
  1036. getnextinstruction(p2,p2);
  1037. lastRemovedWasDealloc := false;
  1038. {$ifdef allocregdebug}
  1039. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1040. ' from here...'));
  1041. insertllitem(asml,p1.previous,p1,hp);
  1042. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1043. ' till here...'));
  1044. insertllitem(asml,p2,p1.next,hp);
  1045. {$endif allocregdebug}
  1046. if not(supreg in initialusedregs) then
  1047. begin
  1048. hp := tai_regalloc.alloc(reg,nil);
  1049. insertllItem(asmL,p1.previous,p1,hp);
  1050. end;
  1051. while assigned(p1) and
  1052. (p1 <> p2) do
  1053. begin
  1054. if assigned(p1.optinfo) then
  1055. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1056. p1 := tai(p1.next);
  1057. repeat
  1058. while assigned(p1) and
  1059. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1060. p1 := tai(p1.next);
  1061. { remove all allocation/deallocation info about the register in between }
  1062. if assigned(p1) and
  1063. (p1.typ = ait_regalloc) then
  1064. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1065. begin
  1066. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1067. hp := tai(p1.Next);
  1068. asml.Remove(p1);
  1069. p1.free;
  1070. p1 := hp;
  1071. end
  1072. else p1 := tai(p1.next);
  1073. until not(assigned(p1)) or
  1074. not(p1.typ in SkipInstr);
  1075. end;
  1076. if assigned(p1) then
  1077. begin
  1078. if lastRemovedWasDealloc then
  1079. begin
  1080. hp := tai_regalloc.DeAlloc(reg,nil);
  1081. insertLLItem(asmL,p1.previous,p1,hp);
  1082. end;
  1083. end;
  1084. end;
  1085. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1086. var
  1087. hp: tai;
  1088. first: boolean;
  1089. begin
  1090. findregdealloc := false;
  1091. first := true;
  1092. while assigned(p.previous) and
  1093. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1094. ((tai(p.previous).typ = ait_label) and
  1095. labelCanBeSkipped(tai_label(p.previous)))) do
  1096. begin
  1097. p := tai(p.previous);
  1098. if (p.typ = ait_regalloc) and
  1099. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1100. if (tai_regalloc(p).ratype=ra_dealloc) then
  1101. if first then
  1102. begin
  1103. findregdealloc := true;
  1104. break;
  1105. end
  1106. else
  1107. begin
  1108. findRegDealloc :=
  1109. getNextInstruction(p,hp) and
  1110. regLoadedWithNewValue(supreg,false,hp);
  1111. break
  1112. end
  1113. else
  1114. first := false;
  1115. end
  1116. end;
  1117. procedure incState(var S: Byte; amount: longint);
  1118. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1119. errors}
  1120. begin
  1121. if (s <= $ff - amount) then
  1122. inc(s, amount)
  1123. else s := longint(s) + amount - $ff;
  1124. end;
  1125. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1126. { Content is the sequence of instructions that describes the contents of }
  1127. { seqReg. reg is being overwritten by the current instruction. if the }
  1128. { content of seqReg depends on reg (ie. because of a }
  1129. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1130. var
  1131. p: tai;
  1132. Counter: Word;
  1133. TmpResult: Boolean;
  1134. RegsChecked: TRegSet;
  1135. begin
  1136. RegsChecked := [];
  1137. p := Content.StartMod;
  1138. TmpResult := False;
  1139. Counter := 1;
  1140. while not(TmpResult) and
  1141. (Counter <= Content.NrOfMods) Do
  1142. begin
  1143. if (p.typ = ait_instruction) and
  1144. ((taicpu(p).opcode = A_MOV) or
  1145. (taicpu(p).opcode = A_MOVZX) or
  1146. (taicpu(p).opcode = A_MOVSX) or
  1147. (taicpu(p).opcode = A_LEA)) and
  1148. (taicpu(p).oper[0]^.typ = top_ref) then
  1149. With taicpu(p).oper[0]^.ref^ Do
  1150. if ((base = current_procinfo.FramePointer) or
  1151. (assigned(symbol) and (base = NR_NO))) and
  1152. (index = NR_NO) then
  1153. begin
  1154. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1155. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1156. break;
  1157. end
  1158. else
  1159. tmpResult :=
  1160. regReadByInstruction(supreg,p) and
  1161. regModifiedByInstruction(seqReg,p)
  1162. else
  1163. tmpResult :=
  1164. regReadByInstruction(supreg,p) and
  1165. regModifiedByInstruction(seqReg,p);
  1166. inc(Counter);
  1167. GetNextInstruction(p,p)
  1168. end;
  1169. sequenceDependsonReg := TmpResult
  1170. end;
  1171. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1172. var
  1173. counter: tsuperregister;
  1174. begin
  1175. for counter := RS_EAX to RS_EDI do
  1176. if counter <> supreg then
  1177. with p1^.regs[counter] Do
  1178. begin
  1179. if (typ in [con_ref,con_noRemoveRef]) and
  1180. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1181. if typ in [con_ref, con_invalid] then
  1182. typ := con_invalid
  1183. { con_noRemoveRef = con_unknown }
  1184. else
  1185. typ := con_unknown;
  1186. if assigned(memwrite) and
  1187. regInRef(counter,memwrite.oper[1]^.ref^) then
  1188. memwrite := nil;
  1189. end;
  1190. end;
  1191. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1192. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1193. contents of registers are loaded with a memory location based on reg.
  1194. doincState is false when this register has to be destroyed not because
  1195. it's contents are directly modified/overwritten, but because of an indirect
  1196. action (e.g. this register holds the contents of a variable and the value
  1197. of the variable in memory is changed) }
  1198. begin
  1199. { the following happens for fpu registers }
  1200. if (supreg < low(NrOfInstrSinceLastMod)) or
  1201. (supreg > high(NrOfInstrSinceLastMod)) then
  1202. exit;
  1203. NrOfInstrSinceLastMod[supreg] := 0;
  1204. with p1^.regs[supreg] do
  1205. begin
  1206. if doincState then
  1207. begin
  1208. incState(wstate,1);
  1209. typ := con_unknown;
  1210. startmod := nil;
  1211. end
  1212. else
  1213. if typ in [con_ref,con_const,con_invalid] then
  1214. typ := con_invalid
  1215. { con_noRemoveRef = con_unknown }
  1216. else
  1217. typ := con_unknown;
  1218. memwrite := nil;
  1219. end;
  1220. invalidateDependingRegs(p1,supreg);
  1221. end;
  1222. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1223. begin
  1224. if (p.typ = ait_instruction) then
  1225. begin
  1226. case taicpu(p).oper[0]^.typ Of
  1227. top_reg:
  1228. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1229. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1230. top_ref:
  1231. With TReference(taicpu(p).oper[0]^) Do
  1232. begin
  1233. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1234. then RegSet := RegSet + [base];
  1235. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1236. then RegSet := RegSet + [index];
  1237. end;
  1238. end;
  1239. case taicpu(p).oper[1]^.typ Of
  1240. top_reg:
  1241. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1242. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1243. top_ref:
  1244. With TReference(taicpu(p).oper[1]^) Do
  1245. begin
  1246. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1247. then RegSet := RegSet + [base];
  1248. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1249. then RegSet := RegSet + [index];
  1250. end;
  1251. end;
  1252. end;
  1253. end;}
  1254. function OpsEquivalent(const o1, o2: toper; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1255. begin {checks whether the two ops are equivalent}
  1256. OpsEquivalent := False;
  1257. if o1.typ=o2.typ then
  1258. case o1.typ Of
  1259. top_reg:
  1260. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, RegInfo, OpAct);
  1261. top_ref:
  1262. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, RegInfo, OpAct);
  1263. Top_Const:
  1264. OpsEquivalent := o1.val = o2.val;
  1265. Top_None:
  1266. OpsEquivalent := True
  1267. end;
  1268. end;
  1269. function OpsEqual(const o1,o2:toper): Boolean;
  1270. begin {checks whether the two ops are equal}
  1271. OpsEqual := False;
  1272. if o1.typ=o2.typ then
  1273. case o1.typ Of
  1274. top_reg :
  1275. OpsEqual:=o1.reg=o2.reg;
  1276. top_ref :
  1277. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1278. Top_Const :
  1279. OpsEqual:=o1.val=o2.val;
  1280. Top_None :
  1281. OpsEqual := True
  1282. end;
  1283. end;
  1284. function sizescompatible(loadsize,newsize: topsize): boolean;
  1285. begin
  1286. case loadsize of
  1287. S_B,S_BW,S_BL:
  1288. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1289. S_W,S_WL:
  1290. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1291. else
  1292. sizescompatible := newsize = S_L;
  1293. end;
  1294. end;
  1295. function opscompatible(p1,p2: taicpu): boolean;
  1296. begin
  1297. case p1.opcode of
  1298. A_MOVZX,A_MOVSX:
  1299. opscompatible :=
  1300. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1301. sizescompatible(p1.opsize,p2.opsize);
  1302. else
  1303. opscompatible :=
  1304. (p1.opcode = p2.opcode) and
  1305. (p1.ops = p2.ops) and
  1306. (p1.opsize = p2.opsize);
  1307. end;
  1308. end;
  1309. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1310. {$ifdef csdebug}
  1311. var
  1312. hp: tai;
  1313. {$endif csdebug}
  1314. begin {checks whether two taicpu instructions are equal}
  1315. if assigned(p1) and assigned(p2) and
  1316. (tai(p1).typ = ait_instruction) and
  1317. (tai(p2).typ = ait_instruction) and
  1318. opscompatible(taicpu(p1),taicpu(p2)) and
  1319. (not(assigned(taicpu(p1).oper[0])) or
  1320. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1321. (not(assigned(taicpu(p1).oper[1])) or
  1322. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1323. (not(assigned(taicpu(p1).oper[2])) or
  1324. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1325. {both instructions have the same structure:
  1326. "<operator> <operand of type1>, <operand of type 2>"}
  1327. if ((taicpu(p1).opcode = A_MOV) or
  1328. (taicpu(p1).opcode = A_MOVZX) or
  1329. (taicpu(p1).opcode = A_MOVSX) or
  1330. (taicpu(p1).opcode = A_LEA)) and
  1331. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1332. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1333. {the "old" instruction is a load of a register with a new value, not with
  1334. a value based on the contents of this register (so no "mov (reg), reg")}
  1335. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1336. RefsEqual(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^) then
  1337. {the "new" instruction is also a load of a register with a new value, and
  1338. this value is fetched from the same memory location}
  1339. begin
  1340. With taicpu(p2).oper[0]^.ref^ Do
  1341. begin
  1342. if (base <> NR_NO) and
  1343. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1344. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1345. if (index <> NR_NO) and
  1346. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1347. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1348. end;
  1349. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1350. from the reference are the same in the old and in the new instruction
  1351. sequence}
  1352. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1353. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1354. InstructionsEquivalent :=
  1355. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1356. taicpu(p2).oper[1]^.reg, RegInfo, OpAct_Write);
  1357. end
  1358. {the registers are loaded with values from different memory locations. if
  1359. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1360. would be considered equivalent}
  1361. else
  1362. InstructionsEquivalent := False
  1363. else
  1364. {load register with a value based on the current value of this register}
  1365. begin
  1366. With taicpu(p2).oper[0]^.ref^ Do
  1367. begin
  1368. if (base <> NR_NO) and
  1369. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1370. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1371. {it won't do any harm if the register is already in RegsLoadedForRef}
  1372. begin
  1373. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1374. {$ifdef csdebug}
  1375. Writeln(std_regname(base), ' added');
  1376. {$endif csdebug}
  1377. end;
  1378. if (index <> NR_NO) and
  1379. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1380. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1381. begin
  1382. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1383. {$ifdef csdebug}
  1384. Writeln(std_regname(index), ' added');
  1385. {$endif csdebug}
  1386. end;
  1387. end;
  1388. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1389. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1390. begin
  1391. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1392. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1393. {$ifdef csdebug}
  1394. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1395. {$endif csdebug}
  1396. end;
  1397. InstructionsEquivalent :=
  1398. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, RegInfo, OpAct_Read) and
  1399. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, RegInfo, OpAct_Write)
  1400. end
  1401. else
  1402. {an instruction <> mov, movzx, movsx}
  1403. begin
  1404. {$ifdef csdebug}
  1405. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1406. hp.previous := p2;
  1407. hp.next := p2.next;
  1408. p2.next.previous := hp;
  1409. p2.next := hp;
  1410. {$endif csdebug}
  1411. InstructionsEquivalent :=
  1412. (not(assigned(taicpu(p1).oper[0])) or
  1413. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, RegInfo, OpAct_Unknown)) and
  1414. (not(assigned(taicpu(p1).oper[1])) or
  1415. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, RegInfo, OpAct_Unknown)) and
  1416. (not(assigned(taicpu(p1).oper[2])) or
  1417. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, RegInfo, OpAct_Unknown))
  1418. end
  1419. {the instructions haven't even got the same structure, so they're certainly
  1420. not equivalent}
  1421. else
  1422. begin
  1423. {$ifdef csdebug}
  1424. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1425. hp.previous := p2;
  1426. hp.next := p2.next;
  1427. p2.next.previous := hp;
  1428. p2.next := hp;
  1429. {$endif csdebug}
  1430. InstructionsEquivalent := False;
  1431. end;
  1432. {$ifdef csdebug}
  1433. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1434. hp.previous := p2;
  1435. hp.next := p2.next;
  1436. p2.next.previous := hp;
  1437. p2.next := hp;
  1438. {$endif csdebug}
  1439. end;
  1440. (*
  1441. function InstructionsEqual(p1, p2: tai): Boolean;
  1442. begin {checks whether two taicpu instructions are equal}
  1443. InstructionsEqual :=
  1444. assigned(p1) and assigned(p2) and
  1445. ((tai(p1).typ = ait_instruction) and
  1446. (tai(p1).typ = ait_instruction) and
  1447. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1448. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1449. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1450. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1451. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1452. end;
  1453. *)
  1454. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1455. begin
  1456. if supreg in [RS_EAX..RS_EDI] then
  1457. incState(p^.regs[supreg].rstate,1)
  1458. end;
  1459. procedure readref(p: ptaiprop; const ref: preference);
  1460. begin
  1461. if ref^.base <> NR_NO then
  1462. readreg(p, getsupreg(ref^.base));
  1463. if ref^.index <> NR_NO then
  1464. readreg(p, getsupreg(ref^.index));
  1465. end;
  1466. procedure ReadOp(p: ptaiprop;const o:toper);
  1467. begin
  1468. case o.typ Of
  1469. top_reg: readreg(p, getsupreg(o.reg));
  1470. top_ref: readref(p, o.ref);
  1471. end;
  1472. end;
  1473. function RefInInstruction(const ref: TReference; p: tai;
  1474. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1475. {checks whehter ref is used in p}
  1476. var
  1477. TmpResult: Boolean;
  1478. begin
  1479. TmpResult := False;
  1480. if (p.typ = ait_instruction) then
  1481. begin
  1482. if (taicpu(p).ops >= 1) and
  1483. (taicpu(p).oper[0]^.typ = top_ref) then
  1484. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,size);
  1485. if not(TmpResult) and
  1486. (taicpu(p).ops >= 2) and
  1487. (taicpu(p).oper[1]^.typ = top_ref) then
  1488. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,size);
  1489. if not(TmpResult) and
  1490. (taicpu(p).ops >= 3) and
  1491. (taicpu(p).oper[2]^.typ = top_ref) then
  1492. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,size);
  1493. end;
  1494. RefInInstruction := TmpResult;
  1495. end;
  1496. function RefInSequence(const ref: TReference; Content: TContent;
  1497. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1498. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1499. tai objects) to see whether ref is used somewhere}
  1500. var p: tai;
  1501. Counter: Word;
  1502. TmpResult: Boolean;
  1503. begin
  1504. p := Content.StartMod;
  1505. TmpResult := False;
  1506. Counter := 1;
  1507. while not(TmpResult) and
  1508. (Counter <= Content.NrOfMods) Do
  1509. begin
  1510. if (p.typ = ait_instruction) and
  1511. RefInInstruction(ref, p, RefsEq, size)
  1512. then TmpResult := True;
  1513. inc(Counter);
  1514. GetNextInstruction(p,p)
  1515. end;
  1516. RefInSequence := TmpResult
  1517. end;
  1518. {$ifdef q+}
  1519. {$q-}
  1520. {$define overflowon}
  1521. {$endif q+}
  1522. // checks whether a write to r2 of size "size" contains address r1
  1523. function ArrayRefsOverlapping(const r1, r2: treference; size: tcgsize): Boolean;
  1524. var
  1525. realsize: aword;
  1526. begin
  1527. realsize := tcgsize2size[size];
  1528. ArrayRefsOverlapping := (aword(r1.offset-r2.offset) <= realsize) and
  1529. (r1.segment = r2.segment) and
  1530. (r1.symbol=r2.symbol) and
  1531. (r1.base = r2.base)
  1532. end;
  1533. {$ifdef overflowon}
  1534. {$q+}
  1535. {$undef overflowon}
  1536. {$endif overflowon}
  1537. function isSimpleRef(const ref: treference): boolean;
  1538. { returns true if ref is reference to a local or global variable, to a }
  1539. { parameter or to an object field (this includes arrays). Returns false }
  1540. { otherwise. }
  1541. begin
  1542. isSimpleRef :=
  1543. assigned(ref.symbol) or
  1544. (ref.base = current_procinfo.framepointer);
  1545. end;
  1546. function containsPointerRef(p: tai): boolean;
  1547. { checks if an instruction contains a reference which is a pointer location }
  1548. var
  1549. hp: taicpu;
  1550. count: longint;
  1551. begin
  1552. containsPointerRef := false;
  1553. if p.typ <> ait_instruction then
  1554. exit;
  1555. hp := taicpu(p);
  1556. for count := 0 to hp.ops-1 do
  1557. begin
  1558. case hp.oper[count]^.typ of
  1559. top_ref:
  1560. if not isSimpleRef(hp.oper[count]^.ref^) then
  1561. begin
  1562. containsPointerRef := true;
  1563. exit;
  1564. end;
  1565. top_none:
  1566. exit;
  1567. end;
  1568. end;
  1569. end;
  1570. function containsPointerLoad(c: tcontent): boolean;
  1571. { checks whether the contents of a register contain a pointer reference }
  1572. var
  1573. p: tai;
  1574. count: longint;
  1575. begin
  1576. containsPointerLoad := false;
  1577. p := c.startmod;
  1578. for count := c.nrOfMods downto 1 do
  1579. begin
  1580. if containsPointerRef(p) then
  1581. begin
  1582. containsPointerLoad := true;
  1583. exit;
  1584. end;
  1585. getnextinstruction(p,p);
  1586. end;
  1587. end;
  1588. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1589. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1590. { returns whether the contents c of reg are invalid after regWritten is }
  1591. { is written to ref }
  1592. var
  1593. refsEq: trefCompare;
  1594. begin
  1595. if isSimpleRef(ref) then
  1596. begin
  1597. if (ref.index <> NR_NO) or
  1598. (assigned(ref.symbol) and
  1599. (ref.base <> NR_NO)) then
  1600. { local/global variable or parameter which is an array }
  1601. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1602. else
  1603. { local/global variable or parameter which is not an array }
  1604. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1605. invalsmemwrite :=
  1606. assigned(c.memwrite) and
  1607. ((not(cs_uncertainOpts in aktglobalswitches) and
  1608. containsPointerRef(c.memwrite)) or
  1609. refsEq(c.memwrite.oper[1]^.ref^,ref,size));
  1610. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1611. begin
  1612. writeToMemDestroysContents := false;
  1613. exit;
  1614. end;
  1615. { write something to a parameter, a local or global variable, so }
  1616. { * with uncertain optimizations on: }
  1617. { - destroy the contents of registers whose contents have somewhere a }
  1618. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1619. { are being written to memory) is not destroyed if it's StartMod is }
  1620. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1621. { expression based on ref) }
  1622. { * with uncertain optimizations off: }
  1623. { - also destroy registers that contain any pointer }
  1624. with c do
  1625. writeToMemDestroysContents :=
  1626. (typ in [con_ref,con_noRemoveRef]) and
  1627. ((not(cs_uncertainOpts in aktglobalswitches) and
  1628. containsPointerLoad(c)
  1629. ) or
  1630. (refInSequence(ref,c,refsEq,size) and
  1631. ((supreg <> regWritten) or
  1632. not((nrOfMods = 1) and
  1633. {StarMod is always of the type ait_instruction}
  1634. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1635. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, size)
  1636. )
  1637. )
  1638. )
  1639. );
  1640. end
  1641. else
  1642. { write something to a pointer location, so }
  1643. { * with uncertain optimzations on: }
  1644. { - do not destroy registers which contain a local/global variable or }
  1645. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1646. { * with uncertain optimzations off: }
  1647. { - destroy every register which contains a memory location }
  1648. begin
  1649. invalsmemwrite :=
  1650. assigned(c.memwrite) and
  1651. (not(cs_UncertainOpts in aktglobalswitches) or
  1652. containsPointerRef(c.memwrite));
  1653. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1654. begin
  1655. writeToMemDestroysContents := false;
  1656. exit;
  1657. end;
  1658. with c do
  1659. writeToMemDestroysContents :=
  1660. (typ in [con_ref,con_noRemoveRef]) and
  1661. (not(cs_UncertainOpts in aktglobalswitches) or
  1662. { for movsl }
  1663. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1664. { don't destroy if reg contains a parameter, local or global variable }
  1665. containsPointerLoad(c)
  1666. );
  1667. end;
  1668. end;
  1669. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1670. const c: tcontent): boolean;
  1671. { returns whether the contents c of reg are invalid after destReg is }
  1672. { modified }
  1673. begin
  1674. writeToRegDestroysContents :=
  1675. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1676. sequenceDependsOnReg(c,supreg,destReg);
  1677. end;
  1678. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1679. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1680. { returns whether the contents c of reg are invalid after regWritten is }
  1681. { is written to op }
  1682. begin
  1683. memwritedestroyed := false;
  1684. case op.typ of
  1685. top_reg:
  1686. writeDestroysContents :=
  1687. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1688. top_ref:
  1689. writeDestroysContents :=
  1690. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1691. else
  1692. writeDestroysContents := false;
  1693. end;
  1694. end;
  1695. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1696. { destroys all registers which possibly contain a reference to ref, regWritten }
  1697. { is the register whose contents are being written to memory (if this proc }
  1698. { is called because of a "mov?? %reg, (mem)" instruction) }
  1699. var
  1700. counter: tsuperregister;
  1701. destroymemwrite: boolean;
  1702. begin
  1703. for counter := RS_EAX to RS_EDI Do
  1704. begin
  1705. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1706. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1707. destroyReg(ptaiprop(p.optInfo), counter, false)
  1708. else if destroymemwrite then
  1709. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1710. end;
  1711. end;
  1712. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1713. var Counter: tsuperregister;
  1714. begin {initializes/desrtoys all registers}
  1715. For Counter := RS_EAX To RS_EDI Do
  1716. begin
  1717. if read then
  1718. readreg(p, Counter);
  1719. DestroyReg(p, Counter, written);
  1720. p^.regs[counter].MemWrite := nil;
  1721. end;
  1722. p^.DirFlag := F_Unknown;
  1723. end;
  1724. procedure DestroyOp(taiObj: tai; const o:Toper);
  1725. {$ifdef statedebug}
  1726. var
  1727. hp: tai;
  1728. {$endif statedebug}
  1729. begin
  1730. case o.typ Of
  1731. top_reg:
  1732. begin
  1733. {$ifdef statedebug}
  1734. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1735. hp.next := taiobj.next;
  1736. hp.previous := taiobj;
  1737. taiobj.next := hp;
  1738. if assigned(hp.next) then
  1739. hp.next.previous := hp;
  1740. {$endif statedebug}
  1741. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1742. end;
  1743. top_ref:
  1744. begin
  1745. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1746. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1747. end;
  1748. end;
  1749. end;
  1750. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1751. p: taicpu; supreg: tsuperregister);
  1752. {$ifdef statedebug}
  1753. var
  1754. hp: tai;
  1755. {$endif statedebug}
  1756. begin
  1757. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1758. if (typ in [con_ref,con_noRemoveRef]) then
  1759. begin
  1760. incState(wstate,1);
  1761. { also store how many instructions are part of the sequence in the first }
  1762. { instructions ptaiprop, so it can be easily accessed from within }
  1763. { CheckSequence}
  1764. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1765. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1766. NrOfInstrSinceLastMod[supreg] := 0;
  1767. invalidateDependingRegs(p.optinfo,supreg);
  1768. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1769. {$ifdef StateDebug}
  1770. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1771. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1772. InsertLLItem(AsmL, p, p.next, hp);
  1773. {$endif StateDebug}
  1774. end
  1775. else
  1776. begin
  1777. {$ifdef statedebug}
  1778. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1779. insertllitem(asml,p,p.next,hp);
  1780. {$endif statedebug}
  1781. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1782. {$ifdef StateDebug}
  1783. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1784. InsertLLItem(AsmL, p, p.next, hp);
  1785. {$endif StateDebug}
  1786. end
  1787. end;
  1788. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1789. p: taicpu; const oper: TOper);
  1790. begin
  1791. if oper.typ = top_reg then
  1792. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1793. else
  1794. begin
  1795. ReadOp(ptaiprop(p.optinfo), oper);
  1796. DestroyOp(p, oper);
  1797. end
  1798. end;
  1799. {*************************************************************************************}
  1800. {************************************** TDFAOBJ **************************************}
  1801. {*************************************************************************************}
  1802. constructor tdfaobj.create(_list: taasmoutput);
  1803. begin
  1804. list := _list;
  1805. blockstart := nil;
  1806. blockend := nil;
  1807. nroftaiobjs := 0;
  1808. taipropblock := nil;
  1809. lolab := 0;
  1810. hilab := 0;
  1811. labdif := 0;
  1812. labeltable := nil;
  1813. end;
  1814. procedure tdfaobj.initlabeltable;
  1815. var
  1816. labelfound: boolean;
  1817. p, prev: tai;
  1818. hp1, hp2: tai;
  1819. {$ifdef i386}
  1820. regcounter,
  1821. supreg : tsuperregister;
  1822. {$endif i386}
  1823. usedregs, nodeallocregs: tregset;
  1824. begin
  1825. labelfound := false;
  1826. lolab := maxlongint;
  1827. hilab := 0;
  1828. p := blockstart;
  1829. prev := p;
  1830. while assigned(p) do
  1831. begin
  1832. if (tai(p).typ = ait_label) then
  1833. if not labelcanbeskipped(tai_label(p)) then
  1834. begin
  1835. labelfound := true;
  1836. if (tai_Label(p).l.labelnr < lolab) then
  1837. lolab := tai_label(p).l.labelnr;
  1838. if (tai_Label(p).l.labelnr > hilab) then
  1839. hilab := tai_label(p).l.labelnr;
  1840. end;
  1841. prev := p;
  1842. getnextinstruction(p, p);
  1843. end;
  1844. if (prev.typ = ait_marker) and
  1845. (tai_marker(prev).kind = asmblockstart) then
  1846. blockend := prev
  1847. else blockend := nil;
  1848. if labelfound then
  1849. labdif := hilab+1-lolab
  1850. else labdif := 0;
  1851. usedregs := [];
  1852. if (labdif <> 0) then
  1853. begin
  1854. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1855. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1856. end;
  1857. p := blockstart;
  1858. prev := p;
  1859. while (p <> blockend) do
  1860. begin
  1861. case p.typ of
  1862. ait_label:
  1863. if not labelcanbeskipped(tai_label(p)) then
  1864. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1865. {$ifdef i386}
  1866. ait_regalloc:
  1867. begin
  1868. supreg:=getsupreg(tai_regalloc(p).reg);
  1869. case tai_regalloc(p).ratype of
  1870. ra_alloc :
  1871. begin
  1872. if not(supreg in usedregs) then
  1873. include(usedregs, supreg)
  1874. else
  1875. begin
  1876. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1877. hp1 := tai(p.previous);
  1878. list.remove(p);
  1879. p.free;
  1880. p := hp1;
  1881. end;
  1882. end;
  1883. ra_dealloc :
  1884. begin
  1885. exclude(usedregs, supreg);
  1886. hp1 := p;
  1887. hp2 := nil;
  1888. while not(findregalloc(tai_regalloc(p).reg, tai(hp1.next),ra_alloc)) and
  1889. getnextinstruction(hp1, hp1) and
  1890. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1891. hp2 := hp1;
  1892. if hp2 <> nil then
  1893. begin
  1894. hp1 := tai(p.previous);
  1895. list.remove(p);
  1896. insertllitem(list, hp2, tai(hp2.next), p);
  1897. p := hp1;
  1898. end
  1899. else if findregalloc(tai_regalloc(p).reg, tai(p.next),ra_alloc)
  1900. and getnextinstruction(p,hp1) and
  1901. (hp1.typ = ait_instruction) and
  1902. (taicpu(hp1).opcode = A_CALL) then
  1903. begin
  1904. hp1 := tai(p.previous);
  1905. list.remove(p);
  1906. p.free;
  1907. p := hp1;
  1908. include(usedregs,supreg);
  1909. end;
  1910. end;
  1911. end;
  1912. end;
  1913. {$endif i386}
  1914. end;
  1915. repeat
  1916. prev := p;
  1917. p := tai(p.next);
  1918. until not(assigned(p)) or
  1919. not(p.typ in (skipinstr - [ait_regalloc]));
  1920. end;
  1921. {$ifdef i386}
  1922. { don't add deallocation for function result variable or for regvars}
  1923. getNoDeallocRegs(noDeallocRegs);
  1924. usedRegs := usedRegs - noDeallocRegs;
  1925. for regCounter := RS_EAX to RS_EDI do
  1926. if regCounter in usedRegs then
  1927. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1928. {$endif i386}
  1929. end;
  1930. function tdfaobj.pass_1(_blockstart: tai): tai;
  1931. begin
  1932. blockstart := _blockstart;
  1933. initlabeltable;
  1934. pass_1 := blockend;
  1935. end;
  1936. function tdfaobj.initdfapass2: boolean;
  1937. {reserves memory for the PtaiProps in one big memory block when not using
  1938. TP, returns False if not enough memory is available for the optimizer in all
  1939. cases}
  1940. var
  1941. p: tai;
  1942. count: Longint;
  1943. { TmpStr: String; }
  1944. begin
  1945. p := blockstart;
  1946. skiphead(p);
  1947. nroftaiobjs := 0;
  1948. while (p <> blockend) do
  1949. begin
  1950. {$ifDef JumpAnal}
  1951. case p.typ of
  1952. ait_label:
  1953. begin
  1954. if not labelcanbeskipped(tai_label(p)) then
  1955. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1956. end;
  1957. ait_instruction:
  1958. begin
  1959. if taicpu(p).is_jmp then
  1960. begin
  1961. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1962. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1963. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1964. end;
  1965. end;
  1966. { ait_instruction:
  1967. begin
  1968. if (taicpu(p).opcode = A_PUSH) and
  1969. (taicpu(p).oper[0]^.typ = top_symbol) and
  1970. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1971. begin
  1972. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1973. if}
  1974. end;
  1975. {$endif JumpAnal}
  1976. inc(NrOftaiObjs);
  1977. getnextinstruction(p,p);
  1978. end;
  1979. if nroftaiobjs <> 0 then
  1980. begin
  1981. initdfapass2 := True;
  1982. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  1983. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  1984. p := blockstart;
  1985. skiphead(p);
  1986. for count := 1 To nroftaiobjs do
  1987. begin
  1988. ptaiprop(p.optinfo) := @taipropblock^[count];
  1989. getnextinstruction(p, p);
  1990. end;
  1991. end
  1992. else
  1993. initdfapass2 := false;
  1994. end;
  1995. procedure tdfaobj.dodfapass2;
  1996. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  1997. contents for the instructions starting with p. Returns the last tai which has
  1998. been processed}
  1999. var
  2000. curprop, LastFlagsChangeProp: ptaiprop;
  2001. Cnt, InstrCnt : Longint;
  2002. InstrProp: TInsProp;
  2003. UsedRegs: TRegSet;
  2004. prev,p : tai;
  2005. tmpref: TReference;
  2006. tmpsupreg: tsuperregister;
  2007. {$ifdef statedebug}
  2008. hp : tai;
  2009. {$endif}
  2010. {$ifdef AnalyzeLoops}
  2011. hp : tai;
  2012. TmpState: Byte;
  2013. {$endif AnalyzeLoops}
  2014. begin
  2015. p := BlockStart;
  2016. LastFlagsChangeProp := nil;
  2017. prev := nil;
  2018. UsedRegs := [];
  2019. UpdateUsedregs(UsedRegs, p);
  2020. SkipHead(p);
  2021. BlockStart := p;
  2022. InstrCnt := 1;
  2023. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2024. while (p <> Blockend) Do
  2025. begin
  2026. curprop := @taiPropBlock^[InstrCnt];
  2027. if assigned(prev)
  2028. then
  2029. begin
  2030. {$ifdef JumpAnal}
  2031. if (p.Typ <> ait_label) then
  2032. {$endif JumpAnal}
  2033. begin
  2034. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2035. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2036. curprop^.FlagsUsed := false;
  2037. end
  2038. end
  2039. else
  2040. begin
  2041. fillchar(curprop^, SizeOf(curprop^), 0);
  2042. { For tmpreg := RS_EAX to RS_EDI Do
  2043. curprop^.regs[tmpreg].WState := 1;}
  2044. end;
  2045. curprop^.UsedRegs := UsedRegs;
  2046. curprop^.CanBeRemoved := False;
  2047. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2048. For tmpsupreg := RS_EAX To RS_EDI Do
  2049. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2050. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2051. else
  2052. begin
  2053. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2054. curprop^.regs[tmpsupreg].typ := con_unknown;
  2055. end;
  2056. case p.typ Of
  2057. ait_marker:;
  2058. ait_label:
  2059. {$ifndef JumpAnal}
  2060. if not labelCanBeSkipped(tai_label(p)) then
  2061. DestroyAllRegs(curprop,false,false);
  2062. {$else JumpAnal}
  2063. begin
  2064. if not labelCanBeSkipped(tai_label(p)) then
  2065. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2066. {$ifDef AnalyzeLoops}
  2067. if (RefsFound = tai_Label(p).l^.RefCount)
  2068. {$else AnalyzeLoops}
  2069. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2070. {$endif AnalyzeLoops}
  2071. then
  2072. {all jumps to this label have been found}
  2073. {$ifDef AnalyzeLoops}
  2074. if (JmpsProcessed > 0)
  2075. then
  2076. {$endif AnalyzeLoops}
  2077. {we've processed at least one jump to this label}
  2078. begin
  2079. if (GetLastInstruction(p, hp) and
  2080. not(((hp.typ = ait_instruction)) and
  2081. (taicpu_labeled(hp).is_jmp))
  2082. then
  2083. {previous instruction not a JMP -> the contents of the registers after the
  2084. previous intruction has been executed have to be taken into account as well}
  2085. For tmpsupreg := RS_EAX to RS_EDI Do
  2086. begin
  2087. if (curprop^.regs[tmpsupreg].WState <>
  2088. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2089. then DestroyReg(curprop, tmpsupreg, true)
  2090. end
  2091. end
  2092. {$ifDef AnalyzeLoops}
  2093. else
  2094. {a label from a backward jump (e.g. a loop), no jump to this label has
  2095. already been processed}
  2096. if GetLastInstruction(p, hp) and
  2097. not(hp.typ = ait_instruction) and
  2098. (taicpu_labeled(hp).opcode = A_JMP))
  2099. then
  2100. {previous instruction not a jmp, so keep all the registers' contents from the
  2101. previous instruction}
  2102. begin
  2103. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2104. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2105. end
  2106. else
  2107. {previous instruction a jmp and no jump to this label processed yet}
  2108. begin
  2109. hp := p;
  2110. Cnt := InstrCnt;
  2111. {continue until we find a jump to the label or a label which has already
  2112. been processed}
  2113. while GetNextInstruction(hp, hp) and
  2114. not((hp.typ = ait_instruction) and
  2115. (taicpu(hp).is_jmp) and
  2116. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2117. not((hp.typ = ait_label) and
  2118. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2119. = tai_Label(hp).l^.RefCount) and
  2120. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2121. inc(Cnt);
  2122. if (hp.typ = ait_label)
  2123. then
  2124. {there's a processed label after the current one}
  2125. begin
  2126. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2127. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2128. end
  2129. else
  2130. {there's no label anymore after the current one, or they haven't been
  2131. processed yet}
  2132. begin
  2133. GetLastInstruction(p, hp);
  2134. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2135. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2136. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2137. end
  2138. end
  2139. {$endif AnalyzeLoops}
  2140. else
  2141. {not all references to this label have been found, so destroy all registers}
  2142. begin
  2143. GetLastInstruction(p, hp);
  2144. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2145. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2146. DestroyAllRegs(curprop,true,true)
  2147. end;
  2148. end;
  2149. {$endif JumpAnal}
  2150. {$ifdef GDB}
  2151. ait_stabs, ait_stabn, ait_stab_function_name:;
  2152. {$endif GDB}
  2153. ait_align: ; { may destroy flags !!! }
  2154. ait_instruction:
  2155. begin
  2156. if taicpu(p).is_jmp or
  2157. (taicpu(p).opcode = A_JMP) then
  2158. begin
  2159. {$ifNDef JumpAnal}
  2160. for tmpsupreg := RS_EAX to RS_EDI do
  2161. with curprop^.regs[tmpsupreg] do
  2162. case typ of
  2163. con_ref: typ := con_noRemoveRef;
  2164. con_const: typ := con_noRemoveConst;
  2165. con_invalid: typ := con_unknown;
  2166. end;
  2167. {$else JumpAnal}
  2168. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2169. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2170. begin
  2171. if (InstrCnt < InstrNr)
  2172. then
  2173. {forward jump}
  2174. if (JmpsProcessed = 0) then
  2175. {no jump to this label has been processed yet}
  2176. begin
  2177. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2178. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2179. inc(JmpsProcessed);
  2180. end
  2181. else
  2182. begin
  2183. For tmpreg := RS_EAX to RS_EDI Do
  2184. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2185. curprop^.regs[tmpreg].WState) then
  2186. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2187. inc(JmpsProcessed);
  2188. end
  2189. {$ifdef AnalyzeLoops}
  2190. else
  2191. { backward jump, a loop for example}
  2192. { if (JmpsProcessed > 0) or
  2193. not(GetLastInstruction(taiObj, hp) and
  2194. (hp.typ = ait_labeled_instruction) and
  2195. (taicpu_labeled(hp).opcode = A_JMP))
  2196. then}
  2197. {instruction prior to label is not a jmp, or at least one jump to the label
  2198. has yet been processed}
  2199. begin
  2200. inc(JmpsProcessed);
  2201. For tmpreg := RS_EAX to RS_EDI Do
  2202. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2203. curprop^.regs[tmpreg].WState)
  2204. then
  2205. begin
  2206. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2207. Cnt := InstrNr;
  2208. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2209. begin
  2210. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2211. inc(Cnt);
  2212. end;
  2213. while (Cnt <= InstrCnt) Do
  2214. begin
  2215. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2216. inc(Cnt)
  2217. end
  2218. end;
  2219. end
  2220. { else }
  2221. {instruction prior to label is a jmp and no jumps to the label have yet been
  2222. processed}
  2223. { begin
  2224. inc(JmpsProcessed);
  2225. For tmpreg := RS_EAX to RS_EDI Do
  2226. begin
  2227. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2228. Cnt := InstrNr;
  2229. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2230. begin
  2231. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2232. inc(Cnt);
  2233. end;
  2234. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2235. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2236. begin
  2237. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2238. inc(Cnt);
  2239. end;
  2240. while (Cnt <= InstrCnt) Do
  2241. begin
  2242. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2243. inc(Cnt)
  2244. end
  2245. end
  2246. end}
  2247. {$endif AnalyzeLoops}
  2248. end;
  2249. {$endif JumpAnal}
  2250. end
  2251. else
  2252. begin
  2253. InstrProp := InsProp[taicpu(p).opcode];
  2254. case taicpu(p).opcode Of
  2255. A_MOV, A_MOVZX, A_MOVSX:
  2256. begin
  2257. case taicpu(p).oper[0]^.typ Of
  2258. top_ref, top_reg:
  2259. case taicpu(p).oper[1]^.typ Of
  2260. top_reg:
  2261. begin
  2262. {$ifdef statedebug}
  2263. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2264. insertllitem(list,p,p.next,hp);
  2265. {$endif statedebug}
  2266. readOp(curprop, taicpu(p).oper[0]^);
  2267. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2268. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2269. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2270. begin
  2271. with curprop^.regs[tmpsupreg] Do
  2272. begin
  2273. incState(wstate,1);
  2274. { also store how many instructions are part of the sequence in the first }
  2275. { instruction's ptaiprop, so it can be easily accessed from within }
  2276. { CheckSequence }
  2277. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2278. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2279. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2280. { Destroy the contents of the registers }
  2281. { that depended on the previous value of }
  2282. { this register }
  2283. invalidateDependingRegs(curprop,tmpsupreg);
  2284. curprop^.regs[tmpsupreg].memwrite := nil;
  2285. end;
  2286. end
  2287. else
  2288. begin
  2289. {$ifdef statedebug}
  2290. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2291. insertllitem(list,p,p.next,hp);
  2292. {$endif statedebug}
  2293. destroyReg(curprop, tmpsupreg, true);
  2294. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2295. with curprop^.regs[tmpsupreg] Do
  2296. begin
  2297. typ := con_ref;
  2298. startmod := p;
  2299. nrOfMods := 1;
  2300. end
  2301. end;
  2302. {$ifdef StateDebug}
  2303. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2304. insertllitem(list,p,p.next,hp);
  2305. {$endif StateDebug}
  2306. end;
  2307. top_ref:
  2308. begin
  2309. readref(curprop, taicpu(p).oper[1]^.ref);
  2310. if taicpu(p).oper[0]^.typ = top_reg then
  2311. begin
  2312. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2313. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2314. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2315. taicpu(p);
  2316. end
  2317. else
  2318. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2319. end;
  2320. end;
  2321. top_Const:
  2322. begin
  2323. case taicpu(p).oper[1]^.typ Of
  2324. top_reg:
  2325. begin
  2326. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2327. {$ifdef statedebug}
  2328. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2329. insertllitem(list,p,p.next,hp);
  2330. {$endif statedebug}
  2331. With curprop^.regs[tmpsupreg] Do
  2332. begin
  2333. DestroyReg(curprop, tmpsupreg, true);
  2334. typ := Con_Const;
  2335. StartMod := p;
  2336. end
  2337. end;
  2338. top_ref:
  2339. begin
  2340. readref(curprop, taicpu(p).oper[1]^.ref);
  2341. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2342. end;
  2343. end;
  2344. end;
  2345. end;
  2346. end;
  2347. A_DIV, A_IDIV, A_MUL:
  2348. begin
  2349. ReadOp(curprop, taicpu(p).oper[0]^);
  2350. readreg(curprop,RS_EAX);
  2351. if (taicpu(p).OpCode = A_IDIV) or
  2352. (taicpu(p).OpCode = A_DIV) then
  2353. begin
  2354. readreg(curprop,RS_EDX);
  2355. end;
  2356. {$ifdef statedebug}
  2357. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2358. insertllitem(list,p,p.next,hp);
  2359. {$endif statedebug}
  2360. { DestroyReg(curprop, RS_EAX, true);}
  2361. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2362. taicpu(p), RS_EAX);
  2363. DestroyReg(curprop, RS_EDX, true);
  2364. LastFlagsChangeProp := curprop;
  2365. end;
  2366. A_IMUL:
  2367. begin
  2368. ReadOp(curprop,taicpu(p).oper[0]^);
  2369. if (taicpu(p).ops >= 2) then
  2370. ReadOp(curprop,taicpu(p).oper[1]^);
  2371. if (taicpu(p).ops <= 2) then
  2372. if (taicpu(p).oper[1]^.typ = top_none) then
  2373. begin
  2374. readreg(curprop,RS_EAX);
  2375. {$ifdef statedebug}
  2376. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2377. insertllitem(list,p,p.next,hp);
  2378. {$endif statedebug}
  2379. { DestroyReg(curprop, RS_EAX, true); }
  2380. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2381. taicpu(p), RS_EAX);
  2382. DestroyReg(curprop,RS_EDX, true)
  2383. end
  2384. else
  2385. AddInstr2OpContents(
  2386. {$ifdef statedebug}list,{$endif}
  2387. taicpu(p), taicpu(p).oper[1]^)
  2388. else
  2389. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2390. taicpu(p), taicpu(p).oper[2]^);
  2391. LastFlagsChangeProp := curprop;
  2392. end;
  2393. A_LEA:
  2394. begin
  2395. readop(curprop,taicpu(p).oper[0]^);
  2396. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2397. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2398. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2399. else
  2400. begin
  2401. {$ifdef statedebug}
  2402. hp := tai_comment.Create(strpnew('destroying & initing'+
  2403. std_regname(taicpu(p).oper[1]^.reg)));
  2404. insertllitem(list,p,p.next,hp);
  2405. {$endif statedebug}
  2406. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2407. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2408. begin
  2409. typ := con_ref;
  2410. startmod := p;
  2411. nrOfMods := 1;
  2412. end
  2413. end;
  2414. end;
  2415. else
  2416. begin
  2417. Cnt := 1;
  2418. while (Cnt <= maxinschanges) and
  2419. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2420. begin
  2421. case InstrProp.Ch[Cnt] Of
  2422. Ch_REAX..Ch_REDI:
  2423. begin
  2424. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2425. readreg(curprop,tmpsupreg);
  2426. end;
  2427. Ch_WEAX..Ch_RWEDI:
  2428. begin
  2429. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2430. begin
  2431. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2432. readreg(curprop,tmpsupreg);
  2433. end;
  2434. {$ifdef statedebug}
  2435. hp := tai_comment.Create(strpnew('destroying '+
  2436. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2437. insertllitem(list,p,p.next,hp);
  2438. {$endif statedebug}
  2439. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2440. DestroyReg(curprop,tmpsupreg, true);
  2441. end;
  2442. Ch_MEAX..Ch_MEDI:
  2443. begin
  2444. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2445. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2446. taicpu(p),tmpsupreg);
  2447. end;
  2448. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2449. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2450. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2451. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2452. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2453. Ch_Wop1..Ch_RWop1:
  2454. begin
  2455. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2456. ReadOp(curprop, taicpu(p).oper[0]^);
  2457. DestroyOp(p, taicpu(p).oper[0]^);
  2458. end;
  2459. Ch_Mop1:
  2460. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2461. taicpu(p), taicpu(p).oper[0]^);
  2462. Ch_Wop2..Ch_RWop2:
  2463. begin
  2464. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2465. ReadOp(curprop, taicpu(p).oper[1]^);
  2466. DestroyOp(p, taicpu(p).oper[1]^);
  2467. end;
  2468. Ch_Mop2:
  2469. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2470. taicpu(p), taicpu(p).oper[1]^);
  2471. Ch_WOp3..Ch_RWOp3:
  2472. begin
  2473. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2474. ReadOp(curprop, taicpu(p).oper[2]^);
  2475. DestroyOp(p, taicpu(p).oper[2]^);
  2476. end;
  2477. Ch_Mop3:
  2478. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2479. taicpu(p), taicpu(p).oper[2]^);
  2480. Ch_WMemEDI:
  2481. begin
  2482. readreg(curprop, RS_EDI);
  2483. fillchar(tmpref, SizeOf(tmpref), 0);
  2484. tmpref.base := NR_EDI;
  2485. tmpref.index := NR_EDI;
  2486. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2487. end;
  2488. Ch_RFlags:
  2489. if assigned(LastFlagsChangeProp) then
  2490. LastFlagsChangeProp^.FlagsUsed := true;
  2491. Ch_WFlags:
  2492. LastFlagsChangeProp := curprop;
  2493. Ch_RWFlags:
  2494. begin
  2495. if assigned(LastFlagsChangeProp) then
  2496. LastFlagsChangeProp^.FlagsUsed := true;
  2497. LastFlagsChangeProp := curprop;
  2498. end;
  2499. Ch_FPU:;
  2500. else
  2501. begin
  2502. {$ifdef statedebug}
  2503. hp := tai_comment.Create(strpnew(
  2504. 'destroying all regs for prev instruction'));
  2505. insertllitem(list,p, p.next,hp);
  2506. {$endif statedebug}
  2507. DestroyAllRegs(curprop,true,true);
  2508. LastFlagsChangeProp := curprop;
  2509. end;
  2510. end;
  2511. inc(Cnt);
  2512. end
  2513. end;
  2514. end;
  2515. end;
  2516. end
  2517. else
  2518. begin
  2519. {$ifdef statedebug}
  2520. hp := tai_comment.Create(strpnew(
  2521. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2522. insertllitem(list,p, p.next,hp);
  2523. {$endif statedebug}
  2524. DestroyAllRegs(curprop,true,true);
  2525. end;
  2526. end;
  2527. inc(InstrCnt);
  2528. prev := p;
  2529. GetNextInstruction(p, p);
  2530. end;
  2531. end;
  2532. function tdfaobj.pass_2: boolean;
  2533. begin
  2534. if initdfapass2 then
  2535. begin
  2536. dodfapass2;
  2537. pass_2 := true
  2538. end
  2539. else
  2540. pass_2 := false;
  2541. end;
  2542. {$ifopt r+}
  2543. {$define rangewason}
  2544. {$r-}
  2545. {$endif}
  2546. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2547. begin
  2548. if (sym.labelnr >= lolab) and
  2549. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2550. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2551. else
  2552. getlabelwithsym := nil;
  2553. end;
  2554. {$ifdef rangewason}
  2555. {$r+}
  2556. {$undef rangewason}
  2557. {$endif}
  2558. procedure tdfaobj.clear;
  2559. begin
  2560. if labdif <> 0 then
  2561. begin
  2562. freemem(labeltable);
  2563. labeltable := nil;
  2564. end;
  2565. if assigned(taipropblock) then
  2566. begin
  2567. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2568. taipropblock := nil;
  2569. end;
  2570. end;
  2571. end.
  2572. {
  2573. $Log$
  2574. Revision 1.77 2004-12-18 15:16:10 jonas
  2575. * fixed tracking of usage of flags register
  2576. * fixed destroying of "memwrite"'s
  2577. * fixed checking of entire sequences in all cases (previously this was
  2578. only guaranteed if the new sequence was longer than the old one, and
  2579. not if vice versa)
  2580. * fixed wrong removal of sequences if a register load was already
  2581. completely removed in the previous sequence (because in that case,
  2582. that register has to be removed and renamed in the new sequence as
  2583. well before removing the new sequence)
  2584. Revision 1.76 2004/12/18 14:07:35 jonas
  2585. * fixed compilation with -dcsdebug -dallocregdebug
  2586. Revision 1.75 2004/12/12 10:50:34 florian
  2587. * fixed operand size calculation for sse operands
  2588. + all nasm assembler targets to help page output added
  2589. Revision 1.74 2004/10/31 21:45:03 peter
  2590. * generic tlocation
  2591. * move tlocation to cgutils
  2592. Revision 1.73 2004/10/10 15:01:19 jonas
  2593. * several fixes to allocregbetween()
  2594. Revision 1.72 2004/10/06 19:24:38 jonas
  2595. * take into account the size of a write to determine whether a write to
  2596. one reference influences the contents of another reference
  2597. Revision 1.71 2004/10/05 20:41:01 peter
  2598. * more spilling rewrites
  2599. Revision 1.70 2004/10/04 20:46:22 peter
  2600. * spilling code rewritten for x86. It now used the generic
  2601. spilling routines. Special x86 optimization still needs
  2602. to be added.
  2603. * Spilling fixed when both operands needed to be spilled
  2604. * Cleanup of spilling routine, do_spill_readwritten removed
  2605. Revision 1.69 2004/09/26 17:45:30 peter
  2606. * simple regvar support, not yet finished
  2607. Revision 1.68 2004/06/20 08:55:31 florian
  2608. * logs truncated
  2609. Revision 1.67 2004/05/22 23:34:28 peter
  2610. tai_regalloc.allocation changed to ratype to notify rgobj of register size changes
  2611. Revision 1.66 2004/02/27 19:55:23 jonas
  2612. * fixed optimizer for new treference fields
  2613. Revision 1.65 2004/02/27 10:21:05 florian
  2614. * top_symbol killed
  2615. + refaddr to treference added
  2616. + refsymbol to treference added
  2617. * top_local stuff moved to an extra record to save memory
  2618. + aint introduced
  2619. * tppufile.get/putint64/aint implemented
  2620. }