ncgmem.pas 48 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : asizeint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: ASizeInt); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. function valid_index_size(size: tcgsize): boolean;virtual;
  65. public
  66. procedure pass_generate_code;override;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. cutils,cclasses,verbose,globals,constexp,fmodule,
  72. symconst,symbase,symdef,symsym,symtable,defutil,paramgr,
  73. aasmbase,aasmdata,
  74. procinfo,pass_2,parabase,
  75. ncon,nadd,nutils,
  76. cgobj,hlcgobj,
  77. objcgutl;
  78. {*****************************************************************************
  79. TCGLOADVMTADDRNODE
  80. *****************************************************************************}
  81. procedure tcgloadvmtaddrnode.pass_generate_code;
  82. var
  83. href : treference;
  84. pool : THashSet;
  85. entry : PHashSetItem;
  86. vmtname : tsymstr;
  87. otherunit,
  88. indirect : boolean;
  89. begin
  90. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  91. if (left.nodetype=typen) then
  92. begin
  93. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  94. if not is_objcclass(left.resultdef) then
  95. begin
  96. { we are using a direct reference if any of the following is true:
  97. - the target does not support packages
  98. - the target does not use indirect references
  99. - the class is located inside the same unit }
  100. otherunit:=findunitsymtable(left.resultdef.owner).moduleid<>current_module.moduleid;
  101. indirect:=(tf_supports_packages in target_info.flags) and
  102. (target_info.system in systems_indirect_var_imports) and
  103. otherunit;
  104. vmtname:=tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname;
  105. reference_reset_symbol(href,
  106. current_asmdata.RefAsmSymbol(vmtname,AT_DATA,indirect),0,
  107. resultdef.alignment,[]);
  108. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,resultdef,resultdef,href,location.register);
  109. if otherunit then
  110. current_module.add_extern_asmsym(vmtname,AB_EXTERNAL,AT_DATA);
  111. end
  112. else
  113. begin
  114. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  115. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  116. if (target_info.system in systems_objc_nfabi) then
  117. begin
  118. { find/add necessary classref/classname pool entries }
  119. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  120. end
  121. else
  122. begin
  123. { find/add necessary classref/classname pool entries }
  124. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  125. end;
  126. reference_reset_symbol(href,tasmlabel(entry^.Data),0,objc_idtype.alignment,[]);
  127. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,objc_idtype,objc_idtype,href,location.register);
  128. end;
  129. end
  130. else
  131. { should be handled in pass 1 }
  132. internalerror(2015052801);
  133. end;
  134. {*****************************************************************************
  135. TCGLOADPARENTFPNODE
  136. *****************************************************************************}
  137. procedure tcgloadparentfpnode.pass_generate_code;
  138. var
  139. currpi : tprocinfo;
  140. hsym : tparavarsym;
  141. href : treference;
  142. begin
  143. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  144. begin
  145. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  146. location.register:=current_procinfo.framepointer;
  147. end
  148. else
  149. begin
  150. currpi:=current_procinfo;
  151. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  152. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  153. { load framepointer of current proc }
  154. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  155. if not assigned(hsym) then
  156. internalerror(200309281);
  157. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  158. { walk parents }
  159. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  160. begin
  161. currpi:=currpi.parent;
  162. if not assigned(currpi) then
  163. internalerror(200311201);
  164. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  165. if not assigned(hsym) then
  166. internalerror(200309282);
  167. if hsym.localloc.loc<>LOC_REFERENCE then
  168. internalerror(200309283);
  169. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,parentfpvoidpointertype.alignment,[]);
  170. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  171. end;
  172. end;
  173. end;
  174. {*****************************************************************************
  175. TCGADDRNODE
  176. *****************************************************************************}
  177. procedure tcgaddrnode.pass_generate_code;
  178. begin
  179. secondpass(left);
  180. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  181. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  182. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  183. { on x86_64-win64, array of chars can be returned in registers, however,
  184. when passing these arrays to other functions, the compiler wants to take
  185. the address of the array so when the addrnode has been created internally,
  186. we have to force the data into memory, see also tw14388.pp
  187. }
  188. if nf_internal in flags then
  189. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  190. else
  191. internalerror(2006111510);
  192. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  193. end;
  194. {*****************************************************************************
  195. TCGDEREFNODE
  196. *****************************************************************************}
  197. procedure tcgderefnode.pass_generate_code;
  198. var
  199. paraloc1 : tcgpara;
  200. pd : tprocdef;
  201. sym : tsym;
  202. st : tsymtable;
  203. hp : pnode;
  204. extraoffset : tcgint;
  205. begin
  206. sym:=nil;
  207. { assume natural alignment, except for packed records }
  208. if not(resultdef.typ in [recorddef,objectdef]) or
  209. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  210. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment,[])
  211. else
  212. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1,[]);
  213. { can we fold an add/sub node into the offset of the deref node? }
  214. extraoffset:=0;
  215. hp:=actualtargetnode(@left);
  216. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  217. begin
  218. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  219. replacenode(hp^,taddnode(hp^).left);
  220. end
  221. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  222. begin
  223. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  224. replacenode(hp^,taddnode(hp^).left);
  225. end
  226. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  227. begin
  228. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  229. replacenode(hp^,taddnode(hp^).right);
  230. end;
  231. secondpass(left);
  232. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  233. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  234. case left.location.loc of
  235. LOC_CREGISTER,
  236. LOC_REGISTER:
  237. begin
  238. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  239. {$ifdef cpu_uses_separate_address_registers}
  240. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  241. begin
  242. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  243. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  244. location.reference.base);
  245. end
  246. else
  247. {$endif}
  248. location.reference.base := left.location.register;
  249. end;
  250. LOC_CREFERENCE,
  251. LOC_REFERENCE:
  252. begin
  253. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  254. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  255. end;
  256. LOC_CONSTANT:
  257. begin
  258. location.reference.offset:=left.location.value;
  259. end;
  260. else
  261. internalerror(200507031);
  262. end;
  263. location.reference.offset:=location.reference.offset+extraoffset;
  264. if (cs_use_heaptrc in current_settings.globalswitches) and
  265. (cs_checkpointer in current_settings.localswitches) and
  266. not(cs_compilesystem in current_settings.moduleswitches) and
  267. tpointerdef(left.resultdef).compatible_with_pointerdef_size(tpointerdef(voidpointertype)) and
  268. not(nf_no_checkpointer in flags) and
  269. { can be NR_NO in case of LOC_CONSTANT }
  270. (location.reference.base<>NR_NO) then
  271. begin
  272. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  273. (sym.typ<>procsym) then
  274. internalerror(2012010601);
  275. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  276. paraloc1.init;
  277. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  278. hlcg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference,paraloc1);
  279. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  280. paraloc1.done;
  281. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  282. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  283. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  284. include(current_settings.moduleswitches,cs_checkpointer_called);
  285. end;
  286. end;
  287. {*****************************************************************************
  288. TCGSUBSCRIPTNODE
  289. *****************************************************************************}
  290. function tcgsubscriptnode.handle_platform_subscript: boolean;
  291. begin
  292. result:=false;
  293. end;
  294. procedure tcgsubscriptnode.pass_generate_code;
  295. var
  296. asmsym: tasmsymbol;
  297. paraloc1 : tcgpara;
  298. tmpref: treference;
  299. sref: tsubsetreference;
  300. awordoffset,
  301. offsetcorrection : aint;
  302. pd : tprocdef;
  303. sym : tsym;
  304. st : tsymtable;
  305. begin
  306. sym:=nil;
  307. secondpass(left);
  308. if codegenerror then
  309. exit;
  310. paraloc1.init;
  311. { several object types must be dereferenced implicitly }
  312. if is_implicit_pointer_object_type(left.resultdef) then
  313. begin
  314. if (not is_managed_type(left.resultdef)) or
  315. (target_info.system in systems_garbage_collected_managed_types) then
  316. begin
  317. { the contents of a class are aligned to a sizeof(pointer) }
  318. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size,[]);
  319. case left.location.loc of
  320. LOC_CREGISTER,
  321. LOC_REGISTER:
  322. begin
  323. {$ifdef cpu_uses_separate_address_registers}
  324. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  325. begin
  326. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  327. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  328. left.location.register,location.reference.base);
  329. end
  330. else
  331. {$endif}
  332. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,location.reference.volatility);
  333. end;
  334. LOC_CREFERENCE,
  335. LOC_REFERENCE,
  336. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  337. LOC_SUBSETREG,
  338. LOC_CSUBSETREG,
  339. LOC_SUBSETREF,
  340. LOC_CSUBSETREF:
  341. begin
  342. hlcg.reference_reset_base(location.reference,left.resultdef,
  343. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,location.reference.volatility);
  344. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  345. end;
  346. LOC_CONSTANT:
  347. begin
  348. { can happen with @classtype(pointerconst).field }
  349. location.reference.offset:=left.location.value;
  350. end;
  351. else
  352. internalerror(2009092401);
  353. end;
  354. { implicit deferencing }
  355. if (cs_use_heaptrc in current_settings.globalswitches) and
  356. (cs_checkpointer in current_settings.localswitches) and
  357. not(cs_compilesystem in current_settings.moduleswitches) then
  358. begin
  359. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  360. (sym.typ<>procsym) then
  361. internalerror(2012010602);
  362. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  363. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  364. hlcg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference,paraloc1);
  365. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  366. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  367. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',[@paraloc1],nil,false);
  368. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  369. system.include(current_settings.moduleswitches,cs_checkpointer_called);
  370. end;
  371. end
  372. else
  373. { reference-counted implicit pointer object types don't have
  374. fields -> cannot be subscripted (calls are handled via call
  375. nodes) }
  376. internalerror(2011011901);
  377. end
  378. else
  379. begin
  380. location_copy(location,left.location);
  381. { some abi's require that functions return (some) records in }
  382. { registers }
  383. case location.loc of
  384. LOC_REFERENCE,
  385. LOC_CREFERENCE:
  386. ;
  387. LOC_CONSTANT,
  388. LOC_REGISTER,
  389. LOC_CREGISTER,
  390. { if a floating point value is casted into a record, it
  391. can happen that we get here an fpu or mm register }
  392. LOC_MMREGISTER,
  393. LOC_FPUREGISTER,
  394. LOC_CMMREGISTER,
  395. LOC_CFPUREGISTER:
  396. begin
  397. { in case the result is not something that can be put
  398. into an integer register (e.g.
  399. function_returning_record().non_regable_field, or
  400. a function returning a value > sizeof(intreg))
  401. -> force to memory
  402. }
  403. if not tstoreddef(left.resultdef).is_intregable or
  404. not tstoreddef(resultdef).is_intregable or
  405. { if the field spans multiple registers, we must force the record into
  406. memory as well }
  407. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  408. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  409. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  410. { actually, we should be able to "subscript" a constant, but this would require some code
  411. which enables dumping and reading constants from a temporary memory buffer. This
  412. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  413. }
  414. LOC_CONSTANT]) then
  415. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  416. else
  417. begin
  418. if (left.location.loc = LOC_REGISTER) then
  419. location.loc := LOC_SUBSETREG
  420. else
  421. location.loc := LOC_CSUBSETREG;
  422. location.size:=def_cgsize(resultdef);
  423. offsetcorrection:=0;
  424. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  425. begin
  426. if not is_packed_record_or_object(left.resultdef) then
  427. awordoffset:=sizeof(aword)
  428. else
  429. awordoffset:=sizeof(aword)*8;
  430. if (vs.fieldoffset>=awordoffset) xor (target_info.endian=endian_big) then
  431. location.sreg.subsetreg := left.location.registerhi
  432. else
  433. location.sreg.subsetreg := left.location.register;
  434. if vs.fieldoffset>=awordoffset then
  435. offsetcorrection := sizeof(aword)*8;
  436. location.sreg.subsetregsize := OS_INT;
  437. end
  438. else
  439. begin
  440. location.sreg.subsetreg := left.location.register;
  441. location.sreg.subsetregsize := left.location.size;
  442. end;
  443. if not is_packed_record_or_object(left.resultdef) then
  444. begin
  445. if (target_info.endian = ENDIAN_BIG) then
  446. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  447. else
  448. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  449. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  450. end
  451. else
  452. begin
  453. location.sreg.bitlen := resultdef.packedbitsize;
  454. if (target_info.endian = ENDIAN_BIG) then
  455. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  456. else
  457. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  458. end;
  459. end;
  460. end;
  461. LOC_SUBSETREG,
  462. LOC_CSUBSETREG:
  463. begin
  464. location.size:=def_cgsize(resultdef);
  465. if not is_packed_record_or_object(left.resultdef) then
  466. begin
  467. if (target_info.endian = ENDIAN_BIG) then
  468. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  469. else
  470. inc(location.sreg.startbit, vs.fieldoffset * 8);
  471. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  472. end
  473. else
  474. begin
  475. location.sreg.bitlen := resultdef.packedbitsize;
  476. if (target_info.endian = ENDIAN_BIG) then
  477. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  478. else
  479. inc(location.sreg.startbit, vs.fieldoffset);
  480. end;
  481. end;
  482. else
  483. internalerror(2006031901);
  484. end;
  485. end;
  486. if is_objc_class_or_protocol(left.resultdef) and
  487. (target_info.system in systems_objc_nfabi) then
  488. begin
  489. if (location.loc<>LOC_REFERENCE) or
  490. (location.reference.index<>NR_NO) then
  491. internalerror(2009092402);
  492. { the actual field offset is stored in memory (to solve the
  493. "fragile base class" problem: this way the layout of base
  494. classes can be changed without breaking programs compiled against
  495. earlier versions)
  496. }
  497. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname,AT_DATA);
  498. reference_reset_symbol(tmpref,asmsym,0,voidpointertype.alignment,[]);
  499. hlcg.g_ptrtypecast_ref(current_asmdata.CurrAsmList,left.resultdef,cpointerdef.getreusable(resultdef),location.reference);
  500. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  501. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  502. { always packrecords C -> natural alignment }
  503. location.reference.alignment:=vs.vardef.alignment;
  504. end
  505. else if handle_platform_subscript then
  506. begin
  507. { done }
  508. end
  509. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  510. begin
  511. if not is_packed_record_or_object(left.resultdef) then
  512. begin
  513. inc(location.reference.offset,vs.fieldoffset);
  514. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  515. end
  516. else if (vs.fieldoffset mod 8 = 0) and
  517. (resultdef.packedbitsize mod 8 = 0) and
  518. { is different in case of e.g. packenum 2 and an enum }
  519. { which fits in 8 bits }
  520. (resultdef.size*8 = resultdef.packedbitsize) then
  521. begin
  522. inc(location.reference.offset,vs.fieldoffset div 8);
  523. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  524. end
  525. else
  526. begin
  527. sref.ref:=location.reference;
  528. sref.ref.alignment:=1;
  529. sref.bitindexreg:=NR_NO;
  530. inc(sref.ref.offset,vs.fieldoffset div 8);
  531. sref.startbit:=vs.fieldoffset mod 8;
  532. sref.bitlen:=resultdef.packedbitsize;
  533. if (left.location.loc=LOC_REFERENCE) then
  534. location.loc:=LOC_SUBSETREF
  535. else
  536. location.loc:=LOC_CSUBSETREF;
  537. location.sref:=sref;
  538. end;
  539. { also update the size of the location }
  540. location.size:=def_cgsize(resultdef);
  541. end;
  542. paraloc1.done;
  543. end;
  544. {*****************************************************************************
  545. TCGWITHNODE
  546. *****************************************************************************}
  547. procedure tcgwithnode.pass_generate_code;
  548. begin
  549. location_reset(location,LOC_VOID,OS_NO);
  550. if assigned(left) then
  551. secondpass(left);
  552. end;
  553. {*****************************************************************************
  554. TCGVECNODE
  555. *****************************************************************************}
  556. function tcgvecnode.get_mul_size : asizeint;
  557. begin
  558. if nf_memindex in flags then
  559. get_mul_size:=1
  560. else
  561. begin
  562. if (left.resultdef.typ=arraydef) then
  563. if not is_packed_array(left.resultdef) then
  564. get_mul_size:=tarraydef(left.resultdef).elesize
  565. else
  566. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  567. else
  568. get_mul_size:=resultdef.size;
  569. end
  570. end;
  571. { this routine must, like any other routine, not change the contents }
  572. { of base/index registers of references, as these may be regvars. }
  573. { The register allocator can coalesce one LOC_REGISTER being moved }
  574. { into another (as their live ranges won't overlap), but not a }
  575. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  576. { the live range of the LOC_CREGISTER will most likely overlap the }
  577. { the live range of the target LOC_(C)REGISTER) }
  578. { The passed register may be a LOC_CREGISTER as well. }
  579. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  580. var
  581. hreg: tregister;
  582. begin
  583. if l<>1 then
  584. begin
  585. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  586. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  587. maybe_const_reg:=hreg;
  588. end;
  589. if location.reference.base=NR_NO then
  590. location.reference.base:=maybe_const_reg
  591. else if location.reference.index=NR_NO then
  592. location.reference.index:=maybe_const_reg
  593. else
  594. begin
  595. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  596. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  597. reference_reset_base(location.reference,hreg,0,location.reference.alignment,location.reference.volatility);
  598. { insert new index register }
  599. location.reference.index:=maybe_const_reg;
  600. end;
  601. { update alignment }
  602. if (location.reference.alignment=0) then
  603. internalerror(2009020704);
  604. location.reference.alignment:=newalignment(location.reference.alignment,l);
  605. end;
  606. { see remarks for tcgvecnode.update_reference_reg_mul above }
  607. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  608. var
  609. sref: tsubsetreference;
  610. offsetreg, hreg: tregister;
  611. alignpower: aint;
  612. temp : longint;
  613. begin
  614. { only orddefs are bitpacked. Even then we only need special code in }
  615. { case the bitpacked *byte size* is not a power of two, otherwise }
  616. { everything can be handled using the the regular array code. }
  617. if ((l mod 8) = 0) and
  618. (ispowerof2(l div 8,temp) or
  619. not is_ordinal(resultdef)
  620. {$ifndef cpu64bitalu}
  621. or is_64bitint(resultdef)
  622. {$endif not cpu64bitalu}
  623. ) then
  624. begin
  625. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  626. exit;
  627. end;
  628. if (l > 8*sizeof(aint)) then
  629. internalerror(200608051);
  630. sref.ref := location.reference;
  631. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  632. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_ADDR,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  633. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,hreg);
  634. { keep alignment for index }
  635. sref.ref.alignment := left.resultdef.alignment;
  636. if not ispowerof2(packedbitsloadsize(l),temp) then
  637. internalerror(2006081201);
  638. alignpower:=temp;
  639. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  640. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  641. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  642. if (sref.ref.base = NR_NO) then
  643. sref.ref.base := offsetreg
  644. else if (sref.ref.index = NR_NO) then
  645. sref.ref.index := offsetreg
  646. else
  647. begin
  648. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  649. sref.ref.base := offsetreg;
  650. end;
  651. { the if expression below is a constant evaluated at compile time, so disable the unreachable code
  652. warning }
  653. {$push}
  654. {$warn 6018 off}
  655. { we can reuse hreg only if OS_INT and OS_ADDR have the same size/type }
  656. if OS_INT<>OS_ADDR then
  657. begin
  658. sref.bitindexreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  659. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_INT,hreg,sref.bitindexreg);
  660. end
  661. else
  662. sref.bitindexreg:=hreg;
  663. {$pop}
  664. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,sref.bitindexreg);
  665. sref.startbit := 0;
  666. sref.bitlen := resultdef.packedbitsize;
  667. if (left.location.loc = LOC_REFERENCE) then
  668. location.loc := LOC_SUBSETREF
  669. else
  670. location.loc := LOC_CSUBSETREF;
  671. location.sref := sref;
  672. end;
  673. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: ASizeInt);
  674. begin
  675. inc(ref.offset,index*mulsize);
  676. end;
  677. procedure tcgvecnode.second_wideansistring;
  678. begin
  679. end;
  680. procedure tcgvecnode.second_dynamicarray;
  681. begin
  682. end;
  683. function tcgvecnode.valid_index_size(size: tcgsize): boolean;
  684. begin
  685. result:=
  686. tcgsize2signed[size]=tcgsize2signed[OS_ADDR];
  687. end;
  688. procedure tcgvecnode.rangecheck_array;
  689. var
  690. paraloc1,paraloc2 : tcgpara;
  691. pd : tprocdef;
  692. begin
  693. { omit range checking when this is an array access to a pointer which has been
  694. typecasted from an array }
  695. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  696. exit;
  697. paraloc1.init;
  698. paraloc2.init;
  699. if is_dynamic_array(left.resultdef) then
  700. begin
  701. pd:=search_system_proc('fpc_dynarray_rangecheck');
  702. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  703. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  704. if pd.is_pushleftright then
  705. begin
  706. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  707. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  708. end
  709. else
  710. begin
  711. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  712. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  713. end;
  714. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  715. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  716. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,pd,[@paraloc1,@paraloc2],nil).resetiftemp;
  717. end;
  718. { for regular arrays, we don't have to do anything because the index has been
  719. type converted to the index type, which already inserted a range check if
  720. necessary }
  721. paraloc1.done;
  722. paraloc2.done;
  723. end;
  724. procedure tcgvecnode.rangecheck_string;
  725. var
  726. paraloc1,
  727. paraloc2: tcgpara;
  728. helpername: TIDString;
  729. pd: tprocdef;
  730. begin
  731. paraloc1.init;
  732. paraloc2.init;
  733. case tstringdef(left.resultdef).stringtype of
  734. { it's the same for ansi- and wide strings }
  735. st_unicodestring,
  736. st_widestring,
  737. st_ansistring:
  738. begin
  739. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  740. pd:=search_system_proc(helpername);
  741. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,1,paraloc1);
  742. paramanager.getintparaloc(current_asmdata.CurrAsmList,pd,2,paraloc2);
  743. if pd.is_pushleftright then
  744. begin
  745. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  746. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  747. end
  748. else
  749. begin
  750. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.resultdef,right.location,paraloc2);
  751. hlcg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.resultdef,left.location,paraloc1);
  752. end;
  753. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  754. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  755. hlcg.g_call_system_proc(current_asmdata.CurrAsmList,pd,[@paraloc1,@paraloc2],nil).resetiftemp;
  756. end;
  757. st_shortstring:
  758. begin
  759. {!!!!!!!!!!!!!!!!!}
  760. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  761. end;
  762. st_longstring:
  763. begin
  764. {!!!!!!!!!!!!!!!!!}
  765. end;
  766. end;
  767. paraloc1.done;
  768. paraloc2.done;
  769. end;
  770. procedure tcgvecnode.pass_generate_code;
  771. var
  772. offsetdec,
  773. extraoffset : aint;
  774. rightp : pnode;
  775. newsize : tcgsize;
  776. mulsize,
  777. bytemulsize : ASizeInt;
  778. alignpow : aint;
  779. paraloc1,
  780. paraloc2 : tcgpara;
  781. subsetref : tsubsetreference;
  782. temp : longint;
  783. indexdef : tdef;
  784. begin
  785. paraloc1.init;
  786. paraloc2.init;
  787. mulsize:=get_mul_size;
  788. if not is_packed_array(left.resultdef) then
  789. bytemulsize:=mulsize
  790. else
  791. bytemulsize:=mulsize div 8;
  792. newsize:=def_cgsize(resultdef);
  793. secondpass(left);
  794. if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  795. location_reset_ref(location,left.location.loc,newsize,left.location.reference.alignment,left.location.reference.volatility)
  796. else
  797. location_reset_ref(location,LOC_REFERENCE,newsize,resultdef.alignment,[]);
  798. { an ansistring needs to be dereferenced }
  799. if is_ansistring(left.resultdef) or
  800. is_wide_or_unicode_string(left.resultdef) then
  801. begin
  802. if nf_callunique in flags then
  803. internalerror(200304236);
  804. {DM!!!!!}
  805. case left.location.loc of
  806. LOC_REGISTER,
  807. LOC_CREGISTER :
  808. begin
  809. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,[]);
  810. end;
  811. LOC_CREFERENCE,
  812. LOC_REFERENCE :
  813. begin
  814. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,[]);
  815. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  816. end;
  817. LOC_CONSTANT:
  818. begin
  819. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment,[]);
  820. end;
  821. else
  822. internalerror(2002032218);
  823. end;
  824. if is_ansistring(left.resultdef) then
  825. offsetdec:=1
  826. else
  827. offsetdec:=2;
  828. location.reference.alignment:=offsetdec;
  829. location.reference.volatility:=[];
  830. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  831. if not(cs_zerobasedstrings in current_settings.localswitches) then
  832. update_reference_offset(location.reference,-1,offsetdec);
  833. end
  834. else if is_dynamic_array(left.resultdef) then
  835. begin
  836. case left.location.loc of
  837. LOC_REGISTER,
  838. LOC_CREGISTER :
  839. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment,[]);
  840. LOC_REFERENCE,
  841. LOC_CREFERENCE :
  842. begin
  843. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment,[]);
  844. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  845. left.location.reference,location.reference.base);
  846. end;
  847. else
  848. internalerror(2002032219);
  849. end;
  850. { a dynarray points to the start of a memory block, which
  851. we assume to be always aligned to a multiple of the
  852. pointer size
  853. }
  854. location.reference.alignment:=voidpointertype.size;
  855. location.reference.volatility:=[];
  856. end
  857. else
  858. begin
  859. { may happen in case of function results }
  860. case left.location.loc of
  861. LOC_CSUBSETREG,
  862. LOC_CREGISTER,
  863. LOC_CMMREGISTER,
  864. LOC_SUBSETREG,
  865. LOC_REGISTER,
  866. LOC_MMREGISTER:
  867. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  868. end;
  869. location_copy(location,left.location);
  870. end;
  871. { location must be memory }
  872. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  873. internalerror(200411013);
  874. { offset can only differ from 0 if arraydef }
  875. if (left.resultdef.typ=arraydef) and
  876. not(is_dynamic_array(left.resultdef)) and
  877. (not(is_packed_array(left.resultdef)) or
  878. ((mulsize mod 8 = 0) and
  879. ispowerof2(mulsize div 8,temp)) or
  880. { only orddefs are bitpacked }
  881. not is_ordinal(resultdef)
  882. {$ifndef cpu64bitalu}
  883. or is_64bitint(resultdef)
  884. {$endif not cpu64bitalu}
  885. ) then
  886. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  887. if right.nodetype=ordconstn then
  888. begin
  889. { offset can only differ from 0 if arraydef }
  890. if cs_check_range in current_settings.localswitches then
  891. begin
  892. secondpass(right);
  893. case left.resultdef.typ of
  894. arraydef :
  895. rangecheck_array;
  896. stringdef :
  897. rangecheck_string;
  898. end;
  899. end;
  900. if not(is_packed_array(left.resultdef)) or
  901. ((mulsize mod 8 = 0) and
  902. (ispowerof2(mulsize div 8,temp) or
  903. { only orddefs are bitpacked }
  904. not is_ordinal(resultdef))) then
  905. begin
  906. extraoffset:=tordconstnode(right).value.svalue;
  907. update_reference_offset(location.reference,extraoffset,bytemulsize);
  908. { adjust alignment after this change }
  909. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  910. end
  911. else
  912. begin
  913. subsetref.ref := location.reference;
  914. subsetref.ref.alignment := left.resultdef.alignment;
  915. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  916. internalerror(2006081212);
  917. alignpow:=temp;
  918. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  919. subsetref.bitindexreg := NR_NO;
  920. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  921. subsetref.bitlen := resultdef.packedbitsize;
  922. if (left.location.loc = LOC_REFERENCE) then
  923. location.loc := LOC_SUBSETREF
  924. else
  925. location.loc := LOC_CSUBSETREF;
  926. location.sref := subsetref;
  927. end;
  928. end
  929. else
  930. { not nodetype=ordconstn }
  931. begin
  932. if (cs_opt_level1 in current_settings.optimizerswitches) and
  933. { if we do range checking, we don't }
  934. { need that fancy code (it would be }
  935. { buggy) }
  936. not(cs_check_range in current_settings.localswitches) and
  937. (left.resultdef.typ=arraydef) and
  938. not is_packed_array(left.resultdef) then
  939. begin
  940. extraoffset:=0;
  941. rightp:=actualtargetnode(@right);
  942. if rightp^.nodetype=addn then
  943. begin
  944. if taddnode(rightp^).right.nodetype=ordconstn then
  945. begin
  946. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  947. replacenode(rightp^,taddnode(rightp^).left);
  948. end
  949. else if taddnode(rightp^).left.nodetype=ordconstn then
  950. begin
  951. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  952. replacenode(rightp^,taddnode(rightp^).right);
  953. end;
  954. end
  955. else if rightp^.nodetype=subn then
  956. begin
  957. if taddnode(rightp^).right.nodetype=ordconstn then
  958. begin
  959. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  960. replacenode(rightp^,taddnode(rightp^).left);
  961. end;
  962. end;
  963. update_reference_offset(location.reference,extraoffset,mulsize);
  964. end;
  965. { calculate from left to right }
  966. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  967. internalerror(200304237);
  968. secondpass(right);
  969. if (right.expectloc=LOC_JUMP)<>
  970. (right.location.loc=LOC_JUMP) then
  971. internalerror(2006010801);
  972. { if mulsize = 1, we won't have to modify the index }
  973. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
  974. not valid_index_size(right.location.size) then
  975. begin
  976. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  977. indexdef:=ptruinttype
  978. end
  979. else
  980. indexdef:=right.resultdef;
  981. { produce possible range check code: }
  982. if cs_check_range in current_settings.localswitches then
  983. begin
  984. if left.resultdef.typ=arraydef then
  985. rangecheck_array
  986. else if (left.resultdef.typ=stringdef) then
  987. rangecheck_string;
  988. end;
  989. { insert the register and the multiplication factor in the
  990. reference }
  991. if not is_packed_array(left.resultdef) then
  992. update_reference_reg_mul(right.location.register,indexdef,mulsize)
  993. else
  994. update_reference_reg_packed(right.location.register,indexdef,mulsize);
  995. end;
  996. location.size:=newsize;
  997. paraloc1.done;
  998. paraloc2.done;
  999. end;
  1000. begin
  1001. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1002. cloadparentfpnode:=tcgloadparentfpnode;
  1003. caddrnode:=tcgaddrnode;
  1004. cderefnode:=tcgderefnode;
  1005. csubscriptnode:=tcgsubscriptnode;
  1006. cwithnode:=tcgwithnode;
  1007. cvecnode:=tcgvecnode;
  1008. end.