cgobj.pas 92 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the basic code generator object
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {# @abstract(Abstract code generator unit)
  20. Abstreact code generator unit. This contains the base class
  21. to implement for all new supported processors.
  22. WARNING: None of the routines implemented in these modules,
  23. or their descendants, should use the temp. allocator, as
  24. these routines may be called inside genentrycode, and the
  25. stack frame is already setup!
  26. }
  27. unit cgobj;
  28. {$i fpcdefs.inc}
  29. interface
  30. uses
  31. {$ifdef delphi}
  32. dmisc,
  33. {$endif}
  34. cclasses,globtype,
  35. cpubase,cpuinfo,cgbase,parabase,
  36. aasmbase,aasmtai,aasmcpu,
  37. symconst,symbase,symtype,symdef,symtable,rgobj
  38. ;
  39. type
  40. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  41. {# @abstract(Abstract code generator)
  42. This class implements an abstract instruction generator. Some of
  43. the methods of this class are generic, while others must
  44. be overriden for all new processors which will be supported
  45. by Free Pascal. For 32-bit processors, the base class
  46. sould be @link(tcg64f32) and not @var(tcg).
  47. }
  48. tcg = class
  49. public
  50. alignment : talignment;
  51. rg : array[tregistertype] of trgobj;
  52. t_times:cardinal;
  53. {$ifdef flowgraph}
  54. aktflownode:word;
  55. {$endif}
  56. {************************************************}
  57. { basic routines }
  58. constructor create;
  59. {# Initialize the register allocators needed for the codegenerator.}
  60. procedure init_register_allocators;virtual;
  61. {# Clean up the register allocators needed for the codegenerator.}
  62. procedure done_register_allocators;virtual;
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  71. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:Taasmoutput;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:Taasmoutput;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  86. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  87. function makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  88. {# Emit a label to the instruction stream. }
  89. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  90. {# Allocates register r by inserting a pai_realloc record }
  91. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  92. {# Deallocates register r by inserting a pa_regdealloc record}
  93. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  94. { Synchronize register, make sure it is still valid }
  95. procedure a_reg_sync(list : taasmoutput;r : tregister);
  96. {# Pass a parameter, which is located in a register, to a routine.
  97. This routine should push/send the parameter to the routine, as
  98. required by the specific processor ABI and routine modifiers.
  99. This must be overriden for each CPU target.
  100. @param(size size of the operand in the register)
  101. @param(r register source of the operand)
  102. @param(paraloc where the parameter will be stored)
  103. }
  104. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const paraloc : TCGPara);virtual;
  105. {# Pass a parameter, which is a constant, to a routine.
  106. A generic version is provided. This routine should
  107. be overriden for optimization purposes if the cpu
  108. permits directly sending this type of parameter.
  109. @param(size size of the operand in constant)
  110. @param(a value of constant to send)
  111. @param(paraloc where the parameter will be stored)
  112. }
  113. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aint;const paraloc : TCGPara);virtual;
  114. {# Pass the value of a parameter, which is located in memory, to a routine.
  115. A generic version is provided. This routine should
  116. be overriden for optimization purposes if the cpu
  117. permits directly sending this type of parameter.
  118. @param(size size of the operand in constant)
  119. @param(r Memory reference of value to send)
  120. @param(paraloc where the parameter will be stored)
  121. }
  122. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const paraloc : TCGPara);virtual;
  123. {# Pass the value of a parameter, which can be located either in a register or memory location,
  124. to a routine.
  125. A generic version is provided.
  126. @param(l location of the operand to send)
  127. @param(nr parameter number (starting from one) of routine (from left to right))
  128. @param(paraloc where the parameter will be stored)
  129. }
  130. procedure a_param_loc(list : taasmoutput;const l : tlocation;const paraloc : TCGPara);
  131. {# Pass the address of a reference to a routine. This routine
  132. will calculate the address of the reference, and pass this
  133. calculated address as a parameter.
  134. A generic version is provided. This routine should
  135. be overriden for optimization purposes if the cpu
  136. permits directly sending this type of parameter.
  137. @param(r reference to get address from)
  138. @param(nr parameter number (starting from one) of routine (from left to right))
  139. }
  140. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const paraloc : TCGPara);virtual;
  141. { Copies a whole memory block to the stack, the paraloc must be a memory location }
  142. procedure a_param_copy_ref(list : taasmoutput;size : aint;const r : treference;const paraloc : TCGPara);
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. { Copy a parameter to a (temporary) reference }
  160. procedure a_loadany_param_ref(list : taasmoutput;const paraloc : TCGPara;const ref:treference;shuffle : pmmshuffle);virtual;
  161. { Copy a parameter to a register }
  162. procedure a_loadany_param_reg(list : taasmoutput;const paraloc : TCGPara;const reg:tregister;shuffle : pmmshuffle);virtual;
  163. {# Emits instruction to call the method specified by symbol name.
  164. This routine must be overriden for each new target cpu.
  165. There is no a_call_ref because loading the reference will use
  166. a temp register on most cpu's resulting in conflicts with the
  167. registers used for the parameters (PFV)
  168. }
  169. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  170. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  171. { move instructions }
  172. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : taasmoutput;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  177. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  178. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  179. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  180. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  181. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  182. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  183. { fpu move instructions }
  184. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  185. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  186. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  187. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  188. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  189. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const paraloc : TCGPara);virtual;
  190. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const paraloc : TCGPara);virtual;
  191. { vector register move instructions }
  192. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  193. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  194. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  195. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  196. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  197. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const paraloc : TCGPara;shuffle : pmmshuffle); virtual;
  198. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const paraloc : TCGPara;shuffle : pmmshuffle); virtual;
  199. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const paraloc : TCGPara;shuffle : pmmshuffle); virtual;
  200. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  201. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  202. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  203. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  204. { basic arithmetic operations }
  205. { note: for operators which require only one argument (not, neg), use }
  206. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  207. { that in this case the *second* operand is used as both source and }
  208. { destination (JM) }
  209. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  210. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  211. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: Aint; const loc: tlocation);
  212. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  213. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  214. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  215. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  216. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  217. { trinary operations for processors that support them, 'emulated' }
  218. { on others. None with "ref" arguments since I don't think there }
  219. { are any processors that support it (JM) }
  220. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  221. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  222. { comparison operations }
  223. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  224. l : tasmlabel);virtual; abstract;
  225. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  226. l : tasmlabel); virtual;
  227. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  228. l : tasmlabel);
  229. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  230. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  231. procedure a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  232. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  233. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  234. l : tasmlabel);
  235. procedure a_jmp_name(list : taasmoutput;const s : string); virtual; abstract;
  236. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  237. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  238. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  239. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  240. }
  241. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  242. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  243. {
  244. This routine tries to optimize the const_reg opcode, and should be
  245. called at the start of a_op_const_reg. It returns the actual opcode
  246. to emit, and the constant value to emit. If this routine returns
  247. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  248. @param(op The opcode to emit, returns the opcode which must be emitted)
  249. @param(a The constant which should be emitted, returns the constant which must
  250. be emitted)
  251. @param(reg The register to emit the opcode with, returns the register with
  252. which the opcode will be emitted)
  253. }
  254. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg: tregister): boolean;virtual;
  255. {#
  256. This routine is used in exception management nodes. It should
  257. save the exception reason currently in the FUNCTION_RETURN_REG. The
  258. save should be done either to a temp (pointed to by href).
  259. or on the stack (pushing the value on the stack).
  260. The size of the value to save is OS_S32. The default version
  261. saves the exception reason to a temp. memory area.
  262. }
  263. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  264. {#
  265. This routine is used in exception management nodes. It should
  266. save the exception reason constant. The
  267. save should be done either to a temp (pointed to by href).
  268. or on the stack (pushing the value on the stack).
  269. The size of the value to save is OS_S32. The default version
  270. saves the exception reason to a temp. memory area.
  271. }
  272. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);virtual;
  273. {#
  274. This routine is used in exception management nodes. It should
  275. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  276. should either be in the temp. area (pointed to by href , href should
  277. *NOT* be freed) or on the stack (the value should be popped).
  278. The size of the value to save is OS_S32. The default version
  279. saves the exception reason to a temp. memory area.
  280. }
  281. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  282. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  283. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  284. {# This should emit the opcode to copy len bytes from the source
  285. to destination, if loadref is true, it assumes that it first must load
  286. the source address from the memory location where
  287. source points to.
  288. It must be overriden for each new target processor.
  289. @param(source Source reference of copy)
  290. @param(dest Destination reference of copy)
  291. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  292. }
  293. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aint;loadref : boolean);virtual; abstract;
  294. {# This should emit the opcode to copy len bytes from the an unaligned source
  295. to destination, if loadref is true, it assumes that it first must load
  296. the source address from the memory location where
  297. source points to.
  298. It must be overriden for each new target processor.
  299. @param(source Source reference of copy)
  300. @param(dest Destination reference of copy)
  301. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  302. }
  303. procedure g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint;loadref : boolean);virtual;
  304. {# This should emit the opcode to a shortrstring from the source
  305. to destination, if loadref is true, it assumes that it first must load
  306. the source address from the memory location where
  307. source points to.
  308. @param(source Source reference of copy)
  309. @param(dest Destination reference of copy)
  310. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  311. }
  312. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;loadref : boolean);
  313. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  314. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  315. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  316. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  317. {# Generates range checking code. It is to note
  318. that this routine does not need to be overriden,
  319. as it takes care of everything.
  320. @param(p Node which contains the value to check)
  321. @param(todef Type definition of node to range check)
  322. }
  323. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  324. {# Generates overflow checking code for a node }
  325. procedure g_overflowcheck(list: taasmoutput; const l:tlocation; def:tdef); virtual; abstract;
  326. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aint);virtual;
  327. procedure g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);virtual;
  328. {# Emits instructions when compilation is done in profile
  329. mode (this is set as a command line option). The default
  330. behavior does nothing, should be overriden as required.
  331. }
  332. procedure g_profilecode(list : taasmoutput);virtual;
  333. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  334. @param(size Number of bytes to allocate)
  335. }
  336. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  337. {# Emits instruction for allocating the locals in entry
  338. code of a routine. This is one of the first
  339. routine called in @var(genentrycode).
  340. @param(localsize Number of bytes to allocate as locals)
  341. }
  342. procedure g_proc_entry(list : taasmoutput;localsize : longint;nostackframe:boolean);virtual; abstract;
  343. {# Emits instructions for returning from a subroutine.
  344. Should also restore the framepointer and stack.
  345. @param(parasize Number of bytes of parameters to deallocate from stack)
  346. }
  347. procedure g_proc_exit(list : taasmoutput;parasize:longint;nostackframe:boolean);virtual;abstract;
  348. {# This routine is called when generating the code for the entry point
  349. of a routine. It should save all registers which are not used in this
  350. routine, and which should be declared as saved in the std_saved_registers
  351. set.
  352. This routine is mainly used when linking to code which is generated
  353. by ABI-compliant compilers (like GCC), to make sure that the reserved
  354. registers of that ABI are not clobbered.
  355. @param(usedinproc Registers which are used in the code of this routine)
  356. }
  357. procedure g_save_standard_registers(list:Taasmoutput);virtual;abstract;
  358. {# This routine is called when generating the code for the exit point
  359. of a routine. It should restore all registers which were previously
  360. saved in @var(g_save_standard_registers).
  361. @param(usedinproc Registers which are used in the code of this routine)
  362. }
  363. procedure g_restore_standard_registers(list:Taasmoutput);virtual;abstract;
  364. procedure g_save_all_registers(list : taasmoutput);virtual;abstract;
  365. procedure g_restore_all_registers(list : taasmoutput;const funcretparaloc:TCGPara);virtual;abstract;
  366. end;
  367. {$ifndef cpu64bit}
  368. {# @abstract(Abstract code generator for 64 Bit operations)
  369. This class implements an abstract code generator class
  370. for 64 Bit operations.
  371. }
  372. tcg64 = class
  373. procedure a_load64_const_ref(list : taasmoutput;value : int64;const ref : treference);virtual;abstract;
  374. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  375. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  376. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  377. procedure a_load64_const_reg(list : taasmoutput;value : int64;reg : tregister64);virtual;abstract;
  378. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  379. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  380. procedure a_load64_const_loc(list : taasmoutput;value : int64;const l : tlocation);virtual;abstract;
  381. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  382. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  383. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  384. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  385. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  386. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  387. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  388. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;const ref : treference;reg : tregister64);virtual;abstract;
  389. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);virtual;abstract;
  390. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;regsrc : tregister64;const ref : treference);virtual;abstract;
  391. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;value : int64;regdst : tregister64);virtual;abstract;
  392. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;value : int64;const ref : treference);virtual;abstract;
  393. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;value : int64;const l: tlocation);virtual;abstract;
  394. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;reg : tregister64;const l : tlocation);virtual;abstract;
  395. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reg64 : tregister64);virtual;abstract;
  396. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64);virtual;
  397. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);virtual;
  398. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  399. procedure a_param64_const(list : taasmoutput;value : int64;const loc : TCGPara);virtual;abstract;
  400. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : TCGPara);virtual;abstract;
  401. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : TCGPara);virtual;abstract;
  402. {
  403. This routine tries to optimize the const_reg opcode, and should be
  404. called at the start of a_op64_const_reg. It returns the actual opcode
  405. to emit, and the constant value to emit. If this routine returns
  406. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  407. @param(op The opcode to emit, returns the opcode which must be emitted)
  408. @param(a The constant which should be emitted, returns the constant which must
  409. be emitted)
  410. @param(reg The register to emit the opcode with, returns the register with
  411. which the opcode will be emitted)
  412. }
  413. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  414. { override to catch 64bit rangechecks }
  415. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  416. end;
  417. {$endif cpu64bit}
  418. { tlocation handling }
  419. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  420. procedure location_freetemp(list: taasmoutput; const l : tlocation);
  421. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  422. procedure location_swap(var destloc,sourceloc : tlocation);
  423. var
  424. {# Main code generator class }
  425. cg : tcg;
  426. {$ifndef cpu64bit}
  427. {# Code generator class for all operations working with 64-Bit operands }
  428. cg64 : tcg64;
  429. {$endif cpu64bit}
  430. implementation
  431. uses
  432. globals,options,systems,
  433. verbose,defutil,paramgr,
  434. tgobj,cutils,
  435. cgutils;
  436. const
  437. { Please leave this here, this module should NOT use
  438. exprasmlist, the lists are always passed as arguments.
  439. Declaring it as string here results in an error when compiling (PFV) }
  440. exprasmlist = 'error';
  441. {*****************************************************************************
  442. basic functionallity
  443. ******************************************************************************}
  444. constructor tcg.create;
  445. begin
  446. end;
  447. {*****************************************************************************
  448. register allocation
  449. ******************************************************************************}
  450. procedure tcg.init_register_allocators;
  451. begin
  452. fillchar(rg,sizeof(rg),0);
  453. add_reg_instruction_hook:={$ifdef FPCPROCVAR}@{$endif}add_reg_instruction;
  454. end;
  455. procedure tcg.done_register_allocators;
  456. begin
  457. { Safety }
  458. fillchar(rg,sizeof(rg),0);
  459. add_reg_instruction_hook:=nil;
  460. end;
  461. {$ifdef flowgraph}
  462. procedure Tcg.init_flowgraph;
  463. begin
  464. aktflownode:=0;
  465. end;
  466. procedure Tcg.done_flowgraph;
  467. begin
  468. end;
  469. {$endif}
  470. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  471. begin
  472. if not assigned(rg[R_INTREGISTER]) then
  473. internalerror(200312122);
  474. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  475. end;
  476. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  477. begin
  478. if not assigned(rg[R_FPUREGISTER]) then
  479. internalerror(200312123);
  480. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  481. end;
  482. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  483. begin
  484. if not assigned(rg[R_MMREGISTER]) then
  485. internalerror(200312124);
  486. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  487. end;
  488. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  489. begin
  490. if assigned(rg[R_ADDRESSREGISTER]) then
  491. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  492. else
  493. begin
  494. if not assigned(rg[R_INTREGISTER]) then
  495. internalerror(200312121);
  496. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  497. end;
  498. end;
  499. function Tcg.makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  500. var
  501. subreg:Tsubregister;
  502. begin
  503. subreg:=cgsize2subreg(size);
  504. result:=reg;
  505. setsubreg(result,subreg);
  506. { notify RA }
  507. if result<>reg then
  508. list.concat(tai_regalloc.resize(result));
  509. end;
  510. procedure tcg.getcpuregister(list:Taasmoutput;r:Tregister);
  511. begin
  512. if not assigned(rg[getregtype(r)]) then
  513. internalerror(200312125);
  514. rg[getregtype(r)].getcpuregister(list,r);
  515. end;
  516. procedure tcg.ungetcpuregister(list:Taasmoutput;r:Tregister);
  517. begin
  518. if not assigned(rg[getregtype(r)]) then
  519. internalerror(200312126);
  520. rg[getregtype(r)].ungetcpuregister(list,r);
  521. end;
  522. procedure tcg.alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  523. begin
  524. if assigned(rg[rt]) then
  525. rg[rt].alloccpuregisters(list,r)
  526. else
  527. internalerror(200310092);
  528. end;
  529. procedure tcg.dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  530. begin
  531. if assigned(rg[rt]) then
  532. rg[rt].dealloccpuregisters(list,r)
  533. else
  534. internalerror(200310093);
  535. end;
  536. function tcg.uses_registers(rt:Tregistertype):boolean;
  537. begin
  538. if assigned(rg[rt]) then
  539. result:=rg[rt].uses_registers
  540. else
  541. result:=false;
  542. end;
  543. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  544. var
  545. rt : tregistertype;
  546. begin
  547. rt:=getregtype(r);
  548. { Only add it when a register allocator is configured.
  549. No IE can be generated, because the VMT is written
  550. without a valid rg[] }
  551. if assigned(rg[rt]) then
  552. rg[rt].add_reg_instruction(instr,r);
  553. end;
  554. procedure tcg.add_move_instruction(instr:Taicpu);
  555. var
  556. rt : tregistertype;
  557. begin
  558. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  559. if assigned(rg[rt]) then
  560. rg[rt].add_move_instruction(instr)
  561. else
  562. internalerror(200310095);
  563. end;
  564. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  565. var
  566. rt : tregistertype;
  567. begin
  568. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  569. begin
  570. if assigned(rg[rt]) then
  571. rg[rt].do_register_allocation(list,headertai);
  572. end;
  573. { running the other register allocator passes could require addition int/addr. registers
  574. when spilling so run int/addr register allocation at the end }
  575. if assigned(rg[R_INTREGISTER]) then
  576. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  577. if assigned(rg[R_ADDRESSREGISTER]) then
  578. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  579. end;
  580. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  581. begin
  582. list.concat(tai_regalloc.alloc(r));
  583. end;
  584. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  585. begin
  586. list.concat(tai_regalloc.dealloc(r));
  587. end;
  588. procedure tcg.a_reg_sync(list : taasmoutput;r : tregister);
  589. var
  590. instr : tai;
  591. begin
  592. instr:=tai_regalloc.sync(r);
  593. list.concat(instr);
  594. add_reg_instruction(instr,r);
  595. end;
  596. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  597. begin
  598. list.concat(tai_label.create(l));
  599. end;
  600. {*****************************************************************************
  601. for better code generation these methods should be overridden
  602. ******************************************************************************}
  603. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const paraloc : TCGPara);
  604. var
  605. ref : treference;
  606. begin
  607. paraloc.check_simple_location;
  608. case paraloc.location^.loc of
  609. LOC_REGISTER,LOC_CREGISTER:
  610. a_load_reg_reg(list,size,paraloc.location^.size,r,paraloc.location^.register);
  611. LOC_REFERENCE,LOC_CREFERENCE:
  612. begin
  613. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  614. a_load_reg_ref(list,size,paraloc.location^.size,r,ref);
  615. end
  616. else
  617. internalerror(2002071004);
  618. end;
  619. end;
  620. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aint;const paraloc : TCGPara);
  621. var
  622. ref : treference;
  623. begin
  624. paraloc.check_simple_location;
  625. case paraloc.location^.loc of
  626. LOC_REGISTER,LOC_CREGISTER:
  627. a_load_const_reg(list,paraloc.location^.size,a,paraloc.location^.register);
  628. LOC_REFERENCE,LOC_CREFERENCE:
  629. begin
  630. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  631. a_load_const_ref(list,paraloc.location^.size,a,ref);
  632. end
  633. else
  634. internalerror(2002071004);
  635. end;
  636. end;
  637. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const paraloc : TCGPara);
  638. var
  639. ref : treference;
  640. begin
  641. paraloc.check_simple_location;
  642. case paraloc.location^.loc of
  643. LOC_REGISTER,LOC_CREGISTER:
  644. a_load_ref_reg(list,size,paraloc.location^.size,r,paraloc.location^.register);
  645. LOC_REFERENCE,LOC_CREFERENCE:
  646. begin
  647. reference_reset(ref);
  648. ref.base:=paraloc.location^.reference.index;
  649. ref.offset:=paraloc.location^.reference.offset;
  650. { use concatcopy, because it can also be a float which fails when
  651. load_ref_ref is used }
  652. g_concatcopy(list,r,ref,tcgsize2size[size],false);
  653. end
  654. else
  655. internalerror(2002071004);
  656. end;
  657. end;
  658. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const paraloc : TCGPara);
  659. begin
  660. case l.loc of
  661. LOC_REGISTER,
  662. LOC_CREGISTER :
  663. a_param_reg(list,l.size,l.register,paraloc);
  664. LOC_CONSTANT :
  665. a_param_const(list,l.size,l.value,paraloc);
  666. LOC_CREFERENCE,
  667. LOC_REFERENCE :
  668. a_param_ref(list,l.size,l.reference,paraloc);
  669. else
  670. internalerror(2002032211);
  671. end;
  672. end;
  673. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const paraloc : TCGPara);
  674. var
  675. hr : tregister;
  676. begin
  677. hr:=getaddressregister(list);
  678. a_loadaddr_ref_reg(list,r,hr);
  679. a_param_reg(list,OS_ADDR,hr,paraloc);
  680. end;
  681. procedure tcg.a_param_copy_ref(list : taasmoutput;size : aint;const r : treference;const paraloc : TCGPara);
  682. var
  683. ref : treference;
  684. begin
  685. paraloc.check_simple_location;
  686. if not(paraloc.location^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  687. internalerror(2003010901);
  688. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  689. g_concatcopy(list,r,ref,size,false);
  690. end;
  691. procedure tcg.a_loadany_param_ref(list : taasmoutput;const paraloc : TCGPara;const ref:treference;shuffle : pmmshuffle);
  692. procedure gen_load(paraloc:TCGParaLocation;const ref:treference);
  693. var
  694. href : treference;
  695. begin
  696. case paraloc.loc of
  697. LOC_CREGISTER,
  698. LOC_REGISTER:
  699. begin
  700. if getsupreg(paraloc.register)<first_int_imreg then
  701. begin
  702. getcpuregister(list,paraloc.register);
  703. ungetcpuregister(list,paraloc.register);
  704. end;
  705. a_load_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  706. end;
  707. LOC_MMREGISTER,
  708. LOC_CMMREGISTER:
  709. begin
  710. if getsupreg(paraloc.register)<first_mm_imreg then
  711. begin
  712. getcpuregister(list,paraloc.register);
  713. ungetcpuregister(list,paraloc.register);
  714. end;
  715. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,shuffle);
  716. end;
  717. LOC_FPUREGISTER,
  718. LOC_CFPUREGISTER:
  719. begin
  720. if getsupreg(paraloc.register)<first_fpu_imreg then
  721. begin
  722. getcpuregister(list,paraloc.register);
  723. ungetcpuregister(list,paraloc.register);
  724. end;
  725. a_loadfpu_reg_ref(list,paraloc.size,paraloc.register,ref);
  726. end;
  727. LOC_REFERENCE:
  728. begin
  729. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset);
  730. { use concatcopy, because it can also be a float which fails when
  731. load_ref_ref is used }
  732. g_concatcopy(list,href,ref,tcgsize2size[paraloc.size],false);
  733. end;
  734. else
  735. internalerror(2002081302);
  736. end;
  737. end;
  738. var
  739. href : treference;
  740. begin
  741. href:=ref;
  742. gen_load(paraloc.location^,href);
  743. if assigned(paraloc.location^.next) then
  744. begin
  745. inc(href.offset,TCGSize2Size[paraloc.location^.size]);
  746. gen_load(paraloc.location^.next^,href);
  747. end;
  748. end;
  749. procedure tcg.a_loadany_param_reg(list : taasmoutput;const paraloc : TCGPara;const reg:tregister;shuffle : pmmshuffle);
  750. var
  751. href : treference;
  752. begin
  753. paraloc.check_simple_location;
  754. case paraloc.location^.loc of
  755. LOC_CREGISTER,
  756. LOC_REGISTER:
  757. begin
  758. if getsupreg(paraloc.location^.register)<first_int_imreg then
  759. begin
  760. getcpuregister(list,paraloc.location^.register);
  761. ungetcpuregister(list,paraloc.location^.register);
  762. end;
  763. a_load_reg_reg(list,paraloc.location^.size,paraloc.location^.size,paraloc.location^.register,reg)
  764. end;
  765. LOC_CFPUREGISTER,
  766. LOC_FPUREGISTER:
  767. begin
  768. if getsupreg(paraloc.location^.register)<first_fpu_imreg then
  769. begin
  770. getcpuregister(list,paraloc.location^.register);
  771. ungetcpuregister(list,paraloc.location^.register);
  772. end;
  773. a_loadfpu_reg_reg(list,paraloc.location^.size,paraloc.location^.register,reg);
  774. end;
  775. LOC_MMREGISTER,
  776. LOC_CMMREGISTER:
  777. begin
  778. if getsupreg(paraloc.location^.register)<first_mm_imreg then
  779. begin
  780. getcpuregister(list,paraloc.location^.register);
  781. ungetcpuregister(list,paraloc.location^.register);
  782. end;
  783. a_loadmm_reg_reg(list,paraloc.location^.size,paraloc.location^.size,paraloc.location^.register,reg,shuffle);
  784. end;
  785. LOC_REFERENCE,
  786. LOC_CREFERENCE:
  787. begin
  788. reference_reset_base(href,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  789. a_load_ref_reg(list,paraloc.location^.size,paraloc.location^.size,href,reg);
  790. end;
  791. else
  792. internalerror(2003053010);
  793. end
  794. end;
  795. {****************************************************************************
  796. some generic implementations
  797. ****************************************************************************}
  798. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  799. var
  800. tmpreg: tregister;
  801. begin
  802. { verify if we have the same reference }
  803. if references_equal(sref,dref) then
  804. exit;
  805. tmpreg:=getintregister(list,tosize);
  806. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  807. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  808. end;
  809. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);
  810. var
  811. tmpreg: tregister;
  812. begin
  813. tmpreg:=getintregister(list,size);
  814. a_load_const_reg(list,size,a,tmpreg);
  815. a_load_reg_ref(list,size,size,tmpreg,ref);
  816. end;
  817. procedure tcg.a_load_const_loc(list : taasmoutput;a : aint;const loc: tlocation);
  818. begin
  819. case loc.loc of
  820. LOC_REFERENCE,LOC_CREFERENCE:
  821. a_load_const_ref(list,loc.size,a,loc.reference);
  822. LOC_REGISTER,LOC_CREGISTER:
  823. a_load_const_reg(list,loc.size,a,loc.register);
  824. else
  825. internalerror(200203272);
  826. end;
  827. end;
  828. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  829. begin
  830. case loc.loc of
  831. LOC_REFERENCE,LOC_CREFERENCE:
  832. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  833. LOC_REGISTER,LOC_CREGISTER:
  834. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  835. else
  836. internalerror(200203271);
  837. end;
  838. end;
  839. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  840. begin
  841. case loc.loc of
  842. LOC_REFERENCE,LOC_CREFERENCE:
  843. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  844. LOC_REGISTER,LOC_CREGISTER:
  845. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  846. LOC_CONSTANT:
  847. a_load_const_reg(list,tosize,loc.value,reg);
  848. else
  849. internalerror(200109092);
  850. end;
  851. end;
  852. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  853. begin
  854. case loc.loc of
  855. LOC_REFERENCE,LOC_CREFERENCE:
  856. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  857. LOC_REGISTER,LOC_CREGISTER:
  858. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  859. LOC_CONSTANT:
  860. a_load_const_ref(list,tosize,loc.value,ref);
  861. else
  862. internalerror(200109302);
  863. end;
  864. end;
  865. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg:tregister): boolean;
  866. var
  867. powerval : longint;
  868. begin
  869. optimize_op_const_reg := false;
  870. case op of
  871. { or with zero returns same result }
  872. OP_OR : if a = 0 then optimize_op_const_reg := true;
  873. { and with max returns same result }
  874. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  875. { division by 1 returns result }
  876. OP_DIV :
  877. begin
  878. if a = 1 then
  879. optimize_op_const_reg := true
  880. else if ispowerof2(int64(a), powerval) then
  881. begin
  882. a := powerval;
  883. op:= OP_SHR;
  884. end;
  885. exit;
  886. end;
  887. OP_IDIV:
  888. begin
  889. if a = 1 then
  890. optimize_op_const_reg := true
  891. else if ispowerof2(int64(a), powerval) then
  892. begin
  893. a := powerval;
  894. op:= OP_SAR;
  895. end;
  896. exit;
  897. end;
  898. OP_MUL,OP_IMUL:
  899. begin
  900. if a = 1 then
  901. optimize_op_const_reg := true
  902. else if ispowerof2(int64(a), powerval) then
  903. begin
  904. a := powerval;
  905. op:= OP_SHL;
  906. end;
  907. exit;
  908. end;
  909. OP_SAR,OP_SHL,OP_SHR:
  910. begin
  911. if a = 0 then
  912. optimize_op_const_reg := true;
  913. exit;
  914. end;
  915. end;
  916. end;
  917. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  918. begin
  919. case loc.loc of
  920. LOC_REFERENCE, LOC_CREFERENCE:
  921. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  922. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  923. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  924. else
  925. internalerror(200203301);
  926. end;
  927. end;
  928. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  929. begin
  930. case loc.loc of
  931. LOC_REFERENCE, LOC_CREFERENCE:
  932. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  933. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  934. a_loadfpu_reg_reg(list,size,reg,loc.register);
  935. else
  936. internalerror(48991);
  937. end;
  938. end;
  939. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const paraloc : TCGPara);
  940. var
  941. ref : treference;
  942. begin
  943. paraloc.check_simple_location;
  944. case paraloc.location^.loc of
  945. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  946. a_loadfpu_reg_reg(list,size,r,paraloc.location^.register);
  947. LOC_REFERENCE,LOC_CREFERENCE:
  948. begin
  949. reference_reset_base(ref,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  950. a_loadfpu_reg_ref(list,size,r,ref);
  951. end
  952. else
  953. internalerror(2002071004);
  954. end;
  955. end;
  956. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const paraloc : TCGPara);
  957. var
  958. href : treference;
  959. begin
  960. paraloc.check_simple_location;
  961. case paraloc.location^.loc of
  962. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  963. a_loadfpu_ref_reg(list,size,ref,paraloc.location^.register);
  964. LOC_REFERENCE,LOC_CREFERENCE:
  965. begin
  966. reference_reset_base(href,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  967. { concatcopy should choose the best way to copy the data }
  968. g_concatcopy(list,ref,href,tcgsize2size[size],false);
  969. end
  970. else
  971. internalerror(200402201);
  972. end;
  973. end;
  974. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  975. var
  976. tmpreg : tregister;
  977. begin
  978. tmpreg:=getintregister(list,size);
  979. a_load_ref_reg(list,size,size,ref,tmpreg);
  980. a_op_const_reg(list,op,size,a,tmpreg);
  981. a_load_reg_ref(list,size,size,tmpreg,ref);
  982. end;
  983. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: aint; const loc: tlocation);
  984. begin
  985. case loc.loc of
  986. LOC_REGISTER, LOC_CREGISTER:
  987. a_op_const_reg(list,op,loc.size,a,loc.register);
  988. LOC_REFERENCE, LOC_CREFERENCE:
  989. a_op_const_ref(list,op,loc.size,a,loc.reference);
  990. else
  991. internalerror(200109061);
  992. end;
  993. end;
  994. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  995. var
  996. tmpreg : tregister;
  997. begin
  998. tmpreg:=getintregister(list,size);
  999. a_load_ref_reg(list,size,size,ref,tmpreg);
  1000. a_op_reg_reg(list,op,size,reg,tmpreg);
  1001. a_load_reg_ref(list,size,size,tmpreg,ref);
  1002. end;
  1003. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1004. var
  1005. tmpreg: tregister;
  1006. begin
  1007. case op of
  1008. OP_NOT,OP_NEG:
  1009. { handle it as "load ref,reg; op reg" }
  1010. begin
  1011. a_load_ref_reg(list,size,size,ref,reg);
  1012. a_op_reg_reg(list,op,size,reg,reg);
  1013. end;
  1014. else
  1015. begin
  1016. tmpreg:=getintregister(list,size);
  1017. a_load_ref_reg(list,size,size,ref,tmpreg);
  1018. a_op_reg_reg(list,op,size,tmpreg,reg);
  1019. end;
  1020. end;
  1021. end;
  1022. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  1023. begin
  1024. case loc.loc of
  1025. LOC_REGISTER, LOC_CREGISTER:
  1026. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1027. LOC_REFERENCE, LOC_CREFERENCE:
  1028. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1029. else
  1030. internalerror(200109061);
  1031. end;
  1032. end;
  1033. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1034. var
  1035. tmpreg: tregister;
  1036. begin
  1037. case loc.loc of
  1038. LOC_REGISTER,LOC_CREGISTER:
  1039. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1040. LOC_REFERENCE,LOC_CREFERENCE:
  1041. begin
  1042. tmpreg:=getintregister(list,loc.size);
  1043. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1044. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1045. end;
  1046. else
  1047. internalerror(200109061);
  1048. end;
  1049. end;
  1050. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  1051. a:aint;src,dst:Tregister);
  1052. begin
  1053. a_load_reg_reg(list,size,size,src,dst);
  1054. a_op_const_reg(list,op,size,a,dst);
  1055. end;
  1056. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  1057. size: tcgsize; src1, src2, dst: tregister);
  1058. var
  1059. tmpreg: tregister;
  1060. begin
  1061. if (dst<>src1) then
  1062. begin
  1063. a_load_reg_reg(list,size,size,src2,dst);
  1064. a_op_reg_reg(list,op,size,src1,dst);
  1065. end
  1066. else
  1067. begin
  1068. tmpreg:=getintregister(list,size);
  1069. a_load_reg_reg(list,size,size,src2,tmpreg);
  1070. a_op_reg_reg(list,op,size,src1,tmpreg);
  1071. a_load_reg_reg(list,size,size,tmpreg,dst);
  1072. end;
  1073. end;
  1074. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1075. l : tasmlabel);
  1076. var
  1077. tmpreg: tregister;
  1078. begin
  1079. tmpreg:=getintregister(list,size);
  1080. a_load_ref_reg(list,size,size,ref,tmpreg);
  1081. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1082. end;
  1083. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1084. l : tasmlabel);
  1085. begin
  1086. case loc.loc of
  1087. LOC_REGISTER,LOC_CREGISTER:
  1088. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1089. LOC_REFERENCE,LOC_CREFERENCE:
  1090. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1091. else
  1092. internalerror(200109061);
  1093. end;
  1094. end;
  1095. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1096. var
  1097. tmpreg: tregister;
  1098. begin
  1099. tmpreg:=getintregister(list,size);
  1100. a_load_ref_reg(list,size,size,ref,tmpreg);
  1101. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1102. end;
  1103. procedure tcg.a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1104. var
  1105. tmpreg: tregister;
  1106. begin
  1107. tmpreg:=getintregister(list,size);
  1108. a_load_ref_reg(list,size,size,ref,tmpreg);
  1109. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1110. end;
  1111. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1112. begin
  1113. case loc.loc of
  1114. LOC_REGISTER,
  1115. LOC_CREGISTER:
  1116. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1117. LOC_REFERENCE,
  1118. LOC_CREFERENCE :
  1119. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1120. LOC_CONSTANT:
  1121. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1122. else
  1123. internalerror(200203231);
  1124. end;
  1125. end;
  1126. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1127. l : tasmlabel);
  1128. var
  1129. tmpreg: tregister;
  1130. begin
  1131. case loc.loc of
  1132. LOC_REGISTER,LOC_CREGISTER:
  1133. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1134. LOC_REFERENCE,LOC_CREFERENCE:
  1135. begin
  1136. tmpreg:=getintregister(list,size);
  1137. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1138. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1139. end
  1140. else
  1141. internalerror(200109061);
  1142. end;
  1143. end;
  1144. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1145. begin
  1146. case loc.loc of
  1147. LOC_MMREGISTER,LOC_CMMREGISTER:
  1148. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1149. LOC_REFERENCE,LOC_CREFERENCE:
  1150. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1151. else
  1152. internalerror(200310121);
  1153. end;
  1154. end;
  1155. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1156. begin
  1157. case loc.loc of
  1158. LOC_MMREGISTER,LOC_CMMREGISTER:
  1159. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1160. LOC_REFERENCE,LOC_CREFERENCE:
  1161. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1162. else
  1163. internalerror(200310122);
  1164. end;
  1165. end;
  1166. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const paraloc : TCGPara;shuffle : pmmshuffle);
  1167. var
  1168. href : treference;
  1169. begin
  1170. paraloc.check_simple_location;
  1171. case paraloc.location^.loc of
  1172. LOC_MMREGISTER,LOC_CMMREGISTER:
  1173. a_loadmm_reg_reg(list,size,paraloc.location^.size,reg,paraloc.location^.register,shuffle);
  1174. LOC_REFERENCE,LOC_CREFERENCE:
  1175. begin
  1176. reference_reset_base(href,paraloc.location^.reference.index,paraloc.location^.reference.offset);
  1177. a_loadmm_reg_ref(list,size,paraloc.location^.size,reg,href,shuffle);
  1178. end
  1179. else
  1180. internalerror(200310123);
  1181. end;
  1182. end;
  1183. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const paraloc : TCGPara;shuffle : pmmshuffle);
  1184. var
  1185. hr : tregister;
  1186. hs : tmmshuffle;
  1187. begin
  1188. paraloc.check_simple_location;
  1189. hr:=getmmregister(list,paraloc.location^.size);
  1190. a_loadmm_ref_reg(list,size,paraloc.location^.size,ref,hr,shuffle);
  1191. if realshuffle(shuffle) then
  1192. begin
  1193. hs:=shuffle^;
  1194. removeshuffles(hs);
  1195. a_parammm_reg(list,paraloc.location^.size,hr,paraloc,@hs);
  1196. end
  1197. else
  1198. a_parammm_reg(list,paraloc.location^.size,hr,paraloc,shuffle);
  1199. end;
  1200. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const paraloc : TCGPara;shuffle : pmmshuffle);
  1201. begin
  1202. case loc.loc of
  1203. LOC_MMREGISTER,LOC_CMMREGISTER:
  1204. a_parammm_reg(list,loc.size,loc.register,paraloc,shuffle);
  1205. LOC_REFERENCE,LOC_CREFERENCE:
  1206. a_parammm_ref(list,loc.size,loc.reference,paraloc,shuffle);
  1207. else
  1208. internalerror(200310123);
  1209. end;
  1210. end;
  1211. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1212. var
  1213. hr : tregister;
  1214. hs : tmmshuffle;
  1215. begin
  1216. hr:=getmmregister(list,size);
  1217. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1218. if realshuffle(shuffle) then
  1219. begin
  1220. hs:=shuffle^;
  1221. removeshuffles(hs);
  1222. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1223. end
  1224. else
  1225. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1226. end;
  1227. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1228. var
  1229. hr : tregister;
  1230. hs : tmmshuffle;
  1231. begin
  1232. hr:=getmmregister(list,size);
  1233. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1234. if realshuffle(shuffle) then
  1235. begin
  1236. hs:=shuffle^;
  1237. removeshuffles(hs);
  1238. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1239. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1240. end
  1241. else
  1242. begin
  1243. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1244. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1245. end;
  1246. end;
  1247. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1248. begin
  1249. case loc.loc of
  1250. LOC_CMMREGISTER,LOC_MMREGISTER:
  1251. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1252. LOC_CREFERENCE,LOC_REFERENCE:
  1253. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1254. else
  1255. internalerror(200312232);
  1256. end;
  1257. end;
  1258. procedure tcg.g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint;loadref : boolean);
  1259. var
  1260. paraloc1,paraloc2,paraloc3 : TCGPara;
  1261. begin
  1262. paraloc1.init;
  1263. paraloc2.init;
  1264. paraloc3.init;
  1265. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1266. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1267. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1268. paramanager.allocparaloc(list,paraloc3);
  1269. a_param_const(list,OS_INT,len,paraloc3);
  1270. paramanager.allocparaloc(list,paraloc2);
  1271. a_paramaddr_ref(list,dest,paraloc2);
  1272. paramanager.allocparaloc(list,paraloc2);
  1273. if loadref then
  1274. a_param_ref(list,OS_ADDR,source,paraloc1)
  1275. else
  1276. a_paramaddr_ref(list,source,paraloc1);
  1277. paramanager.freeparaloc(list,paraloc3);
  1278. paramanager.freeparaloc(list,paraloc2);
  1279. paramanager.freeparaloc(list,paraloc1);
  1280. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1281. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1282. a_call_name(list,'FPC_MOVE');
  1283. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1284. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1285. paraloc3.done;
  1286. paraloc2.done;
  1287. paraloc1.done;
  1288. end;
  1289. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;loadref : boolean);
  1290. var
  1291. paraloc1,paraloc2,paraloc3 : TCGPara;
  1292. begin
  1293. paraloc1.init;
  1294. paraloc2.init;
  1295. paraloc3.init;
  1296. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1297. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1298. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1299. paramanager.allocparaloc(list,paraloc3);
  1300. a_paramaddr_ref(list,dest,paraloc3);
  1301. paramanager.allocparaloc(list,paraloc2);
  1302. if loadref then
  1303. a_param_ref(list,OS_ADDR,source,paraloc2)
  1304. else
  1305. a_paramaddr_ref(list,source,paraloc2);
  1306. paramanager.allocparaloc(list,paraloc1);
  1307. a_param_const(list,OS_INT,len,paraloc1);
  1308. paramanager.freeparaloc(list,paraloc3);
  1309. paramanager.freeparaloc(list,paraloc2);
  1310. paramanager.freeparaloc(list,paraloc1);
  1311. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1312. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1313. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1314. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1315. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1316. paraloc3.done;
  1317. paraloc2.done;
  1318. paraloc1.done;
  1319. end;
  1320. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  1321. var
  1322. href : treference;
  1323. incrfunc : string;
  1324. paraloc1,paraloc2 : TCGPara;
  1325. begin
  1326. paraloc1.init;
  1327. paraloc2.init;
  1328. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1329. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1330. { These functions should not change the registers (they use
  1331. the saveregister proc directive }
  1332. if is_interfacecom(t) then
  1333. incrfunc:='FPC_INTF_INCR_REF'
  1334. else if is_ansistring(t) then
  1335. {$ifdef ansistring_bits}
  1336. begin
  1337. case Tstringdef(t).string_typ of
  1338. st_ansistring16:
  1339. incrfunc:='FPC_ANSISTR16_INCR_REF';
  1340. st_ansistring32:
  1341. incrfunc:='FPC_ANSISTR32_INCR_REF';
  1342. st_ansistring64:
  1343. incrfunc:='FPC_ANSISTR64_INCR_REF';
  1344. end;
  1345. end
  1346. {$else}
  1347. incrfunc:='FPC_ANSISTR_INCR_REF'
  1348. {$endif}
  1349. else if is_widestring(t) then
  1350. incrfunc:='FPC_WIDESTR_INCR_REF'
  1351. else if is_dynamic_array(t) then
  1352. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1353. else
  1354. incrfunc:='';
  1355. { call the special incr function or the generic addref }
  1356. if incrfunc<>'' then
  1357. begin
  1358. { these functions get the pointer by value }
  1359. paramanager.allocparaloc(list,paraloc1);
  1360. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1361. paramanager.freeparaloc(list,paraloc1);
  1362. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1363. a_call_name(list,incrfunc);
  1364. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1365. end
  1366. else
  1367. begin
  1368. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1369. paramanager.allocparaloc(list,paraloc2);
  1370. a_paramaddr_ref(list,href,paraloc2);
  1371. paramanager.allocparaloc(list,paraloc1);
  1372. if loadref then
  1373. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1374. else
  1375. a_paramaddr_ref(list,ref,paraloc1);
  1376. paramanager.freeparaloc(list,paraloc1);
  1377. paramanager.freeparaloc(list,paraloc2);
  1378. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1379. a_call_name(list,'FPC_ADDREF');
  1380. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1381. end;
  1382. paraloc2.done;
  1383. paraloc1.done;
  1384. end;
  1385. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference; loadref:boolean);
  1386. var
  1387. hreg : tregister;
  1388. href : treference;
  1389. decrfunc : string;
  1390. needrtti : boolean;
  1391. paraloc1,paraloc2 : TCGPara;
  1392. begin
  1393. paraloc1.init;
  1394. paraloc2.init;
  1395. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1396. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1397. needrtti:=false;
  1398. if is_interfacecom(t) then
  1399. decrfunc:='FPC_INTF_DECR_REF'
  1400. else if is_ansistring(t) then
  1401. {$ifdef ansistring_bits}
  1402. begin
  1403. case Tstringdef(t).string_typ of
  1404. st_ansistring16:
  1405. decrfunc:='FPC_ANSISTR16_DECR_REF';
  1406. st_ansistring32:
  1407. decrfunc:='FPC_ANSISTR32_DECR_REF';
  1408. st_ansistring64:
  1409. decrfunc:='FPC_ANSISTR64_DECR_REF';
  1410. end;
  1411. end
  1412. {$else}
  1413. decrfunc:='FPC_ANSISTR_DECR_REF'
  1414. {$endif}
  1415. else if is_widestring(t) then
  1416. decrfunc:='FPC_WIDESTR_DECR_REF'
  1417. else if is_dynamic_array(t) then
  1418. begin
  1419. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1420. needrtti:=true;
  1421. end
  1422. else
  1423. decrfunc:='';
  1424. { call the special decr function or the generic decref }
  1425. if decrfunc<>'' then
  1426. begin
  1427. if needrtti then
  1428. begin
  1429. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1430. paramanager.allocparaloc(list,paraloc2);
  1431. a_paramaddr_ref(list,href,paraloc2);
  1432. end;
  1433. paramanager.allocparaloc(list,paraloc1);
  1434. if loadref then
  1435. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1436. else
  1437. a_paramaddr_ref(list,ref,paraloc1);
  1438. paramanager.freeparaloc(list,paraloc1);
  1439. if needrtti then
  1440. paramanager.freeparaloc(list,paraloc2);
  1441. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1442. a_call_name(list,decrfunc);
  1443. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1444. end
  1445. else
  1446. begin
  1447. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1448. paramanager.allocparaloc(list,paraloc2);
  1449. a_paramaddr_ref(list,href,paraloc2);
  1450. paramanager.allocparaloc(list,paraloc1);
  1451. if loadref then
  1452. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1453. else
  1454. a_paramaddr_ref(list,ref,paraloc1);
  1455. paramanager.freeparaloc(list,paraloc1);
  1456. paramanager.freeparaloc(list,paraloc2);
  1457. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1458. a_call_name(list,'FPC_DECREF');
  1459. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1460. end;
  1461. { Temp locations need always to be reset to 0 }
  1462. if tg.istemp(ref) then
  1463. begin
  1464. if loadref then
  1465. begin
  1466. hreg:=getaddressregister(list);
  1467. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1468. reference_reset_base(href,hreg,0);
  1469. a_load_const_ref(list,OS_ADDR,0,href);
  1470. end
  1471. else
  1472. a_load_const_ref(list,OS_ADDR,0,ref);
  1473. end;
  1474. paraloc2.done;
  1475. paraloc1.done;
  1476. end;
  1477. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1478. var
  1479. href : treference;
  1480. paraloc1,paraloc2 : TCGPara;
  1481. begin
  1482. paraloc1.init;
  1483. paraloc2.init;
  1484. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1485. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1486. if is_ansistring(t) or
  1487. is_widestring(t) or
  1488. is_interfacecom(t) or
  1489. is_dynamic_array(t) then
  1490. a_load_const_ref(list,OS_ADDR,0,ref)
  1491. else
  1492. begin
  1493. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1494. paramanager.allocparaloc(list,paraloc2);
  1495. a_paramaddr_ref(list,href,paraloc2);
  1496. paramanager.allocparaloc(list,paraloc1);
  1497. if loadref then
  1498. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1499. else
  1500. a_paramaddr_ref(list,ref,paraloc1);
  1501. paramanager.freeparaloc(list,paraloc1);
  1502. paramanager.freeparaloc(list,paraloc2);
  1503. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1504. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1505. a_call_name(list,'FPC_INITIALIZE');
  1506. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1507. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1508. end;
  1509. paraloc1.done;
  1510. paraloc2.done;
  1511. end;
  1512. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1513. var
  1514. hreg : tregister;
  1515. href : treference;
  1516. paraloc1,paraloc2 : TCGPara;
  1517. begin
  1518. paraloc1.init;
  1519. paraloc2.init;
  1520. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1521. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1522. if is_ansistring(t) or
  1523. is_widestring(t) or
  1524. is_interfacecom(t) then
  1525. begin
  1526. g_decrrefcount(list,t,ref,loadref);
  1527. { Temp locations are already reset to 0 }
  1528. if not tg.istemp(ref) then
  1529. begin
  1530. if loadref then
  1531. begin
  1532. hreg:=getaddressregister(list);
  1533. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1534. reference_reset_base(href,hreg,0);
  1535. a_load_const_ref(list,OS_ADDR,0,href);
  1536. end
  1537. else
  1538. a_load_const_ref(list,OS_ADDR,0,ref);
  1539. end;
  1540. end
  1541. else
  1542. begin
  1543. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1544. paramanager.allocparaloc(list,paraloc2);
  1545. a_paramaddr_ref(list,href,paraloc2);
  1546. paramanager.allocparaloc(list,paraloc1);
  1547. if loadref then
  1548. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1549. else
  1550. a_paramaddr_ref(list,ref,paraloc1);
  1551. paramanager.freeparaloc(list,paraloc1);
  1552. paramanager.freeparaloc(list,paraloc2);
  1553. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1554. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1555. a_call_name(list,'FPC_FINALIZE');
  1556. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1557. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1558. end;
  1559. paraloc1.done;
  1560. paraloc2.done;
  1561. end;
  1562. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1563. { generate range checking code for the value at location p. The type }
  1564. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1565. { is the original type used at that location. When both defs are equal }
  1566. { the check is also insert (needed for succ,pref,inc,dec) }
  1567. {$ifndef ver1_0}
  1568. const
  1569. aintmax=high(aint);
  1570. {$endif}
  1571. var
  1572. neglabel : tasmlabel;
  1573. hreg : tregister;
  1574. lto,hto,
  1575. lfrom,hfrom : TConstExprInt;
  1576. from_signed: boolean;
  1577. {$ifdef ver1_0}
  1578. aintmax : aint;
  1579. {$endif ver1_0}
  1580. begin
  1581. {$ifdef ver1_0}
  1582. {$ifdef cpu64bit}
  1583. { this is required to prevent incorrect code }
  1584. aintmax:=$7fffffff;
  1585. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1586. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1587. {$else cpu64bit}
  1588. aintmax:=high(aint);
  1589. {$endif cpu64bit}
  1590. {$endif}
  1591. { range checking on and range checkable value? }
  1592. if not(cs_check_range in aktlocalswitches) or
  1593. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1594. exit;
  1595. {$ifndef cpu64bit}
  1596. { handle 64bit rangechecks separate for 32bit processors }
  1597. if is_64bit(fromdef) or is_64bit(todef) then
  1598. begin
  1599. cg64.g_rangecheck64(list,l,fromdef,todef);
  1600. exit;
  1601. end;
  1602. {$endif cpu64bit}
  1603. { only check when assigning to scalar, subranges are different, }
  1604. { when todef=fromdef then the check is always generated }
  1605. getrange(fromdef,lfrom,hfrom);
  1606. getrange(todef,lto,hto);
  1607. from_signed := is_signed(fromdef);
  1608. { no range check if from and to are equal and are both longint/dword }
  1609. { (if we have a 32bit processor) or int64/qword, since such }
  1610. { operations can at most cause overflows (JM) }
  1611. { Note that these checks are mostly processor independent, they only }
  1612. { have to be changed once we introduce 64bit subrange types }
  1613. {$ifdef cpu64bit}
  1614. if (fromdef = todef) and
  1615. (fromdef.deftype=orddef) and
  1616. (((((torddef(fromdef).typ = s64bit) and
  1617. (lfrom = low(int64)) and
  1618. (hfrom = high(int64))) or
  1619. ((torddef(fromdef).typ = u64bit) and
  1620. (lfrom = low(qword)) and
  1621. (hfrom = high(qword)))))) then
  1622. exit;
  1623. {$else cpu64bit}
  1624. if (fromdef = todef) and
  1625. (fromdef.deftype=orddef) and
  1626. (((((torddef(fromdef).typ = s32bit) and
  1627. (lfrom = low(longint)) and
  1628. (hfrom = high(longint))) or
  1629. ((torddef(fromdef).typ = u32bit) and
  1630. (lfrom = low(cardinal)) and
  1631. (hfrom = high(cardinal)))))) then
  1632. exit;
  1633. {$endif cpu64bit}
  1634. { if the from-range falls completely in the to-range, no check }
  1635. { is necessary. Don't do this conversion for the largest unsigned type }
  1636. if (todef<>fromdef) and
  1637. (from_signed or (hfrom>=0)) and
  1638. (lto<=lfrom) and (hto>=hfrom) then
  1639. exit;
  1640. { generate the rangecheck code for the def where we are going to }
  1641. { store the result }
  1642. { use the trick that }
  1643. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1644. { To be able to do that, we have to make sure however that either }
  1645. { fromdef and todef are both signed or unsigned, or that we leave }
  1646. { the parts < 0 and > maxlongint out }
  1647. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1648. if from_signed xor is_signed(todef) then
  1649. begin
  1650. if from_signed then
  1651. { from is signed, to is unsigned }
  1652. begin
  1653. { if high(from) < 0 -> always range error }
  1654. if (hfrom < 0) or
  1655. { if low(to) > maxlongint also range error }
  1656. (lto > aintmax) then
  1657. begin
  1658. a_call_name(list,'FPC_RANGEERROR');
  1659. exit
  1660. end;
  1661. { from is signed and to is unsigned -> when looking at to }
  1662. { as an signed value, it must be < maxaint (otherwise }
  1663. { it will become negative, which is invalid since "to" is unsigned) }
  1664. if hto > aintmax then
  1665. hto := aintmax;
  1666. end
  1667. else
  1668. { from is unsigned, to is signed }
  1669. begin
  1670. if (lfrom > aintmax) or
  1671. (hto < 0) then
  1672. begin
  1673. a_call_name(list,'FPC_RANGEERROR');
  1674. exit
  1675. end;
  1676. { from is unsigned and to is signed -> when looking at to }
  1677. { as an unsigned value, it must be >= 0 (since negative }
  1678. { values are the same as values > maxlongint) }
  1679. if lto < 0 then
  1680. lto := 0;
  1681. end;
  1682. end;
  1683. hreg:=getintregister(list,OS_INT);
  1684. a_load_loc_reg(list,OS_INT,l,hreg);
  1685. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1686. objectlibrary.getlabel(neglabel);
  1687. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1688. a_call_name(list,'FPC_RANGEERROR');
  1689. a_label(list,neglabel);
  1690. end;
  1691. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1692. var
  1693. tmpreg : tregister;
  1694. begin
  1695. tmpreg:=getintregister(list,size);
  1696. g_flags2reg(list,size,f,tmpreg);
  1697. a_load_reg_ref(list,size,size,tmpreg,ref);
  1698. end;
  1699. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1700. var
  1701. OKLabel : tasmlabel;
  1702. paraloc1 : TCGPara;
  1703. begin
  1704. if (cs_check_object in aktlocalswitches) or
  1705. (cs_check_range in aktlocalswitches) then
  1706. begin
  1707. objectlibrary.getlabel(oklabel);
  1708. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1709. paraloc1.init;
  1710. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1711. paramanager.allocparaloc(list,paraloc1);
  1712. a_param_const(list,OS_INT,210,paraloc1);
  1713. paramanager.freeparaloc(list,paraloc1);
  1714. a_call_name(list,'FPC_HANDLEERROR');
  1715. a_label(list,oklabel);
  1716. paraloc1.done;
  1717. end;
  1718. end;
  1719. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1720. var
  1721. hrefvmt : treference;
  1722. paraloc1,paraloc2 : TCGPara;
  1723. begin
  1724. paraloc1.init;
  1725. paraloc2.init;
  1726. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1727. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1728. if (cs_check_object in aktlocalswitches) then
  1729. begin
  1730. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymbol(objdef.vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
  1731. paramanager.allocparaloc(list,paraloc2);
  1732. a_paramaddr_ref(list,hrefvmt,paraloc2);
  1733. paramanager.allocparaloc(list,paraloc1);
  1734. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1735. paramanager.freeparaloc(list,paraloc1);
  1736. paramanager.freeparaloc(list,paraloc2);
  1737. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1738. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1739. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1740. end
  1741. else
  1742. if (cs_check_range in aktlocalswitches) then
  1743. begin
  1744. paramanager.allocparaloc(list,paraloc1);
  1745. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1746. paramanager.freeparaloc(list,paraloc1);
  1747. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1748. a_call_name(list,'FPC_CHECK_OBJECT');
  1749. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1750. end;
  1751. paraloc1.done;
  1752. paraloc2.done;
  1753. end;
  1754. {*****************************************************************************
  1755. Entry/Exit Code Functions
  1756. *****************************************************************************}
  1757. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aint);
  1758. var
  1759. sizereg,sourcereg,destreg : tregister;
  1760. paraloc1,paraloc2,paraloc3 : TCGPara;
  1761. begin
  1762. { because ppc abi doesn't support dynamic stack allocation properly
  1763. open array value parameters are copied onto the heap
  1764. }
  1765. { allocate two registers for len and source }
  1766. sizereg:=getintregister(list,OS_INT);
  1767. sourcereg:=getintregister(list,OS_ADDR);
  1768. destreg:=getintregister(list,OS_ADDR);
  1769. { calculate necessary memory }
  1770. a_load_ref_reg(list,OS_INT,OS_INT,lenref,sizereg);
  1771. a_op_const_reg(list,OP_ADD,OS_INT,1,sizereg);
  1772. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1773. { load source }
  1774. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,sourcereg);
  1775. { do getmem call }
  1776. paraloc1.init;
  1777. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1778. paramanager.allocparaloc(list,paraloc1);
  1779. a_param_reg(list,OS_INT,sizereg,paraloc1);
  1780. paramanager.freeparaloc(list,paraloc1);
  1781. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1782. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1783. a_call_name(list,'FPC_GETMEM');
  1784. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1785. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1786. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1787. a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,ref);
  1788. paraloc1.done;
  1789. { do move call }
  1790. paraloc1.init;
  1791. paraloc2.init;
  1792. paraloc3.init;
  1793. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1794. paramanager.getintparaloc(pocall_default,2,paraloc2);
  1795. paramanager.getintparaloc(pocall_default,3,paraloc3);
  1796. { load size }
  1797. paramanager.allocparaloc(list,paraloc3);
  1798. a_param_reg(list,OS_INT,sizereg,paraloc3);
  1799. { load destination }
  1800. paramanager.allocparaloc(list,paraloc2);
  1801. a_param_reg(list,OS_ADDR,destreg,paraloc2);
  1802. { load source }
  1803. paramanager.allocparaloc(list,paraloc1);
  1804. a_param_reg(list,OS_ADDR,sourcereg,paraloc1);
  1805. paramanager.freeparaloc(list,paraloc3);
  1806. paramanager.freeparaloc(list,paraloc2);
  1807. paramanager.freeparaloc(list,paraloc1);
  1808. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1809. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1810. a_call_name(list,'FPC_MOVE');
  1811. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1812. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1813. paraloc3.done;
  1814. paraloc2.done;
  1815. paraloc1.done;
  1816. end;
  1817. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);
  1818. var
  1819. paraloc1 : TCGPara;
  1820. begin
  1821. { do move call }
  1822. paraloc1.init;
  1823. paramanager.getintparaloc(pocall_default,1,paraloc1);
  1824. { load source }
  1825. paramanager.allocparaloc(list,paraloc1);
  1826. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1827. paramanager.freeparaloc(list,paraloc1);
  1828. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1829. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1830. a_call_name(list,'FPC_FREEMEM');
  1831. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1832. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1833. paraloc1.done;
  1834. end;
  1835. procedure tcg.g_profilecode(list : taasmoutput);
  1836. begin
  1837. end;
  1838. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1839. begin
  1840. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1841. end;
  1842. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);
  1843. begin
  1844. a_load_const_ref(list, OS_INT, a, href);
  1845. end;
  1846. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1847. begin
  1848. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1849. end;
  1850. {*****************************************************************************
  1851. TCG64
  1852. *****************************************************************************}
  1853. {$ifndef cpu64bit}
  1854. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64; regsrc,regdst : tregister64);
  1855. begin
  1856. a_load64_reg_reg(list,regsrc,regdst);
  1857. a_op64_const_reg(list,op,value,regdst);
  1858. end;
  1859. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
  1860. var
  1861. tmpreg64 : tregister64;
  1862. begin
  1863. { when src1=dst then we need to first create a temp to prevent
  1864. overwriting src1 with src2 }
  1865. if (regsrc1.reghi=regdst.reghi) or
  1866. (regsrc1.reglo=regdst.reghi) or
  1867. (regsrc1.reghi=regdst.reglo) or
  1868. (regsrc1.reglo=regdst.reglo) then
  1869. begin
  1870. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  1871. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  1872. a_load64_reg_reg(list,regsrc2,tmpreg64);
  1873. a_op64_reg_reg(list,op,regsrc1,tmpreg64);
  1874. a_load64_reg_reg(list,tmpreg64,regdst);
  1875. end
  1876. else
  1877. begin
  1878. a_load64_reg_reg(list,regsrc2,regdst);
  1879. a_op64_reg_reg(list,op,regsrc1,regdst);
  1880. end;
  1881. end;
  1882. {$endif cpu64bit}
  1883. {****************************************************************************
  1884. TLocation
  1885. ****************************************************************************}
  1886. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  1887. begin
  1888. FillChar(l,sizeof(tlocation),0);
  1889. l.loc:=lt;
  1890. l.size:=lsize;
  1891. {$ifdef arm}
  1892. if l.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  1893. l.reference.signindex:=1;
  1894. {$endif arm}
  1895. end;
  1896. procedure location_freetemp(list:taasmoutput; const l : tlocation);
  1897. begin
  1898. if (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1899. tg.ungetiftemp(list,l.reference);
  1900. end;
  1901. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  1902. begin
  1903. destloc:=sourceloc;
  1904. end;
  1905. procedure location_swap(var destloc,sourceloc : tlocation);
  1906. var
  1907. swapl : tlocation;
  1908. begin
  1909. swapl := destloc;
  1910. destloc := sourceloc;
  1911. sourceloc := swapl;
  1912. end;
  1913. initialization
  1914. ;
  1915. finalization
  1916. cg.free;
  1917. {$ifndef cpu64bit}
  1918. cg64.free;
  1919. {$endif cpu64bit}
  1920. end.
  1921. {
  1922. $Log$
  1923. Revision 1.171 2004-09-26 17:45:30 peter
  1924. * simple regvar support, not yet finished
  1925. Revision 1.170 2004/09/25 14:23:54 peter
  1926. * ungetregister is now only used for cpuregisters, renamed to
  1927. ungetcpuregister
  1928. * renamed (get|unget)explicitregister(s) to ..cpuregister
  1929. * removed location-release/reference_release
  1930. Revision 1.169 2004/09/21 17:25:12 peter
  1931. * paraloc branch merged
  1932. Revision 1.168.4.4 2004/09/20 20:45:57 peter
  1933. * remove cg64.a_reg_alloc, it should not be used since it
  1934. create more register conflicts
  1935. Revision 1.168.4.3 2004/09/18 20:22:40 jonas
  1936. * allocate the volatile fpu registers around procedures that might use
  1937. them (e.g. FPCMOVE may use them)
  1938. Revision 1.168.4.2 2004/09/12 13:36:40 peter
  1939. * fixed alignment issues
  1940. Revision 1.168.4.1 2004/08/31 20:43:06 peter
  1941. * paraloc patch
  1942. Revision 1.168 2004/07/09 23:41:04 jonas
  1943. * support register parameters for inlined procedures + some inline
  1944. cleanups
  1945. Revision 1.167 2004/07/03 11:47:04 peter
  1946. * fix rangecheck error when assigning u32bit=s32bit
  1947. Revision 1.166 2004/06/20 08:55:28 florian
  1948. * logs truncated
  1949. Revision 1.165 2004/06/16 20:07:07 florian
  1950. * dwarf branch merged
  1951. Revision 1.164 2004/05/22 23:34:27 peter
  1952. tai_regalloc.allocation changed to ratype to notify rgobj of register size changes
  1953. Revision 1.163 2004/04/29 19:56:36 daniel
  1954. * Prepare compiler infrastructure for multiple ansistring types
  1955. Revision 1.162 2004/04/18 07:52:43 florian
  1956. * fixed web bug 3048: comparision of dyn. arrays
  1957. Revision 1.161.2.17 2004/06/13 10:51:16 florian
  1958. * fixed several register allocator problems (sparc/arm)
  1959. }