aoptcpu.pas 16 KB

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  1. {
  2. Copyright (c) 1998-2014 by the Free Pascal development team
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cpubase, aoptobj, aoptcpub, aopt, aasmtai,
  24. cgbase;
  25. Type
  26. TCpuAsmOptimizer = class(TAsmOptimizer)
  27. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function TryToOptimizeMove(var p: tai): boolean;
  30. { outputs a debug message into the assembler file }
  31. procedure DebugMsg(const s: string; p: tai);
  32. End;
  33. Implementation
  34. uses
  35. cutils, aasmcpu, cgutils, globals, verbose, cpuinfo, itcpugas;
  36. { Range check must be disabled explicitly as conversions between signed and unsigned
  37. 32-bit values are done without explicit typecasts }
  38. {$R-}
  39. function opname(var p: tai): string;
  40. begin
  41. result:=upcase(gas_op2str[taicpu(p).opcode]);
  42. end;
  43. function RefsEqual(const r1, r2: treference): boolean;
  44. begin
  45. RefsEqual :=
  46. (r1.offset = r2.offset) and
  47. (r1.base = r2.base) and
  48. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  49. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  50. (r1.relsymbol = r2.relsymbol);
  51. end;
  52. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
  53. begin
  54. result := oper1.typ = oper2.typ;
  55. if result then
  56. case oper1.typ of
  57. top_const:
  58. Result:=oper1.val = oper2.val;
  59. top_reg:
  60. Result:=oper1.reg = oper2.reg;
  61. top_ref:
  62. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  63. else
  64. internalerror(2016112401);
  65. end
  66. end;
  67. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  68. var
  69. p: taicpu;
  70. begin
  71. if not assigned(hp) or
  72. (hp.typ <> ait_instruction) then
  73. begin
  74. Result := false;
  75. exit;
  76. end;
  77. p := taicpu(hp);
  78. Result :=
  79. ((p.opcode in [A_MOVE,A_MOVEA,A_MVS,A_MVZ,A_MOVEQ,A_LEA]) and
  80. (p.oper[1]^.typ = top_reg) and
  81. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  82. ((p.oper[0]^.typ = top_const) or
  83. ((p.oper[0]^.typ = top_reg) and
  84. not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
  85. ((p.oper[0]^.typ = top_ref) and
  86. not RegInRef(reg,p.oper[0]^.ref^)))) or
  87. ((p.opcode = A_FMOVE) and
  88. (p.oper[1]^.typ = top_reg) and
  89. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  90. ((p.oper[0]^.typ = top_realconst) or
  91. ((p.oper[0]^.typ = top_reg) and
  92. not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
  93. ((p.opcode = A_MOVEM) and
  94. (p.oper[1]^.typ = top_regset) and
  95. ((getsupreg(reg) in p.oper[1]^.dataregset) or
  96. (getsupreg(reg) in p.oper[1]^.addrregset))) or
  97. ((p.opcode = A_FMOVEM) and
  98. (p.oper[1]^.typ = top_regset) and
  99. (getsupreg(reg) in p.oper[1]^.fpuregset));
  100. end;
  101. {$ifdef DEBUG_AOPTCPU}
  102. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
  103. begin
  104. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  105. end;
  106. {$else DEBUG_AOPTCPU}
  107. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
  108. begin
  109. end;
  110. {$endif DEBUG_AOPTCPU}
  111. function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
  112. var
  113. next, next2: tai;
  114. opstr: string[15];
  115. begin
  116. result:=false;
  117. if GetNextInstruction(p,next) and
  118. (next.typ = ait_instruction) and
  119. (taicpu(next).opcode = taicpu(p).opcode) and
  120. (taicpu(p).opsize = taicpu(next).opsize) and
  121. (taicpu(p).oper[1]^.typ = top_reg) and
  122. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
  123. begin
  124. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
  125. RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
  126. begin
  127. opstr:=opname(p);
  128. case taicpu(p).oper[0]^.typ of
  129. top_reg:
  130. begin
  131. { move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
  132. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  133. asml.remove(next);
  134. next.free;
  135. result:=true;
  136. { also remove leftover move %reg0, %reg0, which can occur as the result
  137. of the previous optimization, if %reg0 and %tmpreg was different types
  138. (addr vs. data), so these moves were left in by the cg }
  139. if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  140. begin
  141. DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
  142. GetNextInstruction(p,next);
  143. asml.remove(p);
  144. p.free;
  145. p:=next;
  146. end
  147. else
  148. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
  149. end;
  150. top_const:
  151. begin
  152. // DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
  153. end;
  154. top_ref:
  155. begin
  156. { move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
  157. { we only want to do this when <ea> is a reg or a simple reference }
  158. with taicpu(next).oper[1]^ do
  159. if (taicpu(next).opcode <> A_FMOVE) and
  160. ((typ = top_reg) or
  161. ((typ = top_ref) and
  162. ((ref^.index = NR_NO) or
  163. (ref^.base = NR_NO)) and
  164. (ref^.symbol = nil) and
  165. (ref^.offset = 0))) then
  166. begin
  167. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
  168. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  169. asml.remove(next);
  170. next.free;
  171. result:=true;
  172. end;
  173. end;
  174. end;
  175. end;
  176. exit;
  177. end;
  178. if GetNextInstruction(p,next) and
  179. (next.typ = ait_instruction) and
  180. GetNextInstruction(next,next2) and
  181. (next2.typ = ait_instruction) and
  182. (taicpu(next).opcode <> taicpu(p).opcode) and
  183. (taicpu(next2).opcode = taicpu(p).opcode) and
  184. (taicpu(p).oper[0]^.typ = top_reg) and
  185. (taicpu(p).oper[1]^.typ = top_reg) and
  186. (getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
  187. MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
  188. MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
  189. (taicpu(p).opsize = taicpu(next2).opsize) and
  190. ((taicpu(p).opcode = A_FMOVE) or
  191. (taicpu(p).opsize = taicpu(next).opsize)) then
  192. begin
  193. opstr:=opname(p);
  194. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
  195. not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
  196. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
  197. begin
  198. { move %reg0, %tmpreg
  199. op ???, %tmpreg
  200. move %tmpreg, %reg0
  201. to:
  202. op ???, %reg0 }
  203. if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
  204. begin
  205. {
  206. Disabled, because it breaks some tests... :( (KB)
  207. DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
  208. taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
  209. asml.remove(p);
  210. asml.remove(next2);
  211. p.free;
  212. next2.free;
  213. result:=true;
  214. }
  215. end;
  216. end;
  217. end;
  218. end;
  219. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  220. var
  221. next: tai;
  222. tmpref: treference;
  223. tmpsingle: single;
  224. begin
  225. result:=false;
  226. case p.typ of
  227. ait_instruction:
  228. begin
  229. //asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
  230. case taicpu(p).opcode of
  231. A_MOVE:
  232. result:=TryToOptimizeMove(p);
  233. { LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
  234. A_LEA:
  235. if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
  236. (((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
  237. (taicpu(p).oper[0]^.ref^.index = NR_NO)) or
  238. ((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
  239. (taicpu(p).oper[0]^.ref^.base = NR_NO))) and
  240. (taicpu(p).oper[0]^.ref^.offset = 0) then
  241. begin
  242. DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
  243. GetNextInstruction(p,next);
  244. asml.remove(p);
  245. p.free;
  246. p:=next;
  247. result:=true;
  248. end;
  249. { Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
  250. SmallInt range, which is shorter to encode and faster to execute on most 68k }
  251. A_SUB,A_SUBA,A_ADD,A_ADDA:
  252. if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
  253. (taicpu(p).oper[0]^.typ = top_const) then
  254. begin
  255. if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
  256. begin
  257. DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
  258. taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
  259. if taicpu(p).opcode in [A_ADD,A_ADDA] then
  260. taicpu(p).opcode:=A_ADDQ
  261. else
  262. taicpu(p).opcode:=A_SUBQ;
  263. result:=true;
  264. end
  265. else
  266. if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
  267. begin
  268. DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
  269. if taicpu(p).opcode in [A_SUB,A_SUBA] then
  270. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
  271. else
  272. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
  273. taicpu(p).opcode:=A_LEA;
  274. taicpu(p).loadref(0,tmpref);
  275. result:=true;
  276. end;
  277. end;
  278. { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
  279. A_MOVEA:
  280. if (taicpu(p).oper[0]^.typ = top_const) and
  281. (taicpu(p).oper[0]^.val = 0) then
  282. begin
  283. DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
  284. taicpu(p).opcode:=A_SUBA;
  285. taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
  286. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  287. result:=true;
  288. end;
  289. { CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
  290. A_CLR:
  291. if (current_settings.cputype in [cpu_mc68000]) and
  292. (taicpu(p).oper[0]^.typ = top_reg) and
  293. (taicpu(p).opsize = S_L) and
  294. isintregister(taicpu(p).oper[0]^.reg) then
  295. begin
  296. //DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
  297. taicpu(p).opcode:=A_MOVEQ;
  298. taicpu(p).loadoper(1,taicpu(p).oper[0]^);
  299. taicpu(p).loadconst(0,0);
  300. taicpu(p).ops:=2;
  301. result:=true;
  302. end;
  303. { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
  304. A_CMP,A_CMPI:
  305. if (taicpu(p).oper[0]^.typ = top_const) and
  306. (taicpu(p).oper[0]^.val = 0) then
  307. begin
  308. DebugMsg('Optimizer: CMP #0 to TST',p);
  309. taicpu(p).opcode:=A_TST;
  310. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  311. taicpu(p).clearop(1);
  312. taicpu(p).ops:=1;
  313. result:=true;
  314. end;
  315. A_FCMP:
  316. if (taicpu(p).oper[0]^.typ = top_realconst) then
  317. begin
  318. if (taicpu(p).oper[0]^.val_real = 0.0) then
  319. begin
  320. DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
  321. taicpu(p).opcode:=A_FTST;
  322. taicpu(p).opsize:=S_FX;
  323. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  324. taicpu(p).clearop(1);
  325. taicpu(p).ops:=1;
  326. result:=true;
  327. end
  328. else
  329. begin
  330. tmpsingle:=taicpu(p).oper[0]^.val_real;
  331. if (taicpu(p).opsize = S_FD) and
  332. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  333. begin
  334. DebugMsg('Optimizer: FCMP const to lesser precision',p);
  335. taicpu(p).opsize:=S_FS;
  336. result:=true;
  337. end;
  338. end;
  339. end;
  340. A_FMOVE,A_FMUL,A_FADD,A_FSUB,A_FDIV:
  341. begin
  342. if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
  343. begin
  344. result:=true;
  345. exit;
  346. end;
  347. if (taicpu(p).oper[0]^.typ = top_realconst) then
  348. begin
  349. tmpsingle:=taicpu(p).oper[0]^.val_real;
  350. if (taicpu(p).opsize = S_FD) and
  351. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  352. begin
  353. DebugMsg('Optimizer: FMOVE/FMUL/FADD/FSUB/FDIV const to lesser precision',p);
  354. taicpu(p).opsize:=S_FS;
  355. result:=true;
  356. end;
  357. end;
  358. end;
  359. end;
  360. end;
  361. end;
  362. end;
  363. begin
  364. casmoptimizer:=TCpuAsmOptimizer;
  365. end.