aoptcpu.pas 43 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode);
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result:=oper1.typ=oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op);
  83. end;
  84. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  85. begin
  86. result :=
  87. (instr.typ = ait_instruction) and
  88. (taicpu(instr).opcode in ops);
  89. end;
  90. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  91. begin
  92. result :=
  93. (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode in ops) and
  95. (taicpu(instr).ops=opcount);
  96. end;
  97. {$ifdef DEBUG_AOPTCPU}
  98. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  99. begin
  100. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  101. end;
  102. {$else DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  104. begin
  105. end;
  106. {$endif DEBUG_AOPTCPU}
  107. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  108. begin
  109. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  110. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  111. Result:=true
  112. else
  113. Result:=inherited RegInInstruction(Reg, p1);
  114. end;
  115. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  116. var Next: tai; reg: TRegister): Boolean;
  117. begin
  118. Next:=Current;
  119. repeat
  120. Result:=GetNextInstruction(Next,Next);
  121. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  122. (is_calljmp(taicpu(Next).opcode));
  123. end;
  124. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  125. var
  126. p: taicpu;
  127. begin
  128. if not assigned(hp) or
  129. (hp.typ <> ait_instruction) then
  130. begin
  131. Result := false;
  132. exit;
  133. end;
  134. p := taicpu(hp);
  135. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  136. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  137. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  138. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  139. end;
  140. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  141. var
  142. p: taicpu;
  143. i: longint;
  144. begin
  145. Result := false;
  146. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  147. exit;
  148. p:=taicpu(hp);
  149. i:=0;
  150. { we do not care about the stack pointer }
  151. if p.opcode in [A_POP] then
  152. exit;
  153. { first operand only written?
  154. then skip it }
  155. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  156. i:=1;
  157. while i<p.ops do
  158. begin
  159. case p.oper[i]^.typ of
  160. top_reg:
  161. Result := (p.oper[i]^.reg = reg) or
  162. { MOVW }
  163. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  164. top_ref:
  165. Result :=
  166. (p.oper[i]^.ref^.base = reg) or
  167. (p.oper[i]^.ref^.index = reg);
  168. end;
  169. { Bailout if we found something }
  170. if Result then
  171. exit;
  172. Inc(i);
  173. end;
  174. end;
  175. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  176. var
  177. hp1,hp2,hp3,hp4,hp5: tai;
  178. alloc, dealloc: tai_regalloc;
  179. i: integer;
  180. l: TAsmLabel;
  181. TmpUsedRegs : TAllUsedRegs;
  182. begin
  183. result := false;
  184. case p.typ of
  185. ait_instruction:
  186. begin
  187. {
  188. change
  189. <op> reg,x,y
  190. cp reg,r1
  191. into
  192. <op>s reg,x,y
  193. }
  194. { this optimization can applied only to the currently enabled operations because
  195. the other operations do not update all flags and FPC does not track flag usage }
  196. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  197. A_INC,A_LSL,A_LSR,
  198. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  199. GetNextInstruction(p, hp1) and
  200. ((MatchInstruction(hp1, A_CP) and
  201. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  202. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  203. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  204. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  205. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  206. A_LSL,A_LSR,
  207. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  208. (MatchInstruction(hp1, A_CPI) and
  209. (taicpu(p).opcode = A_ANDI) and
  210. (taicpu(p).oper[1]^.typ=top_const) and
  211. (taicpu(hp1).oper[1]^.typ=top_const) and
  212. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  213. GetNextInstruction(hp1, hp2) and
  214. { be careful here, following instructions could use other flags
  215. however after a jump fpc never depends on the value of flags }
  216. { All above instructions set Z and N according to the following
  217. Z := result = 0;
  218. N := result[31];
  219. EQ = Z=1; NE = Z=0;
  220. MI = N=1; PL = N=0; }
  221. MatchInstruction(hp2, A_BRxx) and
  222. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  223. { sub/sbc set all flags }
  224. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  225. no flag allocation tracking implemented yet on avr
  226. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  227. begin
  228. { move flag allocation if possible }
  229. { no flag allocation tracking implemented yet on avr
  230. GetLastInstruction(hp1, hp2);
  231. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  232. if assigned(hp2) then
  233. begin
  234. asml.Remove(hp2);
  235. asml.insertbefore(hp2, p);
  236. end;
  237. }
  238. // If we compare to the same value we are masking then invert the comparison
  239. if (taicpu(hp1).opcode=A_CPI) or
  240. { sub/sbc with reverted? }
  241. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  242. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  243. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  244. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  245. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  246. DebugMsg('Peephole OpCp2Op performed', p);
  247. asml.remove(hp1);
  248. hp1.free;
  249. Result:=true;
  250. end
  251. else
  252. case taicpu(p).opcode of
  253. A_LDI:
  254. begin
  255. { turn
  256. ldi reg0, imm
  257. cp/mov reg1, reg0
  258. dealloc reg0
  259. into
  260. cpi/ldi reg1, imm
  261. }
  262. if MatchOpType(taicpu(p),top_reg,top_const) and
  263. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  264. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  265. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  266. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  267. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  268. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  269. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  270. begin
  271. CopyUsedRegs(TmpUsedRegs);
  272. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  273. begin
  274. case taicpu(hp1).opcode of
  275. A_CP:
  276. taicpu(hp1).opcode:=A_CPI;
  277. A_MOV:
  278. taicpu(hp1).opcode:=A_LDI;
  279. else
  280. internalerror(2016111901);
  281. end;
  282. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  283. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  284. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  285. if assigned(alloc) and assigned(dealloc) then
  286. begin
  287. asml.Remove(alloc);
  288. alloc.Free;
  289. asml.Remove(dealloc);
  290. dealloc.Free;
  291. end;
  292. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  293. GetNextInstruction(p,hp1);
  294. asml.Remove(p);
  295. p.Free;
  296. p:=hp1;
  297. end;
  298. ReleaseUsedRegs(TmpUsedRegs);
  299. end;
  300. end;
  301. A_STS:
  302. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  303. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  304. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  305. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  306. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  307. (taicpu(p).oper[0]^.ref^.offset>=32) and
  308. (taicpu(p).oper[0]^.ref^.offset<=95) then
  309. begin
  310. DebugMsg('Peephole Sts2Out performed', p);
  311. taicpu(p).opcode:=A_OUT;
  312. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  313. end;
  314. A_LDS:
  315. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  316. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  317. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  318. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  319. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  320. (taicpu(p).oper[1]^.ref^.offset>=32) and
  321. (taicpu(p).oper[1]^.ref^.offset<=95) then
  322. begin
  323. DebugMsg('Peephole Lds2In performed', p);
  324. taicpu(p).opcode:=A_IN;
  325. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  326. end;
  327. A_IN:
  328. if GetNextInstruction(p,hp1) then
  329. begin
  330. {
  331. in rX,Y
  332. ori rX,n
  333. out Y,rX
  334. into
  335. sbi rX,lg(n)
  336. }
  337. if (taicpu(p).oper[1]^.val<=31) and
  338. MatchInstruction(hp1,A_ORI) and
  339. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  340. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  341. GetNextInstruction(hp1,hp2) and
  342. MatchInstruction(hp2,A_OUT) and
  343. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  344. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  345. begin
  346. DebugMsg('Peephole InOriOut2Sbi performed', p);
  347. taicpu(p).opcode:=A_SBI;
  348. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  349. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  350. asml.Remove(hp1);
  351. hp1.Free;
  352. asml.Remove(hp2);
  353. hp2.Free;
  354. result:=true;
  355. end
  356. {
  357. in rX,Y
  358. andi rX,not(n)
  359. out Y,rX
  360. into
  361. cbi rX,lg(n)
  362. }
  363. else if (taicpu(p).oper[1]^.val<=31) and
  364. MatchInstruction(hp1,A_ANDI) and
  365. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  366. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  367. GetNextInstruction(hp1,hp2) and
  368. MatchInstruction(hp2,A_OUT) and
  369. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  370. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  371. begin
  372. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  373. taicpu(p).opcode:=A_CBI;
  374. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  375. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  376. asml.Remove(hp1);
  377. hp1.Free;
  378. asml.Remove(hp2);
  379. hp2.Free;
  380. result:=true;
  381. end
  382. {
  383. in rX,Y
  384. andi rX,n
  385. breq/brne L1
  386. into
  387. sbis/sbic Y,lg(n)
  388. jmp L1
  389. .Ltemp:
  390. }
  391. else if (taicpu(p).oper[1]^.val<=31) and
  392. MatchInstruction(hp1,A_ANDI) and
  393. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  394. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  395. GetNextInstruction(hp1,hp2) and
  396. MatchInstruction(hp2,A_BRxx) and
  397. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  398. begin
  399. if taicpu(hp2).condition=C_EQ then
  400. taicpu(p).opcode:=A_SBIS
  401. else
  402. taicpu(p).opcode:=A_SBIC;
  403. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  404. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  405. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  406. asml.Remove(hp1);
  407. hp1.Free;
  408. taicpu(hp2).condition:=C_None;
  409. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  410. taicpu(hp2).opcode:=A_JMP
  411. else
  412. taicpu(hp2).opcode:=A_RJMP;
  413. current_asmdata.getjumplabel(l);
  414. l.increfs;
  415. asml.InsertAfter(tai_label.create(l), hp2);
  416. result:=true;
  417. end;
  418. end;
  419. A_ANDI:
  420. begin
  421. {
  422. Turn
  423. andi rx, #pow2
  424. brne l
  425. <op>
  426. l:
  427. Into
  428. sbrs rx, #(1 shl imm)
  429. <op>
  430. l:
  431. }
  432. if (taicpu(p).ops=2) and
  433. (taicpu(p).oper[1]^.typ=top_const) and
  434. ispowerof2(taicpu(p).oper[1]^.val,i) and
  435. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  436. GetNextInstruction(p,hp1) and
  437. (hp1.typ=ait_instruction) and
  438. (taicpu(hp1).opcode=A_BRxx) and
  439. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  440. (taicpu(hp1).ops>0) and
  441. (taicpu(hp1).oper[0]^.typ = top_ref) and
  442. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  443. GetNextInstruction(hp1,hp2) and
  444. (hp2.typ=ait_instruction) and
  445. GetNextInstruction(hp2,hp3) and
  446. (hp3.typ=ait_label) and
  447. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  448. begin
  449. DebugMsg('Peephole AndiBr2Sbr performed', p);
  450. taicpu(p).oper[1]^.val:=i;
  451. if taicpu(hp1).condition=C_NE then
  452. taicpu(p).opcode:=A_SBRS
  453. else
  454. taicpu(p).opcode:=A_SBRC;
  455. asml.Remove(hp1);
  456. hp1.free;
  457. result:=true;
  458. end
  459. {
  460. Remove
  461. andi rx, #y
  462. dealloc rx
  463. }
  464. else if (taicpu(p).ops=2) and
  465. (taicpu(p).oper[0]^.typ=top_reg) and
  466. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  467. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  468. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  469. begin
  470. DebugMsg('Redundant Andi removed', p);
  471. GetNextInstruction(p,hp1);
  472. AsmL.Remove(p);
  473. p.free;
  474. p:=hp1;
  475. result:=true;
  476. end;
  477. end;
  478. A_ADD:
  479. begin
  480. if (taicpu(p).oper[1]^.reg=NR_R1) and
  481. GetNextInstruction(p, hp1) and
  482. MatchInstruction(hp1,A_ADC) then
  483. begin
  484. DebugMsg('Peephole AddAdc2Add performed', p);
  485. taicpu(hp1).opcode:=A_ADD;
  486. asml.Remove(p);
  487. p.Free;
  488. p:=hp1;
  489. result:=true;
  490. end;
  491. end;
  492. A_SUB:
  493. begin
  494. if (taicpu(p).oper[1]^.reg=NR_R1) and
  495. GetNextInstruction(p, hp1) and
  496. MatchInstruction(hp1,A_SBC) then
  497. begin
  498. DebugMsg('Peephole SubSbc2Sub performed', p);
  499. taicpu(hp1).opcode:=A_SUB;
  500. asml.Remove(p);
  501. p.Free;
  502. p:=hp1;
  503. result:=true;
  504. end;
  505. end;
  506. A_CLR:
  507. begin
  508. { turn the common
  509. clr rX
  510. mov/ld rX, rY
  511. into
  512. mov/ld rX, rY
  513. }
  514. if (taicpu(p).ops=1) and
  515. (taicpu(p).oper[0]^.typ=top_reg) and
  516. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  517. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  518. (hp1.typ=ait_instruction) and
  519. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  520. (taicpu(hp1).ops>0) and
  521. (taicpu(hp1).oper[0]^.typ=top_reg) and
  522. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  523. begin
  524. DebugMsg('Peephole ClrMov2Mov performed', p);
  525. asml.Remove(p);
  526. p.Free;
  527. p:=hp1;
  528. result:=true;
  529. end
  530. { turn
  531. clr rX
  532. ...
  533. adc rY, rX
  534. into
  535. ...
  536. adc rY, r1
  537. }
  538. else if (taicpu(p).ops=1) and
  539. (taicpu(p).oper[0]^.typ=top_reg) and
  540. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  541. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  542. (hp1.typ=ait_instruction) and
  543. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  544. (taicpu(hp1).ops=2) and
  545. (taicpu(hp1).oper[1]^.typ=top_reg) and
  546. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  547. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  548. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  549. begin
  550. DebugMsg('Peephole ClrAdc2Adc performed', p);
  551. taicpu(hp1).oper[1]^.reg:=NR_R1;
  552. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  553. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  554. if assigned(alloc) and assigned(dealloc) then
  555. begin
  556. asml.Remove(alloc);
  557. alloc.Free;
  558. asml.Remove(dealloc);
  559. dealloc.Free;
  560. end;
  561. GetNextInstruction(p,hp1);
  562. asml.Remove(p);
  563. p.free;
  564. p:=hp1;
  565. result:=true;
  566. end;
  567. end;
  568. A_PUSH:
  569. begin
  570. { turn
  571. push reg0
  572. push reg1
  573. pop reg3
  574. pop reg2
  575. into
  576. movw reg2,reg0
  577. or
  578. mov reg3,reg1
  579. mov reg2,reg0
  580. }
  581. if GetNextInstruction(p,hp1) and
  582. MatchInstruction(hp1,A_PUSH) and
  583. GetNextInstruction(hp1,hp2) and
  584. MatchInstruction(hp2,A_POP) and
  585. GetNextInstruction(hp2,hp3) and
  586. MatchInstruction(hp3,A_POP) then
  587. begin
  588. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  589. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  590. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  591. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  592. begin
  593. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  594. taicpu(p).ops:=2;
  595. taicpu(p).opcode:=A_MOVW;
  596. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  597. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  598. asml.Remove(hp1);
  599. hp1.Free;
  600. asml.Remove(hp2);
  601. hp2.Free;
  602. asml.Remove(hp3);
  603. hp3.Free;
  604. result:=true;
  605. end
  606. else
  607. begin
  608. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  609. taicpu(p).ops:=2;
  610. taicpu(p).opcode:=A_MOV;
  611. taicpu(hp1).ops:=2;
  612. taicpu(hp1).opcode:=A_MOV;
  613. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  614. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  615. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  616. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  617. asml.Remove(hp2);
  618. hp2.Free;
  619. asml.Remove(hp3);
  620. hp3.Free;
  621. result:=true;
  622. end
  623. end;
  624. end;
  625. A_CALL:
  626. if (cs_opt_level4 in current_settings.optimizerswitches) and
  627. GetNextInstruction(p,hp1) and
  628. MatchInstruction(hp1,A_RET) then
  629. begin
  630. DebugMsg('Peephole CallReg2Jmp performed', p);
  631. taicpu(p).opcode:=A_JMP;
  632. asml.Remove(hp1);
  633. hp1.Free;
  634. result:=true;
  635. end;
  636. A_RCALL:
  637. if (cs_opt_level4 in current_settings.optimizerswitches) and
  638. GetNextInstruction(p,hp1) and
  639. MatchInstruction(hp1,A_RET) then
  640. begin
  641. DebugMsg('Peephole RCallReg2RJmp performed', p);
  642. taicpu(p).opcode:=A_RJMP;
  643. asml.Remove(hp1);
  644. hp1.Free;
  645. result:=true;
  646. end;
  647. A_MOV:
  648. begin
  649. { turn
  650. mov reg0, reg1
  651. <op> reg2,reg0
  652. dealloc reg0
  653. into
  654. <op> reg2,reg1
  655. }
  656. if MatchOpType(taicpu(p),top_reg,top_reg) and
  657. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  658. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  659. MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  660. A_STD,A_ST,
  661. A_OUT,A_IN]) and
  662. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  663. {(taicpu(hp1).ops=1) and
  664. (taicpu(hp1).oper[0]^.typ = top_reg) and
  665. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  666. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  667. begin
  668. DebugMsg('Peephole MovOp2Op performed', p);
  669. for i := 0 to taicpu(hp1).ops-1 do
  670. if taicpu(hp1).oper[i]^.typ=top_reg then
  671. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  672. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  673. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  674. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  675. if assigned(alloc) and assigned(dealloc) then
  676. begin
  677. asml.Remove(alloc);
  678. alloc.Free;
  679. asml.Remove(dealloc);
  680. dealloc.Free;
  681. end;
  682. GetNextInstruction(p,hp1);
  683. asml.Remove(p);
  684. p.free;
  685. p:=hp1;
  686. result:=true;
  687. end
  688. { remove
  689. mov reg0,reg0
  690. }
  691. else if (taicpu(p).ops=2) and
  692. (taicpu(p).oper[0]^.typ = top_reg) and
  693. (taicpu(p).oper[1]^.typ = top_reg) and
  694. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  695. begin
  696. DebugMsg('Peephole RedundantMov performed', p);
  697. GetNextInstruction(p,hp1);
  698. asml.remove(p);
  699. p.free;
  700. p:=hp1;
  701. result:=true;
  702. end
  703. {
  704. Turn
  705. mov rx,ry
  706. op rx,rz
  707. mov ry, rx
  708. Into
  709. op ry,rz
  710. }
  711. else if (taicpu(p).ops=2) and
  712. MatchOpType(taicpu(p),top_reg,top_reg) and
  713. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  714. (hp1.typ=ait_instruction) and
  715. (taicpu(hp1).ops >= 1) and
  716. (taicpu(hp1).oper[0]^.typ = top_reg) and
  717. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  718. MatchInstruction(hp2,A_MOV) and
  719. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  720. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  721. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  722. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  723. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  724. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  725. A_INC,A_DEC,
  726. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  727. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  728. begin
  729. DebugMsg('Peephole MovOpMov2Op performed', p);
  730. if (taicpu(hp1).ops=2) and
  731. (taicpu(hp1).oper[1]^.typ=top_reg) and
  732. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  733. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  734. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  735. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  736. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  737. if assigned(alloc) and assigned(dealloc) then
  738. begin
  739. asml.Remove(alloc);
  740. alloc.Free;
  741. asml.Remove(dealloc);
  742. dealloc.Free;
  743. end;
  744. GetNextInstruction(p,hp1);
  745. asml.remove(p);
  746. p.free;
  747. asml.remove(hp2);
  748. hp2.free;
  749. p:=hp1;
  750. result:=true;
  751. end
  752. {
  753. Turn
  754. mov rx,ry
  755. op rx,rw
  756. mov rw,rx
  757. Into
  758. op rw,ry
  759. }
  760. else if (taicpu(p).ops=2) and
  761. MatchOpType(taicpu(p),top_reg,top_reg) and
  762. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  763. (hp1.typ=ait_instruction) and
  764. (taicpu(hp1).ops = 2) and
  765. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  766. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  767. (hp2.typ=ait_instruction) and
  768. (taicpu(hp2).opcode=A_MOV) and
  769. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  770. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  771. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  772. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  773. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  774. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  775. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  776. begin
  777. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  778. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  779. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  780. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  781. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  782. if assigned(alloc) and assigned(dealloc) then
  783. begin
  784. asml.Remove(alloc);
  785. alloc.Free;
  786. asml.Remove(dealloc);
  787. dealloc.Free;
  788. end;
  789. GetNextInstruction(p,hp1);
  790. asml.remove(p);
  791. p.free;
  792. asml.remove(hp2);
  793. hp2.free;
  794. p:=hp1;
  795. result:=true;
  796. end
  797. { fold
  798. mov reg2,reg0
  799. mov reg3,reg1
  800. to
  801. movw reg2,reg0
  802. }
  803. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  804. (taicpu(p).ops=2) and
  805. (taicpu(p).oper[0]^.typ = top_reg) and
  806. (taicpu(p).oper[1]^.typ = top_reg) and
  807. getnextinstruction(p,hp1) and
  808. (hp1.typ = ait_instruction) and
  809. (taicpu(hp1).opcode = A_MOV) and
  810. (taicpu(hp1).ops=2) and
  811. (taicpu(hp1).oper[0]^.typ = top_reg) and
  812. (taicpu(hp1).oper[1]^.typ = top_reg) and
  813. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  814. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  815. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  816. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  817. begin
  818. DebugMsg('Peephole MovMov2Movw performed', p);
  819. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  820. if assigned(alloc) then
  821. begin
  822. asml.Remove(alloc);
  823. asml.InsertBefore(alloc,p);
  824. end;
  825. taicpu(p).opcode:=A_MOVW;
  826. asml.remove(hp1);
  827. hp1.free;
  828. result:=true;
  829. end
  830. {
  831. This removes the first mov from
  832. mov rX,...
  833. mov rX,...
  834. }
  835. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  836. while MatchInstruction(hp1,A_MOV) and
  837. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  838. { don't remove the first mov if the second is a mov rX,rX }
  839. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  840. begin
  841. DebugMsg('Peephole MovMov2Mov performed', p);
  842. asml.remove(p);
  843. p.free;
  844. p:=hp1;
  845. GetNextInstruction(hp1,hp1);
  846. result:=true;
  847. if not assigned(hp1) then
  848. break;
  849. end;
  850. end;
  851. A_SBIC,
  852. A_SBIS:
  853. begin
  854. {
  855. Turn
  856. sbic/sbis X, y
  857. jmp .L1
  858. op
  859. .L1:
  860. into
  861. sbis/sbic X,y
  862. op
  863. .L1:
  864. }
  865. if GetNextInstruction(p, hp1) and
  866. (hp1.typ=ait_instruction) and
  867. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  868. (taicpu(hp1).ops>0) and
  869. (taicpu(hp1).oper[0]^.typ = top_ref) and
  870. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  871. GetNextInstruction(hp1, hp2) and
  872. (hp2.typ=ait_instruction) and
  873. (not taicpu(hp2).is_jmp) and
  874. GetNextInstruction(hp2, hp3) and
  875. (hp3.typ=ait_label) and
  876. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  877. begin
  878. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  879. if taicpu(p).opcode=A_SBIC then
  880. taicpu(p).opcode:=A_SBIS
  881. else
  882. taicpu(p).opcode:=A_SBIC;
  883. tai_label(hp3).labsym.decrefs;
  884. AsmL.remove(hp1);
  885. taicpu(hp1).Free;
  886. result:=true;
  887. end
  888. {
  889. Turn
  890. sbiX X, y
  891. jmp .L1
  892. jmp .L2
  893. .L1:
  894. op
  895. .L2:
  896. into
  897. sbiX X,y
  898. .L1:
  899. op
  900. .L2:
  901. }
  902. else if GetNextInstruction(p, hp1) and
  903. (hp1.typ=ait_instruction) and
  904. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  905. (taicpu(hp1).ops>0) and
  906. (taicpu(hp1).oper[0]^.typ = top_ref) and
  907. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  908. GetNextInstruction(hp1, hp2) and
  909. (hp2.typ=ait_instruction) and
  910. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  911. (taicpu(hp2).ops>0) and
  912. (taicpu(hp2).oper[0]^.typ = top_ref) and
  913. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  914. GetNextInstruction(hp2, hp3) and
  915. (hp3.typ=ait_label) and
  916. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  917. GetNextInstruction(hp3, hp4) and
  918. (hp4.typ=ait_instruction) and
  919. GetNextInstruction(hp4, hp5) and
  920. (hp3.typ=ait_label) and
  921. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  922. begin
  923. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  924. tai_label(hp3).labsym.decrefs;
  925. tai_label(hp5).labsym.decrefs;
  926. AsmL.remove(hp1);
  927. taicpu(hp1).Free;
  928. AsmL.remove(hp2);
  929. taicpu(hp2).Free;
  930. result:=true;
  931. end;
  932. end;
  933. end;
  934. end;
  935. end;
  936. end;
  937. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  938. begin
  939. end;
  940. begin
  941. casmoptimizer:=TCpuAsmOptimizer;
  942. End.