daopt386.pas 86 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Jonas Maebe, member of the Freepascal
  4. development team
  5. This unit contains the data flow analyzer and several helper procedures
  6. and functions.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. Unit DAOpt386;
  21. {$i defines.inc}
  22. Interface
  23. Uses
  24. GlobType,
  25. CObjects,Aasm,
  26. cpubase,cpuasm;
  27. {******************************* Constants *******************************}
  28. Const
  29. {Possible register content types}
  30. con_Unknown = 0;
  31. con_ref = 1;
  32. con_const = 2;
  33. { The contents aren't usable anymore for CSE, but they may still be }
  34. { usefull for detecting whether the result of a load is actually used }
  35. con_invalid = 3;
  36. { the reverse of the above (in case a (conditional) jump is encountered): }
  37. { CSE is still possible, but the original instruction can't be removed }
  38. con_noRemoveRef = 4;
  39. { same, but for constants }
  40. con_noRemoveConst = 5;
  41. {********************************* Types *********************************}
  42. type
  43. TRegArray = Array[R_EAX..R_BL] of TRegister;
  44. TRegSet = Set of R_EAX..R_BL;
  45. TRegInfo = Record
  46. NewRegsEncountered, OldRegsEncountered: TRegSet;
  47. RegsLoadedForRef: TRegSet;
  48. regsStillUsedAfterSeq: TRegSet;
  49. lastReload: array[R_EAX..R_EDI] of pai;
  50. New2OldReg: TRegArray;
  51. End;
  52. {possible actions on an operand: read, write or modify (= read & write)}
  53. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  54. {the possible states of a flag}
  55. TFlagContents = (F_Unknown, F_NotSet, F_Set);
  56. TContent = Packed Record
  57. {start and end of block instructions that defines the
  58. content of this register.}
  59. StartMod: pai;
  60. {how many instructions starting with StarMod does the block consist of}
  61. NrOfMods: Byte;
  62. {the type of the content of the register: unknown, memory, constant}
  63. Typ: Byte;
  64. case byte of
  65. {starts at 0, gets increased everytime the register is written to}
  66. 1: (WState: Byte;
  67. {starts at 0, gets increased everytime the register is read from}
  68. RState: Byte);
  69. { to compare both states in one operation }
  70. 2: (state: word);
  71. End;
  72. {Contents of the integer registers}
  73. TRegContent = Array[R_EAX..R_EDI] Of TContent;
  74. {contents of the FPU registers}
  75. TRegFPUContent = Array[R_ST..R_ST7] Of TContent;
  76. {$ifdef tempOpts}
  77. { linked list which allows searching/deleting based on value, no extra frills}
  78. PSearchLinkedListItem = ^TSearchLinkedListItem;
  79. TSearchLinkedListItem = object(TLinkedList_Item)
  80. constructor init;
  81. function equals(p: PSearchLinkedListItem): boolean; virtual;
  82. end;
  83. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  84. TSearchDoubleIntItem = object(TLinkedList_Item)
  85. constructor init(_int1,_int2: longint);
  86. function equals(p: PSearchLinkedListItem): boolean; virtual;
  87. private
  88. int1, int2: longint;
  89. end;
  90. PSearchLinkedList = ^TSearchLinkedList;
  91. TSearchLinkedList = object(TLinkedList)
  92. function searchByValue(p: PSearchLinkedListItem): boolean;
  93. procedure removeByValue(p: PSearchLinkedListItem);
  94. end;
  95. {$endif tempOpts}
  96. {information record with the contents of every register. Every Pai object
  97. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  98. TPaiProp = Record
  99. Regs: TRegContent;
  100. { FPURegs: TRegFPUContent;} {currently not yet used}
  101. { allocated Registers }
  102. UsedRegs: TRegSet;
  103. { status of the direction flag }
  104. DirFlag: TFlagContents;
  105. {$ifdef tempOpts}
  106. { currently used temps }
  107. tempAllocs: PSearchLinkedList;
  108. {$endif tempOpts}
  109. { can this instruction be removed? }
  110. CanBeRemoved: Boolean;
  111. End;
  112. PPaiProp = ^TPaiProp;
  113. TPaiPropBlock = Array[1..250000] Of TPaiProp;
  114. PPaiPropBlock = ^TPaiPropBlock;
  115. TInstrSinceLastMod = Array[R_EAX..R_EDI] Of Byte;
  116. TLabelTableItem = Record
  117. PaiObj: Pai;
  118. {$IfDef JumpAnal}
  119. InstrNr: Longint;
  120. RefsFound: Word;
  121. JmpsProcessed: Word
  122. {$EndIf JumpAnal}
  123. End;
  124. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  125. PLabelTable = ^TLabelTable;
  126. {*********************** Procedures and Functions ************************}
  127. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  128. Function Reg32(Reg: TRegister): TRegister;
  129. Function RefsEquivalent(Const R1, R2: TReference; Var RegInfo: TRegInfo; OpAct: TOpAction): Boolean;
  130. Function RefsEqual(Const R1, R2: TReference): Boolean;
  131. Function IsGP32Reg(Reg: TRegister): Boolean;
  132. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  133. function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
  134. function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  135. function RegInInstruction(Reg: TRegister; p1: Pai): Boolean;
  136. function RegInOp(Reg: TRegister; const o:toper): Boolean;
  137. function writeToMemDestroysContents(regWritten: tregister; const ref: treference;
  138. reg: tregister; const c: tcontent): boolean;
  139. function writeDestroysContents(const op: toper; reg: tregister;
  140. const c: tcontent): boolean;
  141. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  142. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  143. Procedure SkipHead(var P: Pai);
  144. function labelCanBeSkipped(p: pai_label): boolean;
  145. Procedure RemoveLastDeallocForFuncRes(asmL: PAasmOutput; p: pai);
  146. Function regLoadedWithNewValue(reg: tregister; canDependOnPrevValue: boolean;
  147. hp: pai): boolean;
  148. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  149. Procedure AllocRegBetween(AsmL: PAasmOutput; Reg: TRegister; p1, p2: Pai);
  150. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo; OpAct: TopAction): Boolean;
  151. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  152. Function OpsEqual(const o1,o2:toper): Boolean;
  153. Function DFAPass1(AsmL: PAasmOutput; BlockStart: Pai): Pai;
  154. Function DFAPass2(
  155. {$ifdef statedebug}
  156. AsmL: PAasmOutPut;
  157. {$endif statedebug}
  158. BlockStart, BlockEnd: Pai): Boolean;
  159. Procedure ShutDownDFA;
  160. Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
  161. Procedure IncState(Var S: Byte; amount: longint);
  162. {******************************* Variables *******************************}
  163. Var
  164. {the amount of PaiObjects in the current assembler list}
  165. NrOfPaiObjs: Longint;
  166. {Array which holds all TPaiProps}
  167. PaiPropBlock: PPaiPropBlock;
  168. LoLab, HiLab, LabDif: Longint;
  169. LTable: PLabelTable;
  170. {*********************** End of Interface section ************************}
  171. Implementation
  172. Uses
  173. globals, systems, verbose, hcodegen, symconst, tgeni386;
  174. Type
  175. TRefCompare = function(const r1, r2: TReference): Boolean;
  176. Var
  177. {How many instructions are between the current instruction and the last one
  178. that modified the register}
  179. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  180. {$ifdef tempOpts}
  181. constructor TSearchLinkedListItem.init;
  182. begin
  183. end;
  184. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  185. begin
  186. equals := false;
  187. end;
  188. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  189. begin
  190. int1 := _int1;
  191. int2 := _int2;
  192. end;
  193. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  194. begin
  195. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  196. (TSearchDoubleIntItem(p).int2 = int2);
  197. end;
  198. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  199. var temp: PSearchLinkedListItem;
  200. begin
  201. temp := first;
  202. while (temp <> last^.next) and
  203. not(temp^.equals(p)) do
  204. temp := temp^.next;
  205. searchByValue := temp <> last^.next;
  206. end;
  207. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  208. begin
  209. temp := first;
  210. while (temp <> last^.next) and
  211. not(temp^.equals(p)) do
  212. temp := temp^.next;
  213. if temp <> last^.next then
  214. begin
  215. remove(temp);
  216. dispose(temp,done);
  217. end;
  218. end;
  219. Procedure updateTempAllocs(Var UsedRegs: TRegSet; p: Pai);
  220. {updates UsedRegs with the RegAlloc Information coming after P}
  221. Begin
  222. Repeat
  223. While Assigned(p) And
  224. ((p^.typ in (SkipInstr - [ait_RegAlloc])) or
  225. ((p^.typ = ait_label) And
  226. labelCanBeSkipped(pai_label(current)))) Do
  227. p := Pai(p^.next);
  228. While Assigned(p) And
  229. (p^.typ=ait_RegAlloc) Do
  230. Begin
  231. if pairegalloc(p)^.allocation then
  232. UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg]
  233. else
  234. UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  235. p := pai(p^.next);
  236. End;
  237. Until Not(Assigned(p)) Or
  238. (Not(p^.typ in SkipInstr) And
  239. Not((p^.typ = ait_label) And
  240. labelCanBeSkipped(pai_label(current))));
  241. End;
  242. {$endif tempOpts}
  243. {************************ Create the Label table ************************}
  244. Function FindLoHiLabels(Var LowLabel, HighLabel, LabelDif: Longint; BlockStart: Pai): Pai;
  245. {Walks through the paasmlist to find the lowest and highest label number}
  246. Var LabelFound: Boolean;
  247. P, lastP: Pai;
  248. Begin
  249. LabelFound := False;
  250. LowLabel := MaxLongint;
  251. HighLabel := 0;
  252. P := BlockStart;
  253. lastP := p;
  254. While Assigned(P) Do
  255. Begin
  256. If (Pai(p)^.typ = ait_label) Then
  257. If not labelCanBeSkipped(pai_label(p))
  258. Then
  259. Begin
  260. LabelFound := True;
  261. If (Pai_Label(p)^.l^.labelnr < LowLabel) Then
  262. LowLabel := Pai_Label(p)^.l^.labelnr;
  263. If (Pai_Label(p)^.l^.labelnr > HighLabel) Then
  264. HighLabel := Pai_Label(p)^.l^.labelnr;
  265. End;
  266. lastP := p;
  267. GetNextInstruction(p, p);
  268. End;
  269. if (lastP^.typ = ait_marker) and
  270. (pai_marker(lastP)^.kind = asmBlockStart) then
  271. FindLoHiLabels := lastP
  272. else FindLoHiLabels := nil;
  273. If LabelFound
  274. Then LabelDif := HighLabel+1-LowLabel
  275. Else LabelDif := 0;
  276. End;
  277. Function FindRegAlloc(Reg: TRegister; StartPai: Pai; alloc: boolean): Boolean;
  278. { Returns true if a ait_alloc object for Reg is found in the block of Pai's }
  279. { starting with StartPai and ending with the next "real" instruction }
  280. Begin
  281. FindRegAlloc := false;
  282. Repeat
  283. While Assigned(StartPai) And
  284. ((StartPai^.typ in (SkipInstr - [ait_regAlloc])) Or
  285. ((StartPai^.typ = ait_label) and
  286. labelCanBeSkipped(pai_label(startPai)))) Do
  287. StartPai := Pai(StartPai^.Next);
  288. If Assigned(StartPai) and
  289. (StartPai^.typ = ait_regAlloc) then
  290. begin
  291. if (PairegAlloc(StartPai)^.allocation = alloc) and
  292. (PairegAlloc(StartPai)^.Reg = Reg) then
  293. begin
  294. FindRegAlloc:=true;
  295. break;
  296. end;
  297. StartPai := Pai(StartPai^.Next);
  298. end
  299. else
  300. break;
  301. Until false;
  302. End;
  303. Procedure RemoveLastDeallocForFuncRes(asmL: PAasmOutput; p: pai);
  304. Procedure DoRemoveLastDeallocForFuncRes(asmL: PAasmOutput; reg: TRegister);
  305. var
  306. hp2: pai;
  307. begin
  308. hp2 := p;
  309. repeat
  310. hp2 := pai(hp2^.previous);
  311. if assigned(hp2) and
  312. (hp2^.typ = ait_regalloc) and
  313. not(pairegalloc(hp2)^.allocation) and
  314. (pairegalloc(hp2)^.reg = reg) then
  315. begin
  316. asml^.remove(hp2);
  317. dispose(hp2,done);
  318. break;
  319. end;
  320. until not(assigned(hp2)) or
  321. regInInstruction(reg,hp2);
  322. end;
  323. begin
  324. if assigned(procinfo^.returntype.def) then
  325. case procinfo^.returntype.def^.deftype of
  326. arraydef,recorddef,pointerdef,
  327. stringdef,enumdef,procdef,objectdef,errordef,
  328. filedef,setdef,procvardef,
  329. classrefdef,forwarddef:
  330. DoRemoveLastDeallocForFuncRes(asmL,R_EAX);
  331. orddef:
  332. if procinfo^.returntype.def^.size <> 0 then
  333. begin
  334. DoRemoveLastDeallocForFuncRes(asmL,R_EAX);
  335. { for int64/qword }
  336. if procinfo^.returntype.def^.size = 8 then
  337. DoRemoveLastDeallocForFuncRes(asmL,R_EDX);
  338. end;
  339. end;
  340. end;
  341. procedure getNoDeallocRegs(var regs: TRegSet);
  342. var regCounter: TRegister;
  343. begin
  344. regs := [];
  345. if assigned(procinfo^.returntype.def) then
  346. case procinfo^.returntype.def^.deftype of
  347. arraydef,recorddef,pointerdef,
  348. stringdef,enumdef,procdef,objectdef,errordef,
  349. filedef,setdef,procvardef,
  350. classrefdef,forwarddef:
  351. regs := [R_EAX];
  352. orddef:
  353. if procinfo^.returntype.def^.size <> 0 then
  354. begin
  355. regs := [R_EAX];
  356. { for int64/qword }
  357. if procinfo^.returntype.def^.size = 8 then
  358. regs := regs + [R_EDX];
  359. end;
  360. end;
  361. for regCounter := R_EAX to R_EBX do
  362. if not(regCounter in usableregs) then
  363. regs := regs + [regCounter];
  364. end;
  365. Procedure AddRegDeallocFor(asmL: paasmOutput; reg: TRegister; p: pai);
  366. var hp1: pai;
  367. funcResRegs: TRegset;
  368. funcResReg: boolean;
  369. begin
  370. if not(reg in usableregs) then
  371. exit;
  372. getNoDeallocRegs(funcResRegs);
  373. funcResRegs := funcResRegs - usableregs;
  374. funcResReg := reg in funcResRegs;
  375. hp1 := p;
  376. while not(funcResReg and
  377. (p^.typ = ait_instruction) and
  378. (paicpu(p)^.opcode = A_JMP) and
  379. (pasmlabel(paicpu(p)^.oper[0].sym) = aktexit2label)) and
  380. getLastInstruction(p, p) And
  381. not(regInInstruction(reg, p)) Do
  382. hp1 := p;
  383. { don't insert a dealloc for registers which contain the function result }
  384. { if they are followed by a jump to the exit label (for exit(...)) }
  385. if not(funcResReg) or
  386. not((hp1^.typ = ait_instruction) and
  387. (paicpu(hp1)^.opcode = A_JMP) and
  388. (pasmlabel(paicpu(hp1)^.oper[0].sym) = aktexit2label)) then
  389. begin
  390. p := new(paiRegAlloc, deAlloc(reg));
  391. insertLLItem(AsmL, hp1^.previous, hp1, p);
  392. end;
  393. end;
  394. Procedure BuildLabelTableAndFixRegAlloc(asmL: PAasmOutput; Var LabelTable: PLabelTable; LowLabel: Longint;
  395. Var LabelDif: Longint; BlockStart, BlockEnd: Pai);
  396. {Builds a table with the locations of the labels in the paasmoutput.
  397. Also fixes some RegDeallocs like "# %eax released; push (%eax)"}
  398. Var p, hp1, hp2, lastP: Pai;
  399. regCounter: TRegister;
  400. UsedRegs, noDeallocRegs: TRegSet;
  401. Begin
  402. UsedRegs := [];
  403. If (LabelDif <> 0) Then
  404. Begin
  405. GetMem(LabelTable, LabelDif*SizeOf(TLabelTableItem));
  406. FillChar(LabelTable^, LabelDif*SizeOf(TLabelTableItem), 0);
  407. End;
  408. p := BlockStart;
  409. lastP := p;
  410. While (P <> BlockEnd) Do
  411. Begin
  412. Case p^.typ Of
  413. ait_Label:
  414. If not labelCanBeSkipped(pai_label(p)) Then
  415. LabelTable^[Pai_Label(p)^.l^.labelnr-LowLabel].PaiObj := p;
  416. ait_regAlloc:
  417. { ESI and EDI are (de)allocated manually, don't mess with them }
  418. if not(paiRegAlloc(p)^.Reg in [R_EDI,R_ESI]) then
  419. begin
  420. if PairegAlloc(p)^.Allocation then
  421. Begin
  422. If Not(paiRegAlloc(p)^.Reg in UsedRegs) Then
  423. UsedRegs := UsedRegs + [paiRegAlloc(p)^.Reg]
  424. Else
  425. addRegDeallocFor(asmL, paiRegAlloc(p)^.reg, p);
  426. End
  427. else
  428. begin
  429. UsedRegs := UsedRegs - [paiRegAlloc(p)^.Reg];
  430. hp1 := p;
  431. hp2 := nil;
  432. While Not(FindRegAlloc(paiRegAlloc(p)^.Reg, Pai(hp1^.Next),true)) And
  433. GetNextInstruction(hp1, hp1) And
  434. RegInInstruction(paiRegAlloc(p)^.Reg, hp1) Do
  435. hp2 := hp1;
  436. If hp2 <> nil Then
  437. Begin
  438. hp1 := Pai(p^.previous);
  439. AsmL^.Remove(p);
  440. InsertLLItem(AsmL, hp2, Pai(hp2^.Next), p);
  441. p := hp1;
  442. end;
  443. end;
  444. end;
  445. end;
  446. repeat
  447. lastP := p;
  448. P := Pai(P^.Next);
  449. until not(Assigned(p)) or
  450. not(p^.typ in (SkipInstr - [ait_regalloc]));
  451. End;
  452. { don't add deallocation for function result variable or for regvars}
  453. getNoDeallocRegs(noDeallocRegs);
  454. usedRegs := usedRegs - noDeallocRegs;
  455. for regCounter := R_EAX to R_EDI do
  456. if regCounter in usedRegs then
  457. addRegDeallocFor(asmL,regCounter,lastP);
  458. End;
  459. {************************ Search the Label table ************************}
  460. Function FindLabel(L: PasmLabel; Var hp: Pai): Boolean;
  461. {searches for the specified label starting from hp as long as the
  462. encountered instructions are labels, to be able to optimize constructs like
  463. jne l2 jmp l2
  464. jmp l3 and l1:
  465. l1: l2:
  466. l2:}
  467. Var TempP: Pai;
  468. Begin
  469. TempP := hp;
  470. While Assigned(TempP) and
  471. (TempP^.typ In SkipInstr + [ait_label,ait_align]) Do
  472. If (TempP^.typ <> ait_Label) Or
  473. (pai_label(TempP)^.l <> L)
  474. Then GetNextInstruction(TempP, TempP)
  475. Else
  476. Begin
  477. hp := TempP;
  478. FindLabel := True;
  479. exit
  480. End;
  481. FindLabel := False;
  482. End;
  483. {************************ Some general functions ************************}
  484. Function TCh2Reg(Ch: TInsChange): TRegister;
  485. {converts a TChange variable to a TRegister}
  486. Begin
  487. If (Ch <= Ch_REDI) Then
  488. TCh2Reg := TRegister(Byte(Ch))
  489. Else
  490. If (Ch <= Ch_WEDI) Then
  491. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_REDI))
  492. Else
  493. If (Ch <= Ch_RWEDI) Then
  494. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_WEDI))
  495. Else
  496. If (Ch <= Ch_MEDI) Then
  497. TCh2Reg := TRegister(Byte(Ch) - Byte(Ch_RWEDI))
  498. Else InternalError($db)
  499. End;
  500. Function Reg32(Reg: TRegister): TRegister;
  501. {Returns the 32 bit component of Reg if it exists, otherwise Reg is returned}
  502. Begin
  503. Reg32 := Reg;
  504. If (Reg >= R_AX)
  505. Then
  506. If (Reg <= R_DI)
  507. Then Reg32 := Reg16ToReg32(Reg)
  508. Else
  509. If (Reg <= R_BL)
  510. Then Reg32 := Reg8toReg32(Reg);
  511. End;
  512. { inserts new_one between prev and foll }
  513. Procedure InsertLLItem(AsmL: PAasmOutput; prev, foll, new_one: PLinkedList_Item);
  514. Begin
  515. If Assigned(prev) Then
  516. If Assigned(foll) Then
  517. Begin
  518. If Assigned(new_one) Then
  519. Begin
  520. new_one^.previous := prev;
  521. new_one^.next := foll;
  522. prev^.next := new_one;
  523. foll^.previous := new_one;
  524. Pai(new_one)^.fileinfo := Pai(foll)^.fileinfo;
  525. End;
  526. End
  527. Else AsmL^.Concat(new_one)
  528. Else If Assigned(Foll) Then AsmL^.Insert(new_one)
  529. End;
  530. {********************* Compare parts of Pai objects *********************}
  531. Function RegsSameSize(Reg1, Reg2: TRegister): Boolean;
  532. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  533. 8bit, 16bit or 32bit)}
  534. Begin
  535. If (Reg1 <= R_EDI)
  536. Then RegsSameSize := (Reg2 <= R_EDI)
  537. Else
  538. If (Reg1 <= R_DI)
  539. Then RegsSameSize := (Reg2 in [R_AX..R_DI])
  540. Else
  541. If (Reg1 <= R_BL)
  542. Then RegsSameSize := (Reg2 in [R_AL..R_BL])
  543. Else RegsSameSize := False
  544. End;
  545. Procedure AddReg2RegInfo(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo);
  546. {updates the ???RegsEncountered and ???2???Reg fields of RegInfo. Assumes that
  547. OldReg and NewReg have the same size (has to be chcked in advance with
  548. RegsSameSize) and that neither equals R_NO}
  549. Begin
  550. With RegInfo Do
  551. Begin
  552. NewRegsEncountered := NewRegsEncountered + [NewReg];
  553. OldRegsEncountered := OldRegsEncountered + [OldReg];
  554. New2OldReg[NewReg] := OldReg;
  555. Case OldReg Of
  556. R_EAX..R_EDI:
  557. Begin
  558. NewRegsEncountered := NewRegsEncountered + [Reg32toReg16(NewReg)];
  559. OldRegsEncountered := OldRegsEncountered + [Reg32toReg16(OldReg)];
  560. New2OldReg[Reg32toReg16(NewReg)] := Reg32toReg16(OldReg);
  561. If (NewReg in [R_EAX..R_EBX]) And
  562. (OldReg in [R_EAX..R_EBX]) Then
  563. Begin
  564. NewRegsEncountered := NewRegsEncountered + [Reg32toReg8(NewReg)];
  565. OldRegsEncountered := OldRegsEncountered + [Reg32toReg8(OldReg)];
  566. New2OldReg[Reg32toReg8(NewReg)] := Reg32toReg8(OldReg);
  567. End;
  568. End;
  569. R_AX..R_DI:
  570. Begin
  571. NewRegsEncountered := NewRegsEncountered + [Reg16toReg32(NewReg)];
  572. OldRegsEncountered := OldRegsEncountered + [Reg16toReg32(OldReg)];
  573. New2OldReg[Reg16toReg32(NewReg)] := Reg16toReg32(OldReg);
  574. If (NewReg in [R_AX..R_BX]) And
  575. (OldReg in [R_AX..R_BX]) Then
  576. Begin
  577. NewRegsEncountered := NewRegsEncountered + [Reg16toReg8(NewReg)];
  578. OldRegsEncountered := OldRegsEncountered + [Reg16toReg8(OldReg)];
  579. New2OldReg[Reg16toReg8(NewReg)] := Reg16toReg8(OldReg);
  580. End;
  581. End;
  582. R_AL..R_BL:
  583. Begin
  584. NewRegsEncountered := NewRegsEncountered + [Reg8toReg32(NewReg)]
  585. + [Reg8toReg16(NewReg)];
  586. OldRegsEncountered := OldRegsEncountered + [Reg8toReg32(OldReg)]
  587. + [Reg8toReg16(OldReg)];
  588. New2OldReg[Reg8toReg32(NewReg)] := Reg8toReg32(OldReg);
  589. End;
  590. End;
  591. End;
  592. End;
  593. Procedure AddOp2RegInfo(const o:Toper; Var RegInfo: TRegInfo);
  594. Begin
  595. Case o.typ Of
  596. Top_Reg:
  597. If (o.reg <> R_NO) Then
  598. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  599. Top_Ref:
  600. Begin
  601. If o.ref^.base <> R_NO Then
  602. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  603. If o.ref^.index <> R_NO Then
  604. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  605. End;
  606. End;
  607. End;
  608. Function RegsEquivalent(OldReg, NewReg: TRegister; Var RegInfo: TRegInfo; OPAct: TOpAction): Boolean;
  609. Begin
  610. If Not((OldReg = R_NO) Or (NewReg = R_NO)) Then
  611. If RegsSameSize(OldReg, NewReg) Then
  612. With RegInfo Do
  613. {here we always check for the 32 bit component, because it is possible that
  614. the 8 bit component has not been set, event though NewReg already has been
  615. processed. This happens if it has been compared with a register that doesn't
  616. have an 8 bit component (such as EDI). In that case the 8 bit component is
  617. still set to R_NO and the comparison in the Else-part will fail}
  618. If (Reg32(OldReg) in OldRegsEncountered) Then
  619. If (Reg32(NewReg) in NewRegsEncountered) Then
  620. RegsEquivalent := (OldReg = New2OldReg[NewReg])
  621. { If we haven't encountered the new register yet, but we have encountered the
  622. old one already, the new one can only be correct if it's being written to
  623. (and consequently the old one is also being written to), otherwise
  624. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  625. movl (%eax), %eax movl (%edx), %edx
  626. are considered equivalent}
  627. Else
  628. If (OpAct = OpAct_Write) Then
  629. Begin
  630. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  631. RegsEquivalent := True
  632. End
  633. Else Regsequivalent := False
  634. Else
  635. If Not(Reg32(NewReg) in NewRegsEncountered) and
  636. ((OpAct = OpAct_Write) or
  637. ((newReg = oldReg) and
  638. not(newReg in usableregs + [R_EDI]))) Then
  639. Begin
  640. AddReg2RegInfo(OldReg, NewReg, RegInfo);
  641. RegsEquivalent := True
  642. End
  643. Else RegsEquivalent := False
  644. Else RegsEquivalent := False
  645. Else RegsEquivalent := OldReg = NewReg
  646. End;
  647. Function RefsEquivalent(Const R1, R2: TReference; var RegInfo: TRegInfo; OpAct: TOpAction): Boolean;
  648. Begin
  649. If R1.is_immediate Then
  650. RefsEquivalent := R2.is_immediate and (R1.Offset = R2.Offset)
  651. Else
  652. RefsEquivalent := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  653. RegsEquivalent(R1.Base, R2.Base, RegInfo, OpAct) And
  654. RegsEquivalent(R1.Index, R2.Index, RegInfo, OpAct) And
  655. (R1.Segment = R2.Segment) And (R1.ScaleFactor = R2.ScaleFactor) And
  656. (R1.Symbol = R2.Symbol);
  657. End;
  658. Function RefsEqual(Const R1, R2: TReference): Boolean;
  659. Begin
  660. If R1.is_immediate Then
  661. RefsEqual := R2.is_immediate and (R1.Offset = R2.Offset)
  662. Else
  663. RefsEqual := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  664. (R1.Segment = R2.Segment) And (R1.Base = R2.Base) And
  665. (R1.Index = R2.Index) And (R1.ScaleFactor = R2.ScaleFactor) And
  666. (R1.Symbol=R2.Symbol);
  667. End;
  668. Function IsGP32Reg(Reg: TRegister): Boolean;
  669. {Checks if the register is a 32 bit general purpose register}
  670. Begin
  671. If (Reg >= R_EAX) and (Reg <= R_EBX)
  672. Then IsGP32Reg := True
  673. Else IsGP32reg := False
  674. End;
  675. Function RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
  676. Begin {checks whether Ref contains a reference to Reg}
  677. Reg := Reg32(Reg);
  678. RegInRef := (Ref.Base = Reg) Or (Ref.Index = Reg)
  679. End;
  680. function RegReadByInstruction(reg: TRegister; hp: pai): boolean;
  681. var p: paicpu;
  682. opCount: byte;
  683. begin
  684. RegReadByInstruction := false;
  685. reg := reg32(reg);
  686. p := paicpu(hp);
  687. if hp^.typ <> ait_instruction then
  688. exit;
  689. case p^.opcode of
  690. A_IMUL:
  691. case p^.ops of
  692. 1: regReadByInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
  693. 2,3:
  694. regReadByInstruction := regInOp(reg,p^.oper[0]) or
  695. regInOp(reg,p^.oper[1]);
  696. end;
  697. A_IDIV,A_DIV,A_MUL:
  698. begin
  699. regReadByInstruction :=
  700. regInOp(reg,p^.oper[0]) or (reg = R_EAX);
  701. end;
  702. else
  703. begin
  704. for opCount := 0 to 2 do
  705. if (p^.oper[opCount].typ = top_ref) and
  706. RegInRef(reg,p^.oper[opCount].ref^) then
  707. begin
  708. RegReadByInstruction := true;
  709. exit
  710. end;
  711. for opCount := 1 to MaxCh do
  712. case InsProp[p^.opcode].Ch[opCount] of
  713. Ch_REAX..CH_REDI,CH_RWEAX..Ch_MEDI:
  714. if reg = TCh2Reg(InsProp[p^.opcode].Ch[opCount]) then
  715. begin
  716. RegReadByInstruction := true;
  717. exit
  718. end;
  719. Ch_RWOp1,Ch_ROp1,Ch_MOp1:
  720. if (p^.oper[0].typ = top_reg) and
  721. (reg32(p^.oper[0].reg) = reg) then
  722. begin
  723. RegReadByInstruction := true;
  724. exit
  725. end;
  726. Ch_RWOp2,Ch_ROp2,Ch_MOp2:
  727. if (p^.oper[1].typ = top_reg) and
  728. (reg32(p^.oper[1].reg) = reg) then
  729. begin
  730. RegReadByInstruction := true;
  731. exit
  732. end;
  733. Ch_RWOp3,Ch_ROp3,Ch_MOp3:
  734. if (p^.oper[2].typ = top_reg) and
  735. (reg32(p^.oper[2].reg) = reg) then
  736. begin
  737. RegReadByInstruction := true;
  738. exit
  739. end;
  740. end;
  741. end;
  742. end;
  743. end;
  744. function regInInstruction(Reg: TRegister; p1: Pai): Boolean;
  745. { Checks if Reg is used by the instruction p1 }
  746. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  747. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  748. var p: paicpu;
  749. opCount: byte;
  750. begin
  751. reg := reg32(reg);
  752. regInInstruction := false;
  753. p := paicpu(p1);
  754. if p1^.typ <> ait_instruction then
  755. exit;
  756. case p^.opcode of
  757. A_IMUL:
  758. case p^.ops of
  759. 1: regInInstruction := (reg = R_EAX) or reginOp(reg,p^.oper[0]);
  760. 2,3:
  761. regInInstruction := regInOp(reg,p^.oper[0]) or
  762. regInOp(reg,p^.oper[1]) or regInOp(reg,p^.oper[2]);
  763. end;
  764. A_IDIV,A_DIV,A_MUL:
  765. regInInstruction :=
  766. regInOp(reg,p^.oper[0]) or
  767. (reg = R_EAX) or (reg = R_EDX)
  768. else
  769. begin
  770. for opCount := 1 to MaxCh do
  771. case InsProp[p^.opcode].Ch[opCount] of
  772. CH_REAX..CH_MEDI:
  773. if tch2reg(InsProp[p^.opcode].Ch[opCount]) = reg then
  774. begin
  775. regInInstruction := true;
  776. exit;
  777. end;
  778. Ch_ROp1..Ch_MOp1:
  779. if regInOp(reg,p^.oper[0]) then
  780. begin
  781. regInInstruction := true;
  782. exit
  783. end;
  784. Ch_ROp2..Ch_MOp2:
  785. if regInOp(reg,p^.oper[1]) then
  786. begin
  787. regInInstruction := true;
  788. exit
  789. end;
  790. Ch_ROp3..Ch_MOp3:
  791. if regInOp(reg,p^.oper[2]) then
  792. begin
  793. regInInstruction := true;
  794. exit
  795. end;
  796. end;
  797. end;
  798. end;
  799. end;
  800. Function RegInOp(Reg: TRegister; const o:toper): Boolean;
  801. Begin
  802. RegInOp := False;
  803. reg := reg32(reg);
  804. Case o.typ Of
  805. top_reg: RegInOp := Reg = reg32(o.reg);
  806. top_ref: RegInOp := (Reg = o.ref^.Base) Or
  807. (Reg = o.ref^.Index);
  808. End;
  809. End;
  810. Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
  811. Var InstrProp: TInsProp;
  812. TmpResult: Boolean;
  813. Cnt: Byte;
  814. Begin
  815. TmpResult := False;
  816. Reg := Reg32(Reg);
  817. If (p1^.typ = ait_instruction) Then
  818. Case paicpu(p1)^.opcode of
  819. A_IMUL:
  820. With paicpu(p1)^ Do
  821. TmpResult :=
  822. ((ops = 1) and (reg in [R_EAX,R_EDX])) or
  823. ((ops = 2) and (Reg32(oper[1].reg) = reg)) or
  824. ((ops = 3) and (Reg32(oper[2].reg) = reg));
  825. A_DIV, A_IDIV, A_MUL:
  826. With paicpu(p1)^ Do
  827. TmpResult :=
  828. (Reg = R_EAX) or
  829. (Reg = R_EDX);
  830. Else
  831. Begin
  832. Cnt := 1;
  833. InstrProp := InsProp[paicpu(p1)^.OpCode];
  834. While (Cnt <= MaxCh) And
  835. (InstrProp.Ch[Cnt] <> Ch_None) And
  836. Not(TmpResult) Do
  837. Begin
  838. Case InstrProp.Ch[Cnt] Of
  839. Ch_WEAX..Ch_MEDI:
  840. TmpResult := Reg = TCh2Reg(InstrProp.Ch[Cnt]);
  841. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  842. TmpResult := (paicpu(p1)^.oper[0].typ = top_reg) and
  843. (Reg32(paicpu(p1)^.oper[0].reg) = reg);
  844. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  845. TmpResult := (paicpu(p1)^.oper[1].typ = top_reg) and
  846. (Reg32(paicpu(p1)^.oper[1].reg) = reg);
  847. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  848. TmpResult := (paicpu(p1)^.oper[2].typ = top_reg) and
  849. (Reg32(paicpu(p1)^.oper[2].reg) = reg);
  850. Ch_FPU: TmpResult := Reg in [R_ST..R_ST7,R_MM0..R_MM7];
  851. Ch_ALL: TmpResult := true;
  852. End;
  853. Inc(Cnt)
  854. End
  855. End
  856. End;
  857. RegModifiedByInstruction := TmpResult
  858. End;
  859. {********************* GetNext and GetLastInstruction *********************}
  860. Function GetNextInstruction(Current: Pai; Var Next: Pai): Boolean;
  861. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  862. { next pai object in Next. Returns false if there isn't any }
  863. Begin
  864. Repeat
  865. If (Current^.typ = ait_marker) And
  866. (Pai_Marker(Current)^.Kind = AsmBlockStart) Then
  867. Begin
  868. GetNextInstruction := False;
  869. Next := Nil;
  870. Exit
  871. End;
  872. Current := Pai(Current^.Next);
  873. While Assigned(Current) And
  874. ((current^.typ In skipInstr) or
  875. ((current^.typ = ait_label) and
  876. labelCanBeSkipped(pai_label(current)))) do
  877. Current := Pai(Current^.Next);
  878. If Assigned(Current) And
  879. (Current^.typ = ait_Marker) And
  880. (Pai_Marker(Current)^.Kind = NoPropInfoStart) Then
  881. Begin
  882. While Assigned(Current) And
  883. ((Current^.typ <> ait_Marker) Or
  884. (Pai_Marker(Current)^.Kind <> NoPropInfoEnd)) Do
  885. Current := Pai(Current^.Next);
  886. End;
  887. Until Not(Assigned(Current)) Or
  888. (Current^.typ <> ait_Marker) Or
  889. (Pai_Marker(Current)^.Kind <> NoPropInfoEnd);
  890. Next := Current;
  891. If Assigned(Current) And
  892. Not((Current^.typ In SkipInstr) or
  893. ((Current^.typ = ait_label) And
  894. labelCanBeSkipped(pai_label(current))))
  895. Then
  896. GetNextInstruction :=
  897. not((current^.typ = ait_marker) and
  898. (pai_marker(current)^.kind = asmBlockStart))
  899. Else
  900. Begin
  901. GetNextInstruction := False;
  902. Next := nil;
  903. End;
  904. End;
  905. Function GetLastInstruction(Current: Pai; Var Last: Pai): Boolean;
  906. {skips the ait-types in SkipInstr puts the previous pai object in
  907. Last. Returns false if there isn't any}
  908. Begin
  909. Repeat
  910. Current := Pai(Current^.previous);
  911. While Assigned(Current) And
  912. (((Current^.typ = ait_Marker) And
  913. Not(Pai_Marker(Current)^.Kind in [AsmBlockEnd,NoPropInfoEnd])) or
  914. (Current^.typ In SkipInstr) or
  915. ((Current^.typ = ait_label) And
  916. labelCanBeSkipped(pai_label(current)))) Do
  917. Current := Pai(Current^.previous);
  918. If Assigned(Current) And
  919. (Current^.typ = ait_Marker) And
  920. (Pai_Marker(Current)^.Kind = NoPropInfoEnd) Then
  921. Begin
  922. While Assigned(Current) And
  923. ((Current^.typ <> ait_Marker) Or
  924. (Pai_Marker(Current)^.Kind <> NoPropInfoStart)) Do
  925. Current := Pai(Current^.previous);
  926. End;
  927. Until Not(Assigned(Current)) Or
  928. (Current^.typ <> ait_Marker) Or
  929. (Pai_Marker(Current)^.Kind <> NoPropInfoStart);
  930. If Not(Assigned(Current)) or
  931. (Current^.typ In SkipInstr) or
  932. ((Current^.typ = ait_label) And
  933. labelCanBeSkipped(pai_label(current))) or
  934. ((Current^.typ = ait_Marker) And
  935. (Pai_Marker(Current)^.Kind = AsmBlockEnd))
  936. Then
  937. Begin
  938. Last := nil;
  939. GetLastInstruction := False
  940. End
  941. Else
  942. Begin
  943. Last := Current;
  944. GetLastInstruction := True;
  945. End;
  946. End;
  947. Procedure SkipHead(var P: Pai);
  948. Var OldP: Pai;
  949. Begin
  950. Repeat
  951. OldP := P;
  952. If (P^.typ in SkipInstr) Or
  953. ((P^.typ = ait_marker) And
  954. (Pai_Marker(P)^.Kind = AsmBlockEnd)) Then
  955. GetNextInstruction(P, P)
  956. Else If ((P^.Typ = Ait_Marker) And
  957. (Pai_Marker(P)^.Kind = NoPropInfoStart)) Then
  958. {a marker of the NoPropInfoStart can't be the first instruction of a
  959. paasmoutput list}
  960. GetNextInstruction(Pai(P^.Previous),P);
  961. Until P = OldP
  962. End;
  963. function labelCanBeSkipped(p: pai_label): boolean;
  964. begin
  965. labelCanBeSkipped := not(p^.l^.is_used) or p^.l^.is_addr;
  966. end;
  967. {******************* The Data Flow Analyzer functions ********************}
  968. function regLoadedWithNewValue(reg: tregister; canDependOnPrevValue: boolean;
  969. hp: pai): boolean;
  970. { assumes reg is a 32bit register }
  971. var p: paicpu;
  972. begin
  973. p := paicpu(hp);
  974. regLoadedWithNewValue :=
  975. assigned(hp) and
  976. (hp^.typ = ait_instruction) and
  977. (((p^.opcode = A_MOV) or
  978. (p^.opcode = A_MOVZX) or
  979. (p^.opcode = A_MOVSX) or
  980. (p^.opcode = A_LEA)) and
  981. (p^.oper[1].typ = top_reg) and
  982. (Reg32(p^.oper[1].reg) = reg) and
  983. (canDependOnPrevValue or
  984. (p^.oper[0].typ <> top_ref) or
  985. not regInRef(reg,p^.oper[0].ref^)) or
  986. ((p^.opcode = A_POP) and
  987. (Reg32(p^.oper[0].reg) = reg)));
  988. end;
  989. Procedure UpdateUsedRegs(Var UsedRegs: TRegSet; p: Pai);
  990. {updates UsedRegs with the RegAlloc Information coming after P}
  991. Begin
  992. Repeat
  993. While Assigned(p) And
  994. ((p^.typ in (SkipInstr - [ait_RegAlloc])) or
  995. ((p^.typ = ait_label) And
  996. labelCanBeSkipped(pai_label(p)))) Do
  997. p := Pai(p^.next);
  998. While Assigned(p) And
  999. (p^.typ=ait_RegAlloc) Do
  1000. Begin
  1001. if pairegalloc(p)^.allocation then
  1002. UsedRegs := UsedRegs + [PaiRegAlloc(p)^.Reg]
  1003. else
  1004. UsedRegs := UsedRegs - [PaiRegAlloc(p)^.Reg];
  1005. p := pai(p^.next);
  1006. End;
  1007. Until Not(Assigned(p)) Or
  1008. (Not(p^.typ in SkipInstr) And
  1009. Not((p^.typ = ait_label) And
  1010. labelCanBeSkipped(pai_label(p))));
  1011. End;
  1012. Procedure AllocRegBetween(AsmL: PAasmOutput; Reg: TRegister; p1, p2: Pai);
  1013. { allocates register Reg between (and including) instructions p1 and p2 }
  1014. { the type of p1 and p2 must not be in SkipInstr }
  1015. var
  1016. hp: pai;
  1017. lastRemovedWasDealloc: boolean;
  1018. Begin
  1019. If not(reg in usableregs+[R_EDI,R_ESI]) or
  1020. not(assigned(p1)) Then
  1021. { this happens with registers which are loaded implicitely, outside the }
  1022. { current block (e.g. esi with self) }
  1023. exit;
  1024. lastRemovedWasDealloc := false;
  1025. {$ifdef allocregdebug}
  1026. hp := new(pai_asm_comment,init(strpnew('allocating '+att_reg2str[reg]+
  1027. ' from here...')));
  1028. insertllitem(asml,p1^.previous,p1,hp);
  1029. hp := new(pai_asm_comment,init(strpnew('allocated '+att_reg2str[reg]+
  1030. ' till here...')));
  1031. insertllitem(asml,p2,p1^.next,hp);
  1032. {$endif allocregdebug}
  1033. if Assigned(p1^.optInfo) and
  1034. not (reg in PPaiProp(p1^.OptInfo)^.UsedRegs) then
  1035. begin
  1036. hp := new(paiRegalloc,alloc(reg));
  1037. insertLLItem(asmL,p1^.previous,p1,hp);
  1038. end;
  1039. Repeat
  1040. If Assigned(p1^.OptInfo) Then
  1041. Include(PPaiProp(p1^.OptInfo)^.UsedRegs,Reg);
  1042. p1 := Pai(p1^.next);
  1043. Repeat
  1044. While assigned(p1) and
  1045. (p1^.typ in (SkipInstr-[ait_regalloc])) Do
  1046. p1 := Pai(p1^.next);
  1047. { remove all allocation/deallocation info about the register in between }
  1048. If assigned(p1) and
  1049. (p1^.typ = ait_regalloc) Then
  1050. If (PaiRegAlloc(p1)^.Reg = Reg) Then
  1051. Begin
  1052. lastRemovedWasDealloc := not PaiRegAlloc(p1)^.allocation;
  1053. hp := Pai(p1^.Next);
  1054. AsmL^.Remove(p1);
  1055. Dispose(p1, Done);
  1056. p1 := hp;
  1057. End
  1058. Else p1 := Pai(p1^.next);
  1059. Until not(assigned(p1)) or
  1060. Not(p1^.typ in SkipInstr);
  1061. Until not(assigned(p1)) or
  1062. (p1 = p2);
  1063. if assigned(p1) and lastRemovedWasDealloc then
  1064. begin
  1065. hp := new(paiRegalloc,dealloc(reg));
  1066. insertLLItem(asmL,p1,p1^.next,hp);
  1067. end;
  1068. End;
  1069. Procedure IncState(Var S: Byte; amount: longint);
  1070. {Increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1071. errors}
  1072. Begin
  1073. if (s <= $ff - amount) then
  1074. inc(s, amount)
  1075. else s := longint(s) + amount - $ff;
  1076. End;
  1077. Function sequenceDependsonReg(Const Content: TContent; seqReg, Reg: TRegister): Boolean;
  1078. { Content is the sequence of instructions that describes the contents of }
  1079. { seqReg. Reg is being overwritten by the current instruction. If the }
  1080. { content of seqReg depends on reg (ie. because of a }
  1081. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1082. Var p: Pai;
  1083. Counter: Byte;
  1084. TmpResult: Boolean;
  1085. RegsChecked: TRegSet;
  1086. Begin
  1087. RegsChecked := [];
  1088. p := Content.StartMod;
  1089. TmpResult := False;
  1090. Counter := 1;
  1091. While Not(TmpResult) And
  1092. (Counter <= Content.NrOfMods) Do
  1093. Begin
  1094. If (p^.typ = ait_instruction) and
  1095. ((Paicpu(p)^.opcode = A_MOV) or
  1096. (Paicpu(p)^.opcode = A_MOVZX) or
  1097. (Paicpu(p)^.opcode = A_MOVSX) or
  1098. (paicpu(p)^.opcode = A_LEA)) and
  1099. (Paicpu(p)^.oper[0].typ = top_ref) Then
  1100. With Paicpu(p)^.oper[0].ref^ Do
  1101. If ((Base = procinfo^.FramePointer) or
  1102. (assigned(symbol) and (base = R_NO))) And
  1103. (Index = R_NO) Then
  1104. Begin
  1105. RegsChecked := RegsChecked + [Reg32(Paicpu(p)^.oper[1].reg)];
  1106. If Reg = Reg32(Paicpu(p)^.oper[1].reg) Then
  1107. Break;
  1108. End
  1109. Else
  1110. tmpResult :=
  1111. regReadByInstruction(reg,p) and
  1112. regModifiedByInstruction(seqReg,p)
  1113. Else
  1114. tmpResult :=
  1115. regReadByInstruction(reg,p) and
  1116. regModifiedByInstruction(seqReg,p);
  1117. Inc(Counter);
  1118. GetNextInstruction(p,p)
  1119. End;
  1120. sequenceDependsonReg := TmpResult
  1121. End;
  1122. procedure invalidateDepedingRegs(p1: ppaiProp; reg: tregister);
  1123. var
  1124. counter: tregister;
  1125. begin
  1126. for counter := R_EAX to R_EDI Do
  1127. if counter <> reg then
  1128. with p1^.regs[counter] Do
  1129. if (typ in [con_ref,con_noRemoveRef]) and
  1130. sequenceDependsOnReg(p1^.Regs[counter],counter,reg) then
  1131. if typ in [con_ref,con_invalid] then
  1132. typ := con_invalid
  1133. { con_invalid and con_noRemoveRef = con_unknown }
  1134. else typ := con_unknown;
  1135. end;
  1136. Procedure DestroyReg(p1: PPaiProp; Reg: TRegister; doIncState:Boolean);
  1137. {Destroys the contents of the register Reg in the PPaiProp p1, as well as the
  1138. contents of registers are loaded with a memory location based on Reg.
  1139. doIncState is false when this register has to be destroyed not because
  1140. it's contents are directly modified/overwritten, but because of an indirect
  1141. action (e.g. this register holds the contents of a variable and the value
  1142. of the variable in memory is changed) }
  1143. Var TmpWState, TmpRState: Byte;
  1144. Counter: TRegister;
  1145. Begin
  1146. Reg := Reg32(Reg);
  1147. { the following happens for fpu registers }
  1148. if (reg < low(NrOfInstrSinceLastMod)) or
  1149. (reg > high(NrOfInstrSinceLastMod)) then
  1150. exit;
  1151. NrOfInstrSinceLastMod[Reg] := 0;
  1152. if (reg >= R_EAX) and (reg <= R_EDI) then
  1153. begin
  1154. with p1^.regs[reg] do
  1155. begin
  1156. if doIncState then
  1157. begin
  1158. incState(wstate,1);
  1159. typ := con_unknown;
  1160. end
  1161. else
  1162. if typ in [con_ref,con_invalid] then
  1163. typ := con_invalid
  1164. { con_invalid and con_noRemoveRef = con_unknown }
  1165. else typ := con_unknown;
  1166. end;
  1167. invalidateDepedingRegs(p1,reg);
  1168. end;
  1169. End;
  1170. {Procedure AddRegsToSet(p: Pai; Var RegSet: TRegSet);
  1171. Begin
  1172. If (p^.typ = ait_instruction) Then
  1173. Begin
  1174. Case Paicpu(p)^.oper[0].typ Of
  1175. top_reg:
  1176. If Not(Paicpu(p)^.oper[0].reg in [R_NO,R_ESP,procinfo^.FramePointer]) Then
  1177. RegSet := RegSet + [Paicpu(p)^.oper[0].reg];
  1178. top_ref:
  1179. With TReference(Paicpu(p)^.oper[0]^) Do
  1180. Begin
  1181. If Not(Base in [procinfo^.FramePointer,R_NO,R_ESP])
  1182. Then RegSet := RegSet + [Base];
  1183. If Not(Index in [procinfo^.FramePointer,R_NO,R_ESP])
  1184. Then RegSet := RegSet + [Index];
  1185. End;
  1186. End;
  1187. Case Paicpu(p)^.oper[1].typ Of
  1188. top_reg:
  1189. If Not(Paicpu(p)^.oper[1].reg in [R_NO,R_ESP,procinfo^.FramePointer]) Then
  1190. If RegSet := RegSet + [TRegister(TwoWords(Paicpu(p)^.oper[1]).Word1];
  1191. top_ref:
  1192. With TReference(Paicpu(p)^.oper[1]^) Do
  1193. Begin
  1194. If Not(Base in [procinfo^.FramePointer,R_NO,R_ESP])
  1195. Then RegSet := RegSet + [Base];
  1196. If Not(Index in [procinfo^.FramePointer,R_NO,R_ESP])
  1197. Then RegSet := RegSet + [Index];
  1198. End;
  1199. End;
  1200. End;
  1201. End;}
  1202. Function OpsEquivalent(const o1, o2: toper; Var RegInfo: TRegInfo; OpAct: TopAction): Boolean;
  1203. Begin {checks whether the two ops are equivalent}
  1204. OpsEquivalent := False;
  1205. if o1.typ=o2.typ then
  1206. Case o1.typ Of
  1207. Top_Reg:
  1208. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, RegInfo, OpAct);
  1209. Top_Ref:
  1210. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, RegInfo, OpAct);
  1211. Top_Const:
  1212. OpsEquivalent := o1.val = o2.val;
  1213. Top_None:
  1214. OpsEquivalent := True
  1215. End;
  1216. End;
  1217. Function OpsEqual(const o1,o2:toper): Boolean;
  1218. Begin {checks whether the two ops are equal}
  1219. OpsEqual := False;
  1220. if o1.typ=o2.typ then
  1221. Case o1.typ Of
  1222. Top_Reg :
  1223. OpsEqual:=o1.reg=o2.reg;
  1224. Top_Ref :
  1225. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1226. Top_Const :
  1227. OpsEqual:=o1.val=o2.val;
  1228. Top_Symbol :
  1229. OpsEqual:=(o1.sym=o2.sym) and (o1.symofs=o2.symofs);
  1230. Top_None :
  1231. OpsEqual := True
  1232. End;
  1233. End;
  1234. Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
  1235. {$ifdef csdebug}
  1236. var
  1237. hp: pai;
  1238. {$endif csdebug}
  1239. Begin {checks whether two Paicpu instructions are equal}
  1240. If Assigned(p1) And Assigned(p2) And
  1241. (Pai(p1)^.typ = ait_instruction) And
  1242. (Pai(p1)^.typ = ait_instruction) And
  1243. (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
  1244. (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
  1245. (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
  1246. (Paicpu(p1)^.oper[2].typ = Paicpu(p2)^.oper[2].typ)
  1247. Then
  1248. {both instructions have the same structure:
  1249. "<operator> <operand of type1>, <operand of type 2>"}
  1250. If ((Paicpu(p1)^.opcode = A_MOV) or
  1251. (Paicpu(p1)^.opcode = A_MOVZX) or
  1252. (Paicpu(p1)^.opcode = A_MOVSX)) And
  1253. (Paicpu(p1)^.oper[0].typ = top_ref) {then .oper[1]t = top_reg} Then
  1254. If Not(RegInRef(Paicpu(p1)^.oper[1].reg, Paicpu(p1)^.oper[0].ref^)) Then
  1255. {the "old" instruction is a load of a register with a new value, not with
  1256. a value based on the contents of this register (so no "mov (reg), reg")}
  1257. If Not(RegInRef(Paicpu(p2)^.oper[1].reg, Paicpu(p2)^.oper[0].ref^)) And
  1258. RefsEqual(Paicpu(p1)^.oper[0].ref^, Paicpu(p2)^.oper[0].ref^)
  1259. Then
  1260. {the "new" instruction is also a load of a register with a new value, and
  1261. this value is fetched from the same memory location}
  1262. Begin
  1263. With Paicpu(p2)^.oper[0].ref^ Do
  1264. Begin
  1265. If Not(Base in [procinfo^.FramePointer, R_NO, R_ESP]) Then
  1266. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  1267. If Not(Index in [procinfo^.FramePointer, R_NO, R_ESP]) Then
  1268. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  1269. End;
  1270. {add the registers from the reference (.oper[0]) to the RegInfo, all registers
  1271. from the reference are the same in the old and in the new instruction
  1272. sequence}
  1273. AddOp2RegInfo(Paicpu(p1)^.oper[0], RegInfo);
  1274. {the registers from .oper[1] have to be equivalent, but not necessarily equal}
  1275. InstructionsEquivalent :=
  1276. RegsEquivalent(Paicpu(p1)^.oper[1].reg, Paicpu(p2)^.oper[1].reg, RegInfo, OpAct_Write);
  1277. End
  1278. {the registers are loaded with values from different memory locations. If
  1279. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1280. would be considered equivalent}
  1281. Else InstructionsEquivalent := False
  1282. Else
  1283. {load register with a value based on the current value of this register}
  1284. Begin
  1285. With Paicpu(p2)^.oper[0].ref^ Do
  1286. Begin
  1287. If Not(Base in [procinfo^.FramePointer,
  1288. Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP]) Then
  1289. {it won't do any harm if the register is already in RegsLoadedForRef}
  1290. Begin
  1291. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Base];
  1292. {$ifdef csdebug}
  1293. Writeln(att_reg2str[base], ' added');
  1294. {$endif csdebug}
  1295. end;
  1296. If Not(Index in [procinfo^.FramePointer,
  1297. Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP]) Then
  1298. Begin
  1299. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
  1300. {$ifdef csdebug}
  1301. Writeln(att_reg2str[index], ' added');
  1302. {$endif csdebug}
  1303. end;
  1304. End;
  1305. If Not(Reg32(Paicpu(p2)^.oper[1].reg) In [procinfo^.FramePointer,R_NO,R_ESP])
  1306. Then
  1307. Begin
  1308. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1309. [Reg32(Paicpu(p2)^.oper[1].reg)];
  1310. {$ifdef csdebug}
  1311. Writeln(att_reg2str[Reg32(Paicpu(p2)^.oper[1].reg)], ' removed');
  1312. {$endif csdebug}
  1313. end;
  1314. InstructionsEquivalent :=
  1315. OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Read) And
  1316. OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Write)
  1317. End
  1318. Else
  1319. {an instruction <> mov, movzx, movsx}
  1320. begin
  1321. {$ifdef csdebug}
  1322. hp := new(pai_asm_comment,init(strpnew('checking if equivalent')));
  1323. hp^.previous := p2;
  1324. hp^.next := p2^.next;
  1325. p2^.next^.previous := hp;
  1326. p2^.next := hp;
  1327. {$endif csdebug}
  1328. InstructionsEquivalent :=
  1329. OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Unknown) And
  1330. OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Unknown) And
  1331. OpsEquivalent(Paicpu(p1)^.oper[2], Paicpu(p2)^.oper[2], RegInfo, OpAct_Unknown)
  1332. end
  1333. {the instructions haven't even got the same structure, so they're certainly
  1334. not equivalent}
  1335. Else
  1336. begin
  1337. {$ifdef csdebug}
  1338. hp := new(pai_asm_comment,init(strpnew('different opcodes/format')));
  1339. hp^.previous := p2;
  1340. hp^.next := p2^.next;
  1341. p2^.next^.previous := hp;
  1342. p2^.next := hp;
  1343. {$endif csdebug}
  1344. InstructionsEquivalent := False;
  1345. end;
  1346. {$ifdef csdebug}
  1347. hp := new(pai_asm_comment,init(strpnew('instreq: '+tostr(byte(instructionsequivalent)))));
  1348. hp^.previous := p2;
  1349. hp^.next := p2^.next;
  1350. p2^.next^.previous := hp;
  1351. p2^.next := hp;
  1352. {$endif csdebug}
  1353. End;
  1354. (*
  1355. Function InstructionsEqual(p1, p2: Pai): Boolean;
  1356. Begin {checks whether two Paicpu instructions are equal}
  1357. InstructionsEqual :=
  1358. Assigned(p1) And Assigned(p2) And
  1359. ((Pai(p1)^.typ = ait_instruction) And
  1360. (Pai(p1)^.typ = ait_instruction) And
  1361. (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
  1362. (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
  1363. (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
  1364. OpsEqual(Paicpu(p1)^.oper[0].typ, Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0]) And
  1365. OpsEqual(Paicpu(p1)^.oper[1].typ, Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1]))
  1366. End;
  1367. *)
  1368. Procedure ReadReg(p: PPaiProp; Reg: TRegister);
  1369. Begin
  1370. Reg := Reg32(Reg);
  1371. If Reg in [R_EAX..R_EDI] Then
  1372. incState(p^.regs[Reg].rstate,1)
  1373. End;
  1374. Procedure ReadRef(p: PPaiProp; Ref: PReference);
  1375. Begin
  1376. If Ref^.Base <> R_NO Then
  1377. ReadReg(p, Ref^.Base);
  1378. If Ref^.Index <> R_NO Then
  1379. ReadReg(p, Ref^.Index);
  1380. End;
  1381. Procedure ReadOp(P: PPaiProp;const o:toper);
  1382. Begin
  1383. Case o.typ Of
  1384. top_reg: ReadReg(P, o.reg);
  1385. top_ref: ReadRef(P, o.ref);
  1386. top_symbol : ;
  1387. End;
  1388. End;
  1389. Function RefInInstruction(Const Ref: TReference; p: Pai;
  1390. RefsEq: TRefCompare): Boolean;
  1391. {checks whehter Ref is used in P}
  1392. Var TmpResult: Boolean;
  1393. Begin
  1394. TmpResult := False;
  1395. If (p^.typ = ait_instruction) Then
  1396. Begin
  1397. If (Paicpu(p)^.oper[0].typ = Top_Ref) Then
  1398. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[0].ref^);
  1399. If Not(TmpResult) And (Paicpu(p)^.oper[1].typ = Top_Ref) Then
  1400. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[1].ref^);
  1401. If Not(TmpResult) And (Paicpu(p)^.oper[2].typ = Top_Ref) Then
  1402. TmpResult := RefsEq(Ref, Paicpu(p)^.oper[2].ref^);
  1403. End;
  1404. RefInInstruction := TmpResult;
  1405. End;
  1406. Function RefInSequence(Const Ref: TReference; Content: TContent;
  1407. RefsEq: TRefCompare): Boolean;
  1408. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1409. Pai objects) to see whether Ref is used somewhere}
  1410. Var p: Pai;
  1411. Counter: Byte;
  1412. TmpResult: Boolean;
  1413. Begin
  1414. p := Content.StartMod;
  1415. TmpResult := False;
  1416. Counter := 1;
  1417. While Not(TmpResult) And
  1418. (Counter <= Content.NrOfMods) Do
  1419. Begin
  1420. If (p^.typ = ait_instruction) And
  1421. RefInInstruction(Ref, p, RefsEq)
  1422. Then TmpResult := True;
  1423. Inc(Counter);
  1424. GetNextInstruction(p,p)
  1425. End;
  1426. RefInSequence := TmpResult
  1427. End;
  1428. Function ArrayRefsEq(const r1, r2: TReference): Boolean;
  1429. Begin
  1430. ArrayRefsEq := (R1.Offset+R1.OffsetFixup = R2.Offset+R2.OffsetFixup) And
  1431. (R1.Segment = R2.Segment) And
  1432. (R1.Symbol=R2.Symbol) And
  1433. ((Assigned(R1.Symbol)) Or
  1434. (R1.Base = R2.Base))
  1435. End;
  1436. function writeToMemDestroysContents(regWritten: tregister; const ref: treference;
  1437. reg: tregister; const c: tcontent): boolean;
  1438. { returns whether the contents c of reg are invalid after regWritten is }
  1439. { is written to ref }
  1440. var
  1441. refsEq: trefCompare;
  1442. begin
  1443. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1444. begin
  1445. writeToMemDestroysContents := false;
  1446. exit;
  1447. end;
  1448. reg := reg32(reg);
  1449. regWritten := reg32(regWritten);
  1450. if (ref.base = procinfo^.framePointer) or
  1451. assigned(ref.symbol) Then
  1452. begin
  1453. if (ref.index <> R_NO) or
  1454. (assigned(ref.symbol) and
  1455. (ref.base <> R_NO)) then
  1456. { local/global variable or parameter which is an array }
  1457. refsEq := {$ifdef fpc}@{$endif}arrayRefsEq
  1458. else
  1459. { local/global variable or parameter which is not an array }
  1460. refsEq := {$ifdef fpc}@{$endif}refsEqual;
  1461. { write something to a parameter, a local or global variable, so }
  1462. { * with uncertain optimizations on: }
  1463. { - destroy the contents of registers whose contents have somewhere a }
  1464. { "mov?? (Ref), %reg". WhichReg (this is the register whose contents }
  1465. { are being written to memory) is not destroyed if it's StartMod is }
  1466. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1467. { pointer based on Ref) }
  1468. { * with uncertain optimizations off: }
  1469. { - also destroy registers that contain any pointer }
  1470. with c do
  1471. writeToMemDestroysContents :=
  1472. (typ in [con_ref,con_noRemoveRef]) and
  1473. ((not(cs_uncertainOpts in aktglobalswitches) and
  1474. (nrOfMods <> 1)
  1475. ) or
  1476. (refInSequence(ref,c,refsEq) and
  1477. ((reg <> regWritten) or
  1478. ((nrOfMods <> 1) and
  1479. {StarMod is always of the type ait_instruction}
  1480. (paicpu(StartMod)^.oper[0].typ = top_ref) and
  1481. refsEq(Paicpu(StartMod)^.oper[0].ref^, ref)
  1482. )
  1483. )
  1484. )
  1485. )
  1486. end
  1487. else
  1488. { write something to a pointer location, so }
  1489. { * with uncertain optimzations on: }
  1490. { - do not destroy registers which contain a local/global variable or }
  1491. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1492. { * with uncertain optimzations off: }
  1493. { - destroy every register which contains a memory location }
  1494. with c do
  1495. writeToMemDestroysContents :=
  1496. (typ in [con_ref,con_noRemoveRef]) and
  1497. (not(cs_UncertainOpts in aktglobalswitches) or
  1498. { for movsl }
  1499. ((ref.base = R_EDI) and (ref.index = R_EDI)) or
  1500. { don't destroy if reg contains a parameter, local or global variable }
  1501. not((nrOfMods = 1) and
  1502. (paicpu(startMod)^.oper[0].typ = top_ref) and
  1503. ((paicpu(startMod)^.oper[0].ref^.base = procinfo^.framePointer) or
  1504. assigned(paicpu(startMod)^.oper[0].ref^.symbol)
  1505. )
  1506. )
  1507. )
  1508. end;
  1509. function writeDestroysContents(const op: toper; reg: tregister;
  1510. const c: tcontent): boolean;
  1511. { returns whether the contents c of reg are invalid after regWritten is }
  1512. { is written to op }
  1513. begin
  1514. reg := reg32(reg);
  1515. case op.typ of
  1516. top_reg:
  1517. writeDestroysContents :=
  1518. (c.typ <> con_unknown) and
  1519. sequenceDependsOnReg(c,reg,reg32(op.reg));
  1520. top_ref:
  1521. writeDestroysContents :=
  1522. writeToMemDestroysContents(R_NO,op.ref^,reg,c);
  1523. else
  1524. writeDestroysContents := false;
  1525. end;
  1526. end;
  1527. procedure destroyRefs(p: pai; const ref: treference; regWritten: tregister);
  1528. { destroys all registers which possibly contain a reference to Ref, regWritten }
  1529. { is the register whose contents are being written to memory (if this proc }
  1530. { is called because of a "mov?? %reg, (mem)" instruction) }
  1531. var
  1532. counter: TRegister;
  1533. begin
  1534. for counter := R_EAX to R_EDI Do
  1535. if writeToMemDestroysContents(regWritten,ref,counter,
  1536. ppaiProp(p^.optInfo)^.regs[counter]) then
  1537. destroyReg(ppaiProp(p^.optInfo), counter, false)
  1538. End;
  1539. Procedure DestroyAllRegs(p: PPaiProp);
  1540. Var Counter: TRegister;
  1541. Begin {initializes/desrtoys all registers}
  1542. For Counter := R_EAX To R_EDI Do
  1543. Begin
  1544. ReadReg(p, Counter);
  1545. DestroyReg(p, Counter, true);
  1546. End;
  1547. p^.DirFlag := F_Unknown;
  1548. End;
  1549. Procedure DestroyOp(PaiObj: Pai; const o:Toper);
  1550. {$ifdef statedebug}
  1551. var hp: pai;
  1552. {$endif statedebug}
  1553. Begin
  1554. Case o.typ Of
  1555. top_reg:
  1556. begin
  1557. {$ifdef statedebug}
  1558. hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[o.reg])));
  1559. hp^.next := paiobj^.next;
  1560. hp^.previous := paiobj;
  1561. paiobj^.next := hp;
  1562. if assigned(hp^.next) then
  1563. hp^.next^.previous := hp;
  1564. {$endif statedebug}
  1565. DestroyReg(PPaiProp(PaiObj^.OptInfo), reg32(o.reg), true);
  1566. end;
  1567. top_ref:
  1568. Begin
  1569. ReadRef(PPaiProp(PaiObj^.OptInfo), o.ref);
  1570. DestroyRefs(PaiObj, o.ref^, R_NO);
  1571. End;
  1572. top_symbol:;
  1573. End;
  1574. End;
  1575. Function DFAPass1(AsmL: PAasmOutput; BlockStart: Pai): Pai;
  1576. {gathers the RegAlloc data... still need to think about where to store it to
  1577. avoid global vars}
  1578. Var BlockEnd: Pai;
  1579. Begin
  1580. BlockEnd := FindLoHiLabels(LoLab, HiLab, LabDif, BlockStart);
  1581. BuildLabelTableAndFixRegAlloc(AsmL, LTable, LoLab, LabDif, BlockStart, BlockEnd);
  1582. DFAPass1 := BlockEnd;
  1583. End;
  1584. Procedure AddInstr2RegContents({$ifdef statedebug} asml: paasmoutput; {$endif}
  1585. p: paicpu; reg: TRegister);
  1586. {$ifdef statedebug}
  1587. var hp: pai;
  1588. {$endif statedebug}
  1589. Begin
  1590. Reg := Reg32(Reg);
  1591. With PPaiProp(p^.optinfo)^.Regs[reg] Do
  1592. if (typ in [con_ref,con_noRemoveRef])
  1593. Then
  1594. Begin
  1595. incState(wstate,1);
  1596. {also store how many instructions are part of the sequence in the first
  1597. instructions PPaiProp, so it can be easily accessed from within
  1598. CheckSequence}
  1599. Inc(NrOfMods, NrOfInstrSinceLastMod[Reg]);
  1600. PPaiProp(Pai(StartMod)^.OptInfo)^.Regs[Reg].NrOfMods := NrOfMods;
  1601. NrOfInstrSinceLastMod[Reg] := 0;
  1602. {$ifdef StateDebug}
  1603. hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState)
  1604. + ' -- ' + tostr(PPaiProp(p^.optinfo)^.Regs[reg].nrofmods))));
  1605. InsertLLItem(AsmL, p, p^.next, hp);
  1606. {$endif StateDebug}
  1607. End
  1608. Else
  1609. Begin
  1610. {$ifdef statedebug}
  1611. hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[reg])));
  1612. insertllitem(asml,p,p^.next,hp);
  1613. {$endif statedebug}
  1614. DestroyReg(PPaiProp(p^.optinfo), Reg, true);
  1615. {$ifdef StateDebug}
  1616. hp := new(pai_asm_comment,init(strpnew(att_reg2str[reg]+': '+tostr(PPaiProp(p^.optinfo)^.Regs[reg].WState))));
  1617. InsertLLItem(AsmL, p, p^.next, hp);
  1618. {$endif StateDebug}
  1619. End
  1620. End;
  1621. Procedure AddInstr2OpContents({$ifdef statedebug} asml: paasmoutput; {$endif}
  1622. p: paicpu; const oper: TOper);
  1623. Begin
  1624. If oper.typ = top_reg Then
  1625. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, oper.reg)
  1626. Else
  1627. Begin
  1628. ReadOp(PPaiProp(p^.optinfo), oper);
  1629. DestroyOp(p, oper);
  1630. End
  1631. End;
  1632. Procedure DoDFAPass2(
  1633. {$Ifdef StateDebug}
  1634. AsmL: PAasmOutput;
  1635. {$endif statedebug}
  1636. BlockStart, BlockEnd: Pai);
  1637. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  1638. contents for the instructions starting with p. Returns the last pai which has
  1639. been processed}
  1640. Var
  1641. CurProp: PPaiProp;
  1642. Cnt, InstrCnt : Longint;
  1643. InstrProp: TInsProp;
  1644. UsedRegs: TRegSet;
  1645. p, hp : Pai;
  1646. TmpRef: TReference;
  1647. TmpReg: TRegister;
  1648. {$ifdef AnalyzeLoops}
  1649. TmpState: Byte;
  1650. {$endif AnalyzeLoops}
  1651. Begin
  1652. p := BlockStart;
  1653. UsedRegs := [];
  1654. UpdateUsedregs(UsedRegs, p);
  1655. SkipHead(P);
  1656. BlockStart := p;
  1657. InstrCnt := 1;
  1658. FillChar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  1659. While (P <> BlockEnd) Do
  1660. Begin
  1661. CurProp := @PaiPropBlock^[InstrCnt];
  1662. If (p <> BlockStart)
  1663. Then
  1664. Begin
  1665. {$ifdef JumpAnal}
  1666. If (p^.Typ <> ait_label) Then
  1667. {$endif JumpAnal}
  1668. Begin
  1669. GetLastInstruction(p, hp);
  1670. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1671. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1672. End
  1673. End
  1674. Else
  1675. Begin
  1676. FillChar(CurProp^, SizeOf(CurProp^), 0);
  1677. { For TmpReg := R_EAX to R_EDI Do
  1678. CurProp^.Regs[TmpReg].WState := 1;}
  1679. End;
  1680. CurProp^.UsedRegs := UsedRegs;
  1681. CurProp^.CanBeRemoved := False;
  1682. UpdateUsedRegs(UsedRegs, Pai(p^.Next));
  1683. For TmpReg := R_EAX To R_EDI Do
  1684. Inc(NrOfInstrSinceLastMod[TmpReg]);
  1685. Case p^.typ Of
  1686. ait_marker:;
  1687. ait_label:
  1688. {$Ifndef JumpAnal}
  1689. If not labelCanBeSkipped(pai_label(p)) Then
  1690. DestroyAllRegs(CurProp);
  1691. {$Else JumpAnal}
  1692. Begin
  1693. If not labelCanBeSkipped(pai_label(p)) Then
  1694. With LTable^[Pai_Label(p)^.l^.labelnr-LoLab] Do
  1695. {$IfDef AnalyzeLoops}
  1696. If (RefsFound = Pai_Label(p)^.l^.RefCount)
  1697. {$Else AnalyzeLoops}
  1698. If (JmpsProcessed = Pai_Label(p)^.l^.RefCount)
  1699. {$EndIf AnalyzeLoops}
  1700. Then
  1701. {all jumps to this label have been found}
  1702. {$IfDef AnalyzeLoops}
  1703. If (JmpsProcessed > 0)
  1704. Then
  1705. {$EndIf AnalyzeLoops}
  1706. {we've processed at least one jump to this label}
  1707. Begin
  1708. If (GetLastInstruction(p, hp) And
  1709. Not(((hp^.typ = ait_instruction)) And
  1710. (paicpu_labeled(hp)^.is_jmp))
  1711. Then
  1712. {previous instruction not a JMP -> the contents of the registers after the
  1713. previous intruction has been executed have to be taken into account as well}
  1714. For TmpReg := R_EAX to R_EDI Do
  1715. Begin
  1716. If (CurProp^.Regs[TmpReg].WState <>
  1717. PPaiProp(hp^.OptInfo)^.Regs[TmpReg].WState)
  1718. Then DestroyReg(CurProp, TmpReg, true)
  1719. End
  1720. End
  1721. {$IfDef AnalyzeLoops}
  1722. Else
  1723. {a label from a backward jump (e.g. a loop), no jump to this label has
  1724. already been processed}
  1725. If GetLastInstruction(p, hp) And
  1726. Not(hp^.typ = ait_instruction) And
  1727. (paicpu_labeled(hp)^.opcode = A_JMP))
  1728. Then
  1729. {previous instruction not a jmp, so keep all the registers' contents from the
  1730. previous instruction}
  1731. Begin
  1732. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1733. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1734. End
  1735. Else
  1736. {previous instruction a jmp and no jump to this label processed yet}
  1737. Begin
  1738. hp := p;
  1739. Cnt := InstrCnt;
  1740. {continue until we find a jump to the label or a label which has already
  1741. been processed}
  1742. While GetNextInstruction(hp, hp) And
  1743. Not((hp^.typ = ait_instruction) And
  1744. (paicpu(hp)^.is_jmp) and
  1745. (pasmlabel(paicpu(hp)^.oper[0].sym)^.labelnr = Pai_Label(p)^.l^.labelnr)) And
  1746. Not((hp^.typ = ait_label) And
  1747. (LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].RefsFound
  1748. = Pai_Label(hp)^.l^.RefCount) And
  1749. (LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  1750. Inc(Cnt);
  1751. If (hp^.typ = ait_label)
  1752. Then
  1753. {there's a processed label after the current one}
  1754. Begin
  1755. CurProp^.Regs := PaiPropBlock^[Cnt].Regs;
  1756. CurProp^.DirFlag := PaiPropBlock^[Cnt].DirFlag;
  1757. End
  1758. Else
  1759. {there's no label anymore after the current one, or they haven't been
  1760. processed yet}
  1761. Begin
  1762. GetLastInstruction(p, hp);
  1763. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1764. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1765. DestroyAllRegs(PPaiProp(hp^.OptInfo))
  1766. End
  1767. End
  1768. {$EndIf AnalyzeLoops}
  1769. Else
  1770. {not all references to this label have been found, so destroy all registers}
  1771. Begin
  1772. GetLastInstruction(p, hp);
  1773. CurProp^.Regs := PPaiProp(hp^.OptInfo)^.Regs;
  1774. CurProp^.DirFlag := PPaiProp(hp^.OptInfo)^.DirFlag;
  1775. DestroyAllRegs(CurProp)
  1776. End;
  1777. End;
  1778. {$EndIf JumpAnal}
  1779. {$ifdef GDB}
  1780. ait_stabs, ait_stabn, ait_stab_function_name:;
  1781. {$endif GDB}
  1782. ait_align: ; { may destroy flags !!! }
  1783. ait_instruction:
  1784. Begin
  1785. if paicpu(p)^.is_jmp then
  1786. begin
  1787. {$IfNDef JumpAnal}
  1788. for tmpReg := R_EAX to R_EDI do
  1789. with curProp^.regs[tmpReg] do
  1790. case typ of
  1791. con_ref: typ := con_noRemoveRef;
  1792. con_const: typ := con_noRemoveConst;
  1793. con_invalid: typ := con_unknown;
  1794. end;
  1795. {$Else JumpAnal}
  1796. With LTable^[pasmlabel(paicpu(p)^.oper[0].sym)^.labelnr-LoLab] Do
  1797. If (RefsFound = pasmlabel(paicpu(p)^.oper[0].sym)^.RefCount) Then
  1798. Begin
  1799. If (InstrCnt < InstrNr)
  1800. Then
  1801. {forward jump}
  1802. If (JmpsProcessed = 0) Then
  1803. {no jump to this label has been processed yet}
  1804. Begin
  1805. PaiPropBlock^[InstrNr].Regs := CurProp^.Regs;
  1806. PaiPropBlock^[InstrNr].DirFlag := CurProp^.DirFlag;
  1807. Inc(JmpsProcessed);
  1808. End
  1809. Else
  1810. Begin
  1811. For TmpReg := R_EAX to R_EDI Do
  1812. If (PaiPropBlock^[InstrNr].Regs[TmpReg].WState <>
  1813. CurProp^.Regs[TmpReg].WState) Then
  1814. DestroyReg(@PaiPropBlock^[InstrNr], TmpReg, true);
  1815. Inc(JmpsProcessed);
  1816. End
  1817. {$ifdef AnalyzeLoops}
  1818. Else
  1819. { backward jump, a loop for example}
  1820. { If (JmpsProcessed > 0) Or
  1821. Not(GetLastInstruction(PaiObj, hp) And
  1822. (hp^.typ = ait_labeled_instruction) And
  1823. (paicpu_labeled(hp)^.opcode = A_JMP))
  1824. Then}
  1825. {instruction prior to label is not a jmp, or at least one jump to the label
  1826. has yet been processed}
  1827. Begin
  1828. Inc(JmpsProcessed);
  1829. For TmpReg := R_EAX to R_EDI Do
  1830. If (PaiPropBlock^[InstrNr].Regs[TmpReg].WState <>
  1831. CurProp^.Regs[TmpReg].WState)
  1832. Then
  1833. Begin
  1834. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1835. Cnt := InstrNr;
  1836. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1837. Begin
  1838. DestroyReg(@PaiPropBlock^[Cnt], TmpReg, true);
  1839. Inc(Cnt);
  1840. End;
  1841. While (Cnt <= InstrCnt) Do
  1842. Begin
  1843. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].WState);
  1844. Inc(Cnt)
  1845. End
  1846. End;
  1847. End
  1848. { Else }
  1849. {instruction prior to label is a jmp and no jumps to the label have yet been
  1850. processed}
  1851. { Begin
  1852. Inc(JmpsProcessed);
  1853. For TmpReg := R_EAX to R_EDI Do
  1854. Begin
  1855. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1856. Cnt := InstrNr;
  1857. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1858. Begin
  1859. PaiPropBlock^[Cnt].Regs[TmpReg] := CurProp^.Regs[TmpReg];
  1860. Inc(Cnt);
  1861. End;
  1862. TmpState := PaiPropBlock^[InstrNr].Regs[TmpReg].WState;
  1863. While (TmpState = PaiPropBlock^[Cnt].Regs[TmpReg].WState) Do
  1864. Begin
  1865. DestroyReg(@PaiPropBlock^[Cnt], TmpReg, true);
  1866. Inc(Cnt);
  1867. End;
  1868. While (Cnt <= InstrCnt) Do
  1869. Begin
  1870. Inc(PaiPropBlock^[Cnt].Regs[TmpReg].WState);
  1871. Inc(Cnt)
  1872. End
  1873. End
  1874. End}
  1875. {$endif AnalyzeLoops}
  1876. End;
  1877. {$EndIf JumpAnal}
  1878. end
  1879. else
  1880. begin
  1881. InstrProp := InsProp[Paicpu(p)^.opcode];
  1882. Case Paicpu(p)^.opcode Of
  1883. A_MOV, A_MOVZX, A_MOVSX:
  1884. Begin
  1885. Case Paicpu(p)^.oper[0].typ Of
  1886. Top_Reg:
  1887. Case Paicpu(p)^.oper[1].typ Of
  1888. Top_Reg:
  1889. Begin
  1890. {$ifdef statedebug}
  1891. hp := new(pai_asm_comment,init(strpnew('destroying '+
  1892. att_reg2str[Paicpu(p)^.oper[1].reg])));
  1893. insertllitem(asml,p,p^.next,hp);
  1894. {$endif statedebug}
  1895. DestroyReg(CurProp, Paicpu(p)^.oper[1].reg, true);
  1896. ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
  1897. { CurProp^.Regs[Paicpu(p)^.oper[1].reg] :=
  1898. CurProp^.Regs[Paicpu(p)^.oper[0].reg];
  1899. If (CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg = R_NO) Then
  1900. CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg :=
  1901. Paicpu(p)^.oper[0].reg;}
  1902. End;
  1903. Top_Ref:
  1904. Begin
  1905. ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
  1906. ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
  1907. DestroyRefs(p, Paicpu(p)^.oper[1].ref^, Paicpu(p)^.oper[0].reg);
  1908. End;
  1909. End;
  1910. Top_Ref:
  1911. Begin {destination is always a register in this case}
  1912. ReadRef(CurProp, Paicpu(p)^.oper[0].ref);
  1913. TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
  1914. If RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^) And
  1915. (curProp^.regs[tmpReg].typ in [con_ref,con_noRemoveRef])
  1916. Then
  1917. Begin
  1918. With CurProp^.Regs[TmpReg] Do
  1919. Begin
  1920. incState(wstate,1);
  1921. {also store how many instructions are part of the sequence in the first
  1922. instructions PPaiProp, so it can be easily accessed from within
  1923. CheckSequence}
  1924. Inc(NrOfMods, NrOfInstrSinceLastMod[TmpReg]);
  1925. PPaiProp(Pai(StartMod)^.OptInfo)^.Regs[TmpReg].NrOfMods := NrOfMods;
  1926. NrOfInstrSinceLastMod[TmpReg] := 0;
  1927. { Destroy the contents of the registers }
  1928. { that depended on the previous value of }
  1929. { this register }
  1930. invalidateDepedingRegs(curProp,tmpReg);
  1931. End;
  1932. End
  1933. Else
  1934. Begin
  1935. {$ifdef statedebug}
  1936. hp := new(pai_asm_comment,init(strpnew('destroying & initing '+att_reg2str[tmpreg])));
  1937. insertllitem(asml,p,p^.next,hp);
  1938. {$endif statedebug}
  1939. DestroyReg(CurProp, TmpReg, true);
  1940. If Not(RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^)) Then
  1941. With CurProp^.Regs[TmpReg] Do
  1942. Begin
  1943. Typ := Con_Ref;
  1944. StartMod := p;
  1945. NrOfMods := 1;
  1946. End
  1947. End;
  1948. {$ifdef StateDebug}
  1949. hp := new(pai_asm_comment,init(strpnew(att_reg2str[TmpReg]+': '+tostr(CurProp^.Regs[TmpReg].WState))));
  1950. InsertLLItem(AsmL, p, p^.next, hp);
  1951. {$endif StateDebug}
  1952. End;
  1953. top_symbol,Top_Const:
  1954. Begin
  1955. Case Paicpu(p)^.oper[1].typ Of
  1956. Top_Reg:
  1957. Begin
  1958. TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
  1959. {$ifdef statedebug}
  1960. hp := new(pai_asm_comment,init(strpnew('destroying '+att_reg2str[tmpreg])));
  1961. insertllitem(asml,p,p^.next,hp);
  1962. {$endif statedebug}
  1963. With CurProp^.Regs[TmpReg] Do
  1964. Begin
  1965. DestroyReg(CurProp, TmpReg, true);
  1966. typ := Con_Const;
  1967. StartMod := p;
  1968. End
  1969. End;
  1970. Top_Ref:
  1971. Begin
  1972. ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
  1973. DestroyRefs(P, Paicpu(p)^.oper[1].ref^, R_NO);
  1974. End;
  1975. End;
  1976. End;
  1977. End;
  1978. End;
  1979. A_DIV, A_IDIV, A_MUL:
  1980. Begin
  1981. ReadOp(Curprop, Paicpu(p)^.oper[0]);
  1982. ReadReg(CurProp,R_EAX);
  1983. If (Paicpu(p)^.OpCode = A_IDIV) or
  1984. (Paicpu(p)^.OpCode = A_DIV) Then
  1985. ReadReg(CurProp,R_EDX);
  1986. {$ifdef statedebug}
  1987. hp := new(pai_asm_comment,init(strpnew('destroying eax and edx')));
  1988. insertllitem(asml,p,p^.next,hp);
  1989. {$endif statedebug}
  1990. DestroyReg(CurProp, R_EAX, true);
  1991. DestroyReg(CurProp, R_EDX, true)
  1992. End;
  1993. A_IMUL:
  1994. Begin
  1995. ReadOp(CurProp,Paicpu(p)^.oper[0]);
  1996. ReadOp(CurProp,Paicpu(p)^.oper[1]);
  1997. If (Paicpu(p)^.oper[2].typ = top_none) Then
  1998. If (Paicpu(p)^.oper[1].typ = top_none) Then
  1999. Begin
  2000. ReadReg(CurProp,R_EAX);
  2001. {$ifdef statedebug}
  2002. hp := new(pai_asm_comment,init(strpnew('destroying eax and edx')));
  2003. insertllitem(asml,p,p^.next,hp);
  2004. {$endif statedebug}
  2005. DestroyReg(CurProp, R_EAX, true);
  2006. DestroyReg(CurProp, R_EDX, true)
  2007. End
  2008. Else
  2009. AddInstr2OpContents(
  2010. {$ifdef statedebug}asml,{$endif}
  2011. Paicpu(p), Paicpu(p)^.oper[1])
  2012. Else
  2013. AddInstr2OpContents({$ifdef statedebug}asml,{$endif}
  2014. Paicpu(p), Paicpu(p)^.oper[2]);
  2015. End;
  2016. A_LEA:
  2017. begin
  2018. readop(curprop,paicpu(p)^.oper[0]);
  2019. if reginref(paicpu(p)^.oper[1].reg,paicpu(p)^.oper[0].ref^) then
  2020. AddInstr2RegContents({$ifdef statedebug}asml,{$endif}
  2021. paicpu(p), paicpu(p)^.oper[1].reg)
  2022. else
  2023. begin
  2024. {$ifdef statedebug}
  2025. hp := new(pai_asm_comment,init(strpnew('destroying '+
  2026. att_reg2str[paicpu(p)^.oper[1].reg])));
  2027. insertllitem(asml,p,p^.next,hp);
  2028. {$endif statedebug}
  2029. destroyreg(curprop,paicpu(p)^.oper[1].reg,true);
  2030. end;
  2031. end;
  2032. Else
  2033. Begin
  2034. Cnt := 1;
  2035. While (Cnt <= MaxCh) And
  2036. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2037. Begin
  2038. Case InstrProp.Ch[Cnt] Of
  2039. Ch_REAX..Ch_REDI: ReadReg(CurProp,TCh2Reg(InstrProp.Ch[Cnt]));
  2040. Ch_WEAX..Ch_RWEDI:
  2041. Begin
  2042. If (InstrProp.Ch[Cnt] >= Ch_RWEAX) Then
  2043. ReadReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]));
  2044. {$ifdef statedebug}
  2045. hp := new(pai_asm_comment,init(strpnew('destroying '+
  2046. att_reg2str[TCh2Reg(InstrProp.Ch[Cnt])])));
  2047. insertllitem(asml,p,p^.next,hp);
  2048. {$endif statedebug}
  2049. DestroyReg(CurProp, TCh2Reg(InstrProp.Ch[Cnt]), true);
  2050. End;
  2051. Ch_MEAX..Ch_MEDI:
  2052. AddInstr2RegContents({$ifdef statedebug} asml,{$endif}
  2053. Paicpu(p),TCh2Reg(InstrProp.Ch[Cnt]));
  2054. Ch_CDirFlag: CurProp^.DirFlag := F_NotSet;
  2055. Ch_SDirFlag: CurProp^.DirFlag := F_Set;
  2056. Ch_Rop1: ReadOp(CurProp, Paicpu(p)^.oper[0]);
  2057. Ch_Rop2: ReadOp(CurProp, Paicpu(p)^.oper[1]);
  2058. Ch_ROp3: ReadOp(CurProp, Paicpu(p)^.oper[2]);
  2059. Ch_Wop1..Ch_RWop1:
  2060. Begin
  2061. If (InstrProp.Ch[Cnt] in [Ch_RWop1]) Then
  2062. ReadOp(CurProp, Paicpu(p)^.oper[0]);
  2063. DestroyOp(p, Paicpu(p)^.oper[0]);
  2064. End;
  2065. Ch_Mop1:
  2066. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  2067. Paicpu(p), Paicpu(p)^.oper[0]);
  2068. Ch_Wop2..Ch_RWop2:
  2069. Begin
  2070. If (InstrProp.Ch[Cnt] = Ch_RWop2) Then
  2071. ReadOp(CurProp, Paicpu(p)^.oper[1]);
  2072. DestroyOp(p, Paicpu(p)^.oper[1]);
  2073. End;
  2074. Ch_Mop2:
  2075. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  2076. Paicpu(p), Paicpu(p)^.oper[1]);
  2077. Ch_WOp3..Ch_RWOp3:
  2078. Begin
  2079. If (InstrProp.Ch[Cnt] = Ch_RWOp3) Then
  2080. ReadOp(CurProp, Paicpu(p)^.oper[2]);
  2081. DestroyOp(p, Paicpu(p)^.oper[2]);
  2082. End;
  2083. Ch_Mop3:
  2084. AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
  2085. Paicpu(p), Paicpu(p)^.oper[2]);
  2086. Ch_WMemEDI:
  2087. Begin
  2088. ReadReg(CurProp, R_EDI);
  2089. FillChar(TmpRef, SizeOf(TmpRef), 0);
  2090. TmpRef.Base := R_EDI;
  2091. tmpRef.index := R_EDI;
  2092. DestroyRefs(p, TmpRef, R_NO)
  2093. End;
  2094. Ch_RFlags, Ch_WFlags, Ch_RWFlags, Ch_FPU:
  2095. Else
  2096. Begin
  2097. {$ifdef statedebug}
  2098. hp := new(pai_asm_comment,init(strpnew(
  2099. 'destroying all regs for prev instruction')));
  2100. insertllitem(asml,p, p^.next,hp);
  2101. {$endif statedebug}
  2102. DestroyAllRegs(CurProp);
  2103. End;
  2104. End;
  2105. Inc(Cnt);
  2106. End
  2107. End;
  2108. end;
  2109. End;
  2110. End
  2111. Else
  2112. Begin
  2113. {$ifdef statedebug}
  2114. hp := new(pai_asm_comment,init(strpnew(
  2115. 'destroying all regs: unknown pai: '+tostr(ord(p^.typ)))));
  2116. insertllitem(asml,p, p^.next,hp);
  2117. {$endif statedebug}
  2118. DestroyAllRegs(CurProp);
  2119. End;
  2120. End;
  2121. Inc(InstrCnt);
  2122. GetNextInstruction(p, p);
  2123. End;
  2124. End;
  2125. Function InitDFAPass2(BlockStart, BlockEnd: Pai): Boolean;
  2126. {reserves memory for the PPaiProps in one big memory block when not using
  2127. TP, returns False if not enough memory is available for the optimizer in all
  2128. cases}
  2129. Var p: Pai;
  2130. Count: Longint;
  2131. { TmpStr: String; }
  2132. Begin
  2133. P := BlockStart;
  2134. SkipHead(P);
  2135. NrOfPaiObjs := 0;
  2136. While (P <> BlockEnd) Do
  2137. Begin
  2138. {$IfDef JumpAnal}
  2139. Case P^.Typ Of
  2140. ait_label:
  2141. Begin
  2142. If not labelCanBeSkipped(pai_label(p)) Then
  2143. LTable^[Pai_Label(P)^.l^.labelnr-LoLab].InstrNr := NrOfPaiObjs
  2144. End;
  2145. ait_instruction:
  2146. begin
  2147. if paicpu(p)^.is_jmp then
  2148. begin
  2149. If (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr >= LoLab) And
  2150. (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr <= HiLab) Then
  2151. Inc(LTable^[pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr-LoLab].RefsFound);
  2152. end;
  2153. end;
  2154. { ait_instruction:
  2155. Begin
  2156. If (Paicpu(p)^.opcode = A_PUSH) And
  2157. (Paicpu(p)^.oper[0].typ = top_symbol) And
  2158. (PCSymbol(Paicpu(p)^.oper[0])^.offset = 0) Then
  2159. Begin
  2160. TmpStr := StrPas(PCSymbol(Paicpu(p)^.oper[0])^.symbol);
  2161. If}
  2162. End;
  2163. {$EndIf JumpAnal}
  2164. Inc(NrOfPaiObjs);
  2165. GetNextInstruction(p, p);
  2166. End;
  2167. {Uncomment the next line to see how much memory the reloading optimizer needs}
  2168. { Writeln((NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4)));}
  2169. {no need to check mem/maxavail, we've got as much virtual memory as we want}
  2170. If NrOfPaiObjs <> 0 Then
  2171. Begin
  2172. InitDFAPass2 := True;
  2173. GetMem(PaiPropBlock, NrOfPaiObjs*(((SizeOf(TPaiProp)+3)div 4)*4));
  2174. p := BlockStart;
  2175. SkipHead(p);
  2176. For Count := 1 To NrOfPaiObjs Do
  2177. Begin
  2178. PPaiProp(p^.OptInfo) := @PaiPropBlock^[Count];
  2179. GetNextInstruction(p, p);
  2180. End;
  2181. End
  2182. Else InitDFAPass2 := False;
  2183. End;
  2184. Function DFAPass2(
  2185. {$ifdef statedebug}
  2186. AsmL: PAasmOutPut;
  2187. {$endif statedebug}
  2188. BlockStart, BlockEnd: Pai): Boolean;
  2189. Begin
  2190. If InitDFAPass2(BlockStart, BlockEnd) Then
  2191. Begin
  2192. DoDFAPass2(
  2193. {$ifdef statedebug}
  2194. asml,
  2195. {$endif statedebug}
  2196. BlockStart, BlockEnd);
  2197. DFAPass2 := True
  2198. End
  2199. Else DFAPass2 := False;
  2200. End;
  2201. Procedure ShutDownDFA;
  2202. Begin
  2203. If LabDif <> 0 Then
  2204. FreeMem(LTable, LabDif*SizeOf(TLabelTableItem));
  2205. End;
  2206. End.
  2207. {
  2208. $Log$
  2209. Revision 1.14 2000-09-29 23:14:11 jonas
  2210. + writeToMemDestroysContents() and writeDestroysContents() to support the
  2211. new features of the CSE
  2212. Revision 1.13 2000/09/25 09:50:30 jonas
  2213. - removed TP conditional code
  2214. Revision 1.12 2000/09/24 21:19:50 peter
  2215. * delphi compile fixes
  2216. Revision 1.11 2000/09/24 15:06:15 peter
  2217. * use defines.inc
  2218. Revision 1.10 2000/09/22 15:00:20 jonas
  2219. * fixed bug in regsEquivalent (in some rare cases, registers with
  2220. completely unrelated content were considered equivalent) (merged
  2221. from fixes branch)
  2222. Revision 1.9 2000/09/20 15:00:58 jonas
  2223. + much improved CSE: the CSE now searches further back for sequences it
  2224. can reuse. After I've also implemented register renaming, the effect
  2225. should be even better (afaik web bug 1088 will then even be optimized
  2226. properly). I don't know about the slow down factor this adds. Maybe
  2227. a new optimization level should be introduced?
  2228. Revision 1.8 2000/08/25 19:39:18 jonas
  2229. * bugfix to FindRegAlloc function (caused wrong regalloc info in
  2230. some cases) (merged from fixes branch)
  2231. Revision 1.7 2000/08/23 12:55:10 jonas
  2232. * fix for web bug 1112 and a bit of clean up in csopt386 (merged from
  2233. fixes branch)
  2234. Revision 1.6 2000/08/19 17:53:29 jonas
  2235. * fixed a potential bug in destroyregs regarding the removal of
  2236. unused loads
  2237. * added destroyDependingRegs() procedure and use it for the fix in
  2238. the previous commit (safer/more complete than what was done before)
  2239. Revision 1.5 2000/08/19 09:08:59 jonas
  2240. * fixed bug where the contents of a register would not be destroyed
  2241. if another register on which these contents depend is modified
  2242. (not really merged, but same idea as fix in fixes branch,
  2243. LAST_MERGE tag is updated)
  2244. Revision 1.4 2000/07/21 15:19:54 jonas
  2245. * daopt386: changes to getnextinstruction/getlastinstruction so they
  2246. ignore labels who have is_addr set
  2247. + daopt386/csopt386: remove loads of registers which are overwritten
  2248. before their contents are used (especially usefull for removing superfluous
  2249. maybe_loadesi outputs and push/pops transformed by below optimization
  2250. + popt386: transform pop/pop/pop/.../push/push/push to sequences of
  2251. 'movl x(%esp),%reg' (only active when compiling a go32v2 compiler
  2252. currently because I don't know whether it's safe to do this under Win32/
  2253. Linux (because of problems we had when using esp as frame pointer on
  2254. those os'es)
  2255. Revision 1.3 2000/07/14 05:11:48 michael
  2256. + Patch to 1.1
  2257. Revision 1.2 2000/07/13 11:32:40 michael
  2258. + removed logs
  2259. }