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aasmcpu.pas
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ccdd4437d6
* arm thumb: do not cause bxx getting too long ranges when inserting constant blocks
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12 anni fa |
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agarmgas.pas
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07762e5c25
+ proper assembler command line parameters for arm thumb
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12 anni fa |
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aoptcpu.pas
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c4263ced51
Disable one peephole optimization for Thumb
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12 anni fa |
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aoptcpub.pas
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7e5b8584cf
* set MaxOps to 4 for the optimizer because fpc generates now mla instructions
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13 anni fa |
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aoptcpuc.pas
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790a4fe2d3
* log and id tags removed
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20 anni fa |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 anni fa |
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armatt.inc
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ac4a6accd3
+ SVC instruction
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12 anni fa |
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armatts.inc
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ac4a6accd3
+ SVC instruction
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12 anni fa |
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armins.dat
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ac4a6accd3
+ SVC instruction
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12 anni fa |
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armnop.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 anni fa |
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armop.inc
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ac4a6accd3
+ SVC instruction
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12 anni fa |
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armreg.dat
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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armtab.inc
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666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
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13 anni fa |
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cgcpu.pas
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0bb8d24e24
Add some immediate forms of shift instructions to tcgthumb.a_op_const_reg
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12 anni fa |
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cpubase.pas
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086ae4b999
Merge r22905 and r22906
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12 anni fa |
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cpuelf.pas
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32ffddaad8
+ ELF linker back-ends for ARM and MIPS.
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12 anni fa |
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cpuinfo.pas
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0e9b8adb7a
patch by Michael Ring:
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12 anni fa |
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cpunode.pas
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638d0d49c0
+ take advantage of the mla instruction when calculating array offsets
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13 anni fa |
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cpupara.pas
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79334242a2
* arm thumb uses always the stack pointer as frame pointer
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12 anni fa |
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cpupi.pas
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7ba197a221
* fix stack parameter handling for arm thumb
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12 anni fa |
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cputarg.pas
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d26f0552a0
* Sync with trunk r23404.
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12 anni fa |
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hlcgcpu.pas
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72e9cfee24
* create/destroy also the high level code generator for all architectures,
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14 anni fa |
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itcpugas.pas
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47d43750e4
* remove unused units from uses statements
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12 anni fa |
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narmadd.pas
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ed2825fbb0
* arm thumb: handle constants in second_cmpsmallset correctly
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12 anni fa |
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narmcal.pas
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8b8a786823
* moved ARM/x86 ifdef'ed code from ncgcal to virtual methods
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12 anni fa |
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narmcnv.pas
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1eeeb309c7
* intial armv6m support, it is not working yet, constant pool insertation and conditional branch fixup is not working yet
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12 anni fa |
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narmcon.pas
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47d43750e4
* remove unused units from uses statements
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12 anni fa |
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narminl.pas
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47d43750e4
* remove unused units from uses statements
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12 anni fa |
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narmmat.pas
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21c154d60a
Merged r22903
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12 anni fa |
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narmmem.pas
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36a32e153d
+ arm thumb: tarmloadparentfpnode moves the stack pointer to a different register to avoid illegal instruction encodings
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12 anni fa |
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narmset.pas
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e5066a5f43
Update jumptabel generation for ARM Thumb
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12 anni fa |
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pp.lpi.template
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1f032375c3
* improved template with help from Mattias Gaertner
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19 anni fa |
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raarm.pas
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780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
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14 anni fa |
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raarmgas.pas
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47d43750e4
* remove unused units from uses statements
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12 anni fa |
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rarmcon.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmdwa.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmnor.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmnum.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmrni.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmsri.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmsta.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmstd.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rarmsup.inc
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7150832ec9
+ Cortex-M3 special registers, resolves #23185
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13 anni fa |
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rgcpu.pas
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1de40c8de7
* arm thumb: fix spilling with offsets >1020
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12 anni fa |
Jeppe Johansen
0bb8d24e24
Add some immediate forms of shift instructions to tcgthumb.a_op_const_reg