nz80add.pas 27 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Code generation for add nodes on the AVR
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nz80add;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgadd, symtype,cpubase;
  22. type
  23. { TZ80AddNode }
  24. TZ80AddNode = class(tcgaddnode)
  25. private
  26. function NoEqual(anodetype:tnodetype):tnodetype;
  27. function GetResFlags(unsigned:Boolean;anodetype:tnodetype):TResFlags;
  28. protected
  29. function use_mul_helper: boolean;override;
  30. function pass_1 : tnode;override;
  31. procedure second_cmpordinal;override;
  32. procedure second_cmpsmallset;override;
  33. procedure second_cmp64bit;override;
  34. procedure second_cmp16_32_64bit;
  35. procedure second_cmp;
  36. end;
  37. implementation
  38. uses
  39. globtype,systems,
  40. cutils,verbose,globals,
  41. symconst,symdef,paramgr,
  42. aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
  43. cgbase,cgutils,cgcpu,
  44. cpuinfo,pass_1,pass_2,procinfo,
  45. cpupara,
  46. ncon,nset,nadd,
  47. ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32,
  48. hlcgobj;
  49. {*****************************************************************************
  50. TZ80AddNode
  51. *****************************************************************************}
  52. function TZ80AddNode.NoEqual(anodetype: tnodetype): tnodetype;
  53. begin
  54. if anodetype=lten then
  55. result:=ltn
  56. else if anodetype=gten then
  57. result:=gtn
  58. else
  59. result:=anodetype;
  60. end;
  61. function TZ80AddNode.GetResFlags(unsigned: Boolean; anodetype: tnodetype): TResFlags;
  62. begin
  63. case anodetype of
  64. equaln:
  65. GetResFlags:=F_E;
  66. unequaln:
  67. GetResFlags:=F_NE;
  68. else
  69. if not(unsigned) then
  70. begin
  71. { signed }
  72. if nf_swapped in flags then
  73. case anodetype of
  74. ltn:
  75. GetResFlags:=F_NotPossible;
  76. lten:
  77. GetResFlags:=F_P;
  78. gtn:
  79. GetResFlags:=F_M;
  80. gten:
  81. GetResFlags:=F_NotPossible;
  82. else
  83. internalerror(2014082020);
  84. end
  85. else
  86. case anodetype of
  87. ltn:
  88. GetResFlags:=F_M;
  89. lten:
  90. GetResFlags:=F_NotPossible;
  91. gtn:
  92. GetResFlags:=F_NotPossible;
  93. gten:
  94. GetResFlags:=F_P;
  95. else
  96. internalerror(2014082021);
  97. end;
  98. end
  99. else
  100. begin
  101. { unsigned }
  102. if nf_swapped in Flags then
  103. case anodetype of
  104. ltn:
  105. GetResFlags:=F_NotPossible;
  106. lten:
  107. GetResFlags:=F_NC;
  108. gtn:
  109. GetResFlags:=F_C;
  110. gten:
  111. GetResFlags:=F_NotPossible;
  112. else
  113. internalerror(2014082022);
  114. end
  115. else
  116. case anodetype of
  117. ltn:
  118. GetResFlags:=F_C;
  119. lten:
  120. GetResFlags:=F_NotPossible;
  121. gtn:
  122. GetResFlags:=F_NotPossible;
  123. gten:
  124. GetResFlags:=F_NC;
  125. else
  126. internalerror(2014082023);
  127. end;
  128. end;
  129. end;
  130. end;
  131. function TZ80AddNode.use_mul_helper: boolean;
  132. begin
  133. result:=(nodetype=muln);
  134. end;
  135. procedure TZ80AddNode.second_cmpsmallset;
  136. procedure gencmp(tmpreg1,tmpreg2 : tregister);
  137. var
  138. i : byte;
  139. begin
  140. //current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CP,tmpreg1,tmpreg2));
  141. //for i:=2 to tcgsize2size[left.location.size] do
  142. // begin
  143. // tmpreg1:=GetNextReg(tmpreg1);
  144. // tmpreg2:=GetNextReg(tmpreg2);
  145. // current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CPC,tmpreg1,tmpreg2));
  146. // end;
  147. end;
  148. var
  149. tmpreg : tregister;
  150. begin
  151. //pass_left_right;
  152. //location_reset(location,LOC_FLAGS,OS_NO);
  153. //force_reg_left_right(false,false);
  154. //
  155. //case nodetype of
  156. // equaln:
  157. // begin
  158. // gencmp(left.location.register,right.location.register);
  159. // location.resflags:=F_EQ;
  160. // end;
  161. // unequaln:
  162. // begin
  163. // gencmp(left.location.register,right.location.register);
  164. // location.resflags:=F_NE;
  165. // end;
  166. // lten,
  167. // gten:
  168. // begin
  169. // if (not(nf_swapped in flags) and
  170. // (nodetype = lten)) or
  171. // ((nf_swapped in flags) and
  172. // (nodetype = gten)) then
  173. // swapleftright;
  174. // tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  175. // cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_AND,location.size,
  176. // left.location.register,right.location.register,tmpreg);
  177. // gencmp(tmpreg,right.location.register);
  178. // location.resflags:=F_EQ;
  179. // end;
  180. // else
  181. // internalerror(2004012401);
  182. //end;
  183. end;
  184. procedure TZ80AddNode.second_cmp;
  185. var
  186. unsigned : boolean;
  187. tmpreg1,tmpreg2 : tregister;
  188. i : longint;
  189. opdef: tdef;
  190. opsize: TCgSize;
  191. l: TAsmLabel;
  192. begin
  193. unsigned:=not(is_signed(left.resultdef)) or
  194. not(is_signed(right.resultdef));
  195. opdef:=left.resultdef;
  196. opsize:=def_cgsize(opdef);
  197. pass_left_right;
  198. if (opsize=OS_8) or ((opsize=OS_S8) and (NodeType in [equaln,unequaln])) then
  199. begin
  200. if getresflags(unsigned,NodeType)=F_NotPossible then
  201. swapleftright;
  202. if left.location.loc<>LOC_REGISTER then
  203. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  204. if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  205. begin
  206. if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
  207. begin
  208. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  209. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  210. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(A_CP,NR_A,right.location.reference));
  211. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  212. end
  213. else
  214. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  215. end;
  216. case right.location.loc of
  217. LOC_CONSTANT:
  218. begin
  219. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  220. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  221. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_CP,NR_A,right.location.value));
  222. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  223. end;
  224. LOC_REGISTER,LOC_CREGISTER:
  225. begin
  226. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  227. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  228. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_CP,NR_A,right.location.register));
  229. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  230. end;
  231. LOC_REFERENCE,LOC_CREFERENCE:
  232. begin
  233. { Already handled before the case statement. Nothing to do here. }
  234. end;
  235. else
  236. internalerror(2020040402);
  237. end;
  238. location_reset(location,LOC_FLAGS,OS_NO);
  239. location.resflags:=getresflags(unsigned,NodeType);
  240. end
  241. else if opsize=OS_S8 then
  242. begin
  243. if getresflags(unsigned,NodeType)=F_NotPossible then
  244. swapleftright;
  245. if left.location.loc<>LOC_REGISTER then
  246. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  247. if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  248. begin
  249. if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
  250. begin
  251. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  252. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  253. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(A_SUB,NR_A,right.location.reference));
  254. end
  255. else
  256. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  257. end;
  258. case right.location.loc of
  259. LOC_CONSTANT:
  260. begin
  261. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  262. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  263. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_SUB,NR_A,right.location.value));
  264. end;
  265. LOC_REGISTER,LOC_CREGISTER:
  266. begin
  267. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  268. cg.a_load_loc_reg(current_asmdata.CurrAsmList,def_cgsize(left.resultdef),left.location,NR_A);
  269. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_SUB,NR_A,right.location.register));
  270. end;
  271. LOC_REFERENCE,LOC_CREFERENCE:
  272. begin
  273. { Already handled before the case statement. Nothing to do here. }
  274. end;
  275. else
  276. internalerror(2020040402);
  277. end;
  278. current_asmdata.getjumplabel(l);
  279. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_PO,l);
  280. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_XOR,NR_A,$80));
  281. cg.a_label(current_asmdata.CurrAsmList,l);
  282. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  283. location_reset(location,LOC_FLAGS,OS_NO);
  284. location.resflags:=getresflags(unsigned,NodeType);
  285. end
  286. else
  287. internalerror(2020040401);
  288. end;
  289. procedure TZ80AddNode.second_cmp64bit;
  290. begin
  291. second_cmp16_32_64bit;
  292. end;
  293. procedure TZ80AddNode.second_cmp16_32_64bit;
  294. var
  295. truelabel,
  296. falselabel: tasmlabel;
  297. unsigned : boolean;
  298. i, size: Integer;
  299. tmpref: treference;
  300. op: TAsmOp;
  301. begin
  302. truelabel:=nil;
  303. falselabel:=nil;
  304. pass_left_right;
  305. unsigned:=not(is_signed(left.resultdef)) or
  306. not(is_signed(right.resultdef));
  307. { we have LOC_JUMP as result }
  308. current_asmdata.getjumplabel(truelabel);
  309. current_asmdata.getjumplabel(falselabel);
  310. location_reset_jump(location,truelabel,falselabel);
  311. size:=tcgsize2size[def_cgsize(left.resultdef)];
  312. if NodeType in [equaln,unequaln] then
  313. begin
  314. if left.location.loc<>LOC_REGISTER then
  315. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  316. if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  317. begin
  318. if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
  319. begin
  320. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  321. tmpref:=right.location.reference;
  322. for i:=0 to size-1 do
  323. begin
  324. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
  325. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(A_CP,NR_A,tmpref));
  326. case NodeType of
  327. equaln:
  328. if i<>(size-1) then
  329. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,falselabel)
  330. else
  331. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,truelabel);
  332. unequaln:
  333. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,truelabel);
  334. else
  335. internalerror(2020042102);
  336. end;
  337. if i<>(size-1) then
  338. tcgz80(cg).adjust_normalized_ref(current_asmdata.CurrAsmList,tmpref,1);
  339. end;
  340. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  341. cg.a_jmp_always(current_asmdata.CurrAsmList,falselabel);
  342. end
  343. else
  344. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  345. end;
  346. case right.location.loc of
  347. LOC_CONSTANT:
  348. begin
  349. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  350. for i:=0 to size-1 do
  351. begin
  352. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
  353. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(A_CP,NR_A,byte(right.location.value shr (i*8))));
  354. case NodeType of
  355. equaln:
  356. if i<>(size-1) then
  357. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,falselabel)
  358. else
  359. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,truelabel);
  360. unequaln:
  361. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,truelabel);
  362. else
  363. internalerror(2020042102);
  364. end;
  365. end;
  366. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  367. cg.a_jmp_always(current_asmdata.CurrAsmList,falselabel);
  368. end;
  369. LOC_REGISTER,LOC_CREGISTER:
  370. begin
  371. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  372. for i:=0 to size-1 do
  373. begin
  374. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
  375. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_CP,NR_A,tcgz80(cg).GetOffsetReg64(right.location.register,right.location.registerhi,i)));
  376. case NodeType of
  377. equaln:
  378. if i<>(size-1) then
  379. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,falselabel)
  380. else
  381. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,truelabel);
  382. unequaln:
  383. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,truelabel);
  384. else
  385. internalerror(2020042102);
  386. end;
  387. end;
  388. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  389. cg.a_jmp_always(current_asmdata.CurrAsmList,falselabel);
  390. end;
  391. LOC_REFERENCE,LOC_CREFERENCE:
  392. begin
  393. { Already handled before the case statement. Nothing to do here. }
  394. end;
  395. else
  396. internalerror(2020042103);
  397. end;
  398. end
  399. else
  400. begin
  401. if left.location.loc<>LOC_REGISTER then
  402. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  403. if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  404. begin
  405. if is_ref_in_opertypes(right.location.reference,[OT_REF_IX_d,OT_REF_IY_d,OT_REF_HL]) then
  406. begin
  407. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  408. tmpref:=right.location.reference;
  409. tcgz80(cg).adjust_normalized_ref(current_asmdata.CurrAsmList,tmpref,size-1);
  410. for i:=size-1 downto 0 do
  411. begin
  412. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
  413. if (i=(size-1)) and (not unsigned) then
  414. op:=A_SUB
  415. else
  416. op:=A_CP;
  417. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_ref(op,NR_A,tmpref));
  418. if (i=(size-1)) and (not unsigned) then
  419. case NodeType of
  420. ltn,
  421. lten:
  422. tcgz80(cg).a_jmp_signed_cmp_3way(current_asmdata.CurrAsmList,truelabel,nil,falselabel);
  423. gtn,
  424. gten:
  425. tcgz80(cg).a_jmp_signed_cmp_3way(current_asmdata.CurrAsmList,falselabel,nil,truelabel);
  426. else
  427. internalerror(2020042202);
  428. end
  429. else if i<>0 then
  430. case NodeType of
  431. ltn,
  432. lten:
  433. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,nil,falselabel);
  434. gtn,
  435. gten:
  436. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,nil,truelabel);
  437. else
  438. internalerror(2020042202);
  439. end
  440. else
  441. case NodeType of
  442. ltn:
  443. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,falselabel,falselabel);
  444. lten:
  445. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,truelabel,falselabel);
  446. gtn:
  447. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,falselabel,truelabel);
  448. gten:
  449. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,truelabel,truelabel);
  450. else
  451. internalerror(2020042203);
  452. end;
  453. if i<>0 then
  454. tcgz80(cg).adjust_normalized_ref(current_asmdata.CurrAsmList,tmpref,-1);
  455. end;
  456. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  457. end
  458. else
  459. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  460. end;
  461. case right.location.loc of
  462. LOC_CONSTANT:
  463. begin
  464. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  465. for i:=size-1 downto 0 do
  466. begin
  467. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
  468. if (i=(size-1)) and (not unsigned) then
  469. op:=A_SUB
  470. else
  471. op:=A_CP;
  472. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_const(op,NR_A,byte(right.location.value shr (i*8))));
  473. if (i=(size-1)) and (not unsigned) then
  474. case NodeType of
  475. ltn,
  476. lten:
  477. tcgz80(cg).a_jmp_signed_cmp_3way(current_asmdata.CurrAsmList,truelabel,nil,falselabel);
  478. gtn,
  479. gten:
  480. tcgz80(cg).a_jmp_signed_cmp_3way(current_asmdata.CurrAsmList,falselabel,nil,truelabel);
  481. else
  482. internalerror(2020042202);
  483. end
  484. else if i<>0 then
  485. case NodeType of
  486. ltn,
  487. lten:
  488. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,nil,falselabel);
  489. gtn,
  490. gten:
  491. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,nil,truelabel);
  492. else
  493. internalerror(2020042202);
  494. end
  495. else
  496. case NodeType of
  497. ltn:
  498. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,falselabel,falselabel);
  499. lten:
  500. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,truelabel,falselabel);
  501. gtn:
  502. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,falselabel,truelabel);
  503. gten:
  504. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,truelabel,truelabel);
  505. else
  506. internalerror(2020042203);
  507. end;
  508. end;
  509. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  510. end;
  511. LOC_REGISTER,LOC_CREGISTER:
  512. begin
  513. cg.getcpuregister(current_asmdata.CurrAsmList,NR_A);
  514. for i:=size-1 downto 0 do
  515. begin
  516. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_8,OS_8,tcgz80(cg).GetOffsetReg64(left.location.register,left.location.registerhi,i),NR_A);
  517. if (i=(size-1)) and (not unsigned) then
  518. op:=A_SUB
  519. else
  520. op:=A_CP;
  521. current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(op,NR_A,tcgz80(cg).GetOffsetReg64(right.location.register,right.location.registerhi,i)));
  522. if (i=(size-1)) and (not unsigned) then
  523. case NodeType of
  524. ltn,
  525. lten:
  526. tcgz80(cg).a_jmp_signed_cmp_3way(current_asmdata.CurrAsmList,truelabel,nil,falselabel);
  527. gtn,
  528. gten:
  529. tcgz80(cg).a_jmp_signed_cmp_3way(current_asmdata.CurrAsmList,falselabel,nil,truelabel);
  530. else
  531. internalerror(2020042202);
  532. end
  533. else if i<>0 then
  534. case NodeType of
  535. ltn,
  536. lten:
  537. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,nil,falselabel);
  538. gtn,
  539. gten:
  540. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,nil,truelabel);
  541. else
  542. internalerror(2020042202);
  543. end
  544. else
  545. case NodeType of
  546. ltn:
  547. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,falselabel,falselabel);
  548. lten:
  549. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,truelabel,truelabel,falselabel);
  550. gtn:
  551. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,falselabel,truelabel);
  552. gten:
  553. tcgz80(cg).a_jmp_unsigned_cmp_3way(current_asmdata.CurrAsmList,falselabel,truelabel,truelabel);
  554. else
  555. internalerror(2020042203);
  556. end;
  557. end;
  558. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_A);
  559. end;
  560. LOC_REFERENCE,LOC_CREFERENCE:
  561. begin
  562. { Already handled before the case statement. Nothing to do here. }
  563. end;
  564. else
  565. internalerror(2020042103);
  566. end;
  567. end;
  568. end;
  569. function TZ80AddNode.pass_1 : tnode;
  570. begin
  571. result:=inherited pass_1;
  572. {$ifdef dummy}
  573. if not(assigned(result)) then
  574. begin
  575. unsigned:=not(is_signed(left.resultdef)) or
  576. not(is_signed(right.resultdef));
  577. if is_64bit(left.resultdef) and
  578. ((nodetype in [equaln,unequaln]) or
  579. (unsigned and (nodetype in [ltn,lten,gtn,gten]))
  580. ) then
  581. expectloc:=LOC_FLAGS;
  582. end;
  583. { handling boolean expressions }
  584. if not(assigned(result)) and
  585. (
  586. not(is_boolean(left.resultdef)) or
  587. not(is_boolean(right.resultdef)) or
  588. is_dynamic_array(left.resultdef)
  589. ) then
  590. expectloc:=LOC_FLAGS;
  591. {$endif dummy}
  592. end;
  593. procedure TZ80AddNode.second_cmpordinal;
  594. begin
  595. if left.resultdef.size>=2 then
  596. second_cmp16_32_64bit
  597. else
  598. second_cmp;
  599. end;
  600. begin
  601. caddnode:=TZ80AddNode;
  602. end.