cgobj.pas 85 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. {# @abstract(Abstract code generator)
  38. This class implements an abstract instruction generator. Some of
  39. the methods of this class are generic, while others must
  40. be overriden for all new processors which will be supported
  41. by Free Pascal. For 32-bit processors, the base class
  42. sould be @link(tcg64f32) and not @var(tcg).
  43. }
  44. tcg = class
  45. public
  46. alignment : talignment;
  47. rg : array[tregistertype] of trgobj;
  48. t_times : longint;
  49. {$ifdef flowgraph}
  50. aktflownode:word;
  51. {$endif}
  52. {************************************************}
  53. { basic routines }
  54. constructor create;
  55. {# Initialize the register allocators needed for the codegenerator.}
  56. procedure init_register_allocators;virtual;
  57. {# Clean up the register allocators needed for the codegenerator.}
  58. procedure done_register_allocators;virtual;
  59. {$ifdef flowgraph}
  60. procedure init_flowgraph;
  61. procedure done_flowgraph;
  62. {$endif}
  63. {# Gets a register suitable to do integer operations on.}
  64. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  65. {# Gets a register suitable to do integer operations on.}
  66. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  67. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  68. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  70. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  71. the cpu specific child cg object have such a method?}
  72. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  73. procedure add_move_instruction(instr:Taicpu);virtual;
  74. function uses_registers(rt:Tregistertype):boolean;virtual;
  75. {# Get a specific register.}
  76. procedure getcpuregister(list:Taasmoutput;r:Tregister);virtual;
  77. procedure ungetcpuregister(list:Taasmoutput;r:Tregister);virtual;
  78. {# Get multiple registers specified.}
  79. procedure alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  80. {# Free multiple registers specified.}
  81. procedure dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  82. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  83. function makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  84. {# Emit a label to the instruction stream. }
  85. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  86. {# Allocates register r by inserting a pai_realloc record }
  87. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  88. {# Deallocates register r by inserting a pa_regdealloc record}
  89. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  90. { Synchronize register, make sure it is still valid }
  91. procedure a_reg_sync(list : taasmoutput;r : tregister);
  92. {# Pass a parameter, which is located in a register, to a routine.
  93. This routine should push/send the parameter to the routine, as
  94. required by the specific processor ABI and routine modifiers.
  95. This must be overriden for each CPU target.
  96. @param(size size of the operand in the register)
  97. @param(r register source of the operand)
  98. @param(cgpara where the parameter will be stored)
  99. }
  100. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  101. {# Pass a parameter, which is a constant, to a routine.
  102. A generic version is provided. This routine should
  103. be overriden for optimization purposes if the cpu
  104. permits directly sending this type of parameter.
  105. @param(size size of the operand in constant)
  106. @param(a value of constant to send)
  107. @param(cgpara where the parameter will be stored)
  108. }
  109. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  110. {# Pass the value of a parameter, which is located in memory, to a routine.
  111. A generic version is provided. This routine should
  112. be overriden for optimization purposes if the cpu
  113. permits directly sending this type of parameter.
  114. @param(size size of the operand in constant)
  115. @param(r Memory reference of value to send)
  116. @param(cgpara where the parameter will be stored)
  117. }
  118. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  119. {# Pass the value of a parameter, which can be located either in a register or memory location,
  120. to a routine.
  121. A generic version is provided.
  122. @param(l location of the operand to send)
  123. @param(nr parameter number (starting from one) of routine (from left to right))
  124. @param(cgpara where the parameter will be stored)
  125. }
  126. procedure a_param_loc(list : taasmoutput;const l : tlocation;const cgpara : TCGPara);
  127. {# Pass the address of a reference to a routine. This routine
  128. will calculate the address of the reference, and pass this
  129. calculated address as a parameter.
  130. A generic version is provided. This routine should
  131. be overriden for optimization purposes if the cpu
  132. permits directly sending this type of parameter.
  133. @param(r reference to get address from)
  134. @param(nr parameter number (starting from one) of routine (from left to right))
  135. }
  136. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const cgpara : TCGPara);virtual;
  137. { Remarks:
  138. * If a method specifies a size you have only to take care
  139. of that number of bits, i.e. load_const_reg with OP_8 must
  140. only load the lower 8 bit of the specified register
  141. the rest of the register can be undefined
  142. if necessary the compiler will call a method
  143. to zero or sign extend the register
  144. * The a_load_XX_XX with OP_64 needn't to be
  145. implemented for 32 bit
  146. processors, the code generator takes care of that
  147. * the addr size is for work with the natural pointer
  148. size
  149. * the procedures without fpu/mm are only for integer usage
  150. * normally the first location is the source and the
  151. second the destination
  152. }
  153. {# Emits instruction to call the method specified by symbol name.
  154. This routine must be overriden for each new target cpu.
  155. There is no a_call_ref because loading the reference will use
  156. a temp register on most cpu's resulting in conflicts with the
  157. registers used for the parameters (PFV)
  158. }
  159. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  160. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  161. { move instructions }
  162. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  163. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);virtual;
  164. procedure a_load_const_loc(list : taasmoutput;a : aint;const loc : tlocation);
  165. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  166. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  167. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  168. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  169. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  170. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  171. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  172. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  173. { fpu move instructions }
  174. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  175. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  176. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  177. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  178. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  179. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  180. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  181. { vector register move instructions }
  182. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  183. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  184. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  185. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  186. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  187. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  188. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  189. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  190. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  191. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  192. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  193. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  194. { basic arithmetic operations }
  195. { note: for operators which require only one argument (not, neg), use }
  196. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  197. { that in this case the *second* operand is used as both source and }
  198. { destination (JM) }
  199. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  200. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  201. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: Aint; const loc: tlocation);
  202. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  203. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  204. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  205. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  206. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  207. { trinary operations for processors that support them, 'emulated' }
  208. { on others. None with "ref" arguments since I don't think there }
  209. { are any processors that support it (JM) }
  210. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  211. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  212. procedure a_op_const_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  213. procedure a_op_reg_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  214. { comparison operations }
  215. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  216. l : tasmlabel);virtual; abstract;
  217. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  218. l : tasmlabel); virtual;
  219. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  220. l : tasmlabel);
  221. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  222. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  223. procedure a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  224. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  225. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  226. l : tasmlabel);
  227. procedure a_jmp_name(list : taasmoutput;const s : string); virtual; abstract;
  228. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  229. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  230. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  231. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  232. }
  233. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  234. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  235. {
  236. This routine tries to optimize the const_reg opcode, and should be
  237. called at the start of a_op_const_reg. It returns the actual opcode
  238. to emit, and the constant value to emit. If this routine returns
  239. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  240. @param(op The opcode to emit, returns the opcode which must be emitted)
  241. @param(a The constant which should be emitted, returns the constant which must
  242. be emitted)
  243. @param(reg The register to emit the opcode with, returns the register with
  244. which the opcode will be emitted)
  245. }
  246. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg: tregister): boolean;virtual;
  247. {#
  248. This routine is used in exception management nodes. It should
  249. save the exception reason currently in the FUNCTION_RETURN_REG. The
  250. save should be done either to a temp (pointed to by href).
  251. or on the stack (pushing the value on the stack).
  252. The size of the value to save is OS_S32. The default version
  253. saves the exception reason to a temp. memory area.
  254. }
  255. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  256. {#
  257. This routine is used in exception management nodes. It should
  258. save the exception reason constant. The
  259. save should be done either to a temp (pointed to by href).
  260. or on the stack (pushing the value on the stack).
  261. The size of the value to save is OS_S32. The default version
  262. saves the exception reason to a temp. memory area.
  263. }
  264. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);virtual;
  265. {#
  266. This routine is used in exception management nodes. It should
  267. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  268. should either be in the temp. area (pointed to by href , href should
  269. *NOT* be freed) or on the stack (the value should be popped).
  270. The size of the value to save is OS_S32. The default version
  271. saves the exception reason to a temp. memory area.
  272. }
  273. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  274. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  275. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  276. {# This should emit the opcode to copy len bytes from the source
  277. to destination.
  278. It must be overriden for each new target processor.
  279. @param(source Source reference of copy)
  280. @param(dest Destination reference of copy)
  281. }
  282. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aint);virtual; abstract;
  283. {# This should emit the opcode to copy len bytes from the an unaligned source
  284. to destination.
  285. It must be overriden for each new target processor.
  286. @param(source Source reference of copy)
  287. @param(dest Destination reference of copy)
  288. }
  289. procedure g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint);virtual;
  290. {# This should emit the opcode to a shortrstring from the source
  291. to destination.
  292. @param(source Source reference of copy)
  293. @param(dest Destination reference of copy)
  294. }
  295. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte);
  296. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  297. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  298. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference);
  299. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference);
  300. {# Generates range checking code. It is to note
  301. that this routine does not need to be overriden,
  302. as it takes care of everything.
  303. @param(p Node which contains the value to check)
  304. @param(todef Type definition of node to range check)
  305. }
  306. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  307. {# Generates overflow checking code for a node }
  308. procedure g_overflowcheck(list: taasmoutput; const Loc:tlocation; def:tdef); virtual;abstract;
  309. procedure g_overflowCheck_loc(List:TAasmOutput;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  310. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  311. procedure g_releasevaluepara_openarray(list : taasmoutput;const l:tlocation);virtual;
  312. {# Emits instructions when compilation is done in profile
  313. mode (this is set as a command line option). The default
  314. behavior does nothing, should be overriden as required.
  315. }
  316. procedure g_profilecode(list : taasmoutput);virtual;
  317. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  318. @param(size Number of bytes to allocate)
  319. }
  320. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  321. {# Emits instruction for allocating the locals in entry
  322. code of a routine. This is one of the first
  323. routine called in @var(genentrycode).
  324. @param(localsize Number of bytes to allocate as locals)
  325. }
  326. procedure g_proc_entry(list : taasmoutput;localsize : longint;nostackframe:boolean);virtual; abstract;
  327. {# Emits instructions for returning from a subroutine.
  328. Should also restore the framepointer and stack.
  329. @param(parasize Number of bytes of parameters to deallocate from stack)
  330. }
  331. procedure g_proc_exit(list : taasmoutput;parasize:longint;nostackframe:boolean);virtual;abstract;
  332. {# This routine is called when generating the code for the entry point
  333. of a routine. It should save all registers which are not used in this
  334. routine, and which should be declared as saved in the std_saved_registers
  335. set.
  336. This routine is mainly used when linking to code which is generated
  337. by ABI-compliant compilers (like GCC), to make sure that the reserved
  338. registers of that ABI are not clobbered.
  339. @param(usedinproc Registers which are used in the code of this routine)
  340. }
  341. procedure g_save_standard_registers(list:Taasmoutput);virtual;
  342. {# This routine is called when generating the code for the exit point
  343. of a routine. It should restore all registers which were previously
  344. saved in @var(g_save_standard_registers).
  345. @param(usedinproc Registers which are used in the code of this routine)
  346. }
  347. procedure g_restore_standard_registers(list:Taasmoutput);virtual;
  348. procedure g_intf_wrapper(list: TAAsmoutput; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  349. procedure g_adjust_self_value(list:taasmoutput;procdef: tprocdef;ioffset: aint);virtual;
  350. end;
  351. {$ifndef cpu64bit}
  352. {# @abstract(Abstract code generator for 64 Bit operations)
  353. This class implements an abstract code generator class
  354. for 64 Bit operations.
  355. }
  356. tcg64 = class
  357. procedure a_load64_const_ref(list : taasmoutput;value : int64;const ref : treference);virtual;abstract;
  358. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  359. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  360. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  361. procedure a_load64_const_reg(list : taasmoutput;value : int64;reg : tregister64);virtual;abstract;
  362. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  363. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  364. procedure a_load64_const_loc(list : taasmoutput;value : int64;const l : tlocation);virtual;abstract;
  365. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  366. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  367. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  368. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  369. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  370. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  371. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  372. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  373. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  374. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  375. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  376. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  377. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  378. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  379. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  380. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  381. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  382. procedure a_op64_const_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  383. procedure a_op64_reg_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  384. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  385. procedure a_param64_const(list : taasmoutput;value : int64;const loc : TCGPara);virtual;abstract;
  386. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : TCGPara);virtual;abstract;
  387. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : TCGPara);virtual;abstract;
  388. {
  389. This routine tries to optimize the const_reg opcode, and should be
  390. called at the start of a_op64_const_reg. It returns the actual opcode
  391. to emit, and the constant value to emit. If this routine returns
  392. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  393. @param(op The opcode to emit, returns the opcode which must be emitted)
  394. @param(a The constant which should be emitted, returns the constant which must
  395. be emitted)
  396. @param(reg The register to emit the opcode with, returns the register with
  397. which the opcode will be emitted)
  398. }
  399. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  400. { override to catch 64bit rangechecks }
  401. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  402. end;
  403. {$endif cpu64bit}
  404. var
  405. {# Main code generator class }
  406. cg : tcg;
  407. {$ifndef cpu64bit}
  408. {# Code generator class for all operations working with 64-Bit operands }
  409. cg64 : tcg64;
  410. {$endif cpu64bit}
  411. implementation
  412. uses
  413. globals,options,systems,
  414. verbose,defutil,paramgr,symsym,
  415. tgobj,cutils,procinfo;
  416. const
  417. { Please leave this here, this module should NOT use
  418. exprasmlist, the lists are always passed as arguments.
  419. Declaring it as string here results in an error when compiling (PFV) }
  420. exprasmlist = 'error';
  421. {*****************************************************************************
  422. basic functionallity
  423. ******************************************************************************}
  424. constructor tcg.create;
  425. begin
  426. end;
  427. {*****************************************************************************
  428. register allocation
  429. ******************************************************************************}
  430. procedure tcg.init_register_allocators;
  431. begin
  432. fillchar(rg,sizeof(rg),0);
  433. add_reg_instruction_hook:=@add_reg_instruction;
  434. end;
  435. procedure tcg.done_register_allocators;
  436. begin
  437. { Safety }
  438. fillchar(rg,sizeof(rg),0);
  439. add_reg_instruction_hook:=nil;
  440. end;
  441. {$ifdef flowgraph}
  442. procedure Tcg.init_flowgraph;
  443. begin
  444. aktflownode:=0;
  445. end;
  446. procedure Tcg.done_flowgraph;
  447. begin
  448. end;
  449. {$endif}
  450. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  451. begin
  452. if not assigned(rg[R_INTREGISTER]) then
  453. internalerror(200312122);
  454. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  455. end;
  456. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  457. begin
  458. if not assigned(rg[R_FPUREGISTER]) then
  459. internalerror(200312123);
  460. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  461. end;
  462. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  463. begin
  464. if not assigned(rg[R_MMREGISTER]) then
  465. internalerror(200312124);
  466. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  467. end;
  468. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  469. begin
  470. if assigned(rg[R_ADDRESSREGISTER]) then
  471. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  472. else
  473. begin
  474. if not assigned(rg[R_INTREGISTER]) then
  475. internalerror(200312121);
  476. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  477. end;
  478. end;
  479. function Tcg.makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  480. var
  481. subreg:Tsubregister;
  482. begin
  483. subreg:=cgsize2subreg(size);
  484. result:=reg;
  485. setsubreg(result,subreg);
  486. { notify RA }
  487. if result<>reg then
  488. list.concat(tai_regalloc.resize(result));
  489. end;
  490. procedure tcg.getcpuregister(list:Taasmoutput;r:Tregister);
  491. begin
  492. if not assigned(rg[getregtype(r)]) then
  493. internalerror(200312125);
  494. rg[getregtype(r)].getcpuregister(list,r);
  495. end;
  496. procedure tcg.ungetcpuregister(list:Taasmoutput;r:Tregister);
  497. begin
  498. if not assigned(rg[getregtype(r)]) then
  499. internalerror(200312126);
  500. rg[getregtype(r)].ungetcpuregister(list,r);
  501. end;
  502. procedure tcg.alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  503. begin
  504. if assigned(rg[rt]) then
  505. rg[rt].alloccpuregisters(list,r)
  506. else
  507. internalerror(200310092);
  508. end;
  509. procedure tcg.dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  510. begin
  511. if assigned(rg[rt]) then
  512. rg[rt].dealloccpuregisters(list,r)
  513. else
  514. internalerror(200310093);
  515. end;
  516. function tcg.uses_registers(rt:Tregistertype):boolean;
  517. begin
  518. if assigned(rg[rt]) then
  519. result:=rg[rt].uses_registers
  520. else
  521. result:=false;
  522. end;
  523. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  524. var
  525. rt : tregistertype;
  526. begin
  527. rt:=getregtype(r);
  528. { Only add it when a register allocator is configured.
  529. No IE can be generated, because the VMT is written
  530. without a valid rg[] }
  531. if assigned(rg[rt]) then
  532. rg[rt].add_reg_instruction(instr,r);
  533. end;
  534. procedure tcg.add_move_instruction(instr:Taicpu);
  535. var
  536. rt : tregistertype;
  537. begin
  538. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  539. if assigned(rg[rt]) then
  540. rg[rt].add_move_instruction(instr)
  541. else
  542. internalerror(200310095);
  543. end;
  544. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  545. var
  546. rt : tregistertype;
  547. begin
  548. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  549. begin
  550. if assigned(rg[rt]) then
  551. rg[rt].do_register_allocation(list,headertai);
  552. end;
  553. { running the other register allocator passes could require addition int/addr. registers
  554. when spilling so run int/addr register allocation at the end }
  555. if assigned(rg[R_INTREGISTER]) then
  556. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  557. if assigned(rg[R_ADDRESSREGISTER]) then
  558. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  559. end;
  560. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  561. begin
  562. list.concat(tai_regalloc.alloc(r,nil));
  563. end;
  564. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  565. begin
  566. list.concat(tai_regalloc.dealloc(r,nil));
  567. end;
  568. procedure tcg.a_reg_sync(list : taasmoutput;r : tregister);
  569. var
  570. instr : tai;
  571. begin
  572. instr:=tai_regalloc.sync(r);
  573. list.concat(instr);
  574. add_reg_instruction(instr,r);
  575. end;
  576. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  577. begin
  578. list.concat(tai_label.create(l));
  579. end;
  580. {*****************************************************************************
  581. for better code generation these methods should be overridden
  582. ******************************************************************************}
  583. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const cgpara : TCGPara);
  584. var
  585. ref : treference;
  586. begin
  587. cgpara.check_simple_location;
  588. case cgpara.location^.loc of
  589. LOC_REGISTER,LOC_CREGISTER:
  590. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  591. LOC_REFERENCE,LOC_CREFERENCE:
  592. begin
  593. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  594. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  595. end
  596. else
  597. internalerror(2002071004);
  598. end;
  599. end;
  600. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aint;const cgpara : TCGPara);
  601. var
  602. ref : treference;
  603. begin
  604. cgpara.check_simple_location;
  605. case cgpara.location^.loc of
  606. LOC_REGISTER,LOC_CREGISTER:
  607. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  608. LOC_REFERENCE,LOC_CREFERENCE:
  609. begin
  610. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  611. a_load_const_ref(list,cgpara.location^.size,a,ref);
  612. end
  613. else
  614. internalerror(2002071004);
  615. end;
  616. end;
  617. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const cgpara : TCGPara);
  618. var
  619. ref : treference;
  620. begin
  621. cgpara.check_simple_location;
  622. case cgpara.location^.loc of
  623. LOC_REGISTER,LOC_CREGISTER:
  624. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  625. LOC_REFERENCE,LOC_CREFERENCE:
  626. begin
  627. reference_reset(ref);
  628. ref.base:=cgpara.location^.reference.index;
  629. ref.offset:=cgpara.location^.reference.offset;
  630. { use concatcopy, because it can also be a float which fails when
  631. load_ref_ref is used }
  632. g_concatcopy(list,r,ref,tcgsize2size[size]);
  633. end
  634. else
  635. internalerror(2002071004);
  636. end;
  637. end;
  638. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const cgpara : TCGPara);
  639. begin
  640. case l.loc of
  641. LOC_REGISTER,
  642. LOC_CREGISTER :
  643. a_param_reg(list,l.size,l.register,cgpara);
  644. LOC_CONSTANT :
  645. a_param_const(list,l.size,l.value,cgpara);
  646. LOC_CREFERENCE,
  647. LOC_REFERENCE :
  648. a_param_ref(list,l.size,l.reference,cgpara);
  649. else
  650. internalerror(2002032211);
  651. end;
  652. end;
  653. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const cgpara : TCGPara);
  654. var
  655. hr : tregister;
  656. begin
  657. cgpara.check_simple_location;
  658. hr:=getaddressregister(list);
  659. a_loadaddr_ref_reg(list,r,hr);
  660. a_param_reg(list,OS_ADDR,hr,cgpara);
  661. end;
  662. {****************************************************************************
  663. some generic implementations
  664. ****************************************************************************}
  665. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  666. var
  667. tmpreg: tregister;
  668. begin
  669. { verify if we have the same reference }
  670. if references_equal(sref,dref) then
  671. exit;
  672. tmpreg:=getintregister(list,tosize);
  673. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  674. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  675. end;
  676. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);
  677. var
  678. tmpreg: tregister;
  679. begin
  680. tmpreg:=getintregister(list,size);
  681. a_load_const_reg(list,size,a,tmpreg);
  682. a_load_reg_ref(list,size,size,tmpreg,ref);
  683. end;
  684. procedure tcg.a_load_const_loc(list : taasmoutput;a : aint;const loc: tlocation);
  685. begin
  686. case loc.loc of
  687. LOC_REFERENCE,LOC_CREFERENCE:
  688. a_load_const_ref(list,loc.size,a,loc.reference);
  689. LOC_REGISTER,LOC_CREGISTER:
  690. a_load_const_reg(list,loc.size,a,loc.register);
  691. else
  692. internalerror(200203272);
  693. end;
  694. end;
  695. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  696. begin
  697. case loc.loc of
  698. LOC_REFERENCE,LOC_CREFERENCE:
  699. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  700. LOC_REGISTER,LOC_CREGISTER:
  701. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  702. else
  703. internalerror(200203271);
  704. end;
  705. end;
  706. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  707. begin
  708. case loc.loc of
  709. LOC_REFERENCE,LOC_CREFERENCE:
  710. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  711. LOC_REGISTER,LOC_CREGISTER:
  712. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  713. LOC_CONSTANT:
  714. a_load_const_reg(list,tosize,loc.value,reg);
  715. else
  716. internalerror(200109092);
  717. end;
  718. end;
  719. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  720. begin
  721. case loc.loc of
  722. LOC_REFERENCE,LOC_CREFERENCE:
  723. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  724. LOC_REGISTER,LOC_CREGISTER:
  725. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  726. LOC_CONSTANT:
  727. a_load_const_ref(list,tosize,loc.value,ref);
  728. else
  729. internalerror(200109302);
  730. end;
  731. end;
  732. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg:tregister): boolean;
  733. var
  734. powerval : longint;
  735. begin
  736. optimize_op_const_reg := false;
  737. case op of
  738. { or with zero returns same result }
  739. OP_OR : if a = 0 then optimize_op_const_reg := true;
  740. { and with max returns same result }
  741. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  742. { division by 1 returns result }
  743. OP_DIV :
  744. begin
  745. if a = 1 then
  746. optimize_op_const_reg := true
  747. else if ispowerof2(int64(a), powerval) then
  748. begin
  749. a := powerval;
  750. op:= OP_SHR;
  751. end;
  752. exit;
  753. end;
  754. OP_IDIV:
  755. begin
  756. if a = 1 then
  757. optimize_op_const_reg := true
  758. else if ispowerof2(int64(a), powerval) then
  759. begin
  760. a := powerval;
  761. op:= OP_SAR;
  762. end;
  763. exit;
  764. end;
  765. OP_MUL,OP_IMUL:
  766. begin
  767. if a = 1 then
  768. optimize_op_const_reg := true
  769. else if ispowerof2(int64(a), powerval) then
  770. begin
  771. a := powerval;
  772. op:= OP_SHL;
  773. end;
  774. exit;
  775. end;
  776. OP_SAR,OP_SHL,OP_SHR:
  777. begin
  778. if a = 0 then
  779. optimize_op_const_reg := true;
  780. exit;
  781. end;
  782. end;
  783. end;
  784. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  785. begin
  786. case loc.loc of
  787. LOC_REFERENCE, LOC_CREFERENCE:
  788. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  789. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  790. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  791. else
  792. internalerror(200203301);
  793. end;
  794. end;
  795. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  796. begin
  797. case loc.loc of
  798. LOC_REFERENCE, LOC_CREFERENCE:
  799. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  800. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  801. a_loadfpu_reg_reg(list,size,reg,loc.register);
  802. else
  803. internalerror(48991);
  804. end;
  805. end;
  806. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  807. var
  808. ref : treference;
  809. begin
  810. case cgpara.location^.loc of
  811. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  812. begin
  813. cgpara.check_simple_location;
  814. a_loadfpu_reg_reg(list,size,r,cgpara.location^.register);
  815. end;
  816. LOC_REFERENCE,LOC_CREFERENCE:
  817. begin
  818. cgpara.check_simple_location;
  819. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  820. a_loadfpu_reg_ref(list,size,r,ref);
  821. end;
  822. LOC_REGISTER,LOC_CREGISTER:
  823. begin
  824. { paramfpu_ref does the check_simpe_location check here if necessary }
  825. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  826. a_loadfpu_reg_ref(list,size,r,ref);
  827. a_paramfpu_ref(list,size,ref,cgpara);
  828. tg.Ungettemp(list,ref);
  829. end;
  830. else
  831. internalerror(2002071004);
  832. end;
  833. end;
  834. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  835. var
  836. href : treference;
  837. begin
  838. cgpara.check_simple_location;
  839. case cgpara.location^.loc of
  840. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  841. a_loadfpu_ref_reg(list,size,ref,cgpara.location^.register);
  842. LOC_REFERENCE,LOC_CREFERENCE:
  843. begin
  844. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  845. { concatcopy should choose the best way to copy the data }
  846. g_concatcopy(list,ref,href,tcgsize2size[size]);
  847. end;
  848. else
  849. internalerror(200402201);
  850. end;
  851. end;
  852. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  853. var
  854. tmpreg : tregister;
  855. begin
  856. tmpreg:=getintregister(list,size);
  857. a_load_ref_reg(list,size,size,ref,tmpreg);
  858. a_op_const_reg(list,op,size,a,tmpreg);
  859. a_load_reg_ref(list,size,size,tmpreg,ref);
  860. end;
  861. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: aint; const loc: tlocation);
  862. begin
  863. case loc.loc of
  864. LOC_REGISTER, LOC_CREGISTER:
  865. a_op_const_reg(list,op,loc.size,a,loc.register);
  866. LOC_REFERENCE, LOC_CREFERENCE:
  867. a_op_const_ref(list,op,loc.size,a,loc.reference);
  868. else
  869. internalerror(200109061);
  870. end;
  871. end;
  872. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  873. var
  874. tmpreg : tregister;
  875. begin
  876. tmpreg:=getintregister(list,size);
  877. a_load_ref_reg(list,size,size,ref,tmpreg);
  878. a_op_reg_reg(list,op,size,reg,tmpreg);
  879. a_load_reg_ref(list,size,size,tmpreg,ref);
  880. end;
  881. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  882. var
  883. tmpreg: tregister;
  884. begin
  885. case op of
  886. OP_NOT,OP_NEG:
  887. { handle it as "load ref,reg; op reg" }
  888. begin
  889. a_load_ref_reg(list,size,size,ref,reg);
  890. a_op_reg_reg(list,op,size,reg,reg);
  891. end;
  892. else
  893. begin
  894. tmpreg:=getintregister(list,size);
  895. a_load_ref_reg(list,size,size,ref,tmpreg);
  896. a_op_reg_reg(list,op,size,tmpreg,reg);
  897. end;
  898. end;
  899. end;
  900. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  901. begin
  902. case loc.loc of
  903. LOC_REGISTER, LOC_CREGISTER:
  904. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  905. LOC_REFERENCE, LOC_CREFERENCE:
  906. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  907. else
  908. internalerror(200109061);
  909. end;
  910. end;
  911. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  912. var
  913. tmpreg: tregister;
  914. begin
  915. case loc.loc of
  916. LOC_REGISTER,LOC_CREGISTER:
  917. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  918. LOC_REFERENCE,LOC_CREFERENCE:
  919. begin
  920. tmpreg:=getintregister(list,loc.size);
  921. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  922. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  923. end;
  924. else
  925. internalerror(200109061);
  926. end;
  927. end;
  928. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  929. a:aint;src,dst:Tregister);
  930. begin
  931. a_load_reg_reg(list,size,size,src,dst);
  932. a_op_const_reg(list,op,size,a,dst);
  933. end;
  934. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  935. size: tcgsize; src1, src2, dst: tregister);
  936. var
  937. tmpreg: tregister;
  938. begin
  939. if (dst<>src1) then
  940. begin
  941. a_load_reg_reg(list,size,size,src2,dst);
  942. a_op_reg_reg(list,op,size,src1,dst);
  943. end
  944. else
  945. begin
  946. tmpreg:=getintregister(list,size);
  947. a_load_reg_reg(list,size,size,src2,tmpreg);
  948. a_op_reg_reg(list,op,size,src1,tmpreg);
  949. a_load_reg_reg(list,size,size,tmpreg,dst);
  950. end;
  951. end;
  952. procedure tcg.a_op_const_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  953. begin
  954. a_op_const_reg_reg(list,op,size,a,src,dst);
  955. ovloc.loc:=LOC_VOID;
  956. end;
  957. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  958. begin
  959. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  960. ovloc.loc:=LOC_VOID;
  961. end;
  962. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  963. l : tasmlabel);
  964. var
  965. tmpreg: tregister;
  966. begin
  967. tmpreg:=getintregister(list,size);
  968. a_load_ref_reg(list,size,size,ref,tmpreg);
  969. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  970. end;
  971. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  972. l : tasmlabel);
  973. begin
  974. case loc.loc of
  975. LOC_REGISTER,LOC_CREGISTER:
  976. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  977. LOC_REFERENCE,LOC_CREFERENCE:
  978. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  979. else
  980. internalerror(200109061);
  981. end;
  982. end;
  983. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  984. var
  985. tmpreg: tregister;
  986. begin
  987. tmpreg:=getintregister(list,size);
  988. a_load_ref_reg(list,size,size,ref,tmpreg);
  989. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  990. end;
  991. procedure tcg.a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  992. var
  993. tmpreg: tregister;
  994. begin
  995. tmpreg:=getintregister(list,size);
  996. a_load_ref_reg(list,size,size,ref,tmpreg);
  997. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  998. end;
  999. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1000. begin
  1001. case loc.loc of
  1002. LOC_REGISTER,
  1003. LOC_CREGISTER:
  1004. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1005. LOC_REFERENCE,
  1006. LOC_CREFERENCE :
  1007. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1008. LOC_CONSTANT:
  1009. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1010. else
  1011. internalerror(200203231);
  1012. end;
  1013. end;
  1014. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1015. l : tasmlabel);
  1016. var
  1017. tmpreg: tregister;
  1018. begin
  1019. case loc.loc of
  1020. LOC_REGISTER,LOC_CREGISTER:
  1021. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1022. LOC_REFERENCE,LOC_CREFERENCE:
  1023. begin
  1024. tmpreg:=getintregister(list,size);
  1025. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1026. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1027. end
  1028. else
  1029. internalerror(200109061);
  1030. end;
  1031. end;
  1032. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1033. begin
  1034. case loc.loc of
  1035. LOC_MMREGISTER,LOC_CMMREGISTER:
  1036. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1037. LOC_REFERENCE,LOC_CREFERENCE:
  1038. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1039. else
  1040. internalerror(200310121);
  1041. end;
  1042. end;
  1043. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1044. begin
  1045. case loc.loc of
  1046. LOC_MMREGISTER,LOC_CMMREGISTER:
  1047. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1048. LOC_REFERENCE,LOC_CREFERENCE:
  1049. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1050. else
  1051. internalerror(200310122);
  1052. end;
  1053. end;
  1054. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  1055. var
  1056. href : treference;
  1057. begin
  1058. cgpara.check_simple_location;
  1059. case cgpara.location^.loc of
  1060. LOC_MMREGISTER,LOC_CMMREGISTER:
  1061. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  1062. LOC_REFERENCE,LOC_CREFERENCE:
  1063. begin
  1064. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1065. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  1066. end
  1067. else
  1068. internalerror(200310123);
  1069. end;
  1070. end;
  1071. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  1072. var
  1073. hr : tregister;
  1074. hs : tmmshuffle;
  1075. begin
  1076. cgpara.check_simple_location;
  1077. hr:=getmmregister(list,cgpara.location^.size);
  1078. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  1079. if realshuffle(shuffle) then
  1080. begin
  1081. hs:=shuffle^;
  1082. removeshuffles(hs);
  1083. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  1084. end
  1085. else
  1086. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  1087. end;
  1088. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  1089. begin
  1090. case loc.loc of
  1091. LOC_MMREGISTER,LOC_CMMREGISTER:
  1092. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  1093. LOC_REFERENCE,LOC_CREFERENCE:
  1094. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  1095. else
  1096. internalerror(200310123);
  1097. end;
  1098. end;
  1099. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1100. var
  1101. hr : tregister;
  1102. hs : tmmshuffle;
  1103. begin
  1104. hr:=getmmregister(list,size);
  1105. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1106. if realshuffle(shuffle) then
  1107. begin
  1108. hs:=shuffle^;
  1109. removeshuffles(hs);
  1110. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1111. end
  1112. else
  1113. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1114. end;
  1115. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1116. var
  1117. hr : tregister;
  1118. hs : tmmshuffle;
  1119. begin
  1120. hr:=getmmregister(list,size);
  1121. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1122. if realshuffle(shuffle) then
  1123. begin
  1124. hs:=shuffle^;
  1125. removeshuffles(hs);
  1126. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1127. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1128. end
  1129. else
  1130. begin
  1131. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1132. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1133. end;
  1134. end;
  1135. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1136. begin
  1137. case loc.loc of
  1138. LOC_CMMREGISTER,LOC_MMREGISTER:
  1139. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1140. LOC_CREFERENCE,LOC_REFERENCE:
  1141. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1142. else
  1143. internalerror(200312232);
  1144. end;
  1145. end;
  1146. procedure tcg.g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint);
  1147. begin
  1148. g_concatcopy(list,source,dest,len);
  1149. end;
  1150. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte);
  1151. var
  1152. cgpara1,cgpara2,cgpara3 : TCGPara;
  1153. begin
  1154. cgpara1.init;
  1155. cgpara2.init;
  1156. cgpara3.init;
  1157. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1158. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1159. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1160. paramanager.allocparaloc(list,cgpara3);
  1161. a_paramaddr_ref(list,dest,cgpara3);
  1162. paramanager.allocparaloc(list,cgpara2);
  1163. a_paramaddr_ref(list,source,cgpara2);
  1164. paramanager.allocparaloc(list,cgpara1);
  1165. a_param_const(list,OS_INT,len,cgpara1);
  1166. paramanager.freeparaloc(list,cgpara3);
  1167. paramanager.freeparaloc(list,cgpara2);
  1168. paramanager.freeparaloc(list,cgpara1);
  1169. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1170. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1171. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1172. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1173. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1174. cgpara3.done;
  1175. cgpara2.done;
  1176. cgpara1.done;
  1177. end;
  1178. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  1179. var
  1180. href : treference;
  1181. incrfunc : string;
  1182. cgpara1,cgpara2 : TCGPara;
  1183. begin
  1184. cgpara1.init;
  1185. cgpara2.init;
  1186. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1187. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1188. if is_interfacecom(t) then
  1189. incrfunc:='FPC_INTF_INCR_REF'
  1190. else if is_ansistring(t) then
  1191. {$ifdef ansistring_bits}
  1192. begin
  1193. case Tstringdef(t).string_typ of
  1194. st_ansistring16:
  1195. incrfunc:='FPC_ANSISTR16_INCR_REF';
  1196. st_ansistring32:
  1197. incrfunc:='FPC_ANSISTR32_INCR_REF';
  1198. st_ansistring64:
  1199. incrfunc:='FPC_ANSISTR64_INCR_REF';
  1200. end;
  1201. end
  1202. {$else}
  1203. incrfunc:='FPC_ANSISTR_INCR_REF'
  1204. {$endif}
  1205. else if is_widestring(t) then
  1206. incrfunc:='FPC_WIDESTR_INCR_REF'
  1207. else if is_dynamic_array(t) then
  1208. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1209. else
  1210. incrfunc:='';
  1211. { call the special incr function or the generic addref }
  1212. if incrfunc<>'' then
  1213. begin
  1214. paramanager.allocparaloc(list,cgpara1);
  1215. { these functions get the pointer by value }
  1216. a_param_ref(list,OS_ADDR,ref,cgpara1);
  1217. paramanager.freeparaloc(list,cgpara1);
  1218. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1219. a_call_name(list,incrfunc);
  1220. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1221. end
  1222. else
  1223. begin
  1224. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1225. paramanager.allocparaloc(list,cgpara2);
  1226. a_paramaddr_ref(list,href,cgpara2);
  1227. paramanager.allocparaloc(list,cgpara1);
  1228. a_paramaddr_ref(list,ref,cgpara1);
  1229. paramanager.freeparaloc(list,cgpara1);
  1230. paramanager.freeparaloc(list,cgpara2);
  1231. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1232. a_call_name(list,'FPC_ADDREF');
  1233. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1234. end;
  1235. cgpara2.done;
  1236. cgpara1.done;
  1237. end;
  1238. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  1239. var
  1240. href : treference;
  1241. decrfunc : string;
  1242. needrtti : boolean;
  1243. cgpara1,cgpara2 : TCGPara;
  1244. begin
  1245. cgpara1.init;
  1246. cgpara2.init;
  1247. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1248. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1249. needrtti:=false;
  1250. if is_interfacecom(t) then
  1251. decrfunc:='FPC_INTF_DECR_REF'
  1252. else if is_ansistring(t) then
  1253. {$ifdef ansistring_bits}
  1254. begin
  1255. case Tstringdef(t).string_typ of
  1256. st_ansistring16:
  1257. decrfunc:='FPC_ANSISTR16_DECR_REF';
  1258. st_ansistring32:
  1259. decrfunc:='FPC_ANSISTR32_DECR_REF';
  1260. st_ansistring64:
  1261. decrfunc:='FPC_ANSISTR64_DECR_REF';
  1262. end;
  1263. end
  1264. {$else}
  1265. decrfunc:='FPC_ANSISTR_DECR_REF'
  1266. {$endif}
  1267. else if is_widestring(t) then
  1268. decrfunc:='FPC_WIDESTR_DECR_REF'
  1269. else if is_dynamic_array(t) then
  1270. begin
  1271. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1272. needrtti:=true;
  1273. end
  1274. else
  1275. decrfunc:='';
  1276. { call the special decr function or the generic decref }
  1277. if decrfunc<>'' then
  1278. begin
  1279. if needrtti then
  1280. begin
  1281. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1282. paramanager.allocparaloc(list,cgpara2);
  1283. a_paramaddr_ref(list,href,cgpara2);
  1284. end;
  1285. paramanager.allocparaloc(list,cgpara1);
  1286. a_paramaddr_ref(list,ref,cgpara1);
  1287. paramanager.freeparaloc(list,cgpara1);
  1288. if needrtti then
  1289. paramanager.freeparaloc(list,cgpara2);
  1290. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1291. a_call_name(list,decrfunc);
  1292. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1293. end
  1294. else
  1295. begin
  1296. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1297. paramanager.allocparaloc(list,cgpara2);
  1298. a_paramaddr_ref(list,href,cgpara2);
  1299. paramanager.allocparaloc(list,cgpara1);
  1300. a_paramaddr_ref(list,ref,cgpara1);
  1301. paramanager.freeparaloc(list,cgpara1);
  1302. paramanager.freeparaloc(list,cgpara2);
  1303. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1304. a_call_name(list,'FPC_DECREF');
  1305. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1306. end;
  1307. cgpara2.done;
  1308. cgpara1.done;
  1309. end;
  1310. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference);
  1311. var
  1312. href : treference;
  1313. cgpara1,cgpara2 : TCGPara;
  1314. begin
  1315. cgpara1.init;
  1316. cgpara2.init;
  1317. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1318. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1319. if is_ansistring(t) or
  1320. is_widestring(t) or
  1321. is_interfacecom(t) or
  1322. is_dynamic_array(t) then
  1323. a_load_const_ref(list,OS_ADDR,0,ref)
  1324. else
  1325. begin
  1326. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1327. paramanager.allocparaloc(list,cgpara2);
  1328. a_paramaddr_ref(list,href,cgpara2);
  1329. paramanager.allocparaloc(list,cgpara1);
  1330. a_paramaddr_ref(list,ref,cgpara1);
  1331. paramanager.freeparaloc(list,cgpara1);
  1332. paramanager.freeparaloc(list,cgpara2);
  1333. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1334. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1335. a_call_name(list,'FPC_INITIALIZE');
  1336. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1337. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1338. end;
  1339. cgpara1.done;
  1340. cgpara2.done;
  1341. end;
  1342. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference);
  1343. var
  1344. href : treference;
  1345. cgpara1,cgpara2 : TCGPara;
  1346. begin
  1347. cgpara1.init;
  1348. cgpara2.init;
  1349. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1350. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1351. if is_ansistring(t) or
  1352. is_widestring(t) or
  1353. is_interfacecom(t) then
  1354. begin
  1355. g_decrrefcount(list,t,ref);
  1356. a_load_const_ref(list,OS_ADDR,0,ref);
  1357. end
  1358. else
  1359. begin
  1360. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1361. paramanager.allocparaloc(list,cgpara2);
  1362. a_paramaddr_ref(list,href,cgpara2);
  1363. paramanager.allocparaloc(list,cgpara1);
  1364. a_paramaddr_ref(list,ref,cgpara1);
  1365. paramanager.freeparaloc(list,cgpara1);
  1366. paramanager.freeparaloc(list,cgpara2);
  1367. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1368. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1369. a_call_name(list,'FPC_FINALIZE');
  1370. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1371. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1372. end;
  1373. cgpara1.done;
  1374. cgpara2.done;
  1375. end;
  1376. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1377. { generate range checking code for the value at location p. The type }
  1378. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1379. { is the original type used at that location. When both defs are equal }
  1380. { the check is also insert (needed for succ,pref,inc,dec) }
  1381. const
  1382. aintmax=high(aint);
  1383. var
  1384. neglabel : tasmlabel;
  1385. hreg : tregister;
  1386. lto,hto,
  1387. lfrom,hfrom : TConstExprInt;
  1388. from_signed: boolean;
  1389. begin
  1390. { range checking on and range checkable value? }
  1391. if not(cs_check_range in aktlocalswitches) or
  1392. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1393. exit;
  1394. {$ifndef cpu64bit}
  1395. { handle 64bit rangechecks separate for 32bit processors }
  1396. if is_64bit(fromdef) or is_64bit(todef) then
  1397. begin
  1398. cg64.g_rangecheck64(list,l,fromdef,todef);
  1399. exit;
  1400. end;
  1401. {$endif cpu64bit}
  1402. { only check when assigning to scalar, subranges are different, }
  1403. { when todef=fromdef then the check is always generated }
  1404. getrange(fromdef,lfrom,hfrom);
  1405. getrange(todef,lto,hto);
  1406. from_signed := is_signed(fromdef);
  1407. { no range check if from and to are equal and are both longint/dword }
  1408. { (if we have a 32bit processor) or int64/qword, since such }
  1409. { operations can at most cause overflows (JM) }
  1410. { Note that these checks are mostly processor independent, they only }
  1411. { have to be changed once we introduce 64bit subrange types }
  1412. {$ifdef cpu64bit}
  1413. if (fromdef = todef) and
  1414. (fromdef.deftype=orddef) and
  1415. (((((torddef(fromdef).typ = s64bit) and
  1416. (lfrom = low(int64)) and
  1417. (hfrom = high(int64))) or
  1418. ((torddef(fromdef).typ = u64bit) and
  1419. (lfrom = low(qword)) and
  1420. (hfrom = high(qword)))))) then
  1421. exit;
  1422. {$else cpu64bit}
  1423. if (fromdef = todef) and
  1424. (fromdef.deftype=orddef) and
  1425. (((((torddef(fromdef).typ = s32bit) and
  1426. (lfrom = low(longint)) and
  1427. (hfrom = high(longint))) or
  1428. ((torddef(fromdef).typ = u32bit) and
  1429. (lfrom = low(cardinal)) and
  1430. (hfrom = high(cardinal)))))) then
  1431. exit;
  1432. {$endif cpu64bit}
  1433. { if the from-range falls completely in the to-range, no check }
  1434. { is necessary. Don't do this conversion for the largest unsigned type }
  1435. if (todef<>fromdef) and
  1436. (from_signed or (hfrom>=0)) and
  1437. (lto<=lfrom) and (hto>=hfrom) then
  1438. exit;
  1439. { generate the rangecheck code for the def where we are going to }
  1440. { store the result }
  1441. { use the trick that }
  1442. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1443. { To be able to do that, we have to make sure however that either }
  1444. { fromdef and todef are both signed or unsigned, or that we leave }
  1445. { the parts < 0 and > maxlongint out }
  1446. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1447. if from_signed xor is_signed(todef) then
  1448. begin
  1449. if from_signed then
  1450. { from is signed, to is unsigned }
  1451. begin
  1452. { if high(from) < 0 -> always range error }
  1453. if (hfrom < 0) or
  1454. { if low(to) > maxlongint also range error }
  1455. (lto > aintmax) then
  1456. begin
  1457. a_call_name(list,'FPC_RANGEERROR');
  1458. exit
  1459. end;
  1460. { from is signed and to is unsigned -> when looking at to }
  1461. { as an signed value, it must be < maxaint (otherwise }
  1462. { it will become negative, which is invalid since "to" is unsigned) }
  1463. if hto > aintmax then
  1464. hto := aintmax;
  1465. end
  1466. else
  1467. { from is unsigned, to is signed }
  1468. begin
  1469. if (lfrom > aintmax) or
  1470. (hto < 0) then
  1471. begin
  1472. a_call_name(list,'FPC_RANGEERROR');
  1473. exit
  1474. end;
  1475. { from is unsigned and to is signed -> when looking at to }
  1476. { as an unsigned value, it must be >= 0 (since negative }
  1477. { values are the same as values > maxlongint) }
  1478. if lto < 0 then
  1479. lto := 0;
  1480. end;
  1481. end;
  1482. hreg:=getintregister(list,OS_INT);
  1483. a_load_loc_reg(list,OS_INT,l,hreg);
  1484. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1485. objectlibrary.getlabel(neglabel);
  1486. {
  1487. if from_signed then
  1488. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  1489. else
  1490. }
  1491. {$ifdef cpu64bit}
  1492. if qword(hto-lto)>qword(aintmax) then
  1493. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  1494. else
  1495. {$endif cpu64bit}
  1496. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1497. a_call_name(list,'FPC_RANGEERROR');
  1498. a_label(list,neglabel);
  1499. end;
  1500. procedure tcg.g_overflowCheck_loc(List:TAasmOutput;const Loc:TLocation;def:TDef;ovloc : tlocation);
  1501. begin
  1502. g_overflowCheck(list,loc,def);
  1503. end;
  1504. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1505. var
  1506. tmpreg : tregister;
  1507. begin
  1508. tmpreg:=getintregister(list,size);
  1509. g_flags2reg(list,size,f,tmpreg);
  1510. a_load_reg_ref(list,size,size,tmpreg,ref);
  1511. end;
  1512. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1513. var
  1514. OKLabel : tasmlabel;
  1515. cgpara1 : TCGPara;
  1516. begin
  1517. if (cs_check_object in aktlocalswitches) or
  1518. (cs_check_range in aktlocalswitches) then
  1519. begin
  1520. objectlibrary.getlabel(oklabel);
  1521. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1522. cgpara1.init;
  1523. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1524. paramanager.allocparaloc(list,cgpara1);
  1525. a_param_const(list,OS_INT,210,cgpara1);
  1526. paramanager.freeparaloc(list,cgpara1);
  1527. a_call_name(list,'FPC_HANDLEERROR');
  1528. a_label(list,oklabel);
  1529. cgpara1.done;
  1530. end;
  1531. end;
  1532. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1533. var
  1534. hrefvmt : treference;
  1535. cgpara1,cgpara2 : TCGPara;
  1536. begin
  1537. cgpara1.init;
  1538. cgpara2.init;
  1539. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1540. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1541. if (cs_check_object in aktlocalswitches) then
  1542. begin
  1543. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymbol(objdef.vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
  1544. paramanager.allocparaloc(list,cgpara2);
  1545. a_paramaddr_ref(list,hrefvmt,cgpara2);
  1546. paramanager.allocparaloc(list,cgpara1);
  1547. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1548. paramanager.freeparaloc(list,cgpara1);
  1549. paramanager.freeparaloc(list,cgpara2);
  1550. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1551. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1552. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1553. end
  1554. else
  1555. if (cs_check_range in aktlocalswitches) then
  1556. begin
  1557. paramanager.allocparaloc(list,cgpara1);
  1558. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1559. paramanager.freeparaloc(list,cgpara1);
  1560. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1561. a_call_name(list,'FPC_CHECK_OBJECT');
  1562. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1563. end;
  1564. cgpara1.done;
  1565. cgpara2.done;
  1566. end;
  1567. {*****************************************************************************
  1568. Entry/Exit Code Functions
  1569. *****************************************************************************}
  1570. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  1571. var
  1572. sizereg,sourcereg,lenreg : tregister;
  1573. cgpara1,cgpara2,cgpara3 : TCGPara;
  1574. begin
  1575. { because some abis don't support dynamic stack allocation properly
  1576. open array value parameters are copied onto the heap
  1577. }
  1578. { calculate necessary memory }
  1579. { read/write operations on one register make the life of the register allocator hard }
  1580. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1581. begin
  1582. lenreg:=getintregister(list,OS_INT);
  1583. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  1584. end
  1585. else
  1586. lenreg:=lenloc.register;
  1587. sizereg:=getintregister(list,OS_INT);
  1588. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  1589. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1590. { load source }
  1591. sourcereg:=getaddressregister(list);
  1592. a_loadaddr_ref_reg(list,ref,sourcereg);
  1593. { do getmem call }
  1594. cgpara1.init;
  1595. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1596. paramanager.allocparaloc(list,cgpara1);
  1597. a_param_reg(list,OS_INT,sizereg,cgpara1);
  1598. paramanager.freeparaloc(list,cgpara1);
  1599. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1600. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1601. a_call_name(list,'FPC_GETMEM');
  1602. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1603. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1604. cgpara1.done;
  1605. { return the new address }
  1606. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1607. { do move call }
  1608. cgpara1.init;
  1609. cgpara2.init;
  1610. cgpara3.init;
  1611. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1612. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1613. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1614. { load size }
  1615. paramanager.allocparaloc(list,cgpara3);
  1616. a_param_reg(list,OS_INT,sizereg,cgpara3);
  1617. { load destination }
  1618. paramanager.allocparaloc(list,cgpara2);
  1619. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  1620. { load source }
  1621. paramanager.allocparaloc(list,cgpara1);
  1622. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  1623. paramanager.freeparaloc(list,cgpara3);
  1624. paramanager.freeparaloc(list,cgpara2);
  1625. paramanager.freeparaloc(list,cgpara1);
  1626. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1627. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1628. a_call_name(list,'FPC_MOVE');
  1629. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1630. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1631. cgpara3.done;
  1632. cgpara2.done;
  1633. cgpara1.done;
  1634. end;
  1635. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const l:tlocation);
  1636. var
  1637. cgpara1 : TCGPara;
  1638. begin
  1639. { do move call }
  1640. cgpara1.init;
  1641. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1642. { load source }
  1643. paramanager.allocparaloc(list,cgpara1);
  1644. a_param_loc(list,l,cgpara1);
  1645. paramanager.freeparaloc(list,cgpara1);
  1646. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1647. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1648. a_call_name(list,'FPC_FREEMEM');
  1649. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1650. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1651. cgpara1.done;
  1652. end;
  1653. procedure tcg.g_save_standard_registers(list:Taasmoutput);
  1654. var
  1655. href : treference;
  1656. size : longint;
  1657. r : integer;
  1658. begin
  1659. { Get temp }
  1660. size:=0;
  1661. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1662. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1663. inc(size,sizeof(aint));
  1664. if size>0 then
  1665. begin
  1666. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  1667. { Copy registers to temp }
  1668. href:=current_procinfo.save_regs_ref;
  1669. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1670. begin
  1671. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1672. begin
  1673. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  1674. inc(href.offset,sizeof(aint));
  1675. end;
  1676. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  1677. end;
  1678. end;
  1679. end;
  1680. procedure tcg.g_restore_standard_registers(list:Taasmoutput);
  1681. var
  1682. href : treference;
  1683. r : integer;
  1684. hreg : tregister;
  1685. begin
  1686. { Copy registers from temp }
  1687. href:=current_procinfo.save_regs_ref;
  1688. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1689. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1690. begin
  1691. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  1692. { Allocate register so the optimizer does remove the load }
  1693. a_reg_alloc(list,hreg);
  1694. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  1695. inc(href.offset,sizeof(aint));
  1696. end;
  1697. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  1698. end;
  1699. procedure tcg.g_profilecode(list : taasmoutput);
  1700. begin
  1701. end;
  1702. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1703. begin
  1704. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1705. end;
  1706. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);
  1707. begin
  1708. a_load_const_ref(list, OS_INT, a, href);
  1709. end;
  1710. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1711. begin
  1712. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1713. end;
  1714. procedure tcg.g_adjust_self_value(list:taasmoutput;procdef: tprocdef;ioffset: aint);
  1715. var
  1716. hsym : tsym;
  1717. href : treference;
  1718. paraloc : tcgparalocation;
  1719. begin
  1720. { calculate the parameter info for the procdef }
  1721. if not procdef.has_paraloc_info then
  1722. begin
  1723. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  1724. procdef.has_paraloc_info:=true;
  1725. end;
  1726. hsym:=tsym(procdef.parast.search('self'));
  1727. if not(assigned(hsym) and
  1728. (hsym.typ=paravarsym)) then
  1729. internalerror(200305251);
  1730. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  1731. case paraloc.loc of
  1732. LOC_REGISTER:
  1733. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  1734. LOC_REFERENCE:
  1735. begin
  1736. { offset in the wrapper needs to be adjusted for the stored
  1737. return address }
  1738. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  1739. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  1740. end
  1741. else
  1742. internalerror(200309189);
  1743. end;
  1744. end;
  1745. {*****************************************************************************
  1746. TCG64
  1747. *****************************************************************************}
  1748. {$ifndef cpu64bit}
  1749. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  1750. begin
  1751. a_load64_reg_reg(list,regsrc,regdst);
  1752. a_op64_const_reg(list,op,size,value,regdst);
  1753. end;
  1754. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  1755. var
  1756. tmpreg64 : tregister64;
  1757. begin
  1758. { when src1=dst then we need to first create a temp to prevent
  1759. overwriting src1 with src2 }
  1760. if (regsrc1.reghi=regdst.reghi) or
  1761. (regsrc1.reglo=regdst.reghi) or
  1762. (regsrc1.reghi=regdst.reglo) or
  1763. (regsrc1.reglo=regdst.reglo) then
  1764. begin
  1765. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  1766. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  1767. a_load64_reg_reg(list,regsrc2,tmpreg64);
  1768. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  1769. a_load64_reg_reg(list,tmpreg64,regdst);
  1770. end
  1771. else
  1772. begin
  1773. a_load64_reg_reg(list,regsrc2,regdst);
  1774. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  1775. end;
  1776. end;
  1777. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1778. begin
  1779. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  1780. ovloc.loc:=LOC_VOID;
  1781. end;
  1782. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1783. begin
  1784. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  1785. ovloc.loc:=LOC_VOID;
  1786. end;
  1787. {$endif cpu64bit}
  1788. initialization
  1789. ;
  1790. finalization
  1791. cg.free;
  1792. {$ifndef cpu64bit}
  1793. cg64.free;
  1794. {$endif cpu64bit}
  1795. end.