nmat.pas 17 KB

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  1. {
  2. $Id$
  3. Copyright (c) 2000 by Florian Klaempfl
  4. Type checking and register allocation for math nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit nmat;
  19. {$i defines}
  20. interface
  21. uses
  22. node,symtable;
  23. type
  24. tmoddivnode = class(tbinopnode)
  25. function pass_1 : tnode;override;
  26. end;
  27. tshlshrnode = class(tbinopnode)
  28. function pass_1 : tnode;override;
  29. end;
  30. tunaryminusnode = class(tunarynode)
  31. constructor create(expr : tnode);virtual;
  32. function pass_1 : tnode;override;
  33. end;
  34. tnotnode = class(tunarynode)
  35. constructor create(expr : tnode);virtual;
  36. function pass_1 : tnode;override;
  37. end;
  38. var
  39. cmoddivnode : class of tmoddivnode;
  40. cshlshrnode : class of tshlshrnode;
  41. cunaryminusnode : class of tunaryminusnode;
  42. cnotnode : class of tnotnode;
  43. implementation
  44. uses
  45. globtype,systems,tokens,
  46. cobjects,verbose,globals,
  47. symconst,aasm,types,
  48. htypechk,pass_1,cpubase,cpuinfo,
  49. {$ifdef newcg}
  50. cgbase,
  51. {$else newcg}
  52. hcodegen,
  53. {$endif newcg}
  54. { for isbinaryoverloaded function }
  55. nadd;
  56. {****************************************************************************
  57. TMODDIVNODE
  58. ****************************************************************************}
  59. function tmoddivnode.pass_1 : tnode;
  60. var
  61. t : tnode
  62. rv,lv : tconstexprint;
  63. rd,ld : pdef;
  64. begin
  65. pass_1:=nil;
  66. firstpass(left);
  67. right.set_varstate(true);
  68. firstpass(right);
  69. right.set_varstate(true);
  70. if codegenerror then
  71. exit;
  72. if isbinaryoverloaded(p) then
  73. exit;
  74. { check for division by zero }
  75. rv:=right.value;
  76. lv:=left.value;
  77. if is_constintnode(right) and (rv=0) then
  78. begin
  79. Message(parser_e_division_by_zero);
  80. { recover }
  81. rv:=1;
  82. end;
  83. if is_constintnode(left) and is_constintnode(right) then
  84. begin
  85. case treetype of
  86. modn:
  87. t:=genintconstnode(lv mod rv);
  88. divn:
  89. t:=genintconstnode(lv div rv);
  90. end;
  91. firstpass(t);
  92. pass_1:=t;
  93. exit;
  94. end;
  95. if (left.resulttype^.deftype=orddef) and (right.resulttype^.deftype=orddef) and
  96. (is_64bitint(left.resulttype) or is_64bitint(right.resulttype)) then
  97. begin
  98. rd:=right.resulttype;
  99. ld:=left.resulttype;
  100. if (porddef(rd)^.typ=s64bit) or (porddef(ld)^.typ=s64bit) then
  101. begin
  102. if (porddef(ld)^.typ<>s64bit) then
  103. begin
  104. left:=gentypeconvnode(left,cs64bitdef);
  105. firstpass(left);
  106. end;
  107. if (porddef(rd)^.typ<>s64bit) then
  108. begin
  109. right:=gentypeconvnode(right,cs64bitdef);
  110. firstpass(right);
  111. end;
  112. calcregisters(p,2,0,0);
  113. end
  114. else if (porddef(rd)^.typ=u64bit) or (porddef(ld)^.typ=u64bit) then
  115. begin
  116. if (porddef(ld)^.typ<>u64bit) then
  117. begin
  118. left:=gentypeconvnode(left,cu64bitdef);
  119. firstpass(left);
  120. end;
  121. if (porddef(rd)^.typ<>u64bit) then
  122. begin
  123. right:=gentypeconvnode(right,cu64bitdef);
  124. firstpass(right);
  125. end;
  126. calcregisters(p,2,0,0);
  127. end;
  128. resulttype:=left.resulttype;
  129. end
  130. else
  131. begin
  132. if not(right.resulttype^.deftype=orddef) or
  133. not(porddef(right.resulttype)^.typ in [s32bit,u32bit]) then
  134. right:=gentypeconvnode(right,s32bitdef);
  135. if not(left.resulttype^.deftype=orddef) or
  136. not(porddef(left.resulttype)^.typ in [s32bit,u32bit]) then
  137. left:=gentypeconvnode(left,s32bitdef);
  138. firstpass(left);
  139. firstpass(right);
  140. {$ifdef cardinalmulfix}
  141. { if we divide a u32bit by a positive constant, the result is also u32bit (JM) }
  142. if (left.resulttype^.deftype = orddef) and
  143. (left.resulttype^.deftype = orddef) then
  144. begin
  145. if (porddef(left.resulttype)^.typ = u32bit) and
  146. is_constintnode(right) and
  147. { (porddef(right.resulttype)^.typ <> u32bit) and}
  148. (right.value > 0) then
  149. begin
  150. right := gentypeconvnode(right,u32bitdef);
  151. firstpass(right);
  152. end;
  153. { adjust also the left resulttype if necessary }
  154. if (porddef(right.resulttype)^.typ = u32bit) and
  155. is_constintnode(left) and
  156. { (porddef(left.resulttype)^.typ <> u32bit) and}
  157. (left.value > 0) then
  158. begin
  159. left := gentypeconvnode(left,u32bitdef);
  160. firstpass(left);
  161. end;
  162. end;
  163. {$endif cardinalmulfix}
  164. { the resulttype depends on the right side, because the left becomes }
  165. { always 64 bit }
  166. resulttype:=right.resulttype;
  167. if codegenerror then
  168. exit;
  169. left_right_max(p);
  170. if left.registers32<=right.registers32 then
  171. inc(registers32);
  172. end;
  173. location.loc:=LOC_REGISTER;
  174. end;
  175. {****************************************************************************
  176. TSHLSHRNODE
  177. ****************************************************************************}
  178. function tshlshrnode.pass_1 : tnode;
  179. var
  180. t : tnode;
  181. regs : longint;
  182. begin
  183. pass_1:=nil;
  184. firstpass(left);
  185. set_varstate(left,true);
  186. firstpass(right);
  187. set_varstate(right,true);
  188. if codegenerror then
  189. exit;
  190. if isbinaryoverloaded(p) then
  191. exit;
  192. if is_constintnode(left) and is_constintnode(right) then
  193. begin
  194. case treetype of
  195. shrn:
  196. t:=genintconstnode(left.value shr right.value);
  197. shln:
  198. t:=genintconstnode(left.value shl right.value);
  199. end;
  200. firstpass(t);
  201. pass_1:=t;
  202. exit;
  203. end;
  204. { 64 bit ints have their own shift handling }
  205. if not(is_64bitint(left.resulttype)) then
  206. begin
  207. left:=gentypeconvnode(left,s32bitdef);
  208. firstpass(left);
  209. regs:=1;
  210. resulttype:=s32bitdef;
  211. end
  212. else
  213. begin
  214. resulttype:=left.resulttype;
  215. regs:=2;
  216. end;
  217. right:=gentypeconvnode(right,s32bitdef);
  218. firstpass(right);
  219. if codegenerror then
  220. exit;
  221. if (right.treetype<>ordconstn) then
  222. inc(regs);
  223. calcregisters(p,regs,0,0);
  224. location.loc:=LOC_REGISTER;
  225. end;
  226. {****************************************************************************
  227. TUNARYMINUSNODE
  228. ****************************************************************************}
  229. constructor tunaryminusnode.create(expr : tnode);
  230. begin
  231. inherited create(unaryminusn,expr);
  232. end;
  233. function tunaryminusnode.pass_1 : tnode;
  234. var
  235. t : tnode;
  236. minusdef : pprocdef;
  237. begin
  238. pass_1:=nil;
  239. firstpass(left);
  240. set_varstate(left,true);
  241. registers32:=left.registers32;
  242. registersfpu:=left.registersfpu;
  243. {$ifdef SUPPORT_MMX}
  244. registersmmx:=left.registersmmx;
  245. {$endif SUPPORT_MMX}
  246. resulttype:=left.resulttype;
  247. if codegenerror then
  248. exit;
  249. if is_constintnode(left) then
  250. begin
  251. t:=genintconstnode(-left.value);
  252. firstpass(t);
  253. pass_1:=t;
  254. exit;
  255. end;
  256. { nasm can not cope with negativ reals !! }
  257. if is_constrealnode(left)
  258. {$ifdef i386}
  259. and not(aktoutputformat in [as_i386_nasmcoff,as_i386_nasmelf,as_i386_nasmobj])
  260. {$endif i386}
  261. then
  262. begin
  263. t:=genrealconstnode(-left.value_real,bestrealdef^);
  264. firstpass(t);
  265. pass_1:=t;
  266. exit;
  267. end;
  268. if (left.resulttype^.deftype=floatdef) then
  269. begin
  270. if pfloatdef(left.resulttype)^.typ=f32bit then
  271. begin
  272. if (left.location.loc<>LOC_REGISTER) and
  273. (registers32<1) then
  274. registers32:=1;
  275. location.loc:=LOC_REGISTER;
  276. end
  277. else
  278. location.loc:=LOC_FPU;
  279. end
  280. {$ifdef SUPPORT_MMX}
  281. else if (cs_mmx in aktlocalswitches) and
  282. is_mmx_able_array(left.resulttype) then
  283. begin
  284. if (left.location.loc<>LOC_MMXREGISTER) and
  285. (registersmmx<1) then
  286. registersmmx:=1;
  287. { if saturation is on, left.resulttype isn't
  288. "mmx able" (FK)
  289. if (cs_mmx_saturation in aktlocalswitches^) and
  290. (porddef(parraydef(resulttype)^.definition)^.typ in
  291. [s32bit,u32bit]) then
  292. CGMessage(type_e_mismatch);
  293. }
  294. end
  295. {$endif SUPPORT_MMX}
  296. else if is_64bitint(left.resulttype) then
  297. begin
  298. firstpass(left);
  299. registersfpu:=left.registersfpu;
  300. {$ifdef SUPPORT_MMX}
  301. registersmmx:=left.registersmmx;
  302. {$endif SUPPORT_MMX}
  303. registers32:=left.registers32;
  304. if codegenerror then
  305. exit;
  306. if (left.location.loc<>LOC_REGISTER) and
  307. (registers32<2) then
  308. registers32:=2;
  309. location.loc:=LOC_REGISTER;
  310. resulttype:=left.resulttype;
  311. end
  312. else if (left.resulttype^.deftype=orddef) then
  313. begin
  314. left:=gentypeconvnode(left,s32bitdef);
  315. firstpass(left);
  316. registersfpu:=left.registersfpu;
  317. {$ifdef SUPPORT_MMX}
  318. registersmmx:=left.registersmmx;
  319. {$endif SUPPORT_MMX}
  320. registers32:=left.registers32;
  321. if codegenerror then
  322. exit;
  323. if (left.location.loc<>LOC_REGISTER) and
  324. (registers32<1) then
  325. registers32:=1;
  326. location.loc:=LOC_REGISTER;
  327. resulttype:=left.resulttype;
  328. end
  329. else
  330. begin
  331. if assigned(overloaded_operators[_minus]) then
  332. minusdef:=overloaded_operators[_minus]^.definition
  333. else
  334. minusdef:=nil;
  335. while assigned(minusdef) do
  336. begin
  337. if is_equal(pparaitem(minusdef^.para^.first)^.paratype.def,left.resulttype) and
  338. (pparaitem(minusdef^.para^.first)^.next=nil) then
  339. begin
  340. t:=gencallnode(overloaded_operators[_minus],nil);
  341. t.left:=gencallparanode(left,nil);
  342. left:=nil;
  343. firstpass(t);
  344. pass_1:=t;
  345. exit;
  346. end;
  347. minusdef:=minusdef^.nextoverloaded;
  348. end;
  349. CGMessage(type_e_mismatch);
  350. end;
  351. end;
  352. {****************************************************************************
  353. TNOTNODE
  354. ****************************************************************************}
  355. constructor tnotnode.create(expr : tnode);
  356. begin
  357. inherited create(notn,expr);
  358. end;
  359. function tnotnode.pass_1 : tnode;
  360. var
  361. t : tnode;
  362. notdef : pprocdef;
  363. begin
  364. pass_1:=nil;
  365. firstpass(left);
  366. set_varstate(left,true);
  367. if codegenerror then
  368. exit;
  369. if (left.treetype=ordconstn) then
  370. begin
  371. if is_boolean(left.resulttype) then
  372. { here we do a boolena(byte(..)) type cast because }
  373. { boolean(<int64>) is buggy in 1.00 }
  374. t:=genordinalconstnode(byte(not(boolean(byte(left.value)))),left.resulttype)
  375. else
  376. t:=genordinalconstnode(not(left.value),left.resulttype);
  377. firstpass(t);
  378. pass_1:=t;
  379. exit;
  380. end;
  381. resulttype:=left.resulttype;
  382. location.loc:=left.location.loc;
  383. {$ifdef SUPPORT_MMX}
  384. registersmmx:=left.registersmmx;
  385. {$endif SUPPORT_MMX}
  386. if is_boolean(resulttype) then
  387. begin
  388. registers32:=left.registers32;
  389. if (location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
  390. begin
  391. location.loc:=LOC_REGISTER;
  392. if (registers32<1) then
  393. registers32:=1;
  394. end;
  395. { before loading it into flags we need to load it into
  396. a register thus 1 register is need PM }
  397. {$ifdef i386}
  398. if left.location.loc<>LOC_JUMP then
  399. location.loc:=LOC_FLAGS;
  400. {$endif def i386}
  401. end
  402. else
  403. {$ifdef SUPPORT_MMX}
  404. if (cs_mmx in aktlocalswitches) and
  405. is_mmx_able_array(left.resulttype) then
  406. begin
  407. if (left.location.loc<>LOC_MMXREGISTER) and
  408. (registersmmx<1) then
  409. registersmmx:=1;
  410. end
  411. else
  412. {$endif SUPPORT_MMX}
  413. if is_64bitint(left.resulttype) then
  414. begin
  415. registers32:=left.registers32;
  416. if (location.loc in [LOC_REFERENCE,LOC_MEM,LOC_CREGISTER]) then
  417. begin
  418. location.loc:=LOC_REGISTER;
  419. if (registers32<2) then
  420. registers32:=2;
  421. end;
  422. end
  423. else if is_integer(left.resulttype) then
  424. begin
  425. left:=gentypeconvnode(left,s32bitdef);
  426. firstpass(left);
  427. if codegenerror then
  428. exit;
  429. resulttype:=left.resulttype;
  430. registers32:=left.registers32;
  431. {$ifdef SUPPORT_MMX}
  432. registersmmx:=left.registersmmx;
  433. {$endif SUPPORT_MMX}
  434. if (left.location.loc<>LOC_REGISTER) and
  435. (registers32<1) then
  436. registers32:=1;
  437. location.loc:=LOC_REGISTER;
  438. end
  439. else
  440. begin
  441. if assigned(overloaded_operators[_op_not]) then
  442. notdef:=overloaded_operators[_op_not]^.definition
  443. else
  444. notdef:=nil;
  445. while assigned(notdef) do
  446. begin
  447. if is_equal(pparaitem(notdef^.para^.first)^.paratype.def,left.resulttype) and
  448. (pparaitem(notdef^.para^.first)^.next=nil) then
  449. begin
  450. t:=gencallnode(overloaded_operators[_op_not],nil);
  451. t.left:=gencallparanode(left,nil);
  452. left:=nil;
  453. firstpass(t);
  454. pass_1:=t;
  455. exit;
  456. end;
  457. notdef:=notdef^.nextoverloaded;
  458. end;
  459. CGMessage(type_e_mismatch);
  460. end;
  461. registersfpu:=left.registersfpu;
  462. end;
  463. begin
  464. cmoddivnode:=tmoddivnode;
  465. cshlshrnode:=tshlshrnode;
  466. cunaryminusnode:=tunaryminusnode;
  467. cnotnode:=tnotnode;
  468. end.
  469. {
  470. $Log$
  471. Revision 1.4 2000-09-24 15:06:19 peter
  472. * use defines.inc
  473. Revision 1.3 2000/09/22 22:48:54 florian
  474. * some fixes
  475. Revision 1.2 2000/09/22 22:09:54 florian
  476. * more stuff converted
  477. Revision 1.1 2000/09/20 21:35:12 florian
  478. * initial revision
  479. }