cgobj.pas 169 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. This must be overriden for each CPU target.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overriden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. @param(size size of the operand in constant)
  113. @param(a value of constant to send)
  114. @param(cgpara where the parameter will be stored)
  115. }
  116. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  117. {# Pass the value of a parameter, which is located in memory, to a routine.
  118. A generic version is provided. This routine should
  119. be overriden for optimization purposes if the cpu
  120. permits directly sending this type of parameter.
  121. @param(size size of the operand in constant)
  122. @param(r Memory reference of value to send)
  123. @param(cgpara where the parameter will be stored)
  124. }
  125. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  126. {# Pass the value of a parameter, which can be located either in a register or memory location,
  127. to a routine.
  128. A generic version is provided.
  129. @param(l location of the operand to send)
  130. @param(nr parameter number (starting from one) of routine (from left to right))
  131. @param(cgpara where the parameter will be stored)
  132. }
  133. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  134. {# Pass the address of a reference to a routine. This routine
  135. will calculate the address of the reference, and pass this
  136. calculated address as a parameter.
  137. A generic version is provided. This routine should
  138. be overriden for optimization purposes if the cpu
  139. permits directly sending this type of parameter.
  140. @param(r reference to get address from)
  141. @param(nr parameter number (starting from one) of routine (from left to right))
  142. }
  143. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. {# Emits instruction to call the method specified by symbol name.
  161. This routine must be overriden for each new target cpu.
  162. There is no a_call_ref because loading the reference will use
  163. a temp register on most cpu's resulting in conflicts with the
  164. registers used for the parameters (PFV)
  165. }
  166. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  167. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  168. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  169. { same as a_call_name, might be overriden on certain architectures to emit
  170. static calls without usage of a got trampoline }
  171. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  172. { move instructions }
  173. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  176. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  178. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  179. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  180. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  181. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  182. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  183. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  184. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  185. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  186. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  187. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  188. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  189. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  192. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  193. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  194. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  195. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  196. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  197. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  199. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  200. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  201. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  202. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  203. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  204. { bit test instructions }
  205. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  206. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  207. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  208. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  210. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  211. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  212. { bit set/clear instructions }
  213. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  214. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  215. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  216. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  217. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  218. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  219. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  220. { fpu move instructions }
  221. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  222. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  223. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  224. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  225. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  226. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  227. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  228. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  229. { vector register move instructions }
  230. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  231. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  232. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  233. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  234. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  235. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  237. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  238. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  239. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  240. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  241. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  242. { basic arithmetic operations }
  243. { note: for operators which require only one argument (not, neg), use }
  244. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  245. { that in this case the *second* operand is used as both source and }
  246. { destination (JM) }
  247. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  248. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  249. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  250. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  251. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  252. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  253. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  254. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  255. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  256. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  257. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  258. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  259. { trinary operations for processors that support them, 'emulated' }
  260. { on others. None with "ref" arguments since I don't think there }
  261. { are any processors that support it (JM) }
  262. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  263. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  264. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  265. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  266. { comparison operations }
  267. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  268. l : tasmlabel);virtual; abstract;
  269. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  270. l : tasmlabel); virtual;
  271. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  272. l : tasmlabel);
  273. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  274. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  275. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  276. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  277. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  278. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  279. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  280. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  281. l : tasmlabel);
  282. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  283. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  284. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  285. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  286. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  287. }
  288. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  289. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  290. {
  291. This routine tries to optimize the op_const_reg/ref opcode, and should be
  292. called at the start of a_op_const_reg/ref. It returns the actual opcode
  293. to emit, and the constant value to emit. This function can opcode OP_NONE to
  294. remove the opcode and OP_MOVE to replace it with a simple load
  295. @param(op The opcode to emit, returns the opcode which must be emitted)
  296. @param(a The constant which should be emitted, returns the constant which must
  297. be emitted)
  298. }
  299. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  300. {#
  301. This routine is used in exception management nodes. It should
  302. save the exception reason currently in the FUNCTION_RETURN_REG. The
  303. save should be done either to a temp (pointed to by href).
  304. or on the stack (pushing the value on the stack).
  305. The size of the value to save is OS_S32. The default version
  306. saves the exception reason to a temp. memory area.
  307. }
  308. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  309. {#
  310. This routine is used in exception management nodes. It should
  311. save the exception reason constant. The
  312. save should be done either to a temp (pointed to by href).
  313. or on the stack (pushing the value on the stack).
  314. The size of the value to save is OS_S32. The default version
  315. saves the exception reason to a temp. memory area.
  316. }
  317. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  318. {#
  319. This routine is used in exception management nodes. It should
  320. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  321. should either be in the temp. area (pointed to by href , href should
  322. *NOT* be freed) or on the stack (the value should be popped).
  323. The size of the value to save is OS_S32. The default version
  324. saves the exception reason to a temp. memory area.
  325. }
  326. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  327. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  328. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  329. {# This should emit the opcode to copy len bytes from the source
  330. to destination.
  331. It must be overriden for each new target processor.
  332. @param(source Source reference of copy)
  333. @param(dest Destination reference of copy)
  334. }
  335. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  336. {# This should emit the opcode to copy len bytes from the an unaligned source
  337. to destination.
  338. It must be overriden for each new target processor.
  339. @param(source Source reference of copy)
  340. @param(dest Destination reference of copy)
  341. }
  342. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  343. {# This should emit the opcode to a shortrstring from the source
  344. to destination.
  345. @param(source Source reference of copy)
  346. @param(dest Destination reference of copy)
  347. }
  348. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  349. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  350. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  351. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  352. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  353. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  354. {# Generates range checking code. It is to note
  355. that this routine does not need to be overriden,
  356. as it takes care of everything.
  357. @param(p Node which contains the value to check)
  358. @param(todef Type definition of node to range check)
  359. }
  360. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  361. {# Generates overflow checking code for a node }
  362. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  363. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  364. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  365. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  366. {# Emits instructions when compilation is done in profile
  367. mode (this is set as a command line option). The default
  368. behavior does nothing, should be overriden as required.
  369. }
  370. procedure g_profilecode(list : TAsmList);virtual;
  371. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  372. @param(size Number of bytes to allocate)
  373. }
  374. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  375. {# Emits instruction for allocating the locals in entry
  376. code of a routine. This is one of the first
  377. routine called in @var(genentrycode).
  378. @param(localsize Number of bytes to allocate as locals)
  379. }
  380. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  381. {# Emits instructions for returning from a subroutine.
  382. Should also restore the framepointer and stack.
  383. @param(parasize Number of bytes of parameters to deallocate from stack)
  384. }
  385. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  386. {# This routine is called when generating the code for the entry point
  387. of a routine. It should save all registers which are not used in this
  388. routine, and which should be declared as saved in the std_saved_registers
  389. set.
  390. This routine is mainly used when linking to code which is generated
  391. by ABI-compliant compilers (like GCC), to make sure that the reserved
  392. registers of that ABI are not clobbered.
  393. @param(usedinproc Registers which are used in the code of this routine)
  394. }
  395. procedure g_save_registers(list:TAsmList);virtual;
  396. {# This routine is called when generating the code for the exit point
  397. of a routine. It should restore all registers which were previously
  398. saved in @var(g_save_standard_registers).
  399. @param(usedinproc Registers which are used in the code of this routine)
  400. }
  401. procedure g_restore_registers(list:TAsmList);virtual;
  402. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  403. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  404. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  405. { generate a stub which only purpose is to pass control the given external method,
  406. setting up any additional environment before doing so (if required).
  407. The default implementation issues a jump instruction to the external name. }
  408. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  409. { initialize the pic/got register }
  410. procedure g_maybe_got_init(list: TAsmList); virtual;
  411. protected
  412. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  413. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  414. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  415. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  416. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  417. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  418. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  419. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  420. end;
  421. {$ifndef cpu64bitalu}
  422. {# @abstract(Abstract code generator for 64 Bit operations)
  423. This class implements an abstract code generator class
  424. for 64 Bit operations.
  425. }
  426. tcg64 = class
  427. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  428. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  429. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  430. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  431. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  432. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  433. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  434. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  435. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  436. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  437. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  438. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  439. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  440. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  441. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  442. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  443. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  444. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  445. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  446. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  447. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  448. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  449. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  450. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  451. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  452. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  453. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  454. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  455. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  456. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  457. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  458. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  459. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  460. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  461. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  462. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  463. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  464. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  465. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  466. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  467. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  468. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  469. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  470. {
  471. This routine tries to optimize the const_reg opcode, and should be
  472. called at the start of a_op64_const_reg. It returns the actual opcode
  473. to emit, and the constant value to emit. If this routine returns
  474. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  475. @param(op The opcode to emit, returns the opcode which must be emitted)
  476. @param(a The constant which should be emitted, returns the constant which must
  477. be emitted)
  478. @param(reg The register to emit the opcode with, returns the register with
  479. which the opcode will be emitted)
  480. }
  481. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  482. { override to catch 64bit rangechecks }
  483. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  484. end;
  485. {$endif cpu64bitalu}
  486. var
  487. {# Main code generator class }
  488. cg : tcg;
  489. {$ifndef cpu64bitalu}
  490. {# Code generator class for all operations working with 64-Bit operands }
  491. cg64 : tcg64;
  492. {$endif cpu64bitalu}
  493. implementation
  494. uses
  495. globals,options,systems,
  496. verbose,defutil,paramgr,symsym,
  497. tgobj,cutils,procinfo,
  498. ncgrtti;
  499. {*****************************************************************************
  500. basic functionallity
  501. ******************************************************************************}
  502. constructor tcg.create;
  503. begin
  504. end;
  505. {*****************************************************************************
  506. register allocation
  507. ******************************************************************************}
  508. procedure tcg.init_register_allocators;
  509. begin
  510. fillchar(rg,sizeof(rg),0);
  511. add_reg_instruction_hook:=@add_reg_instruction;
  512. executionweight:=1;
  513. end;
  514. procedure tcg.done_register_allocators;
  515. begin
  516. { Safety }
  517. fillchar(rg,sizeof(rg),0);
  518. add_reg_instruction_hook:=nil;
  519. end;
  520. {$ifdef flowgraph}
  521. procedure Tcg.init_flowgraph;
  522. begin
  523. aktflownode:=0;
  524. end;
  525. procedure Tcg.done_flowgraph;
  526. begin
  527. end;
  528. {$endif}
  529. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  530. begin
  531. if not assigned(rg[R_INTREGISTER]) then
  532. internalerror(200312122);
  533. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  534. end;
  535. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  536. begin
  537. if not assigned(rg[R_FPUREGISTER]) then
  538. internalerror(200312123);
  539. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  540. end;
  541. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  542. begin
  543. if not assigned(rg[R_MMREGISTER]) then
  544. internalerror(2003121214);
  545. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  546. end;
  547. function tcg.getaddressregister(list:TAsmList):Tregister;
  548. begin
  549. if assigned(rg[R_ADDRESSREGISTER]) then
  550. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  551. else
  552. begin
  553. if not assigned(rg[R_INTREGISTER]) then
  554. internalerror(200312121);
  555. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  556. end;
  557. end;
  558. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  559. var
  560. subreg:Tsubregister;
  561. begin
  562. subreg:=cgsize2subreg(size);
  563. result:=reg;
  564. setsubreg(result,subreg);
  565. { notify RA }
  566. if result<>reg then
  567. list.concat(tai_regalloc.resize(result));
  568. end;
  569. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  570. begin
  571. if not assigned(rg[getregtype(r)]) then
  572. internalerror(200312125);
  573. rg[getregtype(r)].getcpuregister(list,r);
  574. end;
  575. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  576. begin
  577. if not assigned(rg[getregtype(r)]) then
  578. internalerror(200312126);
  579. rg[getregtype(r)].ungetcpuregister(list,r);
  580. end;
  581. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  582. begin
  583. if assigned(rg[rt]) then
  584. rg[rt].alloccpuregisters(list,r)
  585. else
  586. internalerror(200310092);
  587. end;
  588. procedure tcg.allocallcpuregisters(list:TAsmList);
  589. begin
  590. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  591. {$ifndef i386}
  592. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  593. {$ifdef cpumm}
  594. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  595. {$endif cpumm}
  596. {$endif i386}
  597. end;
  598. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  599. begin
  600. if assigned(rg[rt]) then
  601. rg[rt].dealloccpuregisters(list,r)
  602. else
  603. internalerror(200310093);
  604. end;
  605. procedure tcg.deallocallcpuregisters(list:TAsmList);
  606. begin
  607. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  608. {$ifndef i386}
  609. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  610. {$ifdef cpumm}
  611. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  612. {$endif cpumm}
  613. {$endif i386}
  614. end;
  615. function tcg.uses_registers(rt:Tregistertype):boolean;
  616. begin
  617. if assigned(rg[rt]) then
  618. result:=rg[rt].uses_registers
  619. else
  620. result:=false;
  621. end;
  622. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  623. var
  624. rt : tregistertype;
  625. begin
  626. rt:=getregtype(r);
  627. { Only add it when a register allocator is configured.
  628. No IE can be generated, because the VMT is written
  629. without a valid rg[] }
  630. if assigned(rg[rt]) then
  631. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  632. end;
  633. procedure tcg.add_move_instruction(instr:Taicpu);
  634. var
  635. rt : tregistertype;
  636. begin
  637. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  638. if assigned(rg[rt]) then
  639. rg[rt].add_move_instruction(instr)
  640. else
  641. internalerror(200310095);
  642. end;
  643. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  644. var
  645. rt : tregistertype;
  646. begin
  647. for rt:=low(rg) to high(rg) do
  648. begin
  649. if assigned(rg[rt]) then
  650. rg[rt].live_range_direction:=dir;
  651. end;
  652. end;
  653. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  654. var
  655. rt : tregistertype;
  656. begin
  657. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  658. begin
  659. if assigned(rg[rt]) then
  660. rg[rt].do_register_allocation(list,headertai);
  661. end;
  662. { running the other register allocator passes could require addition int/addr. registers
  663. when spilling so run int/addr register allocation at the end }
  664. if assigned(rg[R_INTREGISTER]) then
  665. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  666. if assigned(rg[R_ADDRESSREGISTER]) then
  667. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  668. end;
  669. procedure tcg.translate_register(var reg : tregister);
  670. begin
  671. rg[getregtype(reg)].translate_register(reg);
  672. end;
  673. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  674. begin
  675. list.concat(tai_regalloc.alloc(r,nil));
  676. end;
  677. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  678. begin
  679. list.concat(tai_regalloc.dealloc(r,nil));
  680. end;
  681. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  682. var
  683. instr : tai;
  684. begin
  685. instr:=tai_regalloc.sync(r);
  686. list.concat(instr);
  687. add_reg_instruction(instr,r);
  688. end;
  689. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  690. begin
  691. list.concat(tai_label.create(l));
  692. end;
  693. {*****************************************************************************
  694. for better code generation these methods should be overridden
  695. ******************************************************************************}
  696. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  697. var
  698. ref : treference;
  699. begin
  700. cgpara.check_simple_location;
  701. case cgpara.location^.loc of
  702. LOC_REGISTER,LOC_CREGISTER:
  703. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  704. LOC_REFERENCE,LOC_CREFERENCE:
  705. begin
  706. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  707. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  708. end
  709. else
  710. internalerror(2002071004);
  711. end;
  712. end;
  713. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  714. var
  715. ref : treference;
  716. begin
  717. cgpara.check_simple_location;
  718. case cgpara.location^.loc of
  719. LOC_REGISTER,LOC_CREGISTER:
  720. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  721. LOC_REFERENCE,LOC_CREFERENCE:
  722. begin
  723. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  724. a_load_const_ref(list,cgpara.location^.size,a,ref);
  725. end
  726. else
  727. internalerror(2002071004);
  728. end;
  729. end;
  730. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  731. var
  732. ref : treference;
  733. begin
  734. cgpara.check_simple_location;
  735. case cgpara.location^.loc of
  736. LOC_REGISTER,LOC_CREGISTER:
  737. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  738. LOC_REFERENCE,LOC_CREFERENCE:
  739. begin
  740. reference_reset(ref);
  741. ref.base:=cgpara.location^.reference.index;
  742. ref.offset:=cgpara.location^.reference.offset;
  743. if (size <> OS_NO) and
  744. (tcgsize2size[size] < sizeof(aint)) then
  745. begin
  746. if (cgpara.size = OS_NO) or
  747. assigned(cgpara.location^.next) then
  748. internalerror(2006052401);
  749. a_load_ref_ref(list,size,cgpara.size,r,ref);
  750. end
  751. else
  752. { use concatcopy, because the parameter can be larger than }
  753. { what the OS_* constants can handle }
  754. g_concatcopy(list,r,ref,cgpara.intsize);
  755. end
  756. else
  757. internalerror(2002071004);
  758. end;
  759. end;
  760. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  761. begin
  762. case l.loc of
  763. LOC_REGISTER,
  764. LOC_CREGISTER :
  765. a_param_reg(list,l.size,l.register,cgpara);
  766. LOC_CONSTANT :
  767. a_param_const(list,l.size,l.value,cgpara);
  768. LOC_CREFERENCE,
  769. LOC_REFERENCE :
  770. a_param_ref(list,l.size,l.reference,cgpara);
  771. else
  772. internalerror(2002032211);
  773. end;
  774. end;
  775. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  776. var
  777. hr : tregister;
  778. begin
  779. cgpara.check_simple_location;
  780. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  781. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  782. else
  783. begin
  784. hr:=getaddressregister(list);
  785. a_loadaddr_ref_reg(list,r,hr);
  786. a_param_reg(list,OS_ADDR,hr,cgpara);
  787. end;
  788. end;
  789. {****************************************************************************
  790. some generic implementations
  791. ****************************************************************************}
  792. {$ifopt r+}
  793. {$define rangeon}
  794. {$r-}
  795. {$endif}
  796. {$ifopt q+}
  797. {$define overflowon}
  798. {$q-}
  799. {$endif}
  800. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  801. var
  802. bitmask: aword;
  803. tmpreg: tregister;
  804. stopbit: byte;
  805. begin
  806. tmpreg:=getintregister(list,sreg.subsetregsize);
  807. if (subsetsize in [OS_S8..OS_S128]) then
  808. begin
  809. { sign extend in case the value has a bitsize mod 8 <> 0 }
  810. { both instructions will be optimized away if not }
  811. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  812. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  813. end
  814. else
  815. begin
  816. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  817. stopbit := sreg.startbit + sreg.bitlen;
  818. // on x86(64), 1 shl 32(64) = 1 instead of 0
  819. // use aword to prevent overflow with 1 shl 31
  820. if (stopbit - sreg.startbit <> AIntBits) then
  821. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  822. else
  823. bitmask := high(aword);
  824. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  825. end;
  826. tmpreg := makeregsize(list,tmpreg,subsetsize);
  827. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  828. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  829. end;
  830. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  831. begin
  832. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  833. end;
  834. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  835. var
  836. bitmask: aword;
  837. tmpreg: tregister;
  838. stopbit: byte;
  839. begin
  840. stopbit := sreg.startbit + sreg.bitlen;
  841. // on x86(64), 1 shl 32(64) = 1 instead of 0
  842. if (stopbit <> AIntBits) then
  843. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  844. else
  845. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  846. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  847. begin
  848. tmpreg:=getintregister(list,sreg.subsetregsize);
  849. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  850. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  851. if (slopt <> SL_REGNOSRCMASK) then
  852. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  853. end;
  854. if (slopt <> SL_SETMAX) then
  855. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  856. case slopt of
  857. SL_SETZERO : ;
  858. SL_SETMAX :
  859. if (sreg.bitlen <> AIntBits) then
  860. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  861. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  862. sreg.subsetreg)
  863. else
  864. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  865. else
  866. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  867. end;
  868. end;
  869. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  870. var
  871. tmpreg: tregister;
  872. bitmask: aword;
  873. stopbit: byte;
  874. begin
  875. if (fromsreg.bitlen >= tosreg.bitlen) then
  876. begin
  877. tmpreg := getintregister(list,tosreg.subsetregsize);
  878. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  879. if (fromsreg.startbit <= tosreg.startbit) then
  880. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  881. else
  882. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  883. stopbit := tosreg.startbit + tosreg.bitlen;
  884. // on x86(64), 1 shl 32(64) = 1 instead of 0
  885. if (stopbit <> AIntBits) then
  886. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  887. else
  888. bitmask := (aword(1) shl tosreg.startbit) - 1;
  889. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  890. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  891. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  892. end
  893. else
  894. begin
  895. tmpreg := getintregister(list,tosubsetsize);
  896. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  897. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  898. end;
  899. end;
  900. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  901. var
  902. tmpreg: tregister;
  903. begin
  904. tmpreg := getintregister(list,tosize);
  905. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  906. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  907. end;
  908. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  909. var
  910. tmpreg: tregister;
  911. begin
  912. tmpreg := getintregister(list,subsetsize);
  913. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  914. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  915. end;
  916. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  917. var
  918. bitmask: aword;
  919. stopbit: byte;
  920. begin
  921. stopbit := sreg.startbit + sreg.bitlen;
  922. // on x86(64), 1 shl 32(64) = 1 instead of 0
  923. if (stopbit <> AIntBits) then
  924. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  925. else
  926. bitmask := (aword(1) shl sreg.startbit) - 1;
  927. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  928. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  929. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  930. end;
  931. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  932. begin
  933. case loc.loc of
  934. LOC_REFERENCE,LOC_CREFERENCE:
  935. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  936. LOC_REGISTER,LOC_CREGISTER:
  937. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  938. LOC_CONSTANT:
  939. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  940. LOC_SUBSETREG,LOC_CSUBSETREG:
  941. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  942. LOC_SUBSETREF,LOC_CSUBSETREF:
  943. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  944. else
  945. internalerror(200608053);
  946. end;
  947. end;
  948. (*
  949. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  950. in memory. They are like a regular reference, but contain an extra bit
  951. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  952. and a bit length (always constant).
  953. Bit packed values are stored differently in memory depending on whether we
  954. are on a big or a little endian system (compatible with at least GPC). The
  955. size of the basic working unit is always the smallest power-of-2 byte size
  956. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  957. bytes, 17..32 bits -> 4 bytes etc).
  958. On a big endian, 5-bit: values are stored like this:
  959. 11111222 22333334 44445555 56666677 77788888
  960. The leftmost bit of each 5-bit value corresponds to the most significant
  961. bit.
  962. On little endian, it goes like this:
  963. 22211111 43333322 55554444 77666665 88888777
  964. In this case, per byte the left-most bit is more significant than those on
  965. the right, but the bits in the next byte are all more significant than
  966. those in the previous byte (e.g., the 222 in the first byte are the low
  967. three bits of that value, while the 22 in the second byte are the upper
  968. two bits.
  969. Big endian, 9 bit values:
  970. 11111111 12222222 22333333 33344444 ...
  971. Little endian, 9 bit values:
  972. 11111111 22222221 33333322 44444333 ...
  973. This is memory representation and the 16 bit values are byteswapped.
  974. Similarly as in the previous case, the 2222222 string contains the lower
  975. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  976. registers (two 16 bit registers in the current implementation, although a
  977. single 32 bit register would be possible too, in particular if 32 bit
  978. alignment can be guaranteed), this becomes:
  979. 22222221 11111111 44444333 33333322 ...
  980. (l)ow u l l u l u
  981. The startbit/bitindex in a subsetreference always refers to
  982. a) on big endian: the most significant bit of the value
  983. (bits counted from left to right, both memory an registers)
  984. b) on little endian: the least significant bit when the value
  985. is loaded in a register (bit counted from right to left)
  986. Although a) results in more complex code for big endian systems, it's
  987. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  988. Apple's universal interfaces which depend on these layout differences).
  989. Note: when changing the loadsize calculated in get_subsetref_load_info,
  990. make sure the appropriate alignment is guaranteed, at least in case of
  991. {$defined cpurequiresproperalignment}.
  992. *)
  993. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  994. var
  995. intloadsize: aint;
  996. begin
  997. intloadsize := packedbitsloadsize(sref.bitlen);
  998. if (intloadsize = 0) then
  999. internalerror(2006081310);
  1000. if (intloadsize > sizeof(aint)) then
  1001. intloadsize := sizeof(aint);
  1002. loadsize := int_cgsize(intloadsize);
  1003. if (loadsize = OS_NO) then
  1004. internalerror(2006081311);
  1005. if (sref.bitlen > sizeof(aint)*8) then
  1006. internalerror(2006081312);
  1007. extra_load :=
  1008. (sref.bitlen <> 1) and
  1009. ((sref.bitindexreg <> NR_NO) or
  1010. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1011. end;
  1012. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1013. var
  1014. restbits: byte;
  1015. begin
  1016. if (target_info.endian = endian_big) then
  1017. begin
  1018. { valuereg contains the upper bits, extra_value_reg the lower }
  1019. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1020. if (subsetsize in [OS_S8..OS_S128]) then
  1021. begin
  1022. { sign extend }
  1023. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1024. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1025. end
  1026. else
  1027. begin
  1028. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1029. { mask other bits }
  1030. if (sref.bitlen <> AIntBits) then
  1031. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1032. end;
  1033. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1034. end
  1035. else
  1036. begin
  1037. { valuereg contains the lower bits, extra_value_reg the upper }
  1038. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1039. if (subsetsize in [OS_S8..OS_S128]) then
  1040. begin
  1041. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1042. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1043. end
  1044. else
  1045. begin
  1046. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1047. { mask other bits }
  1048. if (sref.bitlen <> AIntBits) then
  1049. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1050. end;
  1051. end;
  1052. { merge }
  1053. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1054. end;
  1055. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1056. var
  1057. tmpreg: tregister;
  1058. begin
  1059. tmpreg := getintregister(list,OS_INT);
  1060. if (target_info.endian = endian_big) then
  1061. begin
  1062. { since this is a dynamic index, it's possible that the value }
  1063. { is entirely in valuereg. }
  1064. { get the data in valuereg in the right place }
  1065. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1066. if (subsetsize in [OS_S8..OS_S128]) then
  1067. begin
  1068. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1069. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1070. end
  1071. else
  1072. begin
  1073. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1074. if (loadbitsize <> AIntBits) then
  1075. { mask left over bits }
  1076. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1077. end;
  1078. tmpreg := getintregister(list,OS_INT);
  1079. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1080. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1081. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1082. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1083. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1084. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1085. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1086. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1087. { => extra_value_reg is now 0 }
  1088. {$ifdef sparc}
  1089. { except on sparc, where "shr X" = "shr (X and (bitsize-1))" }
  1090. if (loadbitsize = AIntBits) then
  1091. begin
  1092. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1093. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpreg);
  1094. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1095. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1096. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1097. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1098. end;
  1099. {$endif sparc}
  1100. { merge }
  1101. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1102. { no need to mask, necessary masking happened earlier on }
  1103. end
  1104. else
  1105. begin
  1106. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1107. { Y-x = -(Y-x) }
  1108. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1109. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1110. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1111. { if all bits are in valuereg }
  1112. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1113. {$ifdef x86}
  1114. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1115. if (loadbitsize = AIntBits) then
  1116. begin
  1117. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1118. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpreg);
  1119. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1120. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1121. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1122. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1123. end;
  1124. {$endif x86}
  1125. { merge }
  1126. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1127. { sign extend or mask other bits }
  1128. if (subsetsize in [OS_S8..OS_S128]) then
  1129. begin
  1130. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1131. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1132. end
  1133. else
  1134. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1135. end;
  1136. end;
  1137. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1138. var
  1139. tmpref: treference;
  1140. valuereg,extra_value_reg: tregister;
  1141. tosreg: tsubsetregister;
  1142. loadsize: tcgsize;
  1143. loadbitsize: byte;
  1144. extra_load: boolean;
  1145. begin
  1146. get_subsetref_load_info(sref,loadsize,extra_load);
  1147. loadbitsize := tcgsize2size[loadsize]*8;
  1148. { load the (first part) of the bit sequence }
  1149. valuereg := getintregister(list,OS_INT);
  1150. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1151. if not extra_load then
  1152. begin
  1153. { everything is guaranteed to be in a single register of loadsize }
  1154. if (sref.bitindexreg = NR_NO) then
  1155. begin
  1156. { use subsetreg routine, it may have been overridden with an optimized version }
  1157. tosreg.subsetreg := valuereg;
  1158. tosreg.subsetregsize := OS_INT;
  1159. { subsetregs always count bits from right to left }
  1160. if (target_info.endian = endian_big) then
  1161. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1162. else
  1163. tosreg.startbit := sref.startbit;
  1164. tosreg.bitlen := sref.bitlen;
  1165. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1166. exit;
  1167. end
  1168. else
  1169. begin
  1170. if (sref.startbit <> 0) then
  1171. internalerror(2006081510);
  1172. if (target_info.endian = endian_big) then
  1173. begin
  1174. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1175. if (subsetsize in [OS_S8..OS_S128]) then
  1176. begin
  1177. { sign extend to entire register }
  1178. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1179. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1180. end
  1181. else
  1182. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1183. end
  1184. else
  1185. begin
  1186. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1187. if (subsetsize in [OS_S8..OS_S128]) then
  1188. begin
  1189. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1190. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1191. end
  1192. end;
  1193. { mask other bits/sign extend }
  1194. if not(subsetsize in [OS_S8..OS_S128]) then
  1195. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1196. end
  1197. end
  1198. else
  1199. begin
  1200. { load next value as well }
  1201. extra_value_reg := getintregister(list,OS_INT);
  1202. tmpref := sref.ref;
  1203. inc(tmpref.offset,loadbitsize div 8);
  1204. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1205. if (sref.bitindexreg = NR_NO) then
  1206. { can be overridden to optimize }
  1207. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1208. else
  1209. begin
  1210. if (sref.startbit <> 0) then
  1211. internalerror(2006080610);
  1212. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1213. end;
  1214. end;
  1215. { store in destination }
  1216. { avoid unnecessary sign extension and zeroing }
  1217. valuereg := makeregsize(list,valuereg,OS_INT);
  1218. destreg := makeregsize(list,destreg,OS_INT);
  1219. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1220. destreg := makeregsize(list,destreg,tosize);
  1221. end;
  1222. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1223. begin
  1224. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1225. end;
  1226. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1227. var
  1228. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1229. tosreg, fromsreg: tsubsetregister;
  1230. tmpref: treference;
  1231. bitmask: aword;
  1232. loadsize: tcgsize;
  1233. loadbitsize: byte;
  1234. extra_load: boolean;
  1235. begin
  1236. { the register must be able to contain the requested value }
  1237. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1238. internalerror(2006081613);
  1239. get_subsetref_load_info(sref,loadsize,extra_load);
  1240. loadbitsize := tcgsize2size[loadsize]*8;
  1241. { load the (first part) of the bit sequence }
  1242. valuereg := getintregister(list,OS_INT);
  1243. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1244. { constant offset of bit sequence? }
  1245. if not extra_load then
  1246. begin
  1247. if (sref.bitindexreg = NR_NO) then
  1248. begin
  1249. { use subsetreg routine, it may have been overridden with an optimized version }
  1250. tosreg.subsetreg := valuereg;
  1251. tosreg.subsetregsize := OS_INT;
  1252. { subsetregs always count bits from right to left }
  1253. if (target_info.endian = endian_big) then
  1254. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1255. else
  1256. tosreg.startbit := sref.startbit;
  1257. tosreg.bitlen := sref.bitlen;
  1258. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1259. end
  1260. else
  1261. begin
  1262. if (sref.startbit <> 0) then
  1263. internalerror(2006081710);
  1264. { should be handled by normal code and will give wrong result }
  1265. { on x86 for the '1 shl bitlen' below }
  1266. if (sref.bitlen = AIntBits) then
  1267. internalerror(2006081711);
  1268. { zero the bits we have to insert }
  1269. if (slopt <> SL_SETMAX) then
  1270. begin
  1271. maskreg := getintregister(list,OS_INT);
  1272. if (target_info.endian = endian_big) then
  1273. begin
  1274. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1275. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1276. end
  1277. else
  1278. begin
  1279. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1280. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1281. end;
  1282. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1283. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1284. end;
  1285. { insert the value }
  1286. if (slopt <> SL_SETZERO) then
  1287. begin
  1288. tmpreg := getintregister(list,OS_INT);
  1289. if (slopt <> SL_SETMAX) then
  1290. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1291. else if (sref.bitlen <> AIntBits) then
  1292. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1293. else
  1294. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1295. if (target_info.endian = endian_big) then
  1296. begin
  1297. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1298. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1299. begin
  1300. if (loadbitsize <> AIntBits) then
  1301. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1302. else
  1303. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1304. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1305. end;
  1306. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1307. end
  1308. else
  1309. begin
  1310. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1311. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1312. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1313. end;
  1314. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1315. end;
  1316. end;
  1317. { store back to memory }
  1318. valuereg := makeregsize(list,valuereg,loadsize);
  1319. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1320. exit;
  1321. end
  1322. else
  1323. begin
  1324. { load next value }
  1325. extra_value_reg := getintregister(list,OS_INT);
  1326. tmpref := sref.ref;
  1327. inc(tmpref.offset,loadbitsize div 8);
  1328. { should maybe be taken out too, can be done more efficiently }
  1329. { on e.g. i386 with shld/shrd }
  1330. if (sref.bitindexreg = NR_NO) then
  1331. begin
  1332. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1333. fromsreg.subsetreg := fromreg;
  1334. fromsreg.subsetregsize := fromsize;
  1335. tosreg.subsetreg := valuereg;
  1336. tosreg.subsetregsize := OS_INT;
  1337. { transfer first part }
  1338. fromsreg.bitlen := loadbitsize-sref.startbit;
  1339. tosreg.bitlen := fromsreg.bitlen;
  1340. if (target_info.endian = endian_big) then
  1341. begin
  1342. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1343. { upper bits of the value ... }
  1344. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1345. { ... to bit 0 }
  1346. tosreg.startbit := 0
  1347. end
  1348. else
  1349. begin
  1350. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1351. { lower bits of the value ... }
  1352. fromsreg.startbit := 0;
  1353. { ... to startbit }
  1354. tosreg.startbit := sref.startbit;
  1355. end;
  1356. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1357. valuereg := makeregsize(list,valuereg,loadsize);
  1358. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1359. { transfer second part }
  1360. if (target_info.endian = endian_big) then
  1361. begin
  1362. { extra_value_reg must contain the lower bits of the value at bits }
  1363. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1364. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1365. { - bitlen - startbit }
  1366. fromsreg.startbit := 0;
  1367. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1368. end
  1369. else
  1370. begin
  1371. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1372. fromsreg.startbit := fromsreg.bitlen;
  1373. tosreg.startbit := 0;
  1374. end;
  1375. tosreg.subsetreg := extra_value_reg;
  1376. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1377. tosreg.bitlen := fromsreg.bitlen;
  1378. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1379. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1380. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1381. exit;
  1382. end
  1383. else
  1384. begin
  1385. if (sref.startbit <> 0) then
  1386. internalerror(2006081812);
  1387. { should be handled by normal code and will give wrong result }
  1388. { on x86 for the '1 shl bitlen' below }
  1389. if (sref.bitlen = AIntBits) then
  1390. internalerror(2006081713);
  1391. { generate mask to zero the bits we have to insert }
  1392. if (slopt <> SL_SETMAX) then
  1393. begin
  1394. maskreg := getintregister(list,OS_INT);
  1395. if (target_info.endian = endian_big) then
  1396. begin
  1397. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1398. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1399. end
  1400. else
  1401. begin
  1402. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1403. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1404. end;
  1405. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1406. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1407. end;
  1408. { insert the value }
  1409. if (slopt <> SL_SETZERO) then
  1410. begin
  1411. tmpreg := getintregister(list,OS_INT);
  1412. if (slopt <> SL_SETMAX) then
  1413. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1414. else if (sref.bitlen <> AIntBits) then
  1415. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1416. else
  1417. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1418. if (target_info.endian = endian_big) then
  1419. begin
  1420. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1421. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1422. { mask left over bits }
  1423. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1424. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1425. end
  1426. else
  1427. begin
  1428. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1429. { mask left over bits }
  1430. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1431. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1432. end;
  1433. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1434. end;
  1435. valuereg := makeregsize(list,valuereg,loadsize);
  1436. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1437. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1438. tmpindexreg := getintregister(list,OS_INT);
  1439. { load current array value }
  1440. if (slopt <> SL_SETZERO) then
  1441. begin
  1442. tmpreg := getintregister(list,OS_INT);
  1443. if (slopt <> SL_SETMAX) then
  1444. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1445. else if (sref.bitlen <> AIntBits) then
  1446. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1447. else
  1448. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1449. end;
  1450. { generate mask to zero the bits we have to insert }
  1451. if (slopt <> SL_SETMAX) then
  1452. begin
  1453. maskreg := getintregister(list,OS_INT);
  1454. if (target_info.endian = endian_big) then
  1455. begin
  1456. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1457. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1458. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1459. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1460. {$ifdef sparc}
  1461. { on sparc, "shr X" = "shr (X and (bitsize-1))" -> fix so shr (x>32) = 0 }
  1462. if (loadbitsize = AIntBits) then
  1463. begin
  1464. { if (tmpindexreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1465. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpindexreg,valuereg);
  1466. { if (tmpindexreg = cpu_bit_size) then maskreg := 0 else maskreg := -1 }
  1467. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1468. { if (tmpindexreg = cpu_bit_size) then maskreg := 0 }
  1469. if (slopt <> SL_SETZERO) then
  1470. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1471. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1472. end;
  1473. {$endif sparc}
  1474. end
  1475. else
  1476. begin
  1477. { Y-x = -(Y-x) }
  1478. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1479. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1480. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1481. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1482. {$ifdef x86}
  1483. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1484. if (loadbitsize = AIntBits) then
  1485. begin
  1486. valuereg := getintregister(list,OS_INT);
  1487. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1488. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bitalu}6{$else}5{$endif},tmpindexreg,valuereg);
  1489. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1490. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1491. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1492. if (slopt <> SL_SETZERO) then
  1493. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1494. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1495. end;
  1496. {$endif x86}
  1497. end;
  1498. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1499. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1500. end;
  1501. if (slopt <> SL_SETZERO) then
  1502. begin
  1503. if (target_info.endian = endian_big) then
  1504. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1505. else
  1506. begin
  1507. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1508. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1509. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1510. end;
  1511. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1512. end;
  1513. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1514. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1515. end;
  1516. end;
  1517. end;
  1518. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1519. var
  1520. tmpreg: tregister;
  1521. begin
  1522. tmpreg := getintregister(list,tosubsetsize);
  1523. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1524. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1525. end;
  1526. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1527. var
  1528. tmpreg: tregister;
  1529. begin
  1530. tmpreg := getintregister(list,tosize);
  1531. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1532. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1533. end;
  1534. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1535. var
  1536. tmpreg: tregister;
  1537. begin
  1538. tmpreg := getintregister(list,subsetsize);
  1539. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1540. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1541. end;
  1542. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1543. var
  1544. tmpreg: tregister;
  1545. slopt: tsubsetloadopt;
  1546. begin
  1547. { perform masking of the source value in advance }
  1548. slopt := SL_REGNOSRCMASK;
  1549. if (sref.bitlen <> AIntBits) then
  1550. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1551. if (
  1552. { broken x86 "x shl regbitsize = x" }
  1553. ((sref.bitlen <> AIntBits) and
  1554. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1555. ((sref.bitlen = AIntBits) and
  1556. (a = -1))
  1557. ) then
  1558. slopt := SL_SETMAX
  1559. else if (a = 0) then
  1560. slopt := SL_SETZERO;
  1561. tmpreg := getintregister(list,subsetsize);
  1562. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1563. a_load_const_reg(list,subsetsize,a,tmpreg);
  1564. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1565. end;
  1566. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1567. begin
  1568. case loc.loc of
  1569. LOC_REFERENCE,LOC_CREFERENCE:
  1570. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1571. LOC_REGISTER,LOC_CREGISTER:
  1572. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1573. LOC_SUBSETREG,LOC_CSUBSETREG:
  1574. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1575. LOC_SUBSETREF,LOC_CSUBSETREF:
  1576. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1577. else
  1578. internalerror(200608054);
  1579. end;
  1580. end;
  1581. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1582. var
  1583. tmpreg: tregister;
  1584. begin
  1585. tmpreg := getintregister(list,tosubsetsize);
  1586. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1587. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1588. end;
  1589. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1590. var
  1591. tmpreg: tregister;
  1592. begin
  1593. tmpreg := getintregister(list,tosubsetsize);
  1594. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1595. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1596. end;
  1597. {$ifdef rangeon}
  1598. {$r+}
  1599. {$undef rangeon}
  1600. {$endif}
  1601. {$ifdef overflowon}
  1602. {$q+}
  1603. {$undef overflowon}
  1604. {$endif}
  1605. { generic bit address calculation routines }
  1606. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1607. begin
  1608. result.ref:=ref;
  1609. inc(result.ref.offset,bitnumber div 8);
  1610. result.bitindexreg:=NR_NO;
  1611. result.startbit:=bitnumber mod 8;
  1612. result.bitlen:=1;
  1613. end;
  1614. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1615. begin
  1616. result.subsetreg:=setreg;
  1617. result.subsetregsize:=setregsize;
  1618. { subsetregs always count from the least significant to the most significant bit }
  1619. if (target_info.endian=endian_big) then
  1620. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1621. else
  1622. result.startbit:=bitnumber;
  1623. result.bitlen:=1;
  1624. end;
  1625. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1626. var
  1627. tmpreg,
  1628. tmpaddrreg: tregister;
  1629. begin
  1630. result.ref:=ref;
  1631. result.startbit:=0;
  1632. result.bitlen:=1;
  1633. tmpreg:=getintregister(list,bitnumbersize);
  1634. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1635. tmpaddrreg:=getaddressregister(list);
  1636. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1637. if (result.ref.base=NR_NO) then
  1638. result.ref.base:=tmpaddrreg
  1639. else if (result.ref.index=NR_NO) then
  1640. result.ref.index:=tmpaddrreg
  1641. else
  1642. begin
  1643. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1644. result.ref.index:=tmpaddrreg;
  1645. end;
  1646. tmpreg:=getintregister(list,OS_INT);
  1647. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1648. result.bitindexreg:=tmpreg;
  1649. end;
  1650. { bit testing routines }
  1651. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1652. var
  1653. tmpvalue: tregister;
  1654. begin
  1655. tmpvalue:=getintregister(list,valuesize);
  1656. if (target_info.endian=endian_little) then
  1657. begin
  1658. { rotate value register "bitnumber" bits to the right }
  1659. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1660. { extract the bit we want }
  1661. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1662. end
  1663. else
  1664. begin
  1665. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1666. { bit in uppermost position, then move it to the lowest position }
  1667. { "and" is not necessary since combination of shl/shr will clear }
  1668. { all other bits }
  1669. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1670. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1671. end;
  1672. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1673. end;
  1674. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1675. begin
  1676. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1677. end;
  1678. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1679. begin
  1680. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1681. end;
  1682. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1683. var
  1684. tmpsreg: tsubsetregister;
  1685. begin
  1686. { the first parameter is used to calculate the bit offset in }
  1687. { case of big endian, and therefore must be the size of the }
  1688. { set and not of the whole subsetreg }
  1689. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1690. { now fix the size of the subsetreg }
  1691. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1692. { correct offset of the set in the subsetreg }
  1693. inc(tmpsreg.startbit,setreg.startbit);
  1694. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1695. end;
  1696. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1697. begin
  1698. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1699. end;
  1700. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1701. var
  1702. tmpreg: tregister;
  1703. begin
  1704. case loc.loc of
  1705. LOC_REFERENCE,LOC_CREFERENCE:
  1706. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1707. LOC_REGISTER,LOC_CREGISTER,
  1708. LOC_SUBSETREG,LOC_CSUBSETREG,
  1709. LOC_CONSTANT:
  1710. begin
  1711. case loc.loc of
  1712. LOC_REGISTER,LOC_CREGISTER:
  1713. tmpreg:=loc.register;
  1714. LOC_SUBSETREG,LOC_CSUBSETREG:
  1715. begin
  1716. tmpreg:=getintregister(list,loc.size);
  1717. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1718. end;
  1719. LOC_CONSTANT:
  1720. begin
  1721. tmpreg:=getintregister(list,loc.size);
  1722. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1723. end;
  1724. end;
  1725. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1726. end;
  1727. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1728. else
  1729. internalerror(2007051701);
  1730. end;
  1731. end;
  1732. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1733. begin
  1734. case loc.loc of
  1735. LOC_REFERENCE,LOC_CREFERENCE:
  1736. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1737. LOC_REGISTER,LOC_CREGISTER:
  1738. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1739. LOC_SUBSETREG,LOC_CSUBSETREG:
  1740. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1741. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1742. else
  1743. internalerror(2007051702);
  1744. end;
  1745. end;
  1746. { bit setting/clearing routines }
  1747. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1748. var
  1749. tmpvalue: tregister;
  1750. begin
  1751. tmpvalue:=getintregister(list,destsize);
  1752. if (target_info.endian=endian_little) then
  1753. begin
  1754. a_load_const_reg(list,destsize,1,tmpvalue);
  1755. { rotate bit "bitnumber" bits to the left }
  1756. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1757. end
  1758. else
  1759. begin
  1760. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1761. { shr bitnumber" results in correct mask }
  1762. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1763. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1764. end;
  1765. { set/clear the bit we want }
  1766. if (doset) then
  1767. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1768. else
  1769. begin
  1770. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1771. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1772. end;
  1773. end;
  1774. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1775. begin
  1776. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1777. end;
  1778. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1779. begin
  1780. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1781. end;
  1782. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1783. var
  1784. tmpsreg: tsubsetregister;
  1785. begin
  1786. { the first parameter is used to calculate the bit offset in }
  1787. { case of big endian, and therefore must be the size of the }
  1788. { set and not of the whole subsetreg }
  1789. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1790. { now fix the size of the subsetreg }
  1791. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1792. { correct offset of the set in the subsetreg }
  1793. inc(tmpsreg.startbit,destreg.startbit);
  1794. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1795. end;
  1796. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1797. begin
  1798. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1799. end;
  1800. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1801. var
  1802. tmpreg: tregister;
  1803. begin
  1804. case loc.loc of
  1805. LOC_REFERENCE:
  1806. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1807. LOC_CREGISTER:
  1808. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1809. { e.g. a 2-byte set in a record regvar }
  1810. LOC_CSUBSETREG:
  1811. begin
  1812. { hard to do in-place in a generic way, so operate on a copy }
  1813. tmpreg:=getintregister(list,loc.size);
  1814. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1815. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1816. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1817. end;
  1818. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1819. else
  1820. internalerror(2007051703)
  1821. end;
  1822. end;
  1823. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1824. begin
  1825. case loc.loc of
  1826. LOC_REFERENCE:
  1827. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1828. LOC_CREGISTER:
  1829. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1830. LOC_CSUBSETREG:
  1831. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1832. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1833. else
  1834. internalerror(2007051704)
  1835. end;
  1836. end;
  1837. { memory/register loading }
  1838. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1839. var
  1840. tmpref : treference;
  1841. tmpreg : tregister;
  1842. i : longint;
  1843. begin
  1844. if ref.alignment<>0 then
  1845. begin
  1846. tmpref:=ref;
  1847. { we take care of the alignment now }
  1848. tmpref.alignment:=0;
  1849. case FromSize of
  1850. OS_16,OS_S16:
  1851. begin
  1852. tmpreg:=getintregister(list,OS_16);
  1853. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1854. if target_info.endian=endian_big then
  1855. inc(tmpref.offset);
  1856. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1857. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1858. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1859. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1860. if target_info.endian=endian_big then
  1861. dec(tmpref.offset)
  1862. else
  1863. inc(tmpref.offset);
  1864. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1865. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1866. end;
  1867. OS_32,OS_S32:
  1868. begin
  1869. tmpreg:=getintregister(list,OS_32);
  1870. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1871. if target_info.endian=endian_big then
  1872. inc(tmpref.offset,3);
  1873. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1874. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1875. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1876. for i:=1 to 3 do
  1877. begin
  1878. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1879. if target_info.endian=endian_big then
  1880. dec(tmpref.offset)
  1881. else
  1882. inc(tmpref.offset);
  1883. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1884. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1885. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1886. end;
  1887. end
  1888. else
  1889. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1890. end;
  1891. end
  1892. else
  1893. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1894. end;
  1895. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1896. var
  1897. tmpref : treference;
  1898. tmpreg,
  1899. tmpreg2 : tregister;
  1900. i : longint;
  1901. begin
  1902. if ref.alignment in [1,2] then
  1903. begin
  1904. tmpref:=ref;
  1905. { we take care of the alignment now }
  1906. tmpref.alignment:=0;
  1907. case FromSize of
  1908. OS_16,OS_S16:
  1909. if ref.alignment=2 then
  1910. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1911. else
  1912. begin
  1913. { first load in tmpreg, because the target register }
  1914. { may be used in ref as well }
  1915. if target_info.endian=endian_little then
  1916. inc(tmpref.offset);
  1917. tmpreg:=getintregister(list,OS_8);
  1918. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1919. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1920. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1921. if target_info.endian=endian_little then
  1922. dec(tmpref.offset)
  1923. else
  1924. inc(tmpref.offset);
  1925. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1926. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1927. end;
  1928. OS_32,OS_S32:
  1929. if ref.alignment=2 then
  1930. begin
  1931. if target_info.endian=endian_little then
  1932. inc(tmpref.offset,2);
  1933. tmpreg:=getintregister(list,OS_32);
  1934. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1935. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1936. if target_info.endian=endian_little then
  1937. dec(tmpref.offset,2)
  1938. else
  1939. inc(tmpref.offset,2);
  1940. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1941. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1942. end
  1943. else
  1944. begin
  1945. if target_info.endian=endian_little then
  1946. inc(tmpref.offset,3);
  1947. tmpreg:=getintregister(list,OS_32);
  1948. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1949. tmpreg2:=getintregister(list,OS_32);
  1950. for i:=1 to 3 do
  1951. begin
  1952. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1953. if target_info.endian=endian_little then
  1954. dec(tmpref.offset)
  1955. else
  1956. inc(tmpref.offset);
  1957. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1958. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1959. end;
  1960. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1961. end
  1962. else
  1963. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1964. end;
  1965. end
  1966. else
  1967. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1968. end;
  1969. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1970. var
  1971. tmpreg: tregister;
  1972. begin
  1973. { verify if we have the same reference }
  1974. if references_equal(sref,dref) then
  1975. exit;
  1976. tmpreg:=getintregister(list,tosize);
  1977. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1978. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1979. end;
  1980. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1981. var
  1982. tmpreg: tregister;
  1983. begin
  1984. tmpreg:=getintregister(list,size);
  1985. a_load_const_reg(list,size,a,tmpreg);
  1986. a_load_reg_ref(list,size,size,tmpreg,ref);
  1987. end;
  1988. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1989. begin
  1990. case loc.loc of
  1991. LOC_REFERENCE,LOC_CREFERENCE:
  1992. a_load_const_ref(list,loc.size,a,loc.reference);
  1993. LOC_REGISTER,LOC_CREGISTER:
  1994. a_load_const_reg(list,loc.size,a,loc.register);
  1995. LOC_SUBSETREG,LOC_CSUBSETREG:
  1996. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1997. LOC_SUBSETREF,LOC_CSUBSETREF:
  1998. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1999. else
  2000. internalerror(200203272);
  2001. end;
  2002. end;
  2003. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  2004. begin
  2005. case loc.loc of
  2006. LOC_REFERENCE,LOC_CREFERENCE:
  2007. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2008. LOC_REGISTER,LOC_CREGISTER:
  2009. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2010. LOC_SUBSETREG,LOC_CSUBSETREG:
  2011. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2012. LOC_SUBSETREF,LOC_CSUBSETREF:
  2013. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2014. else
  2015. internalerror(200203271);
  2016. end;
  2017. end;
  2018. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2019. begin
  2020. case loc.loc of
  2021. LOC_REFERENCE,LOC_CREFERENCE:
  2022. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2023. LOC_REGISTER,LOC_CREGISTER:
  2024. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2025. LOC_CONSTANT:
  2026. a_load_const_reg(list,tosize,loc.value,reg);
  2027. LOC_SUBSETREG,LOC_CSUBSETREG:
  2028. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2029. LOC_SUBSETREF,LOC_CSUBSETREF:
  2030. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2031. else
  2032. internalerror(200109092);
  2033. end;
  2034. end;
  2035. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2036. begin
  2037. case loc.loc of
  2038. LOC_REFERENCE,LOC_CREFERENCE:
  2039. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2040. LOC_REGISTER,LOC_CREGISTER:
  2041. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2042. LOC_CONSTANT:
  2043. a_load_const_ref(list,tosize,loc.value,ref);
  2044. LOC_SUBSETREG,LOC_CSUBSETREG:
  2045. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2046. LOC_SUBSETREF,LOC_CSUBSETREF:
  2047. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2048. else
  2049. internalerror(200109302);
  2050. end;
  2051. end;
  2052. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2053. begin
  2054. case loc.loc of
  2055. LOC_REFERENCE,LOC_CREFERENCE:
  2056. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2057. LOC_REGISTER,LOC_CREGISTER:
  2058. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2059. LOC_CONSTANT:
  2060. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2061. LOC_SUBSETREG,LOC_CSUBSETREG:
  2062. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2063. LOC_SUBSETREF,LOC_CSUBSETREF:
  2064. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2065. else
  2066. internalerror(2006052310);
  2067. end;
  2068. end;
  2069. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2070. begin
  2071. case loc.loc of
  2072. LOC_REFERENCE,LOC_CREFERENCE:
  2073. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2074. LOC_REGISTER,LOC_CREGISTER:
  2075. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2076. LOC_SUBSETREG,LOC_CSUBSETREG:
  2077. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2078. LOC_SUBSETREF,LOC_CSUBSETREF:
  2079. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2080. else
  2081. internalerror(2006051510);
  2082. end;
  2083. end;
  2084. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2085. var
  2086. powerval : longint;
  2087. begin
  2088. case op of
  2089. OP_OR :
  2090. begin
  2091. { or with zero returns same result }
  2092. if a = 0 then
  2093. op:=OP_NONE
  2094. else
  2095. { or with max returns max }
  2096. if a = -1 then
  2097. op:=OP_MOVE;
  2098. end;
  2099. OP_AND :
  2100. begin
  2101. { and with max returns same result }
  2102. if (a = -1) then
  2103. op:=OP_NONE
  2104. else
  2105. { and with 0 returns 0 }
  2106. if a=0 then
  2107. op:=OP_MOVE;
  2108. end;
  2109. OP_DIV :
  2110. begin
  2111. { division by 1 returns result }
  2112. if a = 1 then
  2113. op:=OP_NONE
  2114. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2115. begin
  2116. a := powerval;
  2117. op:= OP_SHR;
  2118. end;
  2119. end;
  2120. OP_IDIV:
  2121. begin
  2122. if a = 1 then
  2123. op:=OP_NONE;
  2124. end;
  2125. OP_MUL,OP_IMUL:
  2126. begin
  2127. if a = 1 then
  2128. op:=OP_NONE
  2129. else
  2130. if a=0 then
  2131. op:=OP_MOVE
  2132. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2133. begin
  2134. a := powerval;
  2135. op:= OP_SHL;
  2136. end;
  2137. end;
  2138. OP_ADD,OP_SUB:
  2139. begin
  2140. if a = 0 then
  2141. op:=OP_NONE;
  2142. end;
  2143. OP_SAR,OP_SHL,OP_SHR:
  2144. begin
  2145. if a = 0 then
  2146. op:=OP_NONE;
  2147. end;
  2148. end;
  2149. end;
  2150. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2151. begin
  2152. case loc.loc of
  2153. LOC_REFERENCE, LOC_CREFERENCE:
  2154. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2155. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2156. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2157. else
  2158. internalerror(200203301);
  2159. end;
  2160. end;
  2161. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2162. begin
  2163. case loc.loc of
  2164. LOC_REFERENCE, LOC_CREFERENCE:
  2165. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2166. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2167. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2168. else
  2169. internalerror(48991);
  2170. end;
  2171. end;
  2172. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2173. var
  2174. reg: tregister;
  2175. regsize: tcgsize;
  2176. begin
  2177. if (fromsize>=tosize) then
  2178. regsize:=fromsize
  2179. else
  2180. regsize:=tosize;
  2181. reg:=getfpuregister(list,regsize);
  2182. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2183. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2184. end;
  2185. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2186. var
  2187. ref : treference;
  2188. begin
  2189. case cgpara.location^.loc of
  2190. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2191. begin
  2192. cgpara.check_simple_location;
  2193. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2194. end;
  2195. LOC_REFERENCE,LOC_CREFERENCE:
  2196. begin
  2197. cgpara.check_simple_location;
  2198. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2199. a_loadfpu_reg_ref(list,size,size,r,ref);
  2200. end;
  2201. LOC_REGISTER,LOC_CREGISTER:
  2202. begin
  2203. { paramfpu_ref does the check_simpe_location check here if necessary }
  2204. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  2205. a_loadfpu_reg_ref(list,size,size,r,ref);
  2206. a_paramfpu_ref(list,size,ref,cgpara);
  2207. tg.Ungettemp(list,ref);
  2208. end;
  2209. else
  2210. internalerror(2002071004);
  2211. end;
  2212. end;
  2213. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2214. var
  2215. href : treference;
  2216. begin
  2217. cgpara.check_simple_location;
  2218. case cgpara.location^.loc of
  2219. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2220. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2221. LOC_REFERENCE,LOC_CREFERENCE:
  2222. begin
  2223. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2224. { concatcopy should choose the best way to copy the data }
  2225. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2226. end;
  2227. else
  2228. internalerror(200402201);
  2229. end;
  2230. end;
  2231. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2232. var
  2233. tmpreg : tregister;
  2234. begin
  2235. tmpreg:=getintregister(list,size);
  2236. a_load_ref_reg(list,size,size,ref,tmpreg);
  2237. a_op_const_reg(list,op,size,a,tmpreg);
  2238. a_load_reg_ref(list,size,size,tmpreg,ref);
  2239. end;
  2240. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2241. var
  2242. tmpreg: tregister;
  2243. begin
  2244. tmpreg := getintregister(list, size);
  2245. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2246. a_op_const_reg(list,op,size,a,tmpreg);
  2247. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2248. end;
  2249. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2250. var
  2251. tmpreg: tregister;
  2252. begin
  2253. tmpreg := getintregister(list, size);
  2254. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2255. a_op_const_reg(list,op,size,a,tmpreg);
  2256. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2257. end;
  2258. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2259. begin
  2260. case loc.loc of
  2261. LOC_REGISTER, LOC_CREGISTER:
  2262. a_op_const_reg(list,op,loc.size,a,loc.register);
  2263. LOC_REFERENCE, LOC_CREFERENCE:
  2264. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2265. LOC_SUBSETREG, LOC_CSUBSETREG:
  2266. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2267. LOC_SUBSETREF, LOC_CSUBSETREF:
  2268. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2269. else
  2270. internalerror(200109061);
  2271. end;
  2272. end;
  2273. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2274. var
  2275. tmpreg : tregister;
  2276. begin
  2277. tmpreg:=getintregister(list,size);
  2278. a_load_ref_reg(list,size,size,ref,tmpreg);
  2279. a_op_reg_reg(list,op,size,reg,tmpreg);
  2280. a_load_reg_ref(list,size,size,tmpreg,ref);
  2281. end;
  2282. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2283. var
  2284. tmpreg: tregister;
  2285. begin
  2286. case op of
  2287. OP_NOT,OP_NEG:
  2288. { handle it as "load ref,reg; op reg" }
  2289. begin
  2290. a_load_ref_reg(list,size,size,ref,reg);
  2291. a_op_reg_reg(list,op,size,reg,reg);
  2292. end;
  2293. else
  2294. begin
  2295. tmpreg:=getintregister(list,size);
  2296. a_load_ref_reg(list,size,size,ref,tmpreg);
  2297. a_op_reg_reg(list,op,size,tmpreg,reg);
  2298. end;
  2299. end;
  2300. end;
  2301. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2302. var
  2303. tmpreg: tregister;
  2304. begin
  2305. tmpreg := getintregister(list, opsize);
  2306. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2307. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2308. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2309. end;
  2310. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2311. var
  2312. tmpreg: tregister;
  2313. begin
  2314. tmpreg := getintregister(list, opsize);
  2315. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2316. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2317. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2318. end;
  2319. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2320. begin
  2321. case loc.loc of
  2322. LOC_REGISTER, LOC_CREGISTER:
  2323. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2324. LOC_REFERENCE, LOC_CREFERENCE:
  2325. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2326. LOC_SUBSETREG, LOC_CSUBSETREG:
  2327. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2328. LOC_SUBSETREF, LOC_CSUBSETREF:
  2329. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2330. else
  2331. internalerror(200109061);
  2332. end;
  2333. end;
  2334. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2335. var
  2336. tmpreg: tregister;
  2337. begin
  2338. case loc.loc of
  2339. LOC_REGISTER,LOC_CREGISTER:
  2340. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2341. LOC_REFERENCE,LOC_CREFERENCE:
  2342. begin
  2343. tmpreg:=getintregister(list,loc.size);
  2344. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2345. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2346. end;
  2347. LOC_SUBSETREG, LOC_CSUBSETREG:
  2348. begin
  2349. tmpreg:=getintregister(list,loc.size);
  2350. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2351. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2352. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2353. end;
  2354. LOC_SUBSETREF, LOC_CSUBSETREF:
  2355. begin
  2356. tmpreg:=getintregister(list,loc.size);
  2357. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2358. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2359. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2360. end;
  2361. else
  2362. internalerror(200109061);
  2363. end;
  2364. end;
  2365. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2366. a:aint;src,dst:Tregister);
  2367. begin
  2368. a_load_reg_reg(list,size,size,src,dst);
  2369. a_op_const_reg(list,op,size,a,dst);
  2370. end;
  2371. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2372. size: tcgsize; src1, src2, dst: tregister);
  2373. var
  2374. tmpreg: tregister;
  2375. begin
  2376. if (dst<>src1) then
  2377. begin
  2378. a_load_reg_reg(list,size,size,src2,dst);
  2379. a_op_reg_reg(list,op,size,src1,dst);
  2380. end
  2381. else
  2382. begin
  2383. { can we do a direct operation on the target register ? }
  2384. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2385. a_op_reg_reg(list,op,size,src2,dst)
  2386. else
  2387. begin
  2388. tmpreg:=getintregister(list,size);
  2389. a_load_reg_reg(list,size,size,src2,tmpreg);
  2390. a_op_reg_reg(list,op,size,src1,tmpreg);
  2391. a_load_reg_reg(list,size,size,tmpreg,dst);
  2392. end;
  2393. end;
  2394. end;
  2395. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2396. begin
  2397. a_op_const_reg_reg(list,op,size,a,src,dst);
  2398. ovloc.loc:=LOC_VOID;
  2399. end;
  2400. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2401. begin
  2402. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2403. ovloc.loc:=LOC_VOID;
  2404. end;
  2405. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2406. l : tasmlabel);
  2407. var
  2408. tmpreg: tregister;
  2409. begin
  2410. tmpreg:=getintregister(list,size);
  2411. a_load_ref_reg(list,size,size,ref,tmpreg);
  2412. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2413. end;
  2414. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2415. l : tasmlabel);
  2416. var
  2417. tmpreg : tregister;
  2418. begin
  2419. case loc.loc of
  2420. LOC_REGISTER,LOC_CREGISTER:
  2421. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2422. LOC_REFERENCE,LOC_CREFERENCE:
  2423. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2424. LOC_SUBSETREG, LOC_CSUBSETREG:
  2425. begin
  2426. tmpreg:=getintregister(list,size);
  2427. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2428. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2429. end;
  2430. LOC_SUBSETREF, LOC_CSUBSETREF:
  2431. begin
  2432. tmpreg:=getintregister(list,size);
  2433. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2434. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2435. end;
  2436. else
  2437. internalerror(200109061);
  2438. end;
  2439. end;
  2440. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2441. var
  2442. tmpreg: tregister;
  2443. begin
  2444. tmpreg:=getintregister(list,size);
  2445. a_load_ref_reg(list,size,size,ref,tmpreg);
  2446. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2447. end;
  2448. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2449. var
  2450. tmpreg: tregister;
  2451. begin
  2452. tmpreg:=getintregister(list,size);
  2453. a_load_ref_reg(list,size,size,ref,tmpreg);
  2454. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2455. end;
  2456. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2457. begin
  2458. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2459. end;
  2460. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2461. begin
  2462. case loc.loc of
  2463. LOC_REGISTER,
  2464. LOC_CREGISTER:
  2465. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2466. LOC_REFERENCE,
  2467. LOC_CREFERENCE :
  2468. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2469. LOC_CONSTANT:
  2470. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2471. LOC_SUBSETREG,
  2472. LOC_CSUBSETREG:
  2473. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2474. LOC_SUBSETREF,
  2475. LOC_CSUBSETREF:
  2476. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2477. else
  2478. internalerror(200203231);
  2479. end;
  2480. end;
  2481. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2482. var
  2483. tmpreg: tregister;
  2484. begin
  2485. tmpreg:=getintregister(list, cmpsize);
  2486. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2487. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2488. end;
  2489. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2490. var
  2491. tmpreg: tregister;
  2492. begin
  2493. tmpreg:=getintregister(list, cmpsize);
  2494. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2495. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2496. end;
  2497. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2498. l : tasmlabel);
  2499. var
  2500. tmpreg: tregister;
  2501. begin
  2502. case loc.loc of
  2503. LOC_REGISTER,LOC_CREGISTER:
  2504. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2505. LOC_REFERENCE,LOC_CREFERENCE:
  2506. begin
  2507. tmpreg:=getintregister(list,size);
  2508. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2509. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2510. end;
  2511. LOC_SUBSETREG, LOC_CSUBSETREG:
  2512. begin
  2513. tmpreg:=getintregister(list, size);
  2514. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2515. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2516. end;
  2517. LOC_SUBSETREF, LOC_CSUBSETREF:
  2518. begin
  2519. tmpreg:=getintregister(list, size);
  2520. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2521. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2522. end;
  2523. else
  2524. internalerror(200109061);
  2525. end;
  2526. end;
  2527. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2528. begin
  2529. case loc.loc of
  2530. LOC_MMREGISTER,LOC_CMMREGISTER:
  2531. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2532. LOC_REFERENCE,LOC_CREFERENCE:
  2533. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2534. else
  2535. internalerror(200310121);
  2536. end;
  2537. end;
  2538. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2539. begin
  2540. case loc.loc of
  2541. LOC_MMREGISTER,LOC_CMMREGISTER:
  2542. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2543. LOC_REFERENCE,LOC_CREFERENCE:
  2544. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2545. else
  2546. internalerror(200310122);
  2547. end;
  2548. end;
  2549. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2550. var
  2551. href : treference;
  2552. begin
  2553. cgpara.check_simple_location;
  2554. case cgpara.location^.loc of
  2555. LOC_MMREGISTER,LOC_CMMREGISTER:
  2556. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2557. LOC_REFERENCE,LOC_CREFERENCE:
  2558. begin
  2559. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2560. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2561. end
  2562. else
  2563. internalerror(200310123);
  2564. end;
  2565. end;
  2566. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2567. var
  2568. hr : tregister;
  2569. hs : tmmshuffle;
  2570. begin
  2571. cgpara.check_simple_location;
  2572. hr:=getmmregister(list,cgpara.location^.size);
  2573. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2574. if realshuffle(shuffle) then
  2575. begin
  2576. hs:=shuffle^;
  2577. removeshuffles(hs);
  2578. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2579. end
  2580. else
  2581. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2582. end;
  2583. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2584. begin
  2585. case loc.loc of
  2586. LOC_MMREGISTER,LOC_CMMREGISTER:
  2587. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2588. LOC_REFERENCE,LOC_CREFERENCE:
  2589. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2590. else
  2591. internalerror(200310123);
  2592. end;
  2593. end;
  2594. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2595. var
  2596. hr : tregister;
  2597. hs : tmmshuffle;
  2598. begin
  2599. hr:=getmmregister(list,size);
  2600. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2601. if realshuffle(shuffle) then
  2602. begin
  2603. hs:=shuffle^;
  2604. removeshuffles(hs);
  2605. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2606. end
  2607. else
  2608. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2609. end;
  2610. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2611. var
  2612. hr : tregister;
  2613. hs : tmmshuffle;
  2614. begin
  2615. hr:=getmmregister(list,size);
  2616. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2617. if realshuffle(shuffle) then
  2618. begin
  2619. hs:=shuffle^;
  2620. removeshuffles(hs);
  2621. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2622. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2623. end
  2624. else
  2625. begin
  2626. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2627. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2628. end;
  2629. end;
  2630. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2631. begin
  2632. case loc.loc of
  2633. LOC_CMMREGISTER,LOC_MMREGISTER:
  2634. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2635. LOC_CREFERENCE,LOC_REFERENCE:
  2636. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2637. else
  2638. internalerror(200312232);
  2639. end;
  2640. end;
  2641. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2642. begin
  2643. g_concatcopy(list,source,dest,len);
  2644. end;
  2645. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2646. var
  2647. cgpara1,cgpara2,cgpara3 : TCGPara;
  2648. begin
  2649. cgpara1.init;
  2650. cgpara2.init;
  2651. cgpara3.init;
  2652. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2653. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2654. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2655. paramanager.allocparaloc(list,cgpara3);
  2656. a_paramaddr_ref(list,dest,cgpara3);
  2657. paramanager.allocparaloc(list,cgpara2);
  2658. a_paramaddr_ref(list,source,cgpara2);
  2659. paramanager.allocparaloc(list,cgpara1);
  2660. a_param_const(list,OS_INT,len,cgpara1);
  2661. paramanager.freeparaloc(list,cgpara3);
  2662. paramanager.freeparaloc(list,cgpara2);
  2663. paramanager.freeparaloc(list,cgpara1);
  2664. allocallcpuregisters(list);
  2665. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2666. deallocallcpuregisters(list);
  2667. cgpara3.done;
  2668. cgpara2.done;
  2669. cgpara1.done;
  2670. end;
  2671. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2672. var
  2673. cgpara1,cgpara2 : TCGPara;
  2674. begin
  2675. cgpara1.init;
  2676. cgpara2.init;
  2677. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2678. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2679. paramanager.allocparaloc(list,cgpara2);
  2680. a_paramaddr_ref(list,dest,cgpara2);
  2681. paramanager.allocparaloc(list,cgpara1);
  2682. a_paramaddr_ref(list,source,cgpara1);
  2683. paramanager.freeparaloc(list,cgpara2);
  2684. paramanager.freeparaloc(list,cgpara1);
  2685. allocallcpuregisters(list);
  2686. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2687. deallocallcpuregisters(list);
  2688. cgpara2.done;
  2689. cgpara1.done;
  2690. end;
  2691. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2692. var
  2693. href : treference;
  2694. incrfunc : string;
  2695. cgpara1,cgpara2 : TCGPara;
  2696. begin
  2697. cgpara1.init;
  2698. cgpara2.init;
  2699. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2700. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2701. if is_interfacecom(t) then
  2702. incrfunc:='FPC_INTF_INCR_REF'
  2703. else if is_ansistring(t) then
  2704. incrfunc:='FPC_ANSISTR_INCR_REF'
  2705. else if is_widestring(t) then
  2706. incrfunc:='FPC_WIDESTR_INCR_REF'
  2707. else if is_dynamic_array(t) then
  2708. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2709. else
  2710. incrfunc:='';
  2711. { call the special incr function or the generic addref }
  2712. if incrfunc<>'' then
  2713. begin
  2714. paramanager.allocparaloc(list,cgpara1);
  2715. { widestrings aren't ref. counted on all platforms so we need the address
  2716. to create a real copy }
  2717. if is_widestring(t) then
  2718. a_paramaddr_ref(list,ref,cgpara1)
  2719. else
  2720. { these functions get the pointer by value }
  2721. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2722. paramanager.freeparaloc(list,cgpara1);
  2723. allocallcpuregisters(list);
  2724. a_call_name(list,incrfunc);
  2725. deallocallcpuregisters(list);
  2726. end
  2727. else
  2728. begin
  2729. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2730. paramanager.allocparaloc(list,cgpara2);
  2731. a_paramaddr_ref(list,href,cgpara2);
  2732. paramanager.allocparaloc(list,cgpara1);
  2733. a_paramaddr_ref(list,ref,cgpara1);
  2734. paramanager.freeparaloc(list,cgpara1);
  2735. paramanager.freeparaloc(list,cgpara2);
  2736. allocallcpuregisters(list);
  2737. a_call_name(list,'FPC_ADDREF');
  2738. deallocallcpuregisters(list);
  2739. end;
  2740. cgpara2.done;
  2741. cgpara1.done;
  2742. end;
  2743. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2744. var
  2745. href : treference;
  2746. decrfunc : string;
  2747. needrtti : boolean;
  2748. cgpara1,cgpara2 : TCGPara;
  2749. tempreg1,tempreg2 : TRegister;
  2750. begin
  2751. cgpara1.init;
  2752. cgpara2.init;
  2753. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2754. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2755. needrtti:=false;
  2756. if is_interfacecom(t) then
  2757. decrfunc:='FPC_INTF_DECR_REF'
  2758. else if is_ansistring(t) then
  2759. decrfunc:='FPC_ANSISTR_DECR_REF'
  2760. else if is_widestring(t) then
  2761. decrfunc:='FPC_WIDESTR_DECR_REF'
  2762. else if is_dynamic_array(t) then
  2763. begin
  2764. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2765. needrtti:=true;
  2766. end
  2767. else
  2768. decrfunc:='';
  2769. { call the special decr function or the generic decref }
  2770. if decrfunc<>'' then
  2771. begin
  2772. if needrtti then
  2773. begin
  2774. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2775. tempreg2:=getaddressregister(list);
  2776. a_loadaddr_ref_reg(list,href,tempreg2);
  2777. end;
  2778. tempreg1:=getaddressregister(list);
  2779. a_loadaddr_ref_reg(list,ref,tempreg1);
  2780. if needrtti then
  2781. begin
  2782. paramanager.allocparaloc(list,cgpara2);
  2783. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2784. paramanager.freeparaloc(list,cgpara2);
  2785. end;
  2786. paramanager.allocparaloc(list,cgpara1);
  2787. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2788. paramanager.freeparaloc(list,cgpara1);
  2789. allocallcpuregisters(list);
  2790. a_call_name(list,decrfunc);
  2791. deallocallcpuregisters(list);
  2792. end
  2793. else
  2794. begin
  2795. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2796. paramanager.allocparaloc(list,cgpara2);
  2797. a_paramaddr_ref(list,href,cgpara2);
  2798. paramanager.allocparaloc(list,cgpara1);
  2799. a_paramaddr_ref(list,ref,cgpara1);
  2800. paramanager.freeparaloc(list,cgpara1);
  2801. paramanager.freeparaloc(list,cgpara2);
  2802. allocallcpuregisters(list);
  2803. a_call_name(list,'FPC_DECREF');
  2804. deallocallcpuregisters(list);
  2805. end;
  2806. cgpara2.done;
  2807. cgpara1.done;
  2808. end;
  2809. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2810. var
  2811. href : treference;
  2812. cgpara1,cgpara2 : TCGPara;
  2813. begin
  2814. cgpara1.init;
  2815. cgpara2.init;
  2816. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2817. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2818. if is_ansistring(t) or
  2819. is_widestring(t) or
  2820. is_interfacecom(t) or
  2821. is_dynamic_array(t) then
  2822. a_load_const_ref(list,OS_ADDR,0,ref)
  2823. else
  2824. begin
  2825. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2826. paramanager.allocparaloc(list,cgpara2);
  2827. a_paramaddr_ref(list,href,cgpara2);
  2828. paramanager.allocparaloc(list,cgpara1);
  2829. a_paramaddr_ref(list,ref,cgpara1);
  2830. paramanager.freeparaloc(list,cgpara1);
  2831. paramanager.freeparaloc(list,cgpara2);
  2832. allocallcpuregisters(list);
  2833. a_call_name(list,'FPC_INITIALIZE');
  2834. deallocallcpuregisters(list);
  2835. end;
  2836. cgpara1.done;
  2837. cgpara2.done;
  2838. end;
  2839. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2840. var
  2841. href : treference;
  2842. cgpara1,cgpara2 : TCGPara;
  2843. begin
  2844. cgpara1.init;
  2845. cgpara2.init;
  2846. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2847. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2848. if is_ansistring(t) or
  2849. is_widestring(t) or
  2850. is_interfacecom(t) then
  2851. begin
  2852. g_decrrefcount(list,t,ref);
  2853. a_load_const_ref(list,OS_ADDR,0,ref);
  2854. end
  2855. else
  2856. begin
  2857. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2858. paramanager.allocparaloc(list,cgpara2);
  2859. a_paramaddr_ref(list,href,cgpara2);
  2860. paramanager.allocparaloc(list,cgpara1);
  2861. a_paramaddr_ref(list,ref,cgpara1);
  2862. paramanager.freeparaloc(list,cgpara1);
  2863. paramanager.freeparaloc(list,cgpara2);
  2864. allocallcpuregisters(list);
  2865. a_call_name(list,'FPC_FINALIZE');
  2866. deallocallcpuregisters(list);
  2867. end;
  2868. cgpara1.done;
  2869. cgpara2.done;
  2870. end;
  2871. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2872. { generate range checking code for the value at location p. The type }
  2873. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2874. { is the original type used at that location. When both defs are equal }
  2875. { the check is also insert (needed for succ,pref,inc,dec) }
  2876. const
  2877. aintmax=high(aint);
  2878. var
  2879. neglabel : tasmlabel;
  2880. hreg : tregister;
  2881. lto,hto,
  2882. lfrom,hfrom : TConstExprInt;
  2883. fromsize, tosize: cardinal;
  2884. from_signed, to_signed: boolean;
  2885. begin
  2886. { range checking on and range checkable value? }
  2887. if not(cs_check_range in current_settings.localswitches) or
  2888. not(fromdef.typ in [orddef,enumdef]) or
  2889. { C-style booleans can't really fail range checks, }
  2890. { all values are always valid }
  2891. is_cbool(todef) then
  2892. exit;
  2893. {$ifndef cpu64bitalu}
  2894. { handle 64bit rangechecks separate for 32bit processors }
  2895. if is_64bit(fromdef) or is_64bit(todef) then
  2896. begin
  2897. cg64.g_rangecheck64(list,l,fromdef,todef);
  2898. exit;
  2899. end;
  2900. {$endif cpu64bitalu}
  2901. { only check when assigning to scalar, subranges are different, }
  2902. { when todef=fromdef then the check is always generated }
  2903. getrange(fromdef,lfrom,hfrom);
  2904. getrange(todef,lto,hto);
  2905. from_signed := is_signed(fromdef);
  2906. to_signed := is_signed(todef);
  2907. { check the rangedef of the array, not the array itself }
  2908. { (only change now, since getrange needs the arraydef) }
  2909. if (todef.typ = arraydef) then
  2910. todef := tarraydef(todef).rangedef;
  2911. { no range check if from and to are equal and are both longint/dword }
  2912. { (if we have a 32bit processor) or int64/qword, since such }
  2913. { operations can at most cause overflows (JM) }
  2914. { Note that these checks are mostly processor independent, they only }
  2915. { have to be changed once we introduce 64bit subrange types }
  2916. {$ifdef cpu64bitalu}
  2917. if (fromdef = todef) and
  2918. (fromdef.typ=orddef) and
  2919. (((((torddef(fromdef).ordtype = s64bit) and
  2920. (lfrom = low(int64)) and
  2921. (hfrom = high(int64))) or
  2922. ((torddef(fromdef).ordtype = u64bit) and
  2923. (lfrom = low(qword)) and
  2924. (hfrom = high(qword))) or
  2925. ((torddef(fromdef).ordtype = scurrency) and
  2926. (lfrom = low(int64)) and
  2927. (hfrom = high(int64)))))) then
  2928. exit;
  2929. {$else cpu64bitalu}
  2930. if (fromdef = todef) and
  2931. (fromdef.typ=orddef) and
  2932. (((((torddef(fromdef).ordtype = s32bit) and
  2933. (lfrom = int64(low(longint))) and
  2934. (hfrom = int64(high(longint)))) or
  2935. ((torddef(fromdef).ordtype = u32bit) and
  2936. (lfrom = low(cardinal)) and
  2937. (hfrom = high(cardinal)))))) then
  2938. exit;
  2939. {$endif cpu64bitalu}
  2940. { optimize some range checks away in safe cases }
  2941. fromsize := fromdef.size;
  2942. tosize := todef.size;
  2943. if ((from_signed = to_signed) or
  2944. (not from_signed)) and
  2945. (lto<=lfrom) and (hto>=hfrom) and
  2946. (fromsize <= tosize) then
  2947. begin
  2948. { if fromsize < tosize, and both have the same signed-ness or }
  2949. { fromdef is unsigned, then all bit patterns from fromdef are }
  2950. { valid for todef as well }
  2951. if (fromsize < tosize) then
  2952. exit;
  2953. if (fromsize = tosize) and
  2954. (from_signed = to_signed) then
  2955. { only optimize away if all bit patterns which fit in fromsize }
  2956. { are valid for the todef }
  2957. begin
  2958. {$ifopt Q+}
  2959. {$define overflowon}
  2960. {$Q-}
  2961. {$endif}
  2962. if to_signed then
  2963. begin
  2964. { calculation of the low/high ranges must not overflow 64 bit
  2965. otherwise we end up comparing with zero for 64 bit data types on
  2966. 64 bit processors }
  2967. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2968. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2969. exit
  2970. end
  2971. else
  2972. begin
  2973. { calculation of the low/high ranges must not overflow 64 bit
  2974. otherwise we end up having all zeros for 64 bit data types on
  2975. 64 bit processors }
  2976. if (lto = 0) and
  2977. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2978. exit
  2979. end;
  2980. {$ifdef overflowon}
  2981. {$Q+}
  2982. {$undef overflowon}
  2983. {$endif}
  2984. end
  2985. end;
  2986. { generate the rangecheck code for the def where we are going to }
  2987. { store the result }
  2988. { use the trick that }
  2989. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2990. { To be able to do that, we have to make sure however that either }
  2991. { fromdef and todef are both signed or unsigned, or that we leave }
  2992. { the parts < 0 and > maxlongint out }
  2993. if from_signed xor to_signed then
  2994. begin
  2995. if from_signed then
  2996. { from is signed, to is unsigned }
  2997. begin
  2998. { if high(from) < 0 -> always range error }
  2999. if (hfrom < 0) or
  3000. { if low(to) > maxlongint also range error }
  3001. (lto > aintmax) then
  3002. begin
  3003. a_call_name(list,'FPC_RANGEERROR');
  3004. exit
  3005. end;
  3006. { from is signed and to is unsigned -> when looking at to }
  3007. { as an signed value, it must be < maxaint (otherwise }
  3008. { it will become negative, which is invalid since "to" is unsigned) }
  3009. if hto > aintmax then
  3010. hto := aintmax;
  3011. end
  3012. else
  3013. { from is unsigned, to is signed }
  3014. begin
  3015. if (lfrom > aintmax) or
  3016. (hto < 0) then
  3017. begin
  3018. a_call_name(list,'FPC_RANGEERROR');
  3019. exit
  3020. end;
  3021. { from is unsigned and to is signed -> when looking at to }
  3022. { as an unsigned value, it must be >= 0 (since negative }
  3023. { values are the same as values > maxlongint) }
  3024. if lto < 0 then
  3025. lto := 0;
  3026. end;
  3027. end;
  3028. hreg:=getintregister(list,OS_INT);
  3029. a_load_loc_reg(list,OS_INT,l,hreg);
  3030. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3031. current_asmdata.getjumplabel(neglabel);
  3032. {
  3033. if from_signed then
  3034. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3035. else
  3036. }
  3037. {$ifdef cpu64bitalu}
  3038. if qword(hto-lto)>qword(aintmax) then
  3039. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3040. else
  3041. {$endif cpu64bitalu}
  3042. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3043. a_call_name(list,'FPC_RANGEERROR');
  3044. a_label(list,neglabel);
  3045. end;
  3046. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3047. begin
  3048. g_overflowCheck(list,loc,def);
  3049. end;
  3050. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3051. var
  3052. tmpreg : tregister;
  3053. begin
  3054. tmpreg:=getintregister(list,size);
  3055. g_flags2reg(list,size,f,tmpreg);
  3056. a_load_reg_ref(list,size,size,tmpreg,ref);
  3057. end;
  3058. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3059. var
  3060. OKLabel : tasmlabel;
  3061. cgpara1 : TCGPara;
  3062. begin
  3063. if (cs_check_object in current_settings.localswitches) or
  3064. (cs_check_range in current_settings.localswitches) then
  3065. begin
  3066. current_asmdata.getjumplabel(oklabel);
  3067. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3068. cgpara1.init;
  3069. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3070. paramanager.allocparaloc(list,cgpara1);
  3071. a_param_const(list,OS_INT,210,cgpara1);
  3072. paramanager.freeparaloc(list,cgpara1);
  3073. a_call_name(list,'FPC_HANDLEERROR');
  3074. a_label(list,oklabel);
  3075. cgpara1.done;
  3076. end;
  3077. end;
  3078. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3079. var
  3080. hrefvmt : treference;
  3081. cgpara1,cgpara2 : TCGPara;
  3082. begin
  3083. cgpara1.init;
  3084. cgpara2.init;
  3085. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3086. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3087. if (cs_check_object in current_settings.localswitches) then
  3088. begin
  3089. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  3090. paramanager.allocparaloc(list,cgpara2);
  3091. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3092. paramanager.allocparaloc(list,cgpara1);
  3093. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3094. paramanager.freeparaloc(list,cgpara1);
  3095. paramanager.freeparaloc(list,cgpara2);
  3096. allocallcpuregisters(list);
  3097. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  3098. deallocallcpuregisters(list);
  3099. end
  3100. else
  3101. if (cs_check_range in current_settings.localswitches) then
  3102. begin
  3103. paramanager.allocparaloc(list,cgpara1);
  3104. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3105. paramanager.freeparaloc(list,cgpara1);
  3106. allocallcpuregisters(list);
  3107. a_call_name(list,'FPC_CHECK_OBJECT');
  3108. deallocallcpuregisters(list);
  3109. end;
  3110. cgpara1.done;
  3111. cgpara2.done;
  3112. end;
  3113. {*****************************************************************************
  3114. Entry/Exit Code Functions
  3115. *****************************************************************************}
  3116. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3117. var
  3118. sizereg,sourcereg,lenreg : tregister;
  3119. cgpara1,cgpara2,cgpara3 : TCGPara;
  3120. begin
  3121. { because some abis don't support dynamic stack allocation properly
  3122. open array value parameters are copied onto the heap
  3123. }
  3124. { calculate necessary memory }
  3125. { read/write operations on one register make the life of the register allocator hard }
  3126. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3127. begin
  3128. lenreg:=getintregister(list,OS_INT);
  3129. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3130. end
  3131. else
  3132. lenreg:=lenloc.register;
  3133. sizereg:=getintregister(list,OS_INT);
  3134. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3135. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3136. { load source }
  3137. sourcereg:=getaddressregister(list);
  3138. a_loadaddr_ref_reg(list,ref,sourcereg);
  3139. { do getmem call }
  3140. cgpara1.init;
  3141. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3142. paramanager.allocparaloc(list,cgpara1);
  3143. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3144. paramanager.freeparaloc(list,cgpara1);
  3145. allocallcpuregisters(list);
  3146. a_call_name(list,'FPC_GETMEM');
  3147. deallocallcpuregisters(list);
  3148. cgpara1.done;
  3149. { return the new address }
  3150. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3151. { do move call }
  3152. cgpara1.init;
  3153. cgpara2.init;
  3154. cgpara3.init;
  3155. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3156. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3157. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3158. { load size }
  3159. paramanager.allocparaloc(list,cgpara3);
  3160. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3161. { load destination }
  3162. paramanager.allocparaloc(list,cgpara2);
  3163. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3164. { load source }
  3165. paramanager.allocparaloc(list,cgpara1);
  3166. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3167. paramanager.freeparaloc(list,cgpara3);
  3168. paramanager.freeparaloc(list,cgpara2);
  3169. paramanager.freeparaloc(list,cgpara1);
  3170. allocallcpuregisters(list);
  3171. a_call_name(list,'FPC_MOVE');
  3172. deallocallcpuregisters(list);
  3173. cgpara3.done;
  3174. cgpara2.done;
  3175. cgpara1.done;
  3176. end;
  3177. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3178. var
  3179. cgpara1 : TCGPara;
  3180. begin
  3181. { do move call }
  3182. cgpara1.init;
  3183. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3184. { load source }
  3185. paramanager.allocparaloc(list,cgpara1);
  3186. a_param_loc(list,l,cgpara1);
  3187. paramanager.freeparaloc(list,cgpara1);
  3188. allocallcpuregisters(list);
  3189. a_call_name(list,'FPC_FREEMEM');
  3190. deallocallcpuregisters(list);
  3191. cgpara1.done;
  3192. end;
  3193. procedure tcg.g_save_registers(list:TAsmList);
  3194. var
  3195. href : treference;
  3196. size : longint;
  3197. r : integer;
  3198. begin
  3199. { calculate temp. size }
  3200. size:=0;
  3201. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3202. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3203. inc(size,sizeof(aint));
  3204. { mm registers }
  3205. if uses_registers(R_MMREGISTER) then
  3206. begin
  3207. { Make sure we reserve enough space to do the alignment based on the offset
  3208. later on. We can't use the size for this, because the alignment of the start
  3209. of the temp is smaller than needed for an OS_VECTOR }
  3210. inc(size,tcgsize2size[OS_VECTOR]);
  3211. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3212. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3213. inc(size,tcgsize2size[OS_VECTOR]);
  3214. end;
  3215. if size>0 then
  3216. begin
  3217. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  3218. include(current_procinfo.flags,pi_has_saved_regs);
  3219. { Copy registers to temp }
  3220. href:=current_procinfo.save_regs_ref;
  3221. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3222. begin
  3223. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3224. begin
  3225. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3226. inc(href.offset,sizeof(aint));
  3227. end;
  3228. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3229. end;
  3230. if uses_registers(R_MMREGISTER) then
  3231. begin
  3232. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3233. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3234. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3235. begin
  3236. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3237. begin
  3238. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3239. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3240. end;
  3241. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3242. end;
  3243. end;
  3244. end;
  3245. end;
  3246. procedure tcg.g_restore_registers(list:TAsmList);
  3247. var
  3248. href : treference;
  3249. r : integer;
  3250. hreg : tregister;
  3251. begin
  3252. if not(pi_has_saved_regs in current_procinfo.flags) then
  3253. exit;
  3254. { Copy registers from temp }
  3255. href:=current_procinfo.save_regs_ref;
  3256. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3257. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3258. begin
  3259. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3260. { Allocate register so the optimizer does not remove the load }
  3261. a_reg_alloc(list,hreg);
  3262. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3263. inc(href.offset,sizeof(aint));
  3264. end;
  3265. if uses_registers(R_MMREGISTER) then
  3266. begin
  3267. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3268. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3269. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3270. begin
  3271. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3272. begin
  3273. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3274. { Allocate register so the optimizer does not remove the load }
  3275. a_reg_alloc(list,hreg);
  3276. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3277. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3278. end;
  3279. end;
  3280. end;
  3281. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3282. end;
  3283. procedure tcg.g_profilecode(list : TAsmList);
  3284. begin
  3285. end;
  3286. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3287. begin
  3288. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3289. end;
  3290. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3291. begin
  3292. a_load_const_ref(list, OS_INT, a, href);
  3293. end;
  3294. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3295. begin
  3296. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3297. end;
  3298. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3299. var
  3300. hsym : tsym;
  3301. href : treference;
  3302. paraloc : Pcgparalocation;
  3303. begin
  3304. { calculate the parameter info for the procdef }
  3305. if not procdef.has_paraloc_info then
  3306. begin
  3307. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3308. procdef.has_paraloc_info:=true;
  3309. end;
  3310. hsym:=tsym(procdef.parast.Find('self'));
  3311. if not(assigned(hsym) and
  3312. (hsym.typ=paravarsym)) then
  3313. internalerror(200305251);
  3314. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3315. while paraloc<>nil do
  3316. with paraloc^ do
  3317. begin
  3318. case loc of
  3319. LOC_REGISTER:
  3320. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3321. LOC_REFERENCE:
  3322. begin
  3323. { offset in the wrapper needs to be adjusted for the stored
  3324. return address }
  3325. reference_reset_base(href,reference.index,reference.offset+sizeof(aint));
  3326. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3327. end
  3328. else
  3329. internalerror(200309189);
  3330. end;
  3331. paraloc:=next;
  3332. end;
  3333. end;
  3334. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3335. begin
  3336. a_jmp_name(list,externalname);
  3337. end;
  3338. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3339. begin
  3340. a_call_name(list,s);
  3341. end;
  3342. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  3343. var
  3344. l: tasmsymbol;
  3345. ref: treference;
  3346. begin
  3347. result := NR_NO;
  3348. case target_info.system of
  3349. system_powerpc_darwin,
  3350. system_i386_darwin,
  3351. system_powerpc64_darwin:
  3352. begin
  3353. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3354. if not(assigned(l)) then
  3355. begin
  3356. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3357. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3358. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  3359. {$ifdef cpu64bitaddr}
  3360. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3361. {$else cpu64bitaddr}
  3362. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3363. {$endif cpu64bitaddr}
  3364. end;
  3365. result := getaddressregister(list);
  3366. reference_reset_symbol(ref,l,0);
  3367. { a_load_ref_reg will turn this into a pic-load if needed }
  3368. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3369. end;
  3370. end;
  3371. end;
  3372. procedure tcg.g_maybe_got_init(list: TAsmList);
  3373. begin
  3374. end;
  3375. {*****************************************************************************
  3376. TCG64
  3377. *****************************************************************************}
  3378. {$ifndef cpu64bitalu}
  3379. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3380. begin
  3381. a_load64_reg_reg(list,regsrc,regdst);
  3382. a_op64_const_reg(list,op,size,value,regdst);
  3383. end;
  3384. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3385. var
  3386. tmpreg64 : tregister64;
  3387. begin
  3388. { when src1=dst then we need to first create a temp to prevent
  3389. overwriting src1 with src2 }
  3390. if (regsrc1.reghi=regdst.reghi) or
  3391. (regsrc1.reglo=regdst.reghi) or
  3392. (regsrc1.reghi=regdst.reglo) or
  3393. (regsrc1.reglo=regdst.reglo) then
  3394. begin
  3395. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3396. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3397. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3398. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3399. a_load64_reg_reg(list,tmpreg64,regdst);
  3400. end
  3401. else
  3402. begin
  3403. a_load64_reg_reg(list,regsrc2,regdst);
  3404. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3405. end;
  3406. end;
  3407. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3408. var
  3409. tmpreg64 : tregister64;
  3410. begin
  3411. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3412. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3413. a_load64_subsetref_reg(list,sref,tmpreg64);
  3414. a_op64_const_reg(list,op,size,a,tmpreg64);
  3415. a_load64_reg_subsetref(list,tmpreg64,sref);
  3416. end;
  3417. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3418. var
  3419. tmpreg64 : tregister64;
  3420. begin
  3421. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3422. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3423. a_load64_subsetref_reg(list,sref,tmpreg64);
  3424. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3425. a_load64_reg_subsetref(list,tmpreg64,sref);
  3426. end;
  3427. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3428. var
  3429. tmpreg64 : tregister64;
  3430. begin
  3431. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3432. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3433. a_load64_subsetref_reg(list,sref,tmpreg64);
  3434. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3435. a_load64_reg_subsetref(list,tmpreg64,sref);
  3436. end;
  3437. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3438. var
  3439. tmpreg64 : tregister64;
  3440. begin
  3441. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3442. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3443. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3444. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3445. end;
  3446. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3447. begin
  3448. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3449. ovloc.loc:=LOC_VOID;
  3450. end;
  3451. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3452. begin
  3453. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3454. ovloc.loc:=LOC_VOID;
  3455. end;
  3456. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3457. begin
  3458. case l.loc of
  3459. LOC_REFERENCE, LOC_CREFERENCE:
  3460. a_load64_ref_subsetref(list,l.reference,sref);
  3461. LOC_REGISTER,LOC_CREGISTER:
  3462. a_load64_reg_subsetref(list,l.register64,sref);
  3463. LOC_CONSTANT :
  3464. a_load64_const_subsetref(list,l.value64,sref);
  3465. LOC_SUBSETREF,LOC_CSUBSETREF:
  3466. a_load64_subsetref_subsetref(list,l.sref,sref);
  3467. else
  3468. internalerror(2006082210);
  3469. end;
  3470. end;
  3471. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3472. begin
  3473. case l.loc of
  3474. LOC_REFERENCE, LOC_CREFERENCE:
  3475. a_load64_subsetref_ref(list,sref,l.reference);
  3476. LOC_REGISTER,LOC_CREGISTER:
  3477. a_load64_subsetref_reg(list,sref,l.register64);
  3478. LOC_SUBSETREF,LOC_CSUBSETREF:
  3479. a_load64_subsetref_subsetref(list,sref,l.sref);
  3480. else
  3481. internalerror(2006082211);
  3482. end;
  3483. end;
  3484. {$endif cpu64bitalu}
  3485. initialization
  3486. ;
  3487. finalization
  3488. cg.free;
  3489. {$ifndef cpu64bitalu}
  3490. cg64.free;
  3491. {$endif cpu64bitalu}
  3492. end.