cgobj.pas 103 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the basic code generator object
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {# @abstract(Abstract code generator unit)
  20. Abstreact code generator unit. This contains the base class
  21. to implement for all new supported processors.
  22. WARNING: None of the routines implemented in these modules,
  23. or their descendants, should use the temp. allocator, as
  24. these routines may be called inside genentrycode, and the
  25. stack frame is already setup!
  26. }
  27. unit cgobj;
  28. {$i fpcdefs.inc}
  29. interface
  30. uses
  31. {$ifdef delphi}
  32. dmisc,
  33. {$endif}
  34. cclasses,
  35. cpubase,cpuinfo,cgbase,
  36. aasmbase,aasmtai,aasmcpu,
  37. symconst,symbase,symtype,symdef,symtable,rgobj
  38. ;
  39. type
  40. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  41. {# @abstract(Abstract code generator)
  42. This class implements an abstract instruction generator. Some of
  43. the methods of this class are generic, while others must
  44. be overriden for all new processors which will be supported
  45. by Free Pascal. For 32-bit processors, the base class
  46. sould be @link(tcg64f32) and not @var(tcg).
  47. }
  48. tcg = class
  49. public
  50. alignment : talignment;
  51. rg : array[tregistertype] of trgobj;
  52. t_times:cardinal;
  53. {$ifdef flowgraph}
  54. aktflownode:word;
  55. {$endif}
  56. {************************************************}
  57. { basic routines }
  58. constructor create;
  59. {# Initialize the register allocators needed for the codegenerator.}
  60. procedure init_register_allocators;virtual;
  61. {# Clean up the register allocators needed for the codegenerator.}
  62. procedure done_register_allocators;virtual;
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  71. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure ungetregister(list:Taasmoutput;r:Tregister);virtual;
  77. procedure ungetreference(list:Taasmoutput;const r:Treference);virtual;
  78. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  79. procedure add_move_instruction(instr:Taicpu);virtual;
  80. function uses_registers(rt:Tregistertype):boolean;virtual;
  81. {# Get a specific register.}
  82. procedure getexplicitregister(list:Taasmoutput;r:Tregister);virtual;
  83. {# Get multiple registers specified.}
  84. procedure allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  85. {# Free multiple registers specified.}
  86. procedure deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  87. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  88. function makeregsize(reg:Tregister;size:Tcgsize):Tregister;
  89. {# Returns the tcgsize corresponding with the size of reg.}
  90. class function reg_cgsize(const reg: tregister) : tcgsize; virtual;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  97. {# Pass a parameter, which is located in a register, to a routine.
  98. This routine should push/send the parameter to the routine, as
  99. required by the specific processor ABI and routine modifiers.
  100. This must be overriden for each CPU target.
  101. @param(size size of the operand in the register)
  102. @param(r register source of the operand)
  103. @param(locpara where the parameter will be stored)
  104. }
  105. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const locpara : tparalocation);virtual;
  106. {# Pass a parameter, which is a constant, to a routine.
  107. A generic version is provided. This routine should
  108. be overriden for optimization purposes if the cpu
  109. permits directly sending this type of parameter.
  110. @param(size size of the operand in constant)
  111. @param(a value of constant to send)
  112. @param(locpara where the parameter will be stored)
  113. }
  114. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aword;const locpara : tparalocation);virtual;
  115. {# Pass the value of a parameter, which is located in memory, to a routine.
  116. A generic version is provided. This routine should
  117. be overriden for optimization purposes if the cpu
  118. permits directly sending this type of parameter.
  119. @param(size size of the operand in constant)
  120. @param(r Memory reference of value to send)
  121. @param(locpara where the parameter will be stored)
  122. }
  123. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);virtual;
  124. {# Pass the value of a parameter, which can be located either in a register or memory location,
  125. to a routine.
  126. A generic version is provided.
  127. @param(l location of the operand to send)
  128. @param(nr parameter number (starting from one) of routine (from left to right))
  129. @param(locpara where the parameter will be stored)
  130. }
  131. procedure a_param_loc(list : taasmoutput;const l : tlocation;const locpara : tparalocation);
  132. {# Pass the address of a reference to a routine. This routine
  133. will calculate the address of the reference, and pass this
  134. calculated address as a parameter.
  135. A generic version is provided. This routine should
  136. be overriden for optimization purposes if the cpu
  137. permits directly sending this type of parameter.
  138. @param(r reference to get address from)
  139. @param(nr parameter number (starting from one) of routine (from left to right))
  140. }
  141. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);virtual;
  142. { Copies a whole memory block to the stack, the locpara must be a memory location }
  143. procedure a_param_copy_ref(list : taasmoutput;size : qword;const r : treference;const locpara : tparalocation);
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. { Copy a parameter to a (temporary) reference }
  161. procedure a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);virtual;
  162. { Copy a parameter to a register }
  163. procedure a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);virtual;
  164. {# Emits instruction to call the method specified by symbol name.
  165. This routine must be overriden for each new target cpu.
  166. There is no a_call_ref because loading the reference will use
  167. a temp register on most cpu's resulting in conflicts with the
  168. registers used for the parameters (PFV)
  169. }
  170. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  171. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  172. { move instructions }
  173. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aword;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aword;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : taasmoutput;a : aword;const loc : tlocation);
  176. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  178. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  179. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  180. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  181. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  182. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  183. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  184. { fpu move instructions }
  185. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  186. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  187. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  188. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  189. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  190. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);virtual;
  191. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);virtual;
  192. { vector register move instructions }
  193. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  194. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  195. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  196. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  197. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  198. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  199. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  200. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  201. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  202. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  203. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  204. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  205. { basic arithmetic operations }
  206. { note: for operators which require only one argument (not, neg), use }
  207. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  208. { that in this case the *second* operand is used as both source and }
  209. { destination (JM) }
  210. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; reg: TRegister); virtual; abstract;
  211. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; const ref: TReference); virtual;
  212. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: AWord; const loc: tlocation);
  213. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  214. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  215. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  216. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  217. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  218. { trinary operations for processors that support them, 'emulated' }
  219. { on others. None with "ref" arguments since I don't think there }
  220. { are any processors that support it (JM) }
  221. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg;
  222. size: tcgsize; a: aword; src, dst: tregister); virtual;
  223. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  224. size: tcgsize; src1, src2, dst: tregister); virtual;
  225. { comparison operations }
  226. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
  227. l : tasmlabel);virtual; abstract;
  228. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const ref : treference;
  229. l : tasmlabel); virtual;
  230. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aword; const loc: tlocation;
  231. l : tasmlabel);
  232. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  233. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  234. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  235. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  236. l : tasmlabel);
  237. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  238. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  239. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  240. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  241. }
  242. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  243. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  244. {
  245. This routine tries to optimize the const_reg opcode, and should be
  246. called at the start of a_op_const_reg. It returns the actual opcode
  247. to emit, and the constant value to emit. If this routine returns
  248. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  249. @param(op The opcode to emit, returns the opcode which must be emitted)
  250. @param(a The constant which should be emitted, returns the constant which must
  251. be emitted)
  252. @param(reg The register to emit the opcode with, returns the register with
  253. which the opcode will be emitted)
  254. }
  255. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aword; var reg: tregister): boolean;virtual;
  256. {#
  257. This routine is used in exception management nodes. It should
  258. save the exception reason currently in the FUNCTION_RETURN_REG. The
  259. save should be done either to a temp (pointed to by href).
  260. or on the stack (pushing the value on the stack).
  261. The size of the value to save is OS_S32. The default version
  262. saves the exception reason to a temp. memory area.
  263. }
  264. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  265. {#
  266. This routine is used in exception management nodes. It should
  267. save the exception reason constant. The
  268. save should be done either to a temp (pointed to by href).
  269. or on the stack (pushing the value on the stack).
  270. The size of the value to save is OS_S32. The default version
  271. saves the exception reason to a temp. memory area.
  272. }
  273. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aword);virtual;
  274. {#
  275. This routine is used in exception management nodes. It should
  276. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  277. should either be in the temp. area (pointed to by href , href should
  278. *NOT* be freed) or on the stack (the value should be popped).
  279. The size of the value to save is OS_S32. The default version
  280. saves the exception reason to a temp. memory area.
  281. }
  282. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  283. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  284. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  285. {# This should emit the opcode to copy len bytes from the source
  286. to destination, if loadref is true, it assumes that it first must load
  287. the source address from the memory location where
  288. source points to.
  289. It must be overriden for each new target processor.
  290. @param(source Source reference of copy)
  291. @param(dest Destination reference of copy)
  292. @param(delsource Indicates if the source reference's resources should be freed)
  293. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  294. }
  295. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword;delsource,loadref : boolean);virtual; abstract;
  296. {# This should emit the opcode to a shortrstring from the source
  297. to destination, if loadref is true, it assumes that it first must load
  298. the source address from the memory location where
  299. source points to.
  300. @param(source Source reference of copy)
  301. @param(dest Destination reference of copy)
  302. @param(delsource Indicates if the source reference's resources should be freed)
  303. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  304. }
  305. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;delsource,loadref : boolean);
  306. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  307. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  308. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  309. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  310. {# Generates range checking code. It is to note
  311. that this routine does not need to be overriden,
  312. as it takes care of everything.
  313. @param(p Node which contains the value to check)
  314. @param(todef Type definition of node to range check)
  315. }
  316. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  317. {# Generates overflow checking code for a node }
  318. procedure g_overflowcheck(list: taasmoutput; const l:tlocation; def:tdef); virtual; abstract;
  319. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aword);virtual;
  320. procedure g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);virtual;
  321. {# Emits instructions which should be emitted when entering
  322. a routine declared as @var(interrupt). The default
  323. behavior does nothing, should be overriden as required.
  324. }
  325. procedure g_interrupt_stackframe_entry(list : taasmoutput);virtual;
  326. {# Emits instructions which should be emitted when exiting
  327. a routine declared as @var(interrupt). The default
  328. behavior does nothing, should be overriden as required.
  329. }
  330. procedure g_interrupt_stackframe_exit(list : taasmoutput;accused,acchiused:boolean);virtual;
  331. {# Emits instructions when compilation is done in profile
  332. mode (this is set as a command line option). The default
  333. behavior does nothing, should be overriden as required.
  334. }
  335. procedure g_profilecode(list : taasmoutput);virtual;
  336. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  337. @param(size Number of bytes to allocate)
  338. }
  339. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  340. {# Emits instruction for allocating the locals in entry
  341. code of a routine. This is one of the first
  342. routine called in @var(genentrycode).
  343. @param(localsize Number of bytes to allocate as locals)
  344. }
  345. procedure g_stackframe_entry(list : taasmoutput;localsize : longint);virtual; abstract;
  346. {# Emits instructiona for restoring the frame pointer
  347. at routine exit. For some processors, this routine
  348. may do nothing at all.
  349. }
  350. procedure g_restore_frame_pointer(list : taasmoutput);virtual; abstract;
  351. {# Emits instructions for returning from a subroutine.
  352. Should also restore the stack.
  353. @param(parasize Number of bytes of parameters to deallocate from stack)
  354. }
  355. procedure g_return_from_proc(list : taasmoutput;parasize : aword);virtual; abstract;
  356. {# This routine is called when generating the code for the entry point
  357. of a routine. It should save all registers which are not used in this
  358. routine, and which should be declared as saved in the std_saved_registers
  359. set.
  360. This routine is mainly used when linking to code which is generated
  361. by ABI-compliant compilers (like GCC), to make sure that the reserved
  362. registers of that ABI are not clobbered.
  363. @param(usedinproc Registers which are used in the code of this routine)
  364. }
  365. procedure g_save_standard_registers(list:Taasmoutput);virtual;abstract;
  366. {# This routine is called when generating the code for the exit point
  367. of a routine. It should restore all registers which were previously
  368. saved in @var(g_save_standard_registers).
  369. @param(usedinproc Registers which are used in the code of this routine)
  370. }
  371. procedure g_restore_standard_registers(list:Taasmoutput);virtual;abstract;
  372. procedure g_save_all_registers(list : taasmoutput);virtual;abstract;
  373. procedure g_restore_all_registers(list : taasmoutput;accused,acchiused:boolean);virtual;abstract;
  374. end;
  375. {# @abstract(Abstract code generator for 64 Bit operations)
  376. This class implements an abstract code generator class
  377. for 64 Bit operations.
  378. }
  379. tcg64 = class
  380. { Allocates 64 Bit register r by inserting a pai_realloc record }
  381. procedure a_reg_alloc(list : taasmoutput;r : tregister64);virtual;abstract;
  382. { Deallocates 64 Bit register r by inserting a pa_regdealloc record}
  383. procedure a_reg_dealloc(list : taasmoutput;r : tregister64);virtual;abstract;
  384. procedure a_load64_const_ref(list : taasmoutput;value : qword;const ref : treference);virtual;abstract;
  385. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  386. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  387. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  388. procedure a_load64_const_reg(list : taasmoutput;value : qword;reg : tregister64);virtual;abstract;
  389. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  390. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  391. procedure a_load64_const_loc(list : taasmoutput;value : qword;const l : tlocation);virtual;abstract;
  392. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  393. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  394. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  395. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  396. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  397. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  398. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  399. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;const ref : treference;reg : tregister64);virtual;abstract;
  400. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);virtual;abstract;
  401. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;regsrc : tregister64;const ref : treference);virtual;abstract;
  402. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;value : qword;regdst : tregister64);virtual;abstract;
  403. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;value : qword;const ref : treference);virtual;abstract;
  404. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;value : qword;const l: tlocation);virtual;abstract;
  405. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;reg : tregister64;const l : tlocation);virtual;abstract;
  406. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reg64 : tregister64);virtual;abstract;
  407. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : qword;regsrc,regdst : tregister64);virtual;
  408. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);virtual;
  409. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : tparalocation);virtual;abstract;
  410. procedure a_param64_const(list : taasmoutput;value : qword;const loc : tparalocation);virtual;abstract;
  411. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : tparalocation);virtual;abstract;
  412. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : tparalocation);virtual;abstract;
  413. {
  414. This routine tries to optimize the const_reg opcode, and should be
  415. called at the start of a_op64_const_reg. It returns the actual opcode
  416. to emit, and the constant value to emit. If this routine returns
  417. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  418. @param(op The opcode to emit, returns the opcode which must be emitted)
  419. @param(a The constant which should be emitted, returns the constant which must
  420. be emitted)
  421. @param(reg The register to emit the opcode with, returns the register with
  422. which the opcode will be emitted)
  423. }
  424. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : qword; var reg: tregister64): boolean;virtual;abstract;
  425. { override to catch 64bit rangechecks }
  426. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  427. end;
  428. { trerefence handling }
  429. {# Clear to zero a treference }
  430. procedure reference_reset(var ref : treference);
  431. {# Clear to zero a treference, and set is base address
  432. to base register.
  433. }
  434. procedure reference_reset_base(var ref : treference;base : tregister;offset : longint);
  435. procedure reference_reset_symbol(var ref : treference;sym : tasmsymbol;offset : longint);
  436. procedure reference_release(list: taasmoutput; const ref : treference);
  437. { This routine verifies if two references are the same, and
  438. if so, returns TRUE, otherwise returns false.
  439. }
  440. function references_equal(sref : treference;dref : treference) : boolean;
  441. { tlocation handling }
  442. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  443. procedure location_release(list: taasmoutput; const l : tlocation);
  444. procedure location_freetemp(list: taasmoutput; const l : tlocation);
  445. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  446. procedure location_swap(var destloc,sourceloc : tlocation);
  447. var
  448. {# Main code generator class }
  449. cg : tcg;
  450. {# Code generator class for all operations working with 64-Bit operands }
  451. cg64 : tcg64;
  452. implementation
  453. uses
  454. globals,globtype,options,systems,
  455. verbose,defutil,paramgr,
  456. tgobj,cutils;
  457. const
  458. { Please leave this here, this module should NOT use
  459. exprasmlist, the lists are always passed as arguments.
  460. Declaring it as string here results in an error when compiling (PFV) }
  461. exprasmlist = 'error';
  462. {*****************************************************************************
  463. basic functionallity
  464. ******************************************************************************}
  465. constructor tcg.create;
  466. begin
  467. end;
  468. function Tcg.makeregsize(reg:Tregister;size:Tcgsize):Tregister;
  469. var
  470. subreg:Tsubregister;
  471. begin
  472. subreg:=cgsize2subreg(size);
  473. result:=reg;
  474. setsubreg(result,subreg);
  475. end;
  476. {*****************************************************************************
  477. register allocation
  478. ******************************************************************************}
  479. procedure tcg.init_register_allocators;
  480. begin
  481. fillchar(rg,sizeof(rg),0);
  482. add_reg_instruction_hook:={$ifdef FPCPROCVAR}@{$endif}add_reg_instruction;
  483. end;
  484. procedure tcg.done_register_allocators;
  485. begin
  486. { Safety }
  487. fillchar(rg,sizeof(rg),0);
  488. add_reg_instruction_hook:=nil;
  489. end;
  490. {$ifdef flowgraph}
  491. procedure Tcg.init_flowgraph;
  492. begin
  493. aktflownode:=0;
  494. end;
  495. procedure Tcg.done_flowgraph;
  496. begin
  497. end;
  498. {$endif}
  499. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  500. begin
  501. if not assigned(rg[R_INTREGISTER]) then
  502. internalerror(200312122);
  503. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  504. end;
  505. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  506. begin
  507. if not assigned(rg[R_FPUREGISTER]) then
  508. internalerror(200312123);
  509. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  510. end;
  511. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  512. begin
  513. if not assigned(rg[R_MMREGISTER]) then
  514. internalerror(200312124);
  515. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  516. end;
  517. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  518. begin
  519. if assigned(rg[R_ADDRESSREGISTER]) then
  520. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  521. else
  522. begin
  523. if not assigned(rg[R_INTREGISTER]) then
  524. internalerror(200312121);
  525. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  526. end;
  527. end;
  528. procedure tcg.getexplicitregister(list:Taasmoutput;r:Tregister);
  529. begin
  530. if not assigned(rg[getregtype(r)]) then
  531. internalerror(200312125);
  532. rg[getregtype(r)].getexplicitregister(list,r);
  533. end;
  534. procedure tcg.ungetregister(list:Taasmoutput;r:Tregister);
  535. begin
  536. if not assigned(rg[getregtype(r)]) then
  537. internalerror(200312126);
  538. rg[getregtype(r)].ungetregister(list,r);
  539. end;
  540. procedure tcg.ungetreference(list:Taasmoutput;const r:Treference);
  541. begin
  542. if r.base<>NR_NO then
  543. ungetregister(list,r.base);
  544. if r.index<>NR_NO then
  545. ungetregister(list,r.index);
  546. end;
  547. procedure tcg.allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  548. begin
  549. if assigned(rg[rt]) then
  550. rg[rt].allocexplicitregisters(list,r)
  551. else
  552. internalerror(200310092);
  553. end;
  554. procedure tcg.deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  555. begin
  556. if assigned(rg[rt]) then
  557. rg[rt].deallocexplicitregisters(list,r)
  558. else
  559. internalerror(200310093);
  560. end;
  561. function tcg.uses_registers(rt:Tregistertype):boolean;
  562. begin
  563. if assigned(rg[rt]) then
  564. result:=rg[rt].uses_registers
  565. else
  566. result:=false;
  567. end;
  568. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  569. var
  570. rt : tregistertype;
  571. begin
  572. rt:=getregtype(r);
  573. { Only add it when a register allocator is configured.
  574. No IE can be generated, because the VMT is written
  575. without a valid rg[] }
  576. if assigned(rg[rt]) then
  577. rg[rt].add_reg_instruction(instr,r);
  578. end;
  579. procedure tcg.add_move_instruction(instr:Taicpu);
  580. var
  581. rt : tregistertype;
  582. begin
  583. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  584. if assigned(rg[rt]) then
  585. rg[rt].add_move_instruction(instr)
  586. else
  587. internalerror(200310095);
  588. end;
  589. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  590. var
  591. rt : tregistertype;
  592. begin
  593. for rt:=low(tregistertype) to high(tregistertype) do
  594. begin
  595. if assigned(rg[rt]) then
  596. rg[rt].do_register_allocation(list,headertai);
  597. end;
  598. end;
  599. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  600. begin
  601. list.concat(tai_regalloc.alloc(r));
  602. end;
  603. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  604. begin
  605. list.concat(tai_regalloc.dealloc(r));
  606. end;
  607. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  608. begin
  609. list.concat(tai_label.create(l));
  610. end;
  611. {*****************************************************************************
  612. for better code generation these methods should be overridden
  613. ******************************************************************************}
  614. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const locpara : tparalocation);
  615. var
  616. ref : treference;
  617. begin
  618. case locpara.loc of
  619. LOC_REGISTER,LOC_CREGISTER:
  620. a_load_reg_reg(list,size,locpara.size,r,locpara.register);
  621. LOC_REFERENCE,LOC_CREFERENCE:
  622. begin
  623. reference_reset(ref);
  624. ref.base:=locpara.reference.index;
  625. ref.offset:=locpara.reference.offset;
  626. a_load_reg_ref(list,size,locpara.size,r,ref);
  627. end
  628. else
  629. internalerror(2002071004);
  630. end;
  631. end;
  632. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aword;const locpara : tparalocation);
  633. var
  634. ref : treference;
  635. begin
  636. case locpara.loc of
  637. LOC_REGISTER,LOC_CREGISTER:
  638. a_load_const_reg(list,locpara.size,a,locpara.register);
  639. LOC_REFERENCE,LOC_CREFERENCE:
  640. begin
  641. reference_reset(ref);
  642. ref.base:=locpara.reference.index;
  643. ref.offset:=locpara.reference.offset;
  644. a_load_const_ref(list,locpara.size,a,ref);
  645. end
  646. else
  647. internalerror(2002071004);
  648. end;
  649. end;
  650. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);
  651. var
  652. ref : treference;
  653. begin
  654. case locpara.loc of
  655. LOC_REGISTER,LOC_CREGISTER:
  656. a_load_ref_reg(list,size,locpara.size,r,locpara.register);
  657. LOC_REFERENCE,LOC_CREFERENCE:
  658. begin
  659. reference_reset(ref);
  660. ref.base:=locpara.reference.index;
  661. ref.offset:=locpara.reference.offset;
  662. a_load_ref_ref(list,size,locpara.size,r,ref);
  663. end
  664. else
  665. internalerror(2002071004);
  666. end;
  667. end;
  668. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const locpara : tparalocation);
  669. begin
  670. case l.loc of
  671. LOC_REGISTER,
  672. LOC_CREGISTER :
  673. a_param_reg(list,l.size,l.register,locpara);
  674. LOC_CONSTANT :
  675. a_param_const(list,l.size,l.value,locpara);
  676. LOC_CREFERENCE,
  677. LOC_REFERENCE :
  678. a_param_ref(list,l.size,l.reference,locpara);
  679. else
  680. internalerror(2002032211);
  681. end;
  682. end;
  683. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);
  684. var
  685. hr : tregister;
  686. begin
  687. hr:=getaddressregister(list);
  688. a_loadaddr_ref_reg(list,r,hr);
  689. ungetregister(list,hr);
  690. a_param_reg(list,OS_ADDR,hr,locpara);
  691. end;
  692. procedure tcg.a_param_copy_ref(list : taasmoutput;size : qword;const r : treference;const locpara : tparalocation);
  693. var
  694. ref : treference;
  695. begin
  696. if not(locpara.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  697. internalerror(2003010901);
  698. reference_reset_base(ref,locpara.reference.index,locpara.reference.offset);
  699. g_concatcopy(list,r,ref,size,false,false);
  700. end;
  701. procedure tcg.a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);
  702. begin
  703. case locpara.loc of
  704. LOC_CREGISTER,
  705. LOC_REGISTER:
  706. begin
  707. if (locpara.size in [OS_S64,OS_64]) then
  708. begin
  709. {$ifdef cpu64bit}
  710. ungetregister(list,locpara.register64);
  711. {$else cpu64bit}
  712. getexplicitregister(list,locpara.registerlow);
  713. getexplicitregister(list,locpara.registerhigh);
  714. ungetregister(list,locpara.registerlow);
  715. ungetregister(list,locpara.registerhigh);
  716. {$endif cpu64bit}
  717. cg64.a_load64_reg_ref(list,locpara.register64,ref)
  718. end
  719. else
  720. begin
  721. getexplicitregister(list,locpara.register);
  722. ungetregister(list,locpara.register);
  723. a_load_reg_ref(list,locpara.size,locpara.size,locpara.register,ref);
  724. end;
  725. end;
  726. LOC_MMREGISTER,
  727. LOC_CMMREGISTER:
  728. begin
  729. getexplicitregister(list,locpara.register);
  730. ungetregister(list,locpara.register);
  731. a_loadmm_reg_ref(list,locpara.size,locpara.size,locpara.register,ref,shuffle);
  732. end;
  733. LOC_FPUREGISTER,
  734. LOC_CFPUREGISTER:
  735. begin
  736. getexplicitregister(list,locpara.register);
  737. ungetregister(list,locpara.register);
  738. a_loadfpu_reg_ref(list,locpara.size,locpara.register,ref);
  739. end;
  740. else
  741. internalerror(2002081302);
  742. end;
  743. end;
  744. procedure tcg.a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);
  745. var
  746. href : treference;
  747. begin
  748. case locpara.loc of
  749. LOC_CREGISTER,
  750. LOC_REGISTER:
  751. begin
  752. if not(locpara.size in [OS_S64,OS_64]) then
  753. begin
  754. getexplicitregister(list,locpara.register);
  755. ungetregister(list,locpara.register);
  756. getexplicitregister(list,reg);
  757. a_load_reg_reg(list,locpara.size,locpara.size,locpara.register,reg)
  758. end
  759. else
  760. internalerror(2003053011);
  761. end;
  762. LOC_CFPUREGISTER,
  763. LOC_FPUREGISTER:
  764. begin
  765. getexplicitregister(list,locpara.register);
  766. ungetregister(list,locpara.register);
  767. getexplicitregister(list,reg);
  768. a_loadfpu_reg_reg(list,locpara.size,locpara.register,reg);
  769. end;
  770. LOC_MMREGISTER,
  771. LOC_CMMREGISTER:
  772. begin
  773. getexplicitregister(list,locpara.register);
  774. ungetregister(list,locpara.register);
  775. getexplicitregister(list,reg);
  776. a_loadmm_reg_reg(list,locpara.size,locpara.size,locpara.register,reg,shuffle);
  777. end;
  778. LOC_REFERENCE,
  779. LOC_CREFERENCE:
  780. begin
  781. reference_reset_base(href,locpara.reference.index,locpara.reference.offset);
  782. getexplicitregister(list,reg);
  783. a_load_ref_reg(list,locpara.size,locpara.size,href,reg);
  784. end;
  785. else
  786. internalerror(2003053010);
  787. end
  788. end;
  789. {****************************************************************************
  790. some generic implementations
  791. ****************************************************************************}
  792. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  793. var
  794. tmpreg: tregister;
  795. begin
  796. { verify if we have the same reference }
  797. if references_equal(sref,dref) then
  798. exit;
  799. tmpreg:=getintregister(list,tosize);
  800. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  801. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  802. ungetregister(list,tmpreg);
  803. end;
  804. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aword;const ref : treference);
  805. var
  806. tmpreg: tregister;
  807. begin
  808. tmpreg:=getintregister(list,size);
  809. a_load_const_reg(list,size,a,tmpreg);
  810. a_load_reg_ref(list,size,size,tmpreg,ref);
  811. ungetregister(list,tmpreg);
  812. end;
  813. procedure tcg.a_load_const_loc(list : taasmoutput;a : aword;const loc: tlocation);
  814. begin
  815. case loc.loc of
  816. LOC_REFERENCE,LOC_CREFERENCE:
  817. a_load_const_ref(list,loc.size,a,loc.reference);
  818. LOC_REGISTER,LOC_CREGISTER:
  819. a_load_const_reg(list,loc.size,a,loc.register);
  820. else
  821. internalerror(200203272);
  822. end;
  823. end;
  824. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  825. begin
  826. case loc.loc of
  827. LOC_REFERENCE,LOC_CREFERENCE:
  828. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  829. LOC_REGISTER,LOC_CREGISTER:
  830. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  831. else
  832. internalerror(200203271);
  833. end;
  834. end;
  835. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  836. begin
  837. case loc.loc of
  838. LOC_REFERENCE,LOC_CREFERENCE:
  839. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  840. LOC_REGISTER,LOC_CREGISTER:
  841. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  842. LOC_CONSTANT:
  843. a_load_const_reg(list,tosize,loc.value,reg);
  844. else
  845. internalerror(200109092);
  846. end;
  847. end;
  848. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  849. begin
  850. case loc.loc of
  851. LOC_REFERENCE,LOC_CREFERENCE:
  852. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  853. LOC_REGISTER,LOC_CREGISTER:
  854. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  855. LOC_CONSTANT:
  856. a_load_const_ref(list,tosize,loc.value,ref);
  857. else
  858. internalerror(200109302);
  859. end;
  860. end;
  861. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aword; var reg:tregister): boolean;
  862. var
  863. powerval : longint;
  864. begin
  865. optimize_op_const_reg := false;
  866. case op of
  867. { or with zero returns same result }
  868. OP_OR : if a = 0 then optimize_op_const_reg := true;
  869. { and with max returns same result }
  870. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  871. { division by 1 returns result }
  872. OP_DIV :
  873. begin
  874. if a = 1 then
  875. optimize_op_const_reg := true
  876. else if ispowerof2(int64(a), powerval) then
  877. begin
  878. a := powerval;
  879. op:= OP_SHR;
  880. end;
  881. exit;
  882. end;
  883. OP_IDIV:
  884. begin
  885. if a = 1 then
  886. optimize_op_const_reg := true
  887. else if ispowerof2(int64(a), powerval) then
  888. begin
  889. a := powerval;
  890. op:= OP_SAR;
  891. end;
  892. exit;
  893. end;
  894. OP_MUL,OP_IMUL:
  895. begin
  896. if a = 1 then
  897. optimize_op_const_reg := true
  898. else if ispowerof2(int64(a), powerval) then
  899. begin
  900. a := powerval;
  901. op:= OP_SHL;
  902. end;
  903. exit;
  904. end;
  905. OP_SAR,OP_SHL,OP_SHR:
  906. begin
  907. if a = 0 then
  908. optimize_op_const_reg := true;
  909. exit;
  910. end;
  911. end;
  912. end;
  913. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  914. begin
  915. case loc.loc of
  916. LOC_REFERENCE, LOC_CREFERENCE:
  917. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  918. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  919. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  920. else
  921. internalerror(200203301);
  922. end;
  923. end;
  924. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  925. begin
  926. case loc.loc of
  927. LOC_REFERENCE, LOC_CREFERENCE:
  928. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  929. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  930. a_loadfpu_reg_reg(list,size,reg,loc.register);
  931. else
  932. internalerror(48991);
  933. end;
  934. end;
  935. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);
  936. var
  937. ref : treference;
  938. begin
  939. case locpara.loc of
  940. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  941. a_loadfpu_reg_reg(list,size,r,locpara.register);
  942. LOC_REFERENCE,LOC_CREFERENCE:
  943. begin
  944. reference_reset(ref);
  945. ref.base:=locpara.reference.index;
  946. ref.offset:=locpara.reference.offset;
  947. a_loadfpu_reg_ref(list,size,r,ref);
  948. end
  949. else
  950. internalerror(2002071004);
  951. end;
  952. end;
  953. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);
  954. var
  955. hr : tregister;
  956. begin
  957. hr:=getfpuregister(list,size);
  958. a_loadfpu_ref_reg(list,size,ref,hr);
  959. a_paramfpu_reg(list,size,hr,locpara);
  960. ungetregister(list,hr);
  961. end;
  962. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; const ref: TReference);
  963. var
  964. tmpreg: tregister;
  965. begin
  966. tmpreg:=getintregister(list,size);
  967. a_load_ref_reg(list,size,size,ref,tmpreg);
  968. a_op_const_reg(list,op,size,a,tmpreg);
  969. a_load_reg_ref(list,size,size,tmpreg,ref);
  970. ungetregister(list,tmpreg);
  971. end;
  972. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: AWord; const loc: tlocation);
  973. begin
  974. case loc.loc of
  975. LOC_REGISTER, LOC_CREGISTER:
  976. a_op_const_reg(list,op,loc.size,a,loc.register);
  977. LOC_REFERENCE, LOC_CREFERENCE:
  978. a_op_const_ref(list,op,loc.size,a,loc.reference);
  979. else
  980. internalerror(200109061);
  981. end;
  982. end;
  983. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  984. var
  985. tmpreg: tregister;
  986. begin
  987. tmpreg:=getintregister(list,size);
  988. a_load_ref_reg(list,size,size,ref,tmpreg);
  989. a_op_reg_reg(list,op,size,reg,tmpreg);
  990. a_load_reg_ref(list,size,size,tmpreg,ref);
  991. ungetregister(list,tmpreg);
  992. end;
  993. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  994. var
  995. tmpreg: tregister;
  996. begin
  997. case op of
  998. OP_NOT,OP_NEG:
  999. { handle it as "load ref,reg; op reg" }
  1000. begin
  1001. a_load_ref_reg(list,size,size,ref,reg);
  1002. a_op_reg_reg(list,op,size,reg,reg);
  1003. end;
  1004. else
  1005. begin
  1006. tmpreg:=getintregister(list,size);
  1007. a_load_ref_reg(list,size,size,ref,tmpreg);
  1008. a_op_reg_reg(list,op,size,tmpreg,reg);
  1009. ungetregister(list,tmpreg);
  1010. end;
  1011. end;
  1012. end;
  1013. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  1014. begin
  1015. case loc.loc of
  1016. LOC_REGISTER, LOC_CREGISTER:
  1017. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1018. LOC_REFERENCE, LOC_CREFERENCE:
  1019. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1020. else
  1021. internalerror(200109061);
  1022. end;
  1023. end;
  1024. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1025. var
  1026. tmpreg: tregister;
  1027. begin
  1028. case loc.loc of
  1029. LOC_REGISTER,LOC_CREGISTER:
  1030. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1031. LOC_REFERENCE,LOC_CREFERENCE:
  1032. begin
  1033. tmpreg:=getintregister(list,loc.size);
  1034. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1035. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1036. ungetregister(list,tmpreg);
  1037. end;
  1038. else
  1039. internalerror(200109061);
  1040. end;
  1041. end;
  1042. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  1043. a:aword;src,dst:Tregister);
  1044. begin
  1045. a_load_reg_reg(list,size,size,src,dst);
  1046. a_op_const_reg(list,op,size,a,dst);
  1047. end;
  1048. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  1049. size: tcgsize; src1, src2, dst: tregister);
  1050. var
  1051. tmpreg: tregister;
  1052. begin
  1053. if (dst<>src1) then
  1054. begin
  1055. a_load_reg_reg(list,size,size,src2,dst);
  1056. a_op_reg_reg(list,op,size,src1,dst);
  1057. end
  1058. else
  1059. begin
  1060. tmpreg:=cg.getintregister(list,size);
  1061. a_load_reg_reg(list,size,size,src2,tmpreg);
  1062. a_op_reg_reg(list,op,size,src1,tmpreg);
  1063. a_load_reg_reg(list,size,size,tmpreg,dst);
  1064. ungetregister(list,tmpreg);
  1065. end;
  1066. end;
  1067. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const ref : treference;
  1068. l : tasmlabel);
  1069. var
  1070. tmpreg: tregister;
  1071. begin
  1072. tmpreg:=getintregister(list,size);
  1073. a_load_ref_reg(list,size,size,ref,tmpreg);
  1074. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1075. ungetregister(list,tmpreg);
  1076. end;
  1077. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const loc : tlocation;
  1078. l : tasmlabel);
  1079. begin
  1080. case loc.loc of
  1081. LOC_REGISTER,LOC_CREGISTER:
  1082. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1083. LOC_REFERENCE,LOC_CREFERENCE:
  1084. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1085. else
  1086. internalerror(200109061);
  1087. end;
  1088. end;
  1089. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1090. var
  1091. tmpreg: tregister;
  1092. begin
  1093. tmpreg:=getintregister(list,size);
  1094. a_load_ref_reg(list,size,size,ref,tmpreg);
  1095. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1096. ungetregister(list,tmpreg);
  1097. end;
  1098. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1099. begin
  1100. case loc.loc of
  1101. LOC_REGISTER,
  1102. LOC_CREGISTER:
  1103. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1104. LOC_REFERENCE,
  1105. LOC_CREFERENCE :
  1106. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1107. LOC_CONSTANT:
  1108. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1109. else
  1110. internalerror(200203231);
  1111. end;
  1112. end;
  1113. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1114. l : tasmlabel);
  1115. var
  1116. tmpreg: tregister;
  1117. begin
  1118. case loc.loc of
  1119. LOC_REGISTER,LOC_CREGISTER:
  1120. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1121. LOC_REFERENCE,LOC_CREFERENCE:
  1122. begin
  1123. tmpreg:=getintregister(list,size);
  1124. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1125. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1126. ungetregister(list,tmpreg);
  1127. end
  1128. else
  1129. internalerror(200109061);
  1130. end;
  1131. end;
  1132. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1133. begin
  1134. case loc.loc of
  1135. LOC_MMREGISTER,LOC_CMMREGISTER:
  1136. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1137. LOC_REFERENCE,LOC_CREFERENCE:
  1138. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1139. else
  1140. internalerror(200310121);
  1141. end;
  1142. end;
  1143. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1144. begin
  1145. case loc.loc of
  1146. LOC_MMREGISTER,LOC_CMMREGISTER:
  1147. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1148. LOC_REFERENCE,LOC_CREFERENCE:
  1149. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1150. else
  1151. internalerror(200310122);
  1152. end;
  1153. end;
  1154. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const locpara : tparalocation;shuffle : pmmshuffle);
  1155. var
  1156. ref : treference;
  1157. begin
  1158. case locpara.loc of
  1159. LOC_MMREGISTER,LOC_CMMREGISTER:
  1160. a_loadmm_reg_reg(list,size,locpara.size,reg,locpara.register,shuffle);
  1161. LOC_REFERENCE,LOC_CREFERENCE:
  1162. begin
  1163. reference_reset(ref);
  1164. ref.base:=locpara.reference.index;
  1165. ref.offset:=locpara.reference.offset;
  1166. a_loadmm_reg_ref(list,size,locpara.size,reg,ref,shuffle);
  1167. end
  1168. else
  1169. internalerror(200310123);
  1170. end;
  1171. end;
  1172. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const locpara : tparalocation;shuffle : pmmshuffle);
  1173. var
  1174. hr : tregister;
  1175. hs : tmmshuffle;
  1176. begin
  1177. hr:=getmmregister(list,locpara.size);
  1178. a_loadmm_ref_reg(list,size,locpara.size,ref,hr,shuffle);
  1179. if realshuffle(shuffle) then
  1180. begin
  1181. hs:=shuffle^;
  1182. removeshuffles(hs);
  1183. a_parammm_reg(list,locpara.size,hr,locpara,@hs);
  1184. end
  1185. else
  1186. a_parammm_reg(list,locpara.size,hr,locpara,shuffle);
  1187. ungetregister(list,hr);
  1188. end;
  1189. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const locpara : tparalocation;shuffle : pmmshuffle);
  1190. begin
  1191. case loc.loc of
  1192. LOC_MMREGISTER,LOC_CMMREGISTER:
  1193. a_parammm_reg(list,loc.size,loc.register,locpara,shuffle);
  1194. LOC_REFERENCE,LOC_CREFERENCE:
  1195. a_parammm_ref(list,loc.size,loc.reference,locpara,shuffle);
  1196. else
  1197. internalerror(200310123);
  1198. end;
  1199. end;
  1200. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1201. var
  1202. hr : tregister;
  1203. hs : tmmshuffle;
  1204. begin
  1205. hr:=getmmregister(list,size);
  1206. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1207. if realshuffle(shuffle) then
  1208. begin
  1209. hs:=shuffle^;
  1210. removeshuffles(hs);
  1211. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1212. end
  1213. else
  1214. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1215. ungetregister(list,hr);
  1216. end;
  1217. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1218. var
  1219. hr : tregister;
  1220. hs : tmmshuffle;
  1221. begin
  1222. hr:=getmmregister(list,size);
  1223. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1224. if realshuffle(shuffle) then
  1225. begin
  1226. hs:=shuffle^;
  1227. removeshuffles(hs);
  1228. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1229. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1230. end
  1231. else
  1232. begin
  1233. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1234. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1235. end;
  1236. ungetregister(list,hr);
  1237. end;
  1238. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1239. begin
  1240. case loc.loc of
  1241. LOC_CMMREGISTER,LOC_MMREGISTER:
  1242. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1243. LOC_CREFERENCE,LOC_REFERENCE:
  1244. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1245. else
  1246. internalerror(200312232);
  1247. end;
  1248. end;
  1249. class function tcg.reg_cgsize(const reg: tregister) : tcgsize;
  1250. begin
  1251. reg_cgsize := OS_INT;
  1252. end;
  1253. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;delsource,loadref : boolean);
  1254. var
  1255. paraloc1,paraloc2,paraloc3 : tparalocation;
  1256. begin
  1257. {$ifdef FPC}
  1258. {$warning FIX ME!}
  1259. {$endif}
  1260. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1261. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1262. paraloc3:=paramanager.getintparaloc(pocall_default,3);
  1263. paramanager.allocparaloc(list,paraloc3);
  1264. a_paramaddr_ref(list,dest,paraloc3);
  1265. paramanager.allocparaloc(list,paraloc2);
  1266. if loadref then
  1267. a_param_ref(list,OS_ADDR,source,paraloc2)
  1268. else
  1269. a_paramaddr_ref(list,source,paraloc2);
  1270. if delsource then
  1271. reference_release(list,source);
  1272. paramanager.allocparaloc(list,paraloc1);
  1273. a_param_const(list,OS_INT,len,paraloc1);
  1274. paramanager.freeparaloc(list,paraloc3);
  1275. paramanager.freeparaloc(list,paraloc2);
  1276. paramanager.freeparaloc(list,paraloc1);
  1277. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1278. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1279. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1280. end;
  1281. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  1282. var
  1283. href : treference;
  1284. incrfunc : string;
  1285. paraloc1,paraloc2 : tparalocation;
  1286. begin
  1287. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1288. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1289. { These functions should not change the registers (they use
  1290. the saveregister proc directive }
  1291. if is_interfacecom(t) then
  1292. incrfunc:='FPC_INTF_INCR_REF'
  1293. else if is_ansistring(t) then
  1294. incrfunc:='FPC_ANSISTR_INCR_REF'
  1295. else if is_widestring(t) then
  1296. incrfunc:='FPC_WIDESTR_INCR_REF'
  1297. else if is_dynamic_array(t) then
  1298. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1299. else
  1300. incrfunc:='';
  1301. { call the special incr function or the generic addref }
  1302. if incrfunc<>'' then
  1303. begin
  1304. { these functions get the pointer by value }
  1305. paramanager.allocparaloc(list,paraloc1);
  1306. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1307. paramanager.freeparaloc(list,paraloc1);
  1308. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1309. a_call_name(list,incrfunc);
  1310. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1311. end
  1312. else
  1313. begin
  1314. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1315. paramanager.allocparaloc(list,paraloc2);
  1316. a_paramaddr_ref(list,href,paraloc2);
  1317. paramanager.allocparaloc(list,paraloc1);
  1318. if loadref then
  1319. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1320. else
  1321. a_paramaddr_ref(list,ref,paraloc1);
  1322. paramanager.freeparaloc(list,paraloc1);
  1323. paramanager.freeparaloc(list,paraloc2);
  1324. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1325. a_call_name(list,'FPC_ADDREF');
  1326. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1327. end;
  1328. end;
  1329. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference; loadref:boolean);
  1330. var
  1331. hreg : tregister;
  1332. href : treference;
  1333. decrfunc : string;
  1334. needrtti : boolean;
  1335. paraloc1,paraloc2 : tparalocation;
  1336. begin
  1337. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1338. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1339. needrtti:=false;
  1340. if is_interfacecom(t) then
  1341. decrfunc:='FPC_INTF_DECR_REF'
  1342. else if is_ansistring(t) then
  1343. decrfunc:='FPC_ANSISTR_DECR_REF'
  1344. else if is_widestring(t) then
  1345. decrfunc:='FPC_WIDESTR_DECR_REF'
  1346. else if is_dynamic_array(t) then
  1347. begin
  1348. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1349. needrtti:=true;
  1350. end
  1351. else
  1352. decrfunc:='';
  1353. { call the special decr function or the generic decref }
  1354. if decrfunc<>'' then
  1355. begin
  1356. if needrtti then
  1357. begin
  1358. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1359. paramanager.allocparaloc(list,paraloc2);
  1360. a_paramaddr_ref(list,href,paraloc2);
  1361. end;
  1362. paramanager.allocparaloc(list,paraloc1);
  1363. if loadref then
  1364. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1365. else
  1366. a_paramaddr_ref(list,ref,paraloc1);
  1367. paramanager.freeparaloc(list,paraloc1);
  1368. if needrtti then
  1369. paramanager.freeparaloc(list,paraloc2);
  1370. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1371. a_call_name(list,decrfunc);
  1372. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1373. end
  1374. else
  1375. begin
  1376. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1377. paramanager.allocparaloc(list,paraloc2);
  1378. a_paramaddr_ref(list,href,paraloc2);
  1379. paramanager.allocparaloc(list,paraloc1);
  1380. if loadref then
  1381. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1382. else
  1383. a_paramaddr_ref(list,ref,paraloc1);
  1384. paramanager.freeparaloc(list,paraloc1);
  1385. paramanager.freeparaloc(list,paraloc2);
  1386. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1387. a_call_name(list,'FPC_DECREF');
  1388. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1389. end;
  1390. { Temp locations need always to be reset to 0 }
  1391. if tg.istemp(ref) then
  1392. begin
  1393. if loadref then
  1394. begin
  1395. hreg:=getaddressregister(list);
  1396. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1397. reference_reset_base(href,hreg,0);
  1398. a_load_const_ref(list,OS_ADDR,0,href);
  1399. ungetregister(list,hreg);
  1400. end
  1401. else
  1402. a_load_const_ref(list,OS_ADDR,0,ref);
  1403. end;
  1404. end;
  1405. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1406. var
  1407. href : treference;
  1408. paraloc1,paraloc2 : tparalocation;
  1409. begin
  1410. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1411. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1412. if is_ansistring(t) or
  1413. is_widestring(t) or
  1414. is_interfacecom(t) then
  1415. a_load_const_ref(list,OS_ADDR,0,ref)
  1416. else
  1417. begin
  1418. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1419. paramanager.allocparaloc(list,paraloc2);
  1420. a_paramaddr_ref(list,href,paraloc2);
  1421. paramanager.allocparaloc(list,paraloc1);
  1422. if loadref then
  1423. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1424. else
  1425. a_paramaddr_ref(list,ref,paraloc1);
  1426. paramanager.freeparaloc(list,paraloc1);
  1427. paramanager.freeparaloc(list,paraloc2);
  1428. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1429. a_call_name(list,'FPC_INITIALIZE');
  1430. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1431. end;
  1432. end;
  1433. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1434. var
  1435. hreg : tregister;
  1436. href : treference;
  1437. paraloc1,paraloc2 : tparalocation;
  1438. begin
  1439. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1440. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1441. if is_ansistring(t) or
  1442. is_widestring(t) or
  1443. is_interfacecom(t) then
  1444. begin
  1445. g_decrrefcount(list,t,ref,loadref);
  1446. { Temp locations are already reset to 0 }
  1447. if not tg.istemp(ref) then
  1448. begin
  1449. if loadref then
  1450. begin
  1451. hreg:=getaddressregister(list);
  1452. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1453. reference_reset_base(href,hreg,0);
  1454. a_load_const_ref(list,OS_ADDR,0,href);
  1455. ungetregister(list,hreg);
  1456. end
  1457. else
  1458. a_load_const_ref(list,OS_ADDR,0,ref);
  1459. end;
  1460. end
  1461. else
  1462. begin
  1463. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1464. paramanager.allocparaloc(list,paraloc2);
  1465. a_paramaddr_ref(list,href,paraloc2);
  1466. paramanager.allocparaloc(list,paraloc1);
  1467. if loadref then
  1468. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1469. else
  1470. a_paramaddr_ref(list,ref,paraloc1);
  1471. paramanager.freeparaloc(list,paraloc1);
  1472. paramanager.freeparaloc(list,paraloc2);
  1473. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1474. a_call_name(list,'FPC_FINALIZE');
  1475. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1476. end;
  1477. end;
  1478. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1479. { generate range checking code for the value at location p. The type }
  1480. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1481. { is the original type used at that location. When both defs are equal }
  1482. { the check is also insert (needed for succ,pref,inc,dec) }
  1483. const
  1484. {$ifdef ver1_0}
  1485. awordsignedmax=high(longint);
  1486. {$else}
  1487. awordsignedmax=high(aword) div 2;
  1488. {$endif}
  1489. var
  1490. neglabel : tasmlabel;
  1491. hreg : tregister;
  1492. lto,hto,
  1493. lfrom,hfrom : TConstExprInt;
  1494. from_signed: boolean;
  1495. begin
  1496. { range checking on and range checkable value? }
  1497. if not(cs_check_range in aktlocalswitches) or
  1498. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1499. exit;
  1500. if is_64bit(fromdef) or is_64bit(todef) then
  1501. begin
  1502. cg64.g_rangecheck64(list,l,fromdef,todef);
  1503. exit;
  1504. end;
  1505. { only check when assigning to scalar, subranges are different, }
  1506. { when todef=fromdef then the check is always generated }
  1507. getrange(fromdef,lfrom,hfrom);
  1508. getrange(todef,lto,hto);
  1509. { no range check if from and to are equal and are both longint/dword }
  1510. { (if we have a 32bit processor) or int64/qword, since such }
  1511. { operations can at most cause overflows (JM) }
  1512. { Note that these checks are mostly processor independent, they only }
  1513. { have to be changed once we introduce 64bit subrange types }
  1514. if (fromdef = todef) and
  1515. (fromdef.deftype=orddef) and
  1516. (((sizeof(aword) = 4) and
  1517. (((torddef(fromdef).typ = s32bit) and
  1518. (lfrom = low(longint)) and
  1519. (hfrom = high(longint))) or
  1520. ((torddef(fromdef).typ = u32bit) and
  1521. (lfrom = low(cardinal)) and
  1522. (hfrom = high(cardinal)))))) then
  1523. exit;
  1524. if todef<>fromdef then
  1525. begin
  1526. { if the from-range falls completely in the to-range, no check }
  1527. { is necessary }
  1528. if (lto<=lfrom) and (hto>=hfrom) then
  1529. exit;
  1530. end;
  1531. { generate the rangecheck code for the def where we are going to }
  1532. { store the result }
  1533. { use the trick that }
  1534. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1535. { To be able to do that, we have to make sure however that either }
  1536. { fromdef and todef are both signed or unsigned, or that we leave }
  1537. { the parts < 0 and > maxlongint out }
  1538. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1539. from_signed := is_signed(fromdef);
  1540. if from_signed xor is_signed(todef) then
  1541. if from_signed then
  1542. { from is signed, to is unsigned }
  1543. begin
  1544. { if high(from) < 0 -> always range error }
  1545. if (hfrom < 0) or
  1546. { if low(to) > maxlongint also range error }
  1547. (lto > awordsignedmax) then
  1548. begin
  1549. a_call_name(list,'FPC_RANGEERROR');
  1550. exit
  1551. end;
  1552. { from is signed and to is unsigned -> when looking at from }
  1553. { as an unsigned value, it must be < maxlongint (otherwise }
  1554. { it's negative, which is invalid since "to" is unsigned) }
  1555. if hto > awordsignedmax then
  1556. hto := awordsignedmax;
  1557. end
  1558. else
  1559. { from is unsigned, to is signed }
  1560. begin
  1561. if (lfrom > awordsignedmax) or
  1562. (hto < 0) then
  1563. begin
  1564. a_call_name(list,'FPC_RANGEERROR');
  1565. exit
  1566. end;
  1567. { from is unsigned and to is signed -> when looking at to }
  1568. { as an unsigned value, it must be >= 0 (since negative }
  1569. { values are the same as values > maxlongint) }
  1570. if lto < 0 then
  1571. lto := 0;
  1572. end;
  1573. hreg:=getintregister(list,OS_INT);
  1574. a_load_loc_reg(list,OS_INT,l,hreg);
  1575. a_op_const_reg(list,OP_SUB,OS_INT,aword(lto),hreg);
  1576. objectlibrary.getlabel(neglabel);
  1577. a_cmp_const_reg_label(list,OS_INT,OC_BE,aword(hto-lto),hreg,neglabel);
  1578. { !!! should happen right after the compare (JM) }
  1579. ungetregister(list,hreg);
  1580. a_call_name(list,'FPC_RANGEERROR');
  1581. a_label(list,neglabel);
  1582. end;
  1583. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1584. var
  1585. tmpreg : tregister;
  1586. begin
  1587. tmpreg:=getintregister(list,size);
  1588. g_flags2reg(list,size,f,tmpreg);
  1589. a_load_reg_ref(list,size,size,tmpreg,ref);
  1590. ungetregister(list,tmpreg);
  1591. end;
  1592. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1593. var
  1594. OKLabel : tasmlabel;
  1595. paraloc1 : tparalocation;
  1596. begin
  1597. if (cs_check_object in aktlocalswitches) or
  1598. (cs_check_range in aktlocalswitches) then
  1599. begin
  1600. objectlibrary.getlabel(oklabel);
  1601. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1602. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1603. paramanager.allocparaloc(list,paraloc1);
  1604. a_param_const(list,OS_INT,210,paraloc1);
  1605. paramanager.freeparaloc(list,paraloc1);
  1606. a_call_name(list,'FPC_HANDLEERROR');
  1607. a_label(list,oklabel);
  1608. end;
  1609. end;
  1610. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1611. var
  1612. hrefvmt : treference;
  1613. paraloc1,paraloc2 : tparalocation;
  1614. begin
  1615. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1616. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1617. if (cs_check_object in aktlocalswitches) then
  1618. begin
  1619. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymboldata(objdef.vmt_mangledname),0);
  1620. paramanager.allocparaloc(list,paraloc2);
  1621. a_paramaddr_ref(list,hrefvmt,paraloc2);
  1622. paramanager.allocparaloc(list,paraloc1);
  1623. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1624. paramanager.freeparaloc(list,paraloc1);
  1625. paramanager.freeparaloc(list,paraloc2);
  1626. { No register saving needed, saveregisters is used }
  1627. {$ifndef x86}
  1628. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1629. {$endif x86}
  1630. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1631. {$ifndef x86}
  1632. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1633. {$endif x86}
  1634. end
  1635. else
  1636. if (cs_check_range in aktlocalswitches) then
  1637. begin
  1638. paramanager.allocparaloc(list,paraloc1);
  1639. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1640. paramanager.freeparaloc(list,paraloc1);
  1641. { No register saving needed, saveregisters is used }
  1642. {$ifndef x86}
  1643. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1644. {$endif x86}
  1645. a_call_name(list,'FPC_CHECK_OBJECT');
  1646. {$ifndef x86}
  1647. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1648. {$endif x86}
  1649. end;
  1650. end;
  1651. {*****************************************************************************
  1652. Entry/Exit Code Functions
  1653. *****************************************************************************}
  1654. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aword);
  1655. var
  1656. sizereg,sourcereg,destreg : tregister;
  1657. paraloc1,paraloc2,paraloc3 : tparalocation;
  1658. begin
  1659. { because ppc abi doesn't support dynamic stack allocation properly
  1660. open array value parameters are copied onto the heap
  1661. }
  1662. { allocate two registers for len and source }
  1663. sizereg:=getintregister(list,OS_INT);
  1664. sourcereg:=getintregister(list,OS_ADDR);
  1665. destreg:=getintregister(list,OS_ADDR);
  1666. { calculate necessary memory }
  1667. a_load_ref_reg(list,OS_INT,OS_INT,lenref,sizereg);
  1668. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,sizereg,sizereg);
  1669. a_op_const_reg_reg(list,OP_MUL,OS_INT,elesize,sizereg,sizereg);
  1670. { load source }
  1671. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,sourcereg);
  1672. { do getmem call }
  1673. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1674. paramanager.allocparaloc(list,paraloc1);
  1675. a_param_reg(list,OS_INT,sizereg,paraloc1);
  1676. paramanager.freeparaloc(list,paraloc1);
  1677. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1678. a_call_name(list,'FPC_GETMEM');
  1679. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1680. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1681. a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,ref);
  1682. { do move call }
  1683. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1684. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1685. paraloc3:=paramanager.getintparaloc(pocall_default,3);
  1686. { load size }
  1687. paramanager.allocparaloc(list,paraloc3);
  1688. a_param_reg(list,OS_INT,sizereg,paraloc3);
  1689. { load destination }
  1690. paramanager.allocparaloc(list,paraloc2);
  1691. a_param_reg(list,OS_ADDR,destreg,paraloc2);
  1692. { load source }
  1693. paramanager.allocparaloc(list,paraloc1);
  1694. a_param_reg(list,OS_ADDR,sourcereg,paraloc1);
  1695. paramanager.freeparaloc(list,paraloc3);
  1696. paramanager.freeparaloc(list,paraloc2);
  1697. paramanager.freeparaloc(list,paraloc1);
  1698. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1699. a_call_name(list,'FPC_MOVE');
  1700. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1701. { release used registers }
  1702. ungetregister(list,sizereg);
  1703. ungetregister(list,sourcereg);
  1704. ungetregister(list,destreg);
  1705. end;
  1706. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);
  1707. var
  1708. paraloc : tparalocation;
  1709. begin
  1710. { do move call }
  1711. paraloc:=paramanager.getintparaloc(pocall_default,1);
  1712. { load source }
  1713. paramanager.allocparaloc(list,paraloc);
  1714. a_param_ref(list,OS_ADDR,ref,paraloc);
  1715. paramanager.freeparaloc(list,paraloc);
  1716. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1717. a_call_name(list,'FPC_FREEMEM');
  1718. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1719. end;
  1720. procedure tcg.g_interrupt_stackframe_entry(list : taasmoutput);
  1721. begin
  1722. end;
  1723. procedure tcg.g_interrupt_stackframe_exit(list : taasmoutput;accused,acchiused:boolean);
  1724. begin
  1725. end;
  1726. procedure tcg.g_profilecode(list : taasmoutput);
  1727. begin
  1728. end;
  1729. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1730. begin
  1731. a_load_reg_ref(list, OS_S32, OS_32, NR_FUNCTION_RETURN_REG, href);
  1732. end;
  1733. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aword);
  1734. begin
  1735. a_load_const_ref(list, OS_S32, a, href);
  1736. end;
  1737. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1738. begin
  1739. a_load_ref_reg(list, OS_S32, OS_S32, href, NR_FUNCTION_RETURN_REG);
  1740. end;
  1741. {*****************************************************************************
  1742. TCG64
  1743. *****************************************************************************}
  1744. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : qword; regsrc,regdst : tregister64);
  1745. begin
  1746. a_load64_reg_reg(list,regsrc,regdst);
  1747. a_op64_const_reg(list,op,value,regdst);
  1748. end;
  1749. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
  1750. begin
  1751. a_load64_reg_reg(list,regsrc2,regdst);
  1752. a_op64_reg_reg(list,op,regsrc1,regdst);
  1753. end;
  1754. {****************************************************************************
  1755. TReference
  1756. ****************************************************************************}
  1757. procedure reference_reset(var ref : treference);
  1758. begin
  1759. FillChar(ref,sizeof(treference),0);
  1760. {$ifdef arm}
  1761. ref.signindex:=1;
  1762. {$endif arm}
  1763. end;
  1764. procedure reference_reset_base(var ref : treference;base : tregister;offset : longint);
  1765. begin
  1766. reference_reset(ref);
  1767. ref.base:=base;
  1768. ref.offset:=offset;
  1769. end;
  1770. procedure reference_reset_symbol(var ref : treference;sym : tasmsymbol;offset : longint);
  1771. begin
  1772. reference_reset(ref);
  1773. ref.symbol:=sym;
  1774. ref.offset:=offset;
  1775. end;
  1776. procedure reference_release(list: taasmoutput; const ref : treference);
  1777. begin
  1778. cg.ungetreference(list,ref);
  1779. end;
  1780. function references_equal(sref : treference;dref : treference):boolean;
  1781. begin
  1782. references_equal:=CompareByte(sref,dref,sizeof(treference))=0;
  1783. end;
  1784. {****************************************************************************
  1785. TLocation
  1786. ****************************************************************************}
  1787. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  1788. begin
  1789. FillChar(l,sizeof(tlocation),0);
  1790. l.loc:=lt;
  1791. l.size:=lsize;
  1792. {$ifdef arm}
  1793. if l.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  1794. l.reference.signindex:=1;
  1795. {$endif arm}
  1796. end;
  1797. procedure location_release(list: taasmoutput; const l : tlocation);
  1798. begin
  1799. case l.loc of
  1800. LOC_REGISTER,LOC_CREGISTER :
  1801. begin
  1802. cg.ungetregister(list,l.register);
  1803. {$ifndef cpu64bit}
  1804. if l.size in [OS_64,OS_S64] then
  1805. cg.ungetregister(list,l.registerhigh);
  1806. {$endif cpu64bit}
  1807. end;
  1808. LOC_FPUREGISTER,LOC_CFPUREGISTER :
  1809. cg.ungetregister(list,l.register);
  1810. LOC_CREFERENCE,LOC_REFERENCE :
  1811. cg.ungetreference(list, l.reference);
  1812. end;
  1813. end;
  1814. procedure location_freetemp(list:taasmoutput; const l : tlocation);
  1815. begin
  1816. if (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1817. tg.ungetiftemp(list,l.reference);
  1818. end;
  1819. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  1820. begin
  1821. destloc:=sourceloc;
  1822. end;
  1823. procedure location_swap(var destloc,sourceloc : tlocation);
  1824. var
  1825. swapl : tlocation;
  1826. begin
  1827. swapl := destloc;
  1828. destloc := sourceloc;
  1829. sourceloc := swapl;
  1830. end;
  1831. initialization
  1832. ;
  1833. finalization
  1834. cg.free;
  1835. cg64.free;
  1836. end.
  1837. {
  1838. $Log$
  1839. Revision 1.152 2004-01-22 22:12:21 peter
  1840. * g_finalize needs to reset to nil after decr_ref
  1841. * support loadref in decr_ref reset to nil
  1842. Revision 1.151 2004/01/21 22:13:20 peter
  1843. * decrrefcount resets temps to nil
  1844. Revision 1.150 2004/01/21 21:01:34 peter
  1845. * fixed stackchecking for register calling
  1846. Revision 1.149 2004/01/20 12:59:36 florian
  1847. * common addnode code for x86-64 and i386
  1848. Revision 1.148 2004/01/12 22:11:38 peter
  1849. * use localalign info for alignment for locals and temps
  1850. * sparc fpu flags branching added
  1851. * moved powerpc copy_valye_openarray to generic
  1852. Revision 1.147 2004/01/11 23:56:19 daniel
  1853. * Experiment: Compress strings to save memory
  1854. Did not save a single byte of mem; clearly the core size is boosted by
  1855. temporary memory usage...
  1856. Revision 1.146 2003/12/26 14:02:30 peter
  1857. * sparc updates
  1858. * use registertype in spill_register
  1859. Revision 1.145 2003/12/26 13:19:16 florian
  1860. * rtl and compiler compile with -Cfsse2
  1861. Revision 1.144 2003/12/24 00:10:02 florian
  1862. - delete parameter in cg64 methods removed
  1863. Revision 1.143 2003/12/23 14:38:07 florian
  1864. + second_floataddsse implemented
  1865. Revision 1.142 2003/12/22 19:00:17 florian
  1866. * fixed some x86-64 issues
  1867. Revision 1.141 2003/12/21 19:42:42 florian
  1868. * fixed ppc inlining stuff
  1869. * fixed wrong unit writing
  1870. + added some sse stuff
  1871. Revision 1.140 2003/12/15 21:39:39 florian
  1872. * improved register allocation of generic a_param_const and a_param_ref
  1873. Revision 1.139 2003/12/15 21:25:48 peter
  1874. * reg allocations for imaginary register are now inserted just
  1875. before reg allocation
  1876. * tregister changed to enum to allow compile time check
  1877. * fixed several tregister-tsuperregister errors
  1878. Revision 1.138 2003/12/12 17:16:17 peter
  1879. * rg[tregistertype] added in tcg
  1880. Revision 1.137 2003/12/06 22:11:47 jonas
  1881. + allocate volatile registers around calls to procedures declared with
  1882. "saveregisters" on non-x86 processors
  1883. Revision 1.136 2003/12/06 01:15:22 florian
  1884. * reverted Peter's alloctemp patch; hopefully properly
  1885. Revision 1.135 2003/12/03 23:13:19 peter
  1886. * delayed paraloc allocation, a_param_*() gets extra parameter
  1887. if it needs to allocate temp or real paralocation
  1888. * optimized/simplified int-real loading
  1889. Revision 1.134 2003/11/05 23:05:13 florian
  1890. * elesize of g_copyvaluepara_openarray changed
  1891. + g_releaesvaluepara_openarray added
  1892. Revision 1.133 2003/10/19 01:34:30 florian
  1893. * some ppc stuff fixed
  1894. * memory leak fixed
  1895. Revision 1.132 2003/10/17 15:25:18 florian
  1896. * fixed more ppc stuff
  1897. Revision 1.131 2003/10/17 14:38:32 peter
  1898. * 64k registers supported
  1899. * fixed some memory leaks
  1900. Revision 1.130 2003/10/13 01:23:13 florian
  1901. * some ideas for mm support implemented
  1902. Revision 1.129 2003/10/11 16:06:42 florian
  1903. * fixed some MMX<->SSE
  1904. * started to fix ppc, needs an overhaul
  1905. + stabs info improve for spilling, not sure if it works correctly/completly
  1906. - MMX_SUPPORT removed from Makefile.fpc
  1907. Revision 1.128 2003/10/10 17:48:13 peter
  1908. * old trgobj moved to x86/rgcpu and renamed to trgx86fpu
  1909. * tregisteralloctor renamed to trgobj
  1910. * removed rgobj from a lot of units
  1911. * moved location_* and reference_* to cgobj
  1912. * first things for mmx register allocation
  1913. Revision 1.127 2003/10/09 21:31:37 daniel
  1914. * Register allocator splitted, ans abstract now
  1915. Revision 1.126 2003/10/01 20:34:48 peter
  1916. * procinfo unit contains tprocinfo
  1917. * cginfo renamed to cgbase
  1918. * moved cgmessage to verbose
  1919. * fixed ppc and sparc compiles
  1920. Revision 1.125 2003/09/28 17:55:03 peter
  1921. * parent framepointer changed to hidden parameter
  1922. * tloadparentfpnode added
  1923. Revision 1.124 2003/09/28 13:40:13 peter
  1924. * a_call_ref removed
  1925. Revision 1.123 2003/09/25 21:26:24 peter
  1926. * remove obsolete tparalocation.sp_fixup
  1927. Revision 1.122 2003/09/23 20:37:16 peter
  1928. * fpc_check_object(_ext) has saveregisters and doesn't need
  1929. saving of registers
  1930. Revision 1.121 2003/09/10 08:31:47 marco
  1931. * Patch from Peter for paraloc
  1932. Revision 1.120 2003/09/09 20:59:27 daniel
  1933. * Adding register allocation order
  1934. Revision 1.119 2003/09/07 22:09:34 peter
  1935. * preparations for different default calling conventions
  1936. * various RA fixes
  1937. Revision 1.118 2003/09/03 15:55:00 peter
  1938. * NEWRA branch merged
  1939. Revision 1.117 2003/09/03 11:18:36 florian
  1940. * fixed arm concatcopy
  1941. + arm support in the common compiler sources added
  1942. * moved some generic cg code around
  1943. + tfputype added
  1944. * ...
  1945. Revision 1.116.2.4 2003/08/29 17:28:59 peter
  1946. * next batch of updates
  1947. Revision 1.116.2.3 2003/08/28 18:35:07 peter
  1948. * tregister changed to cardinal
  1949. Revision 1.116.2.2 2003/08/27 20:23:55 peter
  1950. * remove old ra code
  1951. Revision 1.116.2.1 2003/08/27 19:55:54 peter
  1952. * first tregister patch
  1953. Revision 1.116 2003/08/17 16:59:20 jonas
  1954. * fixed regvars so they work with newra (at least for ppc)
  1955. * fixed some volatile register bugs
  1956. + -dnotranslation option for -dnewra, which causes the registers not to
  1957. be translated from virtual to normal registers. Requires support in
  1958. the assembler writer as well, which is only implemented in aggas/
  1959. agppcgas currently
  1960. Revision 1.115 2003/07/23 11:01:14 jonas
  1961. * several rg.allocexplicitregistersint/rg.deallocexplicitregistersint
  1962. pairs round calls to helpers
  1963. Revision 1.114 2003/07/06 17:58:22 peter
  1964. * framepointer fixes for sparc
  1965. * parent framepointer code more generic
  1966. Revision 1.113 2003/07/02 22:18:04 peter
  1967. * paraloc splitted in callerparaloc,calleeparaloc
  1968. * sparc calling convention updates
  1969. Revision 1.112 2003/06/13 21:19:30 peter
  1970. * current_procdef removed, use current_procinfo.procdef instead
  1971. Revision 1.111 2003/06/12 21:11:10 peter
  1972. * ungetregisterfpu gets size parameter
  1973. Revision 1.110 2003/06/12 16:43:07 peter
  1974. * newra compiles for sparc
  1975. Revision 1.109 2003/06/07 18:57:04 jonas
  1976. + added freeintparaloc
  1977. * ppc get/freeintparaloc now check whether the parameter regs are
  1978. properly allocated/deallocated (and get an extra list para)
  1979. * ppc a_call_* now internalerrors if pi_do_call is not yet set
  1980. * fixed lot of missing pi_do_call's
  1981. Revision 1.108 2003/06/06 14:43:02 peter
  1982. * g_copyopenarrayvalue gets length reference
  1983. * don't copy open arrays for cdecl
  1984. Revision 1.107 2003/06/03 21:11:09 peter
  1985. * cg.a_load_* get a from and to size specifier
  1986. * makeregsize only accepts newregister
  1987. * i386 uses generic tcgnotnode,tcgunaryminus
  1988. Revision 1.106 2003/06/03 13:01:59 daniel
  1989. * Register allocator finished
  1990. Revision 1.105 2003/06/01 21:38:06 peter
  1991. * getregisterfpu size parameter added
  1992. * op_const_reg size parameter added
  1993. * sparc updates
  1994. Revision 1.104 2003/06/01 01:02:39 peter
  1995. * generic a_call_ref
  1996. Revision 1.103 2003/05/30 23:57:08 peter
  1997. * more sparc cleanup
  1998. * accumulator removed, splitted in function_return_reg (called) and
  1999. function_result_reg (caller)
  2000. Revision 1.102 2003/05/30 23:49:18 jonas
  2001. * a_load_loc_reg now has an extra size parameter for the destination
  2002. register (properly fixes what I worked around in revision 1.106 of
  2003. ncgutil.pas)
  2004. Revision 1.101 2003/05/30 21:40:00 jonas
  2005. * fixed bug in a_load_loc_ref (the source instead of dest size was passed
  2006. to a_load_reg_ref in case of a register)
  2007. Revision 1.100 2003/05/30 12:36:13 jonas
  2008. * use as little different registers on the ppc until newra is released,
  2009. since every used register must be saved
  2010. Revision 1.99 2003/05/23 14:27:35 peter
  2011. * remove some unit dependencies
  2012. * current_procinfo changes to store more info
  2013. Revision 1.98 2003/05/15 18:58:53 peter
  2014. * removed selfpointer_offset, vmtpointer_offset
  2015. * tvarsym.adjusted_address
  2016. * address in localsymtable is now in the real direction
  2017. * removed some obsolete globals
  2018. Revision 1.97 2003/05/13 19:14:41 peter
  2019. * failn removed
  2020. * inherited result code check moven to pexpr
  2021. Revision 1.96 2003/05/11 21:37:03 peter
  2022. * moved implicit exception frame from ncgutil to psub
  2023. * constructor/destructor helpers moved from cobj/ncgutil to psub
  2024. Revision 1.95 2003/05/09 17:47:02 peter
  2025. * self moved to hidden parameter
  2026. * removed hdisposen,hnewn,selfn
  2027. Revision 1.94 2003/05/01 12:23:46 jonas
  2028. * fix for op_reg_reg_reg in case the destination is the same as the first
  2029. source register
  2030. Revision 1.93 2003/04/29 07:28:52 michael
  2031. + Patch from peter to fix wrong pushing of ansistring function results in open array
  2032. Revision 1.92 2003/04/27 11:21:32 peter
  2033. * aktprocdef renamed to current_procinfo.procdef
  2034. * procinfo renamed to current_procinfo
  2035. * procinfo will now be stored in current_module so it can be
  2036. cleaned up properly
  2037. * gen_main_procsym changed to create_main_proc and release_main_proc
  2038. to also generate a tprocinfo structure
  2039. * fixed unit implicit initfinal
  2040. Revision 1.91 2003/04/27 07:29:50 peter
  2041. * current_procinfo.procdef cleanup, current_procdef is now always nil when parsing
  2042. a new procdef declaration
  2043. * aktprocsym removed
  2044. * lexlevel removed, use symtable.symtablelevel instead
  2045. * implicit init/final code uses the normal genentry/genexit
  2046. * funcret state checking updated for new funcret handling
  2047. Revision 1.90 2003/04/26 20:57:17 florian
  2048. * fixed para locations of fpc_class_new helper call
  2049. Revision 1.89 2003/04/26 17:21:08 florian
  2050. * fixed passing of fpu values by fpu register
  2051. Revision 1.88 2003/04/23 20:16:03 peter
  2052. + added currency support based on int64
  2053. + is_64bit for use in cg units instead of is_64bitint
  2054. * removed cgmessage from n386add, replace with internalerrors
  2055. Revision 1.87 2003/04/23 14:42:07 daniel
  2056. * Further register allocator work. Compiler now smaller with new
  2057. allocator than without.
  2058. * Somebody forgot to adjust ppu version number
  2059. Revision 1.86 2003/04/23 13:20:34 peter
  2060. * fix self passing to fpc_help_fail
  2061. Revision 1.85 2003/04/23 12:35:34 florian
  2062. * fixed several issues with powerpc
  2063. + applied a patch from Jonas for nested function calls (PowerPC only)
  2064. * ...
  2065. Revision 1.84 2003/04/22 14:33:38 peter
  2066. * removed some notes/hints
  2067. Revision 1.83 2003/04/22 13:47:08 peter
  2068. * fixed C style array of const
  2069. * fixed C array passing
  2070. * fixed left to right with high parameters
  2071. Revision 1.82 2003/04/22 10:09:34 daniel
  2072. + Implemented the actual register allocator
  2073. + Scratch registers unavailable when new register allocator used
  2074. + maybe_save/maybe_restore unavailable when new register allocator used
  2075. Revision 1.81 2003/04/06 21:11:23 olle
  2076. * changed newasmsymbol to newasmsymboldata for data symbols
  2077. Revision 1.80 2003/03/28 19:16:56 peter
  2078. * generic constructor working for i386
  2079. * remove fixed self register
  2080. * esi added as address register for i386
  2081. Revision 1.79 2003/03/22 18:07:18 jonas
  2082. + add used scratch registers to usedintbyproc for non-i386
  2083. Revision 1.78 2003/03/11 21:46:24 jonas
  2084. * lots of new regallocator fixes, both in generic and ppc-specific code
  2085. (ppc compiler still can't compile the linux system unit though)
  2086. Revision 1.77 2003/02/19 22:00:14 daniel
  2087. * Code generator converted to new register notation
  2088. - Horribily outdated todo.txt removed
  2089. Revision 1.76 2003/01/31 22:47:48 peter
  2090. * maybe_testself now really uses the passed register
  2091. Revision 1.75 2003/01/30 21:46:35 peter
  2092. * maybe_testvmt added
  2093. Revision 1.74 2003/01/17 12:45:40 daniel
  2094. * Fixed internalerror 200301081 problem
  2095. Revision 1.73 2003/01/13 14:54:34 daniel
  2096. * Further work to convert codegenerator register convention;
  2097. internalerror bug fixed.
  2098. Revision 1.72 2003/01/09 22:00:53 florian
  2099. * fixed some PowerPC issues
  2100. Revision 1.71 2003/01/09 20:41:10 florian
  2101. * fixed broken PowerPC compiler
  2102. Revision 1.70 2003/01/08 18:43:56 daniel
  2103. * Tregister changed into a record
  2104. Revision 1.69 2002/12/24 15:56:50 peter
  2105. * stackpointer_alloc added for adjusting ESP. Win32 needs
  2106. this for the pageprotection
  2107. Revision 1.68 2002/12/20 18:14:04 peter
  2108. * removed some runerror and writeln
  2109. Revision 1.67 2002/12/14 15:02:03 carl
  2110. * maxoperands -> max_operands (for portability in rautils.pas)
  2111. * fix some range-check errors with loadconst
  2112. + add ncgadd unit to m68k
  2113. * some bugfix of a_param_reg with LOC_CREFERENCE
  2114. Revision 1.66 2002/11/25 17:43:16 peter
  2115. * splitted defbase in defutil,symutil,defcmp
  2116. * merged isconvertable and is_equal into compare_defs(_ext)
  2117. * made operator search faster by walking the list only once
  2118. Revision 1.65 2002/11/17 16:27:31 carl
  2119. * document flags2reg
  2120. Revision 1.64 2002/11/16 17:06:28 peter
  2121. * return error 210 for failed self test
  2122. Revision 1.63 2002/11/15 01:58:46 peter
  2123. * merged changes from 1.0.7 up to 04-11
  2124. - -V option for generating bug report tracing
  2125. - more tracing for option parsing
  2126. - errors for cdecl and high()
  2127. - win32 import stabs
  2128. - win32 records<=8 are returned in eax:edx (turned off by default)
  2129. - heaptrc update
  2130. - more info for temp management in .s file with EXTDEBUG
  2131. Revision 1.62 2002/10/16 19:01:43 peter
  2132. + $IMPLICITEXCEPTIONS switch to turn on/off generation of the
  2133. implicit exception frames for procedures with initialized variables
  2134. and for constructors. The default is on for compatibility
  2135. Revision 1.61 2002/10/05 12:43:23 carl
  2136. * fixes for Delphi 6 compilation
  2137. (warning : Some features do not work under Delphi)
  2138. Revision 1.60 2002/10/02 18:20:52 peter
  2139. * Copy() is now internal syssym that calls compilerprocs
  2140. Revision 1.59 2002/09/17 18:54:02 jonas
  2141. * a_load_reg_reg() now has two size parameters: source and dest. This
  2142. allows some optimizations on architectures that don't encode the
  2143. register size in the register name.
  2144. Revision 1.58 2002/09/09 19:29:29 peter
  2145. * fixed dynarr_decr_ref call
  2146. Revision 1.57 2002/09/07 15:25:01 peter
  2147. * old logs removed and tabs fixed
  2148. Revision 1.56 2002/09/01 21:04:47 florian
  2149. * several powerpc related stuff fixed
  2150. Revision 1.55 2002/09/01 17:05:43 florian
  2151. + added abstract tcg.g_removevaluepara_openarray
  2152. Revision 1.54 2002/09/01 12:09:27 peter
  2153. + a_call_reg, a_call_loc added
  2154. * removed exprasmlist references
  2155. Revision 1.53 2002/08/19 18:17:48 carl
  2156. + optimize64_op_const_reg implemented (optimizes 64-bit constant opcodes)
  2157. * more fixes to m68k for 64-bit operations
  2158. Revision 1.52 2002/08/17 22:09:43 florian
  2159. * result type handling in tcgcal.pass_2 overhauled
  2160. * better tnode.dowrite
  2161. * some ppc stuff fixed
  2162. Revision 1.51 2002/08/17 09:23:33 florian
  2163. * first part of procinfo rewrite
  2164. Revision 1.50 2002/08/16 14:24:57 carl
  2165. * issameref() to test if two references are the same (then emit no opcodes)
  2166. + ret_in_reg to replace ret_in_acc
  2167. (fix some register allocation bugs at the same time)
  2168. + save_std_register now has an extra parameter which is the
  2169. usedinproc registers
  2170. Revision 1.49 2002/08/15 08:13:54 carl
  2171. - a_load_sym_ofs_reg removed
  2172. * loadvmt now calls loadaddr_ref_reg instead
  2173. Revision 1.48 2002/08/14 19:26:02 carl
  2174. + routine to optimize opcodes with constants
  2175. Revision 1.47 2002/08/11 14:32:26 peter
  2176. * renamed current_library to objectlibrary
  2177. Revision 1.46 2002/08/11 13:24:11 peter
  2178. * saving of asmsymbols in ppu supported
  2179. * asmsymbollist global is removed and moved into a new class
  2180. tasmlibrarydata that will hold the info of a .a file which
  2181. corresponds with a single module. Added librarydata to tmodule
  2182. to keep the library info stored for the module. In the future the
  2183. objectfiles will also be stored to the tasmlibrarydata class
  2184. * all getlabel/newasmsymbol and friends are moved to the new class
  2185. Revision 1.45 2002/08/10 17:15:20 jonas
  2186. * register parameters are now LOC_CREGISTER instead of LOC_REGISTER
  2187. Revision 1.44 2002/08/09 19:10:05 carl
  2188. - moved new_exception and free_exception to ncgutils
  2189. Revision 1.43 2002/08/05 18:27:48 carl
  2190. + more more more documentation
  2191. + first version include/exclude (can't test though, not enough scratch for i386 :()...
  2192. Revision 1.42 2002/08/04 19:08:21 carl
  2193. + added generic exception support (still does not work!)
  2194. + more documentation
  2195. Revision 1.41 2002/07/30 20:50:43 florian
  2196. * the code generator knows now if parameters are in registers
  2197. Revision 1.40 2002/07/29 21:16:02 florian
  2198. * some more ppc fixes
  2199. Revision 1.39 2002/07/28 15:56:00 jonas
  2200. + tcg64.a_op64_const_reg_reg() and tcg64.a_op64_reg_reg_reg() methods +
  2201. generic implementation
  2202. Revision 1.38 2002/07/27 19:53:51 jonas
  2203. + generic implementation of tcg.g_flags2ref()
  2204. * tcg.flags2xxx() now also needs a size parameter
  2205. Revision 1.37 2002/07/20 11:57:53 florian
  2206. * types.pas renamed to defbase.pas because D6 contains a types
  2207. unit so this would conflicts if D6 programms are compiled
  2208. + Willamette/SSE2 instructions to assembler added
  2209. }