cgcpu.pas 96 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. This unit implements the code generator for the PowerPC
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. cgbase,cgobj,
  23. aasmbase,aasmcpu,aasmtai,
  24. cpubase,cpuinfo,node,cg64f32,cginfo;
  25. type
  26. tcgppc = class(tcg)
  27. { passing parameters, per default the parameter is pushed }
  28. { nr gives the number of the parameter (enumerated from }
  29. { left to right), this allows to move the parameter to }
  30. { register, if the cpu supports register calling }
  31. { conventions }
  32. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aword;const locpara : tparalocation);override;
  33. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);override;
  34. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);override;
  35. procedure a_call_name(list : taasmoutput;const s : string);override;
  36. procedure a_call_reg(list : taasmoutput;reg: tregister); override;
  37. procedure a_call_ref(list : taasmoutput;const ref : treference);override;
  38. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister); override;
  39. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
  40. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg;
  41. size: tcgsize; a: aword; src, dst: tregister); override;
  42. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  43. size: tcgsize; src1, src2, dst: tregister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : taasmoutput; size: tcgsize; a : aword;reg : tregister);override;
  46. procedure a_load_reg_ref(list : taasmoutput; size: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : taasmoutput;size : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : taasmoutput;fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); override;
  58. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); override;
  59. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  60. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;elesize:integer);override;
  61. procedure g_stackframe_entry(list : taasmoutput;localsize : longint);override;
  62. procedure g_return_from_proc(list : taasmoutput;parasize : aword); override;
  63. procedure g_restore_frame_pointer(list : taasmoutput);override;
  64. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);override;
  65. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);override;
  66. procedure g_overflowcheck(list: taasmoutput; const p: tnode); override;
  67. { find out whether a is of the form 11..00..11b or 00..11...00. If }
  68. { that's the case, we can use rlwinm to do an AND operation }
  69. function get_rlwi_const(a: aword; var l1, l2: longint): boolean;
  70. procedure g_save_standard_registers(list : taasmoutput; usedinproc : Tsupregset);override;
  71. procedure g_restore_standard_registers(list : taasmoutput; usedinproc : Tsupregset);override;
  72. procedure g_save_all_registers(list : taasmoutput);override;
  73. procedure g_restore_all_registers(list : taasmoutput;accused,acchiused:boolean);override;
  74. procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
  75. private
  76. procedure g_stackframe_entry_sysv(list : taasmoutput;localsize : longint);
  77. procedure g_return_from_proc_sysv(list : taasmoutput;parasize : aword);
  78. procedure g_stackframe_entry_aix(list : taasmoutput;localsize : longint);
  79. procedure g_return_from_proc_aix(list : taasmoutput;parasize : aword);
  80. procedure g_stackframe_entry_mac(list : taasmoutput;localsize : longint);
  81. procedure g_return_from_proc_mac(list : taasmoutput;parasize : aword);
  82. { Make sure ref is a valid reference for the PowerPC and sets the }
  83. { base to the value of the index if (base = R_NO). }
  84. { Returns true if the reference contained a base, index and an }
  85. { offset or symbol, in which case the base will have been changed }
  86. { to a tempreg (which has to be freed by the caller) containing }
  87. { the sum of part of the original reference }
  88. function fixref(list: taasmoutput; var ref: treference): boolean;
  89. { returns whether a reference can be used immediately in a powerpc }
  90. { instruction }
  91. function issimpleref(const ref: treference): boolean;
  92. { contains the common code of a_load_reg_ref and a_load_ref_reg }
  93. procedure a_load_store(list:taasmoutput;op: tasmop;reg:tregister;
  94. ref: treference);
  95. { creates the correct branch instruction for a given combination }
  96. { of asmcondflags and destination addressing mode }
  97. procedure a_jmp(list: taasmoutput; op: tasmop;
  98. c: tasmcondflag; crval: longint; l: tasmlabel);
  99. end;
  100. tcg64fppc = class(tcg64f32)
  101. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);override;
  102. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;value : qword;reg : tregister64);override;
  103. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : qword;regsrc,regdst : tregister64);override;
  104. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);override;
  105. end;
  106. const
  107. TOpCG2AsmOpConstLo: Array[topcg] of TAsmOp = (A_NONE,A_ADDI,A_ANDI_,A_DIVWU,
  108. A_DIVW,A_MULLW, A_MULLW, A_NONE,A_NONE,A_ORI,
  109. A_SRAWI,A_SLWI,A_SRWI,A_SUBI,A_XORI);
  110. TOpCG2AsmOpConstHi: Array[topcg] of TAsmOp = (A_NONE,A_ADDIS,A_ANDIS_,
  111. A_DIVWU,A_DIVW, A_MULLW,A_MULLW,A_NONE,A_NONE,
  112. A_ORIS,A_NONE, A_NONE,A_NONE,A_SUBIS,A_XORIS);
  113. TOpCmp2AsmCond: Array[topcmp] of TAsmCondFlag = (C_NONE,C_EQ,C_GT,
  114. C_LT,C_GE,C_LE,C_NE,C_LE,C_LT,C_GE,C_GT);
  115. implementation
  116. uses
  117. globtype,globals,verbose,systems,cutils,symconst,symdef,symsym,rgobj,tgobj,cpupi;
  118. { parameter passing... Still needs extra support from the processor }
  119. { independent code generator }
  120. procedure tcgppc.a_param_const(list : taasmoutput;size : tcgsize;a : aword;const locpara : tparalocation);
  121. var
  122. ref: treference;
  123. begin
  124. case locpara.loc of
  125. LOC_REGISTER,LOC_CREGISTER:
  126. a_load_const_reg(list,size,a,locpara.register);
  127. LOC_REFERENCE:
  128. begin
  129. reference_reset(ref);
  130. ref.base:=locpara.reference.index;
  131. ref.offset:=locpara.reference.offset;
  132. a_load_const_ref(list,size,a,ref);
  133. end;
  134. else
  135. internalerror(2002081101);
  136. end;
  137. if locpara.sp_fixup<>0 then
  138. internalerror(2002081102);
  139. end;
  140. procedure tcgppc.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);
  141. var
  142. ref: treference;
  143. tmpreg: tregister;
  144. begin
  145. case locpara.loc of
  146. LOC_REGISTER,LOC_CREGISTER:
  147. a_load_ref_reg(list,size,r,locpara.register);
  148. LOC_REFERENCE:
  149. begin
  150. reference_reset(ref);
  151. ref.base:=locpara.reference.index;
  152. ref.offset:=locpara.reference.offset;
  153. tmpreg := get_scratch_reg_int(list,size);
  154. a_load_ref_reg(list,size,r,tmpreg);
  155. a_load_reg_ref(list,size,tmpreg,ref);
  156. free_scratch_reg(list,tmpreg);
  157. end;
  158. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  159. case size of
  160. OS_32:
  161. a_loadfpu_ref_reg(list,OS_F32,r,locpara.register);
  162. OS_64:
  163. a_loadfpu_ref_reg(list,OS_F64,r,locpara.register);
  164. else
  165. internalerror(2002072801);
  166. end;
  167. else
  168. internalerror(2002081103);
  169. end;
  170. if locpara.sp_fixup<>0 then
  171. internalerror(2002081104);
  172. end;
  173. procedure tcgppc.a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);
  174. var
  175. ref: treference;
  176. tmpreg: tregister;
  177. begin
  178. case locpara.loc of
  179. LOC_REGISTER,LOC_CREGISTER:
  180. a_loadaddr_ref_reg(list,r,locpara.register);
  181. LOC_REFERENCE:
  182. begin
  183. reference_reset(ref);
  184. ref.base := locpara.reference.index;
  185. ref.offset := locpara.reference.offset;
  186. tmpreg := get_scratch_reg_address(list);
  187. a_loadaddr_ref_reg(list,r,tmpreg);
  188. a_load_reg_ref(list,OS_ADDR,tmpreg,ref);
  189. free_scratch_reg(list,tmpreg);
  190. end;
  191. else
  192. internalerror(2002080701);
  193. end;
  194. end;
  195. { calling a procedure by name }
  196. procedure tcgppc.a_call_name(list : taasmoutput;const s : string);
  197. var
  198. href : treference;
  199. begin
  200. { MacOS: The linker on MacOS (PPCLink) inserts a call to glue code,
  201. if it is a cross-TOC call. If so, it also replaces the NOP
  202. with some restore code.}
  203. list.concat(taicpu.op_sym(A_BL,objectlibrary.newasmsymbol(s)));
  204. if target_info.system=system_powerpc_macos then
  205. list.concat(taicpu.op_none(A_NOP));
  206. include(current_procinfo.flags,pi_do_call);
  207. end;
  208. { calling a procedure by address }
  209. procedure tcgppc.a_call_reg(list : taasmoutput;reg: tregister);
  210. var
  211. tmpreg : tregister;
  212. tmpref : treference;
  213. begin
  214. if target_info.system=system_powerpc_macos then
  215. begin
  216. {Generate instruction to load the procedure address from
  217. the transition vector.}
  218. //TODO: Support cross-TOC calls.
  219. tmpreg := get_scratch_reg_int(list,OS_INT);
  220. reference_reset(tmpref);
  221. tmpref.offset := 0;
  222. //tmpref.symaddr := refs_full;
  223. tmpref.base:= reg;
  224. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  225. list.concat(taicpu.op_reg(A_MTCTR,tmpreg));
  226. free_scratch_reg(list,tmpreg);
  227. end
  228. else
  229. list.concat(taicpu.op_reg(A_MTCTR,reg));
  230. list.concat(taicpu.op_none(A_BCTRL));
  231. //if target_info.system=system_powerpc_macos then
  232. // //NOP is not needed here.
  233. // list.concat(taicpu.op_none(A_NOP));
  234. include(current_procinfo.flags,pi_do_call);
  235. //list.concat(tai_comment.create(strpnew('***** a_call_reg')));
  236. end;
  237. { calling a procedure by address }
  238. procedure tcgppc.a_call_ref(list : taasmoutput;const ref : treference);
  239. var
  240. tmpreg : tregister;
  241. tmpref : treference;
  242. begin
  243. tmpreg := get_scratch_reg_int(list,OS_ADDR);
  244. a_load_ref_reg(list,OS_ADDR,ref,tmpreg);
  245. if target_info.system=system_powerpc_macos then
  246. begin
  247. {Generate instruction to load the procedure address from
  248. the transition vector.}
  249. //TODO: Support cross-TOC calls.
  250. reference_reset(tmpref);
  251. tmpref.offset := 0;
  252. //tmpref.symaddr := refs_full;
  253. tmpref.base:= tmpreg;
  254. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  255. end;
  256. list.concat(taicpu.op_reg(A_MTCTR,tmpreg));
  257. free_scratch_reg(list,tmpreg);
  258. list.concat(taicpu.op_none(A_BCTRL));
  259. //if target_info.system=system_powerpc_macos then
  260. // //NOP is not needed here.
  261. // list.concat(taicpu.op_none(A_NOP));
  262. include(current_procinfo.flags,pi_do_call);
  263. //list.concat(tai_comment.create(strpnew('***** a_call_ref')));
  264. end;
  265. {********************** load instructions ********************}
  266. procedure tcgppc.a_load_const_reg(list : taasmoutput; size: TCGSize; a : aword; reg : TRegister);
  267. begin
  268. if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
  269. internalerror(2002090902);
  270. if (longint(a) >= low(smallint)) and
  271. (longint(a) <= high(smallint)) then
  272. list.concat(taicpu.op_reg_const(A_LI,reg,smallint(a)))
  273. else if ((a and $ffff) <> 0) then
  274. begin
  275. list.concat(taicpu.op_reg_const(A_LI,reg,smallint(a and $ffff)));
  276. if ((a shr 16) <> 0) or
  277. (smallint(a and $ffff) < 0) then
  278. list.concat(taicpu.op_reg_reg_const(A_ADDIS,reg,reg,
  279. smallint((a shr 16)+ord(smallint(a and $ffff) < 0))))
  280. end
  281. else
  282. list.concat(taicpu.op_reg_const(A_LIS,reg,smallint(a shr 16)));
  283. end;
  284. procedure tcgppc.a_load_reg_ref(list : taasmoutput; size: TCGSize; reg : tregister;const ref : treference);
  285. const
  286. StoreInstr: Array[OS_8..OS_32,boolean, boolean] of TAsmOp =
  287. { indexed? updating?}
  288. (((A_STB,A_STBU),(A_STBX,A_STBUX)),
  289. ((A_STH,A_STHU),(A_STHX,A_STHUX)),
  290. ((A_STW,A_STWU),(A_STWX,A_STWUX)));
  291. var
  292. op: TAsmOp;
  293. ref2: TReference;
  294. freereg: boolean;
  295. begin
  296. ref2 := ref;
  297. freereg := fixref(list,ref2);
  298. if size in [OS_S8..OS_S16] then
  299. { storing is the same for signed and unsigned values }
  300. size := tcgsize(ord(size)-(ord(OS_S8)-ord(OS_8)));
  301. { 64 bit stuff should be handled separately }
  302. if size in [OS_64,OS_S64] then
  303. internalerror(200109236);
  304. op := storeinstr[tcgsize2unsigned[size],ref2.index.number<>NR_NO,false];
  305. a_load_store(list,op,reg,ref2);
  306. if freereg then
  307. cg.free_scratch_reg(list,ref2.base);
  308. End;
  309. procedure tcgppc.a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref: treference;reg : tregister);
  310. const
  311. LoadInstr: Array[OS_8..OS_S32,boolean, boolean] of TAsmOp =
  312. { indexed? updating?}
  313. (((A_LBZ,A_LBZU),(A_LBZX,A_LBZUX)),
  314. ((A_LHZ,A_LHZU),(A_LHZX,A_LHZUX)),
  315. ((A_LWZ,A_LWZU),(A_LWZX,A_LWZUX)),
  316. { 64bit stuff should be handled separately }
  317. ((A_NONE,A_NONE),(A_NONE,A_NONE)),
  318. { there's no load-byte-with-sign-extend :( }
  319. ((A_LBZ,A_LBZU),(A_LBZX,A_LBZUX)),
  320. ((A_LHA,A_LHAU),(A_LHAX,A_LHAUX)),
  321. ((A_LWZ,A_LWZU),(A_LWZX,A_LWZUX)));
  322. var
  323. op: tasmop;
  324. tmpreg: tregister;
  325. ref2, tmpref: treference;
  326. freereg: boolean;
  327. begin
  328. if not(size in [OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32]) then
  329. internalerror(2002090902);
  330. ref2 := ref;
  331. freereg := fixref(list,ref2);
  332. op := loadinstr[size,ref2.index.number<>NR_NO,false];
  333. a_load_store(list,op,reg,ref2);
  334. if freereg then
  335. free_scratch_reg(list,ref2.base);
  336. { sign extend shortint if necessary, since there is no }
  337. { load instruction that does that automatically (JM) }
  338. if size = OS_S8 then
  339. list.concat(taicpu.op_reg_reg(A_EXTSB,reg,reg));
  340. end;
  341. procedure tcgppc.a_load_reg_reg(list : taasmoutput;fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  342. begin
  343. if (reg1.enum<>R_INTREGISTER) or (reg1.number = 0) then
  344. internalerror(200303101);
  345. if (reg2.enum<>R_INTREGISTER) or (reg2.number = 0) then
  346. internalerror(200303102);
  347. if (reg1.number<>reg2.number) or
  348. (tcgsize2size[tosize] < tcgsize2size[fromsize]) or
  349. ((tcgsize2size[tosize] = tcgsize2size[fromsize]) and
  350. (tosize <> fromsize) and
  351. not(fromsize in [OS_32,OS_S32])) then
  352. begin
  353. case tosize of
  354. OS_8:
  355. list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,
  356. reg2,reg1,0,31-8+1,31));
  357. OS_S8:
  358. list.concat(taicpu.op_reg_reg(A_EXTSB,reg2,reg1));
  359. OS_16:
  360. list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,
  361. reg2,reg1,0,31-16+1,31));
  362. OS_S16:
  363. list.concat(taicpu.op_reg_reg(A_EXTSH,reg2,reg1));
  364. OS_32,OS_S32:
  365. list.concat(taicpu.op_reg_reg(A_MR,reg2,reg1));
  366. else internalerror(2002090901);
  367. end;
  368. end;
  369. end;
  370. procedure tcgppc.a_loadfpu_reg_reg(list: taasmoutput; reg1, reg2: tregister);
  371. begin
  372. list.concat(taicpu.op_reg_reg(A_FMR,reg2,reg1));
  373. end;
  374. procedure tcgppc.a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister);
  375. const
  376. FpuLoadInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  377. { indexed? updating?}
  378. (((A_LFS,A_LFSU),(A_LFSX,A_LFSUX)),
  379. ((A_LFD,A_LFDU),(A_LFDX,A_LFDUX)));
  380. var
  381. op: tasmop;
  382. ref2: treference;
  383. freereg: boolean;
  384. begin
  385. { several functions call this procedure with OS_32 or OS_64 }
  386. { so this makes life easier (FK) }
  387. case size of
  388. OS_32,OS_F32:
  389. size:=OS_F32;
  390. OS_64,OS_F64,OS_C64:
  391. size:=OS_F64;
  392. else
  393. internalerror(200201121);
  394. end;
  395. ref2 := ref;
  396. freereg := fixref(list,ref2);
  397. op := fpuloadinstr[size,ref2.index.number <> NR_NO,false];
  398. a_load_store(list,op,reg,ref2);
  399. if freereg then
  400. cg.free_scratch_reg(list,ref2.base);
  401. end;
  402. procedure tcgppc.a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference);
  403. const
  404. FpuStoreInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  405. { indexed? updating?}
  406. (((A_STFS,A_STFSU),(A_STFSX,A_STFSUX)),
  407. ((A_STFD,A_STFDU),(A_STFDX,A_STFDUX)));
  408. var
  409. op: tasmop;
  410. ref2: treference;
  411. freereg: boolean;
  412. begin
  413. if not(size in [OS_F32,OS_F64]) then
  414. internalerror(200201122);
  415. ref2 := ref;
  416. freereg := fixref(list,ref2);
  417. op := fpustoreinstr[size,ref2.index.number <> NR_NO,false];
  418. a_load_store(list,op,reg,ref2);
  419. if freereg then
  420. cg.free_scratch_reg(list,ref2.base);
  421. end;
  422. procedure tcgppc.a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister);
  423. var
  424. scratch_register: TRegister;
  425. begin
  426. a_op_const_reg_reg(list,op,OS_32,a,reg,reg);
  427. end;
  428. procedure tcgppc.a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; src, dst: TRegister);
  429. begin
  430. a_op_reg_reg_reg(list,op,OS_32,src,dst,dst);
  431. end;
  432. procedure tcgppc.a_op_const_reg_reg(list: taasmoutput; op: TOpCg;
  433. size: tcgsize; a: aword; src, dst: tregister);
  434. var
  435. l1,l2: longint;
  436. oplo, ophi: tasmop;
  437. scratchreg: tregister;
  438. useReg, gotrlwi: boolean;
  439. procedure do_lo_hi;
  440. begin
  441. list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
  442. list.concat(taicpu.op_reg_reg_const(ophi,dst,dst,word(a shr 16)));
  443. end;
  444. begin
  445. if src.enum<>R_INTREGISTER then
  446. internalerror(200303102);
  447. if op = OP_SUB then
  448. begin
  449. {$ifopt q+}
  450. {$q-}
  451. {$define overflowon}
  452. {$endif}
  453. a_op_const_reg_reg(list,OP_ADD,size,aword(-longint(a)),src,dst);
  454. {$ifdef overflowon}
  455. {$q+}
  456. {$undef overflowon}
  457. {$endif}
  458. exit;
  459. end;
  460. ophi := TOpCG2AsmOpConstHi[op];
  461. oplo := TOpCG2AsmOpConstLo[op];
  462. gotrlwi := get_rlwi_const(a,l1,l2);
  463. if (op in [OP_AND,OP_OR,OP_XOR]) then
  464. begin
  465. if (a = 0) then
  466. begin
  467. if op = OP_AND then
  468. list.concat(taicpu.op_reg_const(A_LI,dst,0))
  469. else
  470. a_load_reg_reg(list,size,size,src,dst);
  471. exit;
  472. end
  473. else if (a = high(aword)) then
  474. begin
  475. case op of
  476. OP_OR:
  477. list.concat(taicpu.op_reg_const(A_LI,dst,-1));
  478. OP_XOR:
  479. list.concat(taicpu.op_reg_reg(A_NOT,dst,src));
  480. OP_AND:
  481. a_load_reg_reg(list,size,size,src,dst);
  482. end;
  483. exit;
  484. end
  485. else if (a <= high(word)) and
  486. ((op <> OP_AND) or
  487. not gotrlwi) then
  488. begin
  489. list.concat(taicpu.op_reg_reg_const(oplo,dst,src,word(a)));
  490. exit;
  491. end;
  492. { all basic constant instructions also have a shifted form that }
  493. { works only on the highest 16bits, so if lo(a) is 0, we can }
  494. { use that one }
  495. if (word(a) = 0) and
  496. (not(op = OP_AND) or
  497. not gotrlwi) then
  498. begin
  499. list.concat(taicpu.op_reg_reg_const(ophi,dst,src,word(a shr 16)));
  500. exit;
  501. end;
  502. end
  503. else if (op = OP_ADD) then
  504. if a = 0 then
  505. exit
  506. else if (longint(a) >= low(smallint)) and
  507. (longint(a) <= high(smallint)) then
  508. begin
  509. list.concat(taicpu.op_reg_reg_const(A_ADDI,dst,src,smallint(a)));
  510. exit;
  511. end;
  512. { otherwise, the instructions we can generate depend on the }
  513. { operation }
  514. useReg := false;
  515. case op of
  516. OP_DIV,OP_IDIV:
  517. if (a = 0) then
  518. internalerror(200208103)
  519. else if (a = 1) then
  520. begin
  521. a_load_reg_reg(list,OS_INT,OS_INT,src,dst);
  522. exit
  523. end
  524. else if ispowerof2(a,l1) then
  525. begin
  526. case op of
  527. OP_DIV:
  528. list.concat(taicpu.op_reg_reg_const(A_SRWI,dst,src,l1));
  529. OP_IDIV:
  530. begin
  531. list.concat(taicpu.op_reg_reg_const(A_SRAWI,dst,src,l1));
  532. list.concat(taicpu.op_reg_reg(A_ADDZE,dst,dst));
  533. end;
  534. end;
  535. exit;
  536. end
  537. else
  538. usereg := true;
  539. OP_IMUL, OP_MUL:
  540. if (a = 0) then
  541. begin
  542. list.concat(taicpu.op_reg_const(A_LI,dst,0));
  543. exit
  544. end
  545. else if (a = 1) then
  546. begin
  547. a_load_reg_reg(list,OS_INT,OS_INT,src,dst);
  548. exit
  549. end
  550. else if ispowerof2(a,l1) then
  551. list.concat(taicpu.op_reg_reg_const(A_SLWI,dst,src,l1))
  552. else if (longint(a) >= low(smallint)) and
  553. (longint(a) <= high(smallint)) then
  554. list.concat(taicpu.op_reg_reg_const(A_MULLI,dst,src,smallint(a)))
  555. else
  556. usereg := true;
  557. OP_ADD:
  558. begin
  559. list.concat(taicpu.op_reg_reg_const(oplo,dst,src,smallint(a)));
  560. list.concat(taicpu.op_reg_reg_const(ophi,dst,dst,
  561. smallint((a shr 16) + ord(smallint(a) < 0))));
  562. end;
  563. OP_OR:
  564. { try to use rlwimi }
  565. if gotrlwi and
  566. (src.number = dst.number) then
  567. begin
  568. scratchreg := get_scratch_reg_int(list,OS_INT);
  569. list.concat(taicpu.op_reg_const(A_LI,scratchreg,-1));
  570. list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,dst,
  571. scratchreg,0,l1,l2));
  572. free_scratch_reg(list,scratchreg);
  573. end
  574. else
  575. do_lo_hi;
  576. OP_AND:
  577. { try to use rlwinm }
  578. if gotrlwi then
  579. list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,dst,
  580. src,0,l1,l2))
  581. else
  582. useReg := true;
  583. OP_XOR:
  584. do_lo_hi;
  585. OP_SHL,OP_SHR,OP_SAR:
  586. begin
  587. if (a and 31) <> 0 Then
  588. list.concat(taicpu.op_reg_reg_const(
  589. TOpCG2AsmOpConstLo[Op],dst,src,a and 31))
  590. else
  591. a_load_reg_reg(list,size,size,src,dst);
  592. if (a shr 5) <> 0 then
  593. internalError(68991);
  594. end
  595. else
  596. internalerror(200109091);
  597. end;
  598. { if all else failed, load the constant in a register and then }
  599. { perform the operation }
  600. if useReg then
  601. begin
  602. scratchreg := get_scratch_reg_int(list,OS_INT);
  603. a_load_const_reg(list,OS_32,a,scratchreg);
  604. a_op_reg_reg_reg(list,op,OS_32,scratchreg,src,dst);
  605. free_scratch_reg(list,scratchreg);
  606. end;
  607. end;
  608. procedure tcgppc.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  609. size: tcgsize; src1, src2, dst: tregister);
  610. const
  611. op_reg_reg_opcg2asmop: array[TOpCG] of tasmop =
  612. (A_NONE,A_ADD,A_AND,A_DIVWU,A_DIVW,A_MULLW,A_MULLW,A_NEG,A_NOT,A_OR,
  613. A_SRAW,A_SLW,A_SRW,A_SUB,A_XOR);
  614. begin
  615. case op of
  616. OP_NEG,OP_NOT:
  617. list.concat(taicpu.op_reg_reg(op_reg_reg_opcg2asmop[op],dst,dst));
  618. else
  619. list.concat(taicpu.op_reg_reg_reg(op_reg_reg_opcg2asmop[op],dst,src2,src1));
  620. end;
  621. end;
  622. {*************** compare instructructions ****************}
  623. procedure tcgppc.a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
  624. l : tasmlabel);
  625. var
  626. p: taicpu;
  627. scratch_register: TRegister;
  628. signed: boolean;
  629. r:Tregister;
  630. begin
  631. signed := cmp_op in [OC_GT,OC_LT,OC_GTE,OC_LTE];
  632. { in the following case, we generate more efficient code when }
  633. { signed is true }
  634. if (cmp_op in [OC_EQ,OC_NE]) and
  635. (a > $ffff) then
  636. signed := true;
  637. r.enum:=R_CR0;
  638. if signed then
  639. if (longint(a) >= low(smallint)) and (longint(a) <= high(smallint)) Then
  640. list.concat(taicpu.op_reg_reg_const(A_CMPWI,r,reg,longint(a)))
  641. else
  642. begin
  643. scratch_register := get_scratch_reg_int(list,OS_INT);
  644. a_load_const_reg(list,OS_32,a,scratch_register);
  645. list.concat(taicpu.op_reg_reg_reg(A_CMPW,r,reg,scratch_register));
  646. free_scratch_reg(list,scratch_register);
  647. end
  648. else
  649. if (a <= $ffff) then
  650. list.concat(taicpu.op_reg_reg_const(A_CMPLWI,r,reg,a))
  651. else
  652. begin
  653. scratch_register := get_scratch_reg_int(list,OS_32);
  654. a_load_const_reg(list,OS_32,a,scratch_register);
  655. list.concat(taicpu.op_reg_reg_reg(A_CMPLW,r,reg,scratch_register));
  656. free_scratch_reg(list,scratch_register);
  657. end;
  658. a_jmp(list,A_BC,TOpCmp2AsmCond[cmp_op],0,l);
  659. end;
  660. procedure tcgppc.a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;
  661. reg1,reg2 : tregister;l : tasmlabel);
  662. var
  663. p: taicpu;
  664. op: tasmop;
  665. r:Tregister;
  666. begin
  667. if cmp_op in [OC_GT,OC_LT,OC_GTE,OC_LTE] then
  668. op := A_CMPW
  669. else op := A_CMPLW;
  670. r.enum:=R_CR0;
  671. list.concat(taicpu.op_reg_reg_reg(op,r,reg2,reg1));
  672. a_jmp(list,A_BC,TOpCmp2AsmCond[cmp_op],0,l);
  673. end;
  674. procedure tcgppc.g_save_standard_registers(list : taasmoutput; usedinproc : Tsupregset);
  675. begin
  676. {$warning FIX ME}
  677. end;
  678. procedure tcgppc.g_restore_standard_registers(list : taasmoutput; usedinproc : Tsupregset);
  679. begin
  680. {$warning FIX ME}
  681. end;
  682. procedure tcgppc.g_save_all_registers(list : taasmoutput);
  683. begin
  684. {$warning FIX ME}
  685. end;
  686. procedure tcgppc.g_restore_all_registers(list : taasmoutput;accused,acchiused:boolean);
  687. begin
  688. {$warning FIX ME}
  689. end;
  690. procedure tcgppc.a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
  691. begin
  692. a_jmp(list,A_BC,TOpCmp2AsmCond[cond],0,l);
  693. end;
  694. procedure tcgppc.a_jmp_always(list : taasmoutput;l: tasmlabel);
  695. begin
  696. a_jmp(list,A_B,C_None,0,l);
  697. end;
  698. procedure tcgppc.a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel);
  699. var
  700. c: tasmcond;
  701. r:Tregister;
  702. begin
  703. c := flags_to_cond(f);
  704. r.enum:=R_CR0;
  705. a_jmp(list,A_BC,c.cond,ord(c.cr)-ord(r.enum),l);
  706. end;
  707. procedure tcgppc.g_flags2reg(list: taasmoutput; size: TCgSize; const f: TResFlags; reg: TRegister);
  708. var
  709. testbit: byte;
  710. bitvalue: boolean;
  711. begin
  712. { get the bit to extract from the conditional register + its }
  713. { requested value (0 or 1) }
  714. testbit := ((ord(f.cr)-ord(R_CR0)) * 4);
  715. case f.flag of
  716. F_EQ,F_NE:
  717. begin
  718. inc(testbit,2);
  719. bitvalue := f.flag = F_EQ;
  720. end;
  721. F_LT,F_GE:
  722. begin
  723. bitvalue := f.flag = F_LT;
  724. end;
  725. F_GT,F_LE:
  726. begin
  727. inc(testbit);
  728. bitvalue := f.flag = F_GT;
  729. end;
  730. else
  731. internalerror(200112261);
  732. end;
  733. { load the conditional register in the destination reg }
  734. list.concat(taicpu.op_reg(A_MFCR,reg));
  735. { we will move the bit that has to be tested to bit 0 by rotating }
  736. { left }
  737. testbit := (testbit + 1) and 31;
  738. { extract bit }
  739. list.concat(taicpu.op_reg_reg_const_const_const(
  740. A_RLWINM,reg,reg,testbit,31,31));
  741. { if we need the inverse, xor with 1 }
  742. if not bitvalue then
  743. list.concat(taicpu.op_reg_reg_const(A_XORI,reg,reg,1));
  744. end;
  745. (*
  746. procedure tcgppc.g_cond2reg(list: taasmoutput; const f: TAsmCond; reg: TRegister);
  747. var
  748. testbit: byte;
  749. bitvalue: boolean;
  750. begin
  751. { get the bit to extract from the conditional register + its }
  752. { requested value (0 or 1) }
  753. case f.simple of
  754. false:
  755. begin
  756. { we don't generate this in the compiler }
  757. internalerror(200109062);
  758. end;
  759. true:
  760. case f.cond of
  761. C_None:
  762. internalerror(200109063);
  763. C_LT..C_NU:
  764. begin
  765. testbit := (ord(f.cr) - ord(R_CR0))*4;
  766. inc(testbit,AsmCondFlag2BI[f.cond]);
  767. bitvalue := AsmCondFlagTF[f.cond];
  768. end;
  769. C_T,C_F,C_DNZT,C_DNZF,C_DZT,C_DZF:
  770. begin
  771. testbit := f.crbit
  772. bitvalue := AsmCondFlagTF[f.cond];
  773. end;
  774. else
  775. internalerror(200109064);
  776. end;
  777. end;
  778. { load the conditional register in the destination reg }
  779. list.concat(taicpu.op_reg_reg(A_MFCR,reg));
  780. { we will move the bit that has to be tested to bit 31 -> rotate }
  781. { left by bitpos+1 (remember, this is big-endian!) }
  782. if bitpos <> 31 then
  783. inc(bitpos)
  784. else
  785. bitpos := 0;
  786. { extract bit }
  787. list.concat(taicpu.op_reg_reg_const_const_const(
  788. A_RLWINM,reg,reg,bitpos,31,31));
  789. { if we need the inverse, xor with 1 }
  790. if not bitvalue then
  791. list.concat(taicpu.op_reg_reg_const(A_XORI,reg,reg,1));
  792. end;
  793. *)
  794. { *********** entry/exit code and address loading ************ }
  795. procedure tcgppc.g_stackframe_entry(list : taasmoutput;localsize : longint);
  796. begin
  797. case target_info.abi of
  798. abi_powerpc_macos:
  799. g_stackframe_entry_mac(list,localsize);
  800. abi_powerpc_sysv:
  801. g_stackframe_entry_sysv(list,localsize);
  802. abi_powerpc_aix:
  803. g_stackframe_entry_aix(list,localsize);
  804. else
  805. internalerror(2204001);
  806. end;
  807. end;
  808. procedure tcgppc.g_return_from_proc(list : taasmoutput;parasize : aword);
  809. begin
  810. case target_info.abi of
  811. abi_powerpc_macos:
  812. g_return_from_proc_mac(list,parasize);
  813. abi_powerpc_sysv:
  814. g_return_from_proc_sysv(list,parasize);
  815. abi_powerpc_aix:
  816. g_return_from_proc_aix(list,parasize);
  817. else
  818. internalerror(2204001);
  819. end;
  820. end;
  821. procedure tcgppc.g_stackframe_entry_aix(list : taasmoutput;localsize : longint);
  822. begin
  823. g_stackframe_entry_sysv(list,localsize);
  824. end;
  825. procedure tcgppc.g_stackframe_entry_sysv(list : taasmoutput;localsize : longint);
  826. { generated the entry code of a procedure/function. Note: localsize is the }
  827. { sum of the size necessary for local variables and the maximum possible }
  828. { combined size of ALL the parameters of a procedure called by the current }
  829. { one }
  830. var regcounter,firstregfpu,firstreggpr: TRegister;
  831. href,href2 : treference;
  832. usesfpr,usesgpr,gotgot : boolean;
  833. parastart : aword;
  834. offset : aword;
  835. r,r2,rsp:Tregister;
  836. regcounter2: Tsuperregister;
  837. hp: tparaitem;
  838. begin
  839. { we do our own localsize calculation }
  840. localsize:=0;
  841. { CR and LR only have to be saved in case they are modified by the current }
  842. { procedure, but currently this isn't checked, so save them always }
  843. { following is the entry code as described in "Altivec Programming }
  844. { Interface Manual", bar the saving of AltiVec registers }
  845. rsp.enum:=R_INTREGISTER;
  846. rsp.number:=NR_STACK_POINTER_REG;
  847. a_reg_alloc(list,rsp);
  848. r.enum:=R_INTREGISTER;
  849. r.number:=NR_R0;
  850. a_reg_alloc(list,r);
  851. if current_procdef.parast.symtablelevel>1 then
  852. begin
  853. r.enum:=R_INTREGISTER;
  854. r.number:=NR_R11;
  855. a_reg_alloc(list,r);
  856. end;
  857. { allocate registers containing reg parameters }
  858. r.enum := R_INTREGISTER;
  859. for regcounter2 := RS_R3 to RS_R10 do
  860. begin
  861. r.number:=regcounter2 shl 8;
  862. a_reg_alloc(list,r);
  863. end;
  864. usesfpr:=false;
  865. if not (po_assembler in current_procdef.procoptions) then
  866. for regcounter.enum:=R_F14 to R_F31 do
  867. if regcounter.enum in rg.usedbyproc then
  868. begin
  869. usesfpr:= true;
  870. firstregfpu:=regcounter;
  871. break;
  872. end;
  873. usesgpr:=false;
  874. if not (po_assembler in current_procdef.procoptions) then
  875. for regcounter2:=firstsaveintreg to RS_R31 do
  876. begin
  877. if regcounter2 in rg.usedintbyproc then
  878. begin
  879. usesgpr:=true;
  880. firstreggpr.enum := R_INTREGISTER;
  881. firstreggpr.number := regcounter2 shl 8;
  882. break;
  883. end;
  884. end;
  885. { save link register? }
  886. if not (po_assembler in current_procdef.procoptions) then
  887. if (pi_do_call in current_procinfo.flags) then
  888. begin
  889. { save return address... }
  890. r.enum:=R_INTREGISTER;
  891. r.number:=NR_R0;
  892. list.concat(taicpu.op_reg(A_MFLR,r));
  893. { ... in caller's rframe }
  894. reference_reset_base(href,rsp,4);
  895. list.concat(taicpu.op_reg_ref(A_STW,r,href));
  896. a_reg_dealloc(list,r);
  897. end;
  898. { !!! always allocate space for all registers for now !!! }
  899. if not (po_assembler in current_procdef.procoptions) then
  900. { if usesfpr or usesgpr then }
  901. begin
  902. r.enum:=R_INTREGISTER;
  903. r.number:=NR_R12;
  904. a_reg_alloc(list,r);
  905. { save end of fpr save area }
  906. list.concat(taicpu.op_reg_reg(A_MR,r,rsp));
  907. end;
  908. { calculate the size of the locals }
  909. {
  910. if usesgpr then
  911. inc(localsize,((NR_R31-firstreggpr.number) shr 8+1)*4);
  912. if usesfpr then
  913. inc(localsize,(ord(R_F31)-ord(firstregfpu.enum)+1)*8);
  914. }
  915. { !!! always allocate space for all registers for now !!! }
  916. if not (po_assembler in current_procdef.procoptions) then
  917. inc(localsize,(31-13+1)*4+(31-14+1)*8);
  918. { align to 16 bytes }
  919. localsize:=align(localsize,16);
  920. inc(localsize,tg.lasttemp);
  921. localsize:=align(localsize,16);
  922. tppcprocinfo(current_procinfo).localsize:=localsize;
  923. if (localsize <> 0) then
  924. begin
  925. r.enum:=R_INTREGISTER;
  926. r.number:=NR_STACK_POINTER_REG;
  927. if (localsize <= high(smallint)) then
  928. begin
  929. reference_reset_base(href,r,-localsize);
  930. a_load_store(list,A_STWU,r,href);
  931. end
  932. else
  933. begin
  934. reference_reset_base(href,r,0);
  935. href.index := get_scratch_reg_int(list,OS_32);
  936. a_load_const_reg(list,OS_S32,-localsize,href.index);
  937. a_load_store(list,A_STWUX,r,href);
  938. free_scratch_reg(list,href.index);
  939. end;
  940. end;
  941. { no GOT pointer loaded yet }
  942. gotgot:=false;
  943. if usesfpr then
  944. begin
  945. { save floating-point registers
  946. if (cs_create_pic in aktmoduleswitches) and not(usesgpr) then
  947. begin
  948. a_call_name(objectlibrary.newasmsymbol('_savefpr_'+tostr(ord(firstregfpu)-ord(R_F14)+14)+'_g');
  949. gotgot:=true;
  950. end
  951. else
  952. a_call_name(objectlibrary.newasmsymbol('_savefpr_'+tostr(ord(firstregfpu)-ord(R_F14)+14));
  953. }
  954. for regcounter.enum:=firstregfpu.enum to R_F31 do
  955. if regcounter.enum in rg.usedbyproc then
  956. begin
  957. { reference_reset_base(href,R_1,-localsize);
  958. a_load_store(list,A_STWU,R_1,href);
  959. }
  960. end;
  961. { compute end of gpr save area }
  962. r.enum:=R_INTREGISTER;
  963. r.number:=NR_R12;
  964. list.concat(taicpu.op_reg_reg_const(A_ADDI,r,r,-(ord(R_F31)-ord(firstregfpu.enum)+1)*8));
  965. end;
  966. { save gprs and fetch GOT pointer }
  967. if usesgpr then
  968. begin
  969. {
  970. if cs_create_pic in aktmoduleswitches then
  971. begin
  972. a_call_name(objectlibrary.newasmsymbol('_savegpr_'+tostr(ord(firstreggpr)-ord(R_14)+14)+'_g');
  973. gotgot:=true;
  974. end
  975. else
  976. a_call_name(objectlibrary.newasmsymbol('_savegpr_'+tostr(ord(firstreggpr)-ord(R_14)+14))
  977. }
  978. r.enum:=R_INTREGISTER;
  979. r.number:=NR_R12;
  980. reference_reset_base(href,r,-((NR_R31-firstreggpr.number) shr 8+1)*4);
  981. list.concat(taicpu.op_reg_ref(A_STMW,firstreggpr,href));
  982. end;
  983. if assigned(current_procdef.parast) then
  984. begin
  985. if not (po_assembler in current_procdef.procoptions) then
  986. begin
  987. { copy memory parameters to local parast }
  988. r.enum:=R_INTREGISTER;
  989. r.number:=NR_R12;
  990. hp:=tparaitem(current_procdef.para.first);
  991. while assigned(hp) do
  992. begin
  993. if (hp.paraloc.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  994. begin
  995. reference_reset_base(href,current_procinfo.framepointer,tvarsym(hp.parasym).adjusted_address);
  996. reference_reset_base(href2,r,hp.paraloc.reference.offset);
  997. cg.a_load_ref_ref(list,hp.paraloc.size,href2,href);
  998. end;
  999. hp := tparaitem(hp.next);
  1000. end;
  1001. end;
  1002. end;
  1003. r.enum:=R_INTREGISTER;
  1004. r.number:=NR_R12;
  1005. if usesfpr or usesgpr then
  1006. a_reg_dealloc(list,r);
  1007. { PIC code support, }
  1008. if cs_create_pic in aktmoduleswitches then
  1009. begin
  1010. { if we didn't get the GOT pointer till now, we've to calculate it now }
  1011. if not(gotgot) then
  1012. begin
  1013. {!!!!!!!!!!!!!}
  1014. end;
  1015. r.enum:=R_INTREGISTER;
  1016. r.number:=NR_R31;
  1017. r2.enum:=R_LR;
  1018. a_reg_alloc(list,r);
  1019. { place GOT ptr in r31 }
  1020. list.concat(taicpu.op_reg_reg(A_MFSPR,r,r2));
  1021. end;
  1022. { save the CR if necessary ( !!! always done currently ) }
  1023. { still need to find out where this has to be done for SystemV
  1024. a_reg_alloc(list,R_0);
  1025. list.concat(taicpu.op_reg_reg(A_MFSPR,R_0,R_CR);
  1026. list.concat(taicpu.op_reg_ref(A_STW,scratch_register,
  1027. new_reference(STACK_POINTER_REG,LA_CR)));
  1028. a_reg_dealloc(list,R_0); }
  1029. { now comes the AltiVec context save, not yet implemented !!! }
  1030. { if we're in a nested procedure, we've to save R11 }
  1031. if current_procdef.parast.symtablelevel>2 then
  1032. begin
  1033. r.enum:=R_INTREGISTER;
  1034. r.number:=NR_R11;
  1035. reference_reset_base(href,rsp,current_procinfo.framepointer_offset);
  1036. list.concat(taicpu.op_reg_ref(A_STW,r,href));
  1037. end;
  1038. end;
  1039. procedure tcgppc.g_return_from_proc_aix(list : taasmoutput;parasize : aword);
  1040. begin
  1041. g_return_from_proc_sysv(list,parasize);
  1042. end;
  1043. procedure tcgppc.g_return_from_proc_sysv(list : taasmoutput;parasize : aword);
  1044. var
  1045. regcounter,firstregfpu,firstreggpr: TRegister;
  1046. href : treference;
  1047. usesfpr,usesgpr,genret : boolean;
  1048. r,r2:Tregister;
  1049. regcounter2:Tsuperregister;
  1050. begin
  1051. { release parameter registers }
  1052. r.enum := R_INTREGISTER;
  1053. for regcounter2 := RS_R3 to RS_R10 do
  1054. begin
  1055. r.number:=regcounter2 shl 8;
  1056. a_reg_dealloc(list,r);
  1057. end;
  1058. { AltiVec context restore, not yet implemented !!! }
  1059. usesfpr:=false;
  1060. if not (po_assembler in current_procdef.procoptions) then
  1061. for regcounter.enum:=R_F14 to R_F31 do
  1062. if regcounter.enum in rg.usedbyproc then
  1063. begin
  1064. usesfpr:=true;
  1065. firstregfpu:=regcounter;
  1066. break;
  1067. end;
  1068. usesgpr:=false;
  1069. if not (po_assembler in current_procdef.procoptions) then
  1070. for regcounter2:=firstsaveintreg to RS_R31 do
  1071. begin
  1072. if regcounter2 in rg.usedintbyproc then
  1073. begin
  1074. usesgpr:=true;
  1075. firstreggpr.enum:=R_INTREGISTER;
  1076. firstreggpr.number:=regcounter2 shl 8;
  1077. break;
  1078. end;
  1079. end;
  1080. { no return (blr) generated yet }
  1081. genret:=true;
  1082. if usesgpr then
  1083. begin
  1084. { address of gpr save area to r11 }
  1085. r.enum:=R_INTREGISTER;
  1086. r.number:=NR_STACK_POINTER_REG;
  1087. r2.enum:=R_INTREGISTER;
  1088. r2.number:=NR_R12;
  1089. if usesfpr then
  1090. a_op_const_reg_reg(list,OP_ADD,OS_ADDR,tppcprocinfo(current_procinfo).localsize-(ord(R_F31)-ord(firstregfpu.enum)+1)*8,r,r2)
  1091. else
  1092. a_op_const_reg_reg(list,OP_ADD,OS_ADDR,tppcprocinfo(current_procinfo).localsize,r,r2);
  1093. { restore gprs }
  1094. { at least for now we use LMW }
  1095. {
  1096. a_call_name(objectlibrary.newasmsymbol('_restgpr_14');
  1097. }
  1098. reference_reset_base(href,r2,-((NR_R31-ord(firstreggpr.number)) shr 8+1)*4);
  1099. list.concat(taicpu.op_reg_ref(A_LMW,firstreggpr,href));
  1100. end;
  1101. { restore fprs and return }
  1102. if usesfpr then
  1103. begin
  1104. { address of fpr save area to r11 }
  1105. r.enum:=R_INTREGISTER;
  1106. r.number:=NR_R12;
  1107. list.concat(taicpu.op_reg_reg_const(A_ADDI,r,r,(ord(R_F31)-ord(firstregfpu.enum)+1)*8));
  1108. {
  1109. if (pi_do_call in current_procinfo.flags) then
  1110. a_call_name(objectlibrary.newasmsymbol('_restfpr_'+tostr(ord(firstregfpu)-ord(R_F14)+14)+
  1111. '_x')
  1112. else
  1113. { leaf node => lr haven't to be restored }
  1114. a_call_name('_restfpr_'+tostr(ord(firstregfpu.enum)-ord(R_F14)+14)+
  1115. '_l');
  1116. genret:=false;
  1117. }
  1118. end;
  1119. { if we didn't generate the return code, we've to do it now }
  1120. if genret then
  1121. begin
  1122. { adjust r1 }
  1123. r.enum:=R_INTREGISTER;
  1124. r.number:=NR_R1;
  1125. a_op_const_reg(list,OP_ADD,tppcprocinfo(current_procinfo).localsize,r);
  1126. { load link register? }
  1127. if not (po_assembler in current_procdef.procoptions) then
  1128. if (pi_do_call in current_procinfo.flags) then
  1129. begin
  1130. r.enum:=R_INTREGISTER;
  1131. r.number:=NR_STACK_POINTER_REG;
  1132. reference_reset_base(href,r,4);
  1133. r.enum:=R_INTREGISTER;
  1134. r.number:=NR_R0;
  1135. list.concat(taicpu.op_reg_ref(A_LWZ,r,href));
  1136. list.concat(taicpu.op_reg(A_MTLR,r));
  1137. end;
  1138. list.concat(taicpu.op_none(A_BLR));
  1139. end;
  1140. end;
  1141. function save_regs(list : taasmoutput):longint;
  1142. {Generates code which saves used non-volatile registers in
  1143. the save area right below the address the stackpointer point to.
  1144. Returns the actual used save area size.}
  1145. var regcounter,firstregfpu,firstreggpr: TRegister;
  1146. usesfpr,usesgpr: boolean;
  1147. href : treference;
  1148. offset: integer;
  1149. r,r2:Tregister;
  1150. regcounter2: Tsuperregister;
  1151. begin
  1152. usesfpr:=false;
  1153. if not (po_assembler in current_procdef.procoptions) then
  1154. for regcounter.enum:=R_F14 to R_F31 do
  1155. if regcounter.enum in rg.usedbyproc then
  1156. begin
  1157. usesfpr:=true;
  1158. firstregfpu:=regcounter;
  1159. break;
  1160. end;
  1161. usesgpr:=false;
  1162. if not (po_assembler in current_procdef.procoptions) then
  1163. for regcounter2:=firstsaveintreg to RS_R31 do
  1164. begin
  1165. if regcounter2 in rg.usedintbyproc then
  1166. begin
  1167. usesgpr:=true;
  1168. firstreggpr.enum:=R_INTREGISTER;
  1169. firstreggpr.number:=regcounter2 shl 8;
  1170. break;
  1171. end;
  1172. end;
  1173. offset:= 0;
  1174. { save floating-point registers }
  1175. if usesfpr then
  1176. for regcounter.enum := firstregfpu.enum to R_F31 do
  1177. begin
  1178. offset:= offset - 8;
  1179. r.enum:=R_INTREGISTER;
  1180. r.number:=NR_STACK_POINTER_REG;
  1181. reference_reset_base(href, r, offset);
  1182. list.concat(taicpu.op_reg_ref(A_STFD, regcounter, href));
  1183. end;
  1184. (* Optimiztion in the future: a_call_name(list,'_savefXX'); *)
  1185. { save gprs in gpr save area }
  1186. if usesgpr then
  1187. if firstreggpr.enum < R_30 then
  1188. begin
  1189. offset:= offset - 4 * (ord(R_31) - ord(firstreggpr.enum) + 1);
  1190. r.enum:=R_INTREGISTER;
  1191. r.number:=NR_STACK_POINTER_REG;
  1192. reference_reset_base(href,r,offset);
  1193. list.concat(taicpu.op_reg_ref(A_STMW,firstreggpr,href));
  1194. {STMW stores multiple registers}
  1195. end
  1196. else
  1197. begin
  1198. r.enum:=R_INTREGISTER;
  1199. r.number:=NR_STACK_POINTER_REG;
  1200. r2 := firstreggpr;
  1201. convert_register_to_enum(firstreggpr);
  1202. for regcounter.enum := firstreggpr.enum to R_31 do
  1203. begin
  1204. offset:= offset - 4;
  1205. reference_reset_base(href, r, offset);
  1206. list.concat(taicpu.op_reg_ref(A_STW, r2, href));
  1207. inc(r2.number,NR_R1-NR_R0);
  1208. end;
  1209. end;
  1210. { now comes the AltiVec context save, not yet implemented !!! }
  1211. save_regs:= -offset;
  1212. end;
  1213. procedure restore_regs(list : taasmoutput);
  1214. {Generates code which restores used non-volatile registers from
  1215. the save area right below the address the stackpointer point to.}
  1216. var regcounter,firstregfpu,firstreggpr: TRegister;
  1217. usesfpr,usesgpr: boolean;
  1218. href : treference;
  1219. offset: integer;
  1220. r,r2:Tregister;
  1221. regcounter2: Tsuperregister;
  1222. begin
  1223. usesfpr:=false;
  1224. if not (po_assembler in current_procdef.procoptions) then
  1225. for regcounter.enum:=R_F14 to R_F31 do
  1226. if regcounter.enum in rg.usedbyproc then
  1227. begin
  1228. usesfpr:=true;
  1229. firstregfpu:=regcounter;
  1230. break;
  1231. end;
  1232. usesgpr:=false;
  1233. if not (po_assembler in current_procdef.procoptions) then
  1234. for regcounter2:=RS_R13 to RS_R31 do
  1235. begin
  1236. if regcounter2 in rg.usedintbyproc then
  1237. begin
  1238. usesgpr:=true;
  1239. firstreggpr.enum:=R_INTREGISTER;
  1240. firstreggpr.number:=regcounter2 shl 8;
  1241. break;
  1242. end;
  1243. end;
  1244. offset:= 0;
  1245. { restore fp registers }
  1246. if usesfpr then
  1247. for regcounter.enum := firstregfpu.enum to R_F31 do
  1248. begin
  1249. offset:= offset - 8;
  1250. r.enum:=R_INTREGISTER;
  1251. r.number:=NR_STACK_POINTER_REG;
  1252. reference_reset_base(href, r, offset);
  1253. list.concat(taicpu.op_reg_ref(A_LFD, regcounter, href));
  1254. end;
  1255. (* Optimiztion in the future: a_call_name(list,'_restfXX'); *)
  1256. { restore gprs }
  1257. if usesgpr then
  1258. if firstreggpr.enum < R_30 then
  1259. begin
  1260. offset:= offset - 4 * (ord(R_31) - ord(firstreggpr.enum) + 1);
  1261. r.enum:=R_INTREGISTER;
  1262. r.number:=NR_STACK_POINTER_REG;
  1263. reference_reset_base(href,r,offset); //-220
  1264. list.concat(taicpu.op_reg_ref(A_LMW,firstreggpr,href));
  1265. {LMW loads multiple registers}
  1266. end
  1267. else
  1268. begin
  1269. r.enum:=R_INTREGISTER;
  1270. r.number:=NR_STACK_POINTER_REG;
  1271. r2 := firstreggpr;
  1272. convert_register_to_enum(firstreggpr);
  1273. for regcounter.enum := firstreggpr.enum to R_31 do
  1274. begin
  1275. offset:= offset - 4;
  1276. reference_reset_base(href, r, offset);
  1277. list.concat(taicpu.op_reg_ref(A_LWZ, r2, href));
  1278. inc(r2.number,NR_R1-NR_R0);
  1279. end;
  1280. end;
  1281. { now comes the AltiVec context restore, not yet implemented !!! }
  1282. end;
  1283. procedure tcgppc.g_stackframe_entry_mac(list : taasmoutput;localsize : longint);
  1284. { generated the entry code of a procedure/function. Note: localsize is the }
  1285. { sum of the size necessary for local variables and the maximum possible }
  1286. { combined size of ALL the parameters of a procedure called by the current }
  1287. { one }
  1288. const
  1289. macosLinkageAreaSize = 24;
  1290. var regcounter: TRegister;
  1291. href : treference;
  1292. registerSaveAreaSize : longint;
  1293. r,r2,rsp:Tregister;
  1294. regcounter2: Tsuperregister;
  1295. begin
  1296. if (localsize mod 8) <> 0 then internalerror(58991);
  1297. { CR and LR only have to be saved in case they are modified by the current }
  1298. { procedure, but currently this isn't checked, so save them always }
  1299. { following is the entry code as described in "Altivec Programming }
  1300. { Interface Manual", bar the saving of AltiVec registers }
  1301. r.enum:=R_INTREGISTER;
  1302. r.number:=NR_R0;
  1303. rsp.enum:=R_INTREGISTER;
  1304. rsp.number:=NR_STACK_POINTER_REG;
  1305. a_reg_alloc(list,rsp);
  1306. a_reg_alloc(list,r);
  1307. { allocate registers containing reg parameters }
  1308. r.enum := R_INTREGISTER;
  1309. for regcounter2 := RS_R3 to RS_R10 do
  1310. begin
  1311. r.number:=regcounter2 shl 8;
  1312. a_reg_alloc(list,r);
  1313. end;
  1314. {TODO: Allocate fp and altivec parameter registers also}
  1315. { save return address in callers frame}
  1316. r2.enum:=R_LR;
  1317. list.concat(taicpu.op_reg_reg(A_MFSPR,r,r2));
  1318. { ... in caller's frame }
  1319. reference_reset_base(href,rsp,8);
  1320. list.concat(taicpu.op_reg_ref(A_STW,r,href));
  1321. a_reg_dealloc(list,r);
  1322. { save non-volatile registers in callers frame}
  1323. registerSaveAreaSize:= save_regs(list);
  1324. { save the CR if necessary in callers frame ( !!! always done currently ) }
  1325. a_reg_alloc(list,r);
  1326. r2.enum:=R_CR;
  1327. list.concat(taicpu.op_reg_reg(A_MFSPR,r,r2));
  1328. reference_reset_base(href,rsp,LA_CR);
  1329. list.concat(taicpu.op_reg_ref(A_STW,r,href));
  1330. a_reg_dealloc(list,r);
  1331. (*
  1332. { save pointer to incoming arguments }
  1333. list.concat(taicpu.op_reg_reg_const(A_ORI,R_31,STACK_POINTER_REG,0));
  1334. *)
  1335. (*
  1336. a_reg_alloc(list,R_12);
  1337. { 0 or 8 based on SP alignment }
  1338. list.concat(taicpu.op_reg_reg_const_const_const(A_RLWINM,
  1339. R_12,STACK_POINTER_REG,0,28,28));
  1340. { add in stack length }
  1341. list.concat(taicpu.op_reg_reg_const(A_SUBFIC,R_12,R_12,
  1342. -localsize));
  1343. { establish new alignment }
  1344. list.concat(taicpu.op_reg_reg_reg(A_STWUX,STACK_POINTER_REG,STACK_POINTER_REG,R_12));
  1345. a_reg_dealloc(list,R_12);
  1346. *)
  1347. { allocate stack frame }
  1348. localsize:= align(localsize + macosLinkageAreaSize + registerSaveAreaSize, 16);
  1349. inc(localsize,tg.lasttemp);
  1350. localsize:=align(localsize,16);
  1351. tppcprocinfo(current_procinfo).localsize:=localsize;
  1352. if (localsize <> 0) then
  1353. begin
  1354. r.enum:=R_INTREGISTER;
  1355. r.number:=NR_STACK_POINTER_REG;
  1356. if (localsize <= high(smallint)) then
  1357. begin
  1358. reference_reset_base(href,r,-localsize);
  1359. a_load_store(list,A_STWU,r,href);
  1360. end
  1361. else
  1362. begin
  1363. reference_reset_base(href,r,0);
  1364. href.index := get_scratch_reg_int(list,OS_32);
  1365. a_load_const_reg(list,OS_S32,-localsize,href.index);
  1366. a_load_store(list,A_STWUX,r,href);
  1367. free_scratch_reg(list,href.index);
  1368. end;
  1369. end;
  1370. end;
  1371. procedure tcgppc.g_return_from_proc_mac(list : taasmoutput;parasize : aword);
  1372. var
  1373. regcounter: TRegister;
  1374. href : treference;
  1375. r,r2,rsp:Tregister;
  1376. regcounter2: Tsuperregister;
  1377. begin
  1378. { release parameter registers }
  1379. r.enum := R_INTREGISTER;
  1380. for regcounter2 := RS_R3 to RS_R10 do
  1381. begin
  1382. r.number := regcounter2 shl 8;
  1383. a_reg_dealloc(list,r);
  1384. end;
  1385. {TODO: Release fp and altivec parameter registers also}
  1386. r.enum:=R_INTREGISTER;
  1387. r.number:=NR_R0;
  1388. rsp.enum:=R_INTREGISTER;
  1389. rsp.number:=NR_STACK_POINTER_REG;
  1390. a_reg_alloc(list,r);
  1391. { restore stack pointer }
  1392. reference_reset_base(href,rsp,LA_SP);
  1393. list.concat(taicpu.op_reg_ref(A_LWZ,rsp,href));
  1394. (*
  1395. list.concat(taicpu.op_reg_reg_const(A_ORI,rsp,R_31,0));
  1396. *)
  1397. { restore the CR if necessary from callers frame
  1398. ( !!! always done currently ) }
  1399. reference_reset_base(href,rsp,LA_CR);
  1400. r.enum:=R_INTREGISTER;
  1401. r.number:=NR_R0;
  1402. list.concat(taicpu.op_reg_ref(A_LWZ,r,href));
  1403. r2.enum:=R_CR;
  1404. list.concat(taicpu.op_reg_reg(A_MTSPR,r,r2));
  1405. a_reg_dealloc(list,r);
  1406. (*
  1407. { restore return address from callers frame }
  1408. reference_reset_base(href,STACK_POINTER_REG,8);
  1409. list.concat(taicpu.op_reg_ref(A_LWZ,R_0,href));
  1410. *)
  1411. { restore non-volatile registers from callers frame }
  1412. restore_regs(list);
  1413. (*
  1414. { return to caller }
  1415. list.concat(taicpu.op_reg_reg(A_MTSPR,R_0,R_LR));
  1416. list.concat(taicpu.op_none(A_BLR));
  1417. *)
  1418. { restore return address from callers frame }
  1419. r.enum:=R_INTREGISTER;
  1420. r.number:=NR_R0;
  1421. r2.enum:=R_LR;
  1422. reference_reset_base(href,rsp,8);
  1423. list.concat(taicpu.op_reg_ref(A_LWZ,r,href));
  1424. { return to caller }
  1425. list.concat(taicpu.op_reg_reg(A_MTSPR,r,r2));
  1426. list.concat(taicpu.op_none(A_BLR));
  1427. end;
  1428. procedure tcgppc.g_restore_frame_pointer(list : taasmoutput);
  1429. begin
  1430. { no frame pointer on the PowerPC (maybe there is one in the SystemV ABI?)}
  1431. end;
  1432. procedure tcgppc.a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);
  1433. var
  1434. ref2, tmpref: treference;
  1435. freereg: boolean;
  1436. r2,tmpreg:Tregister;
  1437. begin
  1438. ref2 := ref;
  1439. freereg := fixref(list,ref2);
  1440. if assigned(ref2.symbol) then
  1441. begin
  1442. if target_info.system = system_powerpc_macos then
  1443. begin
  1444. if ref2.base.number <> NR_NO then
  1445. internalerror(2002103102); //TODO: Implement this if needed
  1446. if macos_direct_globals then
  1447. begin
  1448. reference_reset(tmpref);
  1449. tmpref.offset := ref2.offset;
  1450. tmpref.symbol := ref2.symbol;
  1451. tmpref.symaddr := refs_full;
  1452. tmpref.base.number := NR_NO;
  1453. r2.enum:=R_INTREGISTER;
  1454. r2.number:=NR_RTOC;
  1455. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,r2,tmpref));
  1456. end
  1457. else
  1458. begin
  1459. reference_reset(tmpref);
  1460. tmpref.symbol := ref2.symbol;
  1461. tmpref.offset := 0; //ref2.offset;
  1462. tmpref.symaddr := refs_full;
  1463. tmpref.base.enum := R_INTREGISTER;
  1464. tmpref.base.number := NR_RTOC;
  1465. if ref2.offset = 0 then
  1466. list.concat(taicpu.op_reg_ref(A_LWZ,r,tmpref))
  1467. else
  1468. begin
  1469. list.concat(taicpu.op_reg_ref(A_LWZ,r,tmpref));
  1470. reference_reset(tmpref);
  1471. tmpref.offset := ref2.offset;
  1472. tmpref.symaddr := refs_full;
  1473. tmpref.base:= r;
  1474. list.concat(taicpu.op_reg_ref(A_LA,r,tmpref));
  1475. (*
  1476. tmpreg := get_scratch_reg_address(list);
  1477. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  1478. reference_reset(tmpref);
  1479. tmpref.offset := ref2.offset;
  1480. tmpref.symaddr := refs_full;
  1481. tmpref.base:= tmpreg;
  1482. list.concat(taicpu.op_reg_ref(A_LA,r,tmpref));
  1483. free_scratch_reg(list,tmpreg);
  1484. *)
  1485. end;
  1486. end;
  1487. //list.concat(tai_comment.create(strpnew('*** a_loadaddr_ref_reg')));
  1488. end
  1489. else
  1490. begin
  1491. { add the symbol's value to the base of the reference, and if the }
  1492. { reference doesn't have a base, create one }
  1493. reference_reset(tmpref);
  1494. tmpref.offset := ref2.offset;
  1495. tmpref.symbol := ref2.symbol;
  1496. tmpref.symaddr := refs_ha;
  1497. if ref2.base .number<> NR_NO then
  1498. begin
  1499. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
  1500. ref2.base,tmpref));
  1501. if freereg then
  1502. begin
  1503. cg.free_scratch_reg(list,ref2.base);
  1504. freereg := false;
  1505. end;
  1506. end
  1507. else
  1508. list.concat(taicpu.op_reg_ref(A_LIS,r,tmpref));
  1509. tmpref.base.number := NR_NO;
  1510. tmpref.symaddr := refs_l;
  1511. { can be folded with one of the next instructions by the }
  1512. { optimizer probably }
  1513. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,r,tmpref));
  1514. end
  1515. end
  1516. else if ref2.offset <> 0 Then
  1517. if ref2.base.number <> NR_NO then
  1518. a_op_const_reg_reg(list,OP_ADD,OS_32,aword(ref2.offset),ref2.base,r)
  1519. { FixRef makes sure that "(ref.index <> R_NO) and (ref.offset <> 0)" never}
  1520. { occurs, so now only ref.offset has to be loaded }
  1521. else
  1522. a_load_const_reg(list,OS_32,ref2.offset,r)
  1523. else if ref.index.number <> NR_NO Then
  1524. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,ref2.base,ref2.index))
  1525. else if (ref2.base.number <> NR_NO) and
  1526. (r.number <> ref2.base.number) then
  1527. list.concat(taicpu.op_reg_reg(A_MR,r,ref2.base));
  1528. if freereg then
  1529. cg.free_scratch_reg(list,ref2.base);
  1530. end;
  1531. { ************* concatcopy ************ }
  1532. procedure tcgppc.g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);
  1533. var
  1534. countreg: TRegister;
  1535. src, dst: TReference;
  1536. lab: tasmlabel;
  1537. count, count2: aword;
  1538. orgsrc, orgdst: boolean;
  1539. r:Tregister;
  1540. begin
  1541. {$ifdef extdebug}
  1542. if len > high(longint) then
  1543. internalerror(2002072704);
  1544. {$endif extdebug}
  1545. { make sure short loads are handled as optimally as possible }
  1546. if not loadref then
  1547. if (len <= 8) and
  1548. (byte(len) in [1,2,4,8]) then
  1549. begin
  1550. if len < 8 then
  1551. begin
  1552. a_load_ref_ref(list,int_cgsize(len),source,dest);
  1553. if delsource then
  1554. reference_release(list,source);
  1555. end
  1556. else
  1557. begin
  1558. r.enum:=R_F0;
  1559. a_reg_alloc(list,r);
  1560. a_loadfpu_ref_reg(list,OS_F64,source,r);
  1561. if delsource then
  1562. reference_release(list,source);
  1563. a_loadfpu_reg_ref(list,OS_F64,r,dest);
  1564. a_reg_dealloc(list,r);
  1565. end;
  1566. exit;
  1567. end;
  1568. count := len div 8;
  1569. reference_reset(src);
  1570. reference_reset(dst);
  1571. { load the address of source into src.base }
  1572. if loadref then
  1573. begin
  1574. src.base := get_scratch_reg_address(list);
  1575. a_load_ref_reg(list,OS_32,source,src.base);
  1576. orgsrc := false;
  1577. end
  1578. else if (count > 4) or
  1579. not issimpleref(source) or
  1580. ((source.index.number <> NR_NO) and
  1581. ((source.offset + longint(len)) > high(smallint))) then
  1582. begin
  1583. src.base := get_scratch_reg_address(list);
  1584. a_loadaddr_ref_reg(list,source,src.base);
  1585. orgsrc := false;
  1586. end
  1587. else
  1588. begin
  1589. src := source;
  1590. orgsrc := true;
  1591. end;
  1592. if not orgsrc and delsource then
  1593. reference_release(list,source);
  1594. { load the address of dest into dst.base }
  1595. if (count > 4) or
  1596. not issimpleref(dest) or
  1597. ((dest.index.number <> NR_NO) and
  1598. ((dest.offset + longint(len)) > high(smallint))) then
  1599. begin
  1600. dst.base := get_scratch_reg_address(list);
  1601. a_loadaddr_ref_reg(list,dest,dst.base);
  1602. orgdst := false;
  1603. end
  1604. else
  1605. begin
  1606. dst := dest;
  1607. orgdst := true;
  1608. end;
  1609. if count > 4 then
  1610. { generate a loop }
  1611. begin
  1612. { the offsets are zero after the a_loadaddress_ref_reg and just }
  1613. { have to be set to 8. I put an Inc there so debugging may be }
  1614. { easier (should offset be different from zero here, it will be }
  1615. { easy to notice in the generated assembler }
  1616. inc(dst.offset,8);
  1617. inc(src.offset,8);
  1618. list.concat(taicpu.op_reg_reg_const(A_SUBI,src.base,src.base,8));
  1619. list.concat(taicpu.op_reg_reg_const(A_SUBI,dst.base,dst.base,8));
  1620. countreg := get_scratch_reg_int(list,OS_INT);
  1621. a_load_const_reg(list,OS_32,count,countreg);
  1622. { explicitely allocate R_0 since it can be used safely here }
  1623. { (for holding date that's being copied) }
  1624. r.enum:=R_F0;
  1625. a_reg_alloc(list,r);
  1626. objectlibrary.getlabel(lab);
  1627. a_label(list, lab);
  1628. list.concat(taicpu.op_reg_reg_const(A_SUBIC_,countreg,countreg,1));
  1629. r.enum:=R_F0;
  1630. list.concat(taicpu.op_reg_ref(A_LFDU,r,src));
  1631. list.concat(taicpu.op_reg_ref(A_STFDU,r,dst));
  1632. a_jmp(list,A_BC,C_NE,0,lab);
  1633. free_scratch_reg(list,countreg);
  1634. a_reg_dealloc(list,r);
  1635. len := len mod 8;
  1636. end;
  1637. count := len div 8;
  1638. if count > 0 then
  1639. { unrolled loop }
  1640. begin
  1641. r.enum:=R_F0;
  1642. a_reg_alloc(list,r);
  1643. for count2 := 1 to count do
  1644. begin
  1645. a_loadfpu_ref_reg(list,OS_F64,src,r);
  1646. a_loadfpu_reg_ref(list,OS_F64,r,dst);
  1647. inc(src.offset,8);
  1648. inc(dst.offset,8);
  1649. end;
  1650. a_reg_dealloc(list,r);
  1651. len := len mod 8;
  1652. end;
  1653. if (len and 4) <> 0 then
  1654. begin
  1655. r.enum:=R_INTREGISTER;
  1656. r.number:=NR_R0;
  1657. a_reg_alloc(list,r);
  1658. a_load_ref_reg(list,OS_32,src,r);
  1659. a_load_reg_ref(list,OS_32,r,dst);
  1660. inc(src.offset,4);
  1661. inc(dst.offset,4);
  1662. a_reg_dealloc(list,r);
  1663. end;
  1664. { copy the leftovers }
  1665. if (len and 2) <> 0 then
  1666. begin
  1667. r.enum:=R_INTREGISTER;
  1668. r.number:=NR_R0;
  1669. a_reg_alloc(list,r);
  1670. a_load_ref_reg(list,OS_16,src,r);
  1671. a_load_reg_ref(list,OS_16,r,dst);
  1672. inc(src.offset,2);
  1673. inc(dst.offset,2);
  1674. a_reg_dealloc(list,r);
  1675. end;
  1676. if (len and 1) <> 0 then
  1677. begin
  1678. r.enum:=R_INTREGISTER;
  1679. r.number:=NR_R0;
  1680. a_reg_alloc(list,r);
  1681. a_load_ref_reg(list,OS_8,src,r);
  1682. a_load_reg_ref(list,OS_8,r,dst);
  1683. a_reg_dealloc(list,r);
  1684. end;
  1685. if orgsrc then
  1686. begin
  1687. if delsource then
  1688. reference_release(list,source);
  1689. end
  1690. else
  1691. free_scratch_reg(list,src.base);
  1692. if not orgdst then
  1693. free_scratch_reg(list,dst.base);
  1694. end;
  1695. procedure tcgppc.g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;elesize:integer);
  1696. var
  1697. lenref : treference;
  1698. power,len : longint;
  1699. {$ifndef __NOWINPECOFF__}
  1700. again,ok : tasmlabel;
  1701. {$endif}
  1702. r,r2,rsp:Tregister;
  1703. begin
  1704. {$warning !!!! FIX ME !!!!}
  1705. internalerror(200305231);
  1706. {!!!!
  1707. lenref:=ref;
  1708. inc(lenref.offset,4);
  1709. { get stack space }
  1710. r.enum:=R_INTREGISTER;
  1711. r.number:=NR_EDI;
  1712. rsp.enum:=R_INTREGISTER;
  1713. rsp.number:=NR_ESP;
  1714. r2.enum:=R_INTREGISTER;
  1715. rg.getexplicitregisterint(list,NR_EDI);
  1716. list.concat(Taicpu.op_ref_reg(A_MOV,S_L,lenref,r));
  1717. list.concat(Taicpu.op_reg(A_INC,S_L,r));
  1718. if (elesize<>1) then
  1719. begin
  1720. if ispowerof2(elesize, power) then
  1721. list.concat(Taicpu.op_const_reg(A_SHL,S_L,power,r))
  1722. else
  1723. list.concat(Taicpu.op_const_reg(A_IMUL,S_L,elesize,r));
  1724. end;
  1725. {$ifndef __NOWINPECOFF__}
  1726. { windows guards only a few pages for stack growing, }
  1727. { so we have to access every page first }
  1728. if target_info.system=system_i386_win32 then
  1729. begin
  1730. objectlibrary.getlabel(again);
  1731. objectlibrary.getlabel(ok);
  1732. a_label(list,again);
  1733. list.concat(Taicpu.op_const_reg(A_CMP,S_L,winstackpagesize,r));
  1734. a_jmp_cond(list,OC_B,ok);
  1735. list.concat(Taicpu.op_const_reg(A_SUB,S_L,winstackpagesize-4,rsp));
  1736. r2.number:=NR_EAX;
  1737. list.concat(Taicpu.op_reg(A_PUSH,S_L,r));
  1738. list.concat(Taicpu.op_const_reg(A_SUB,S_L,winstackpagesize,r));
  1739. a_jmp_always(list,again);
  1740. a_label(list,ok);
  1741. list.concat(Taicpu.op_reg_reg(A_SUB,S_L,r,rsp));
  1742. rg.ungetregisterint(list,r);
  1743. { now reload EDI }
  1744. rg.getexplicitregisterint(list,NR_EDI);
  1745. list.concat(Taicpu.op_ref_reg(A_MOV,S_L,lenref,r));
  1746. list.concat(Taicpu.op_reg(A_INC,S_L,r));
  1747. if (elesize<>1) then
  1748. begin
  1749. if ispowerof2(elesize, power) then
  1750. list.concat(Taicpu.op_const_reg(A_SHL,S_L,power,r))
  1751. else
  1752. list.concat(Taicpu.op_const_reg(A_IMUL,S_L,elesize,r));
  1753. end;
  1754. end
  1755. else
  1756. {$endif __NOWINPECOFF__}
  1757. list.concat(Taicpu.op_reg_reg(A_SUB,S_L,r,rsp));
  1758. { align stack on 4 bytes }
  1759. list.concat(Taicpu.op_const_reg(A_AND,S_L,$fffffff4,rsp));
  1760. { load destination }
  1761. a_load_reg_reg(list,OS_INT,OS_INT,rsp,r);
  1762. { don't destroy the registers! }
  1763. r2.number:=NR_ECX;
  1764. list.concat(Taicpu.op_reg(A_PUSH,S_L,r2));
  1765. r2.number:=NR_ESI;
  1766. list.concat(Taicpu.op_reg(A_PUSH,S_L,r2));
  1767. { load count }
  1768. r2.number:=NR_ECX;
  1769. a_load_ref_reg(list,OS_INT,lenref,r2);
  1770. { load source }
  1771. r2.number:=NR_ESI;
  1772. a_load_ref_reg(list,OS_INT,ref,r2);
  1773. { scheduled .... }
  1774. r2.number:=NR_ECX;
  1775. list.concat(Taicpu.op_reg(A_INC,S_L,r2));
  1776. { calculate size }
  1777. len:=elesize;
  1778. opsize:=S_B;
  1779. if (len and 3)=0 then
  1780. begin
  1781. opsize:=S_L;
  1782. len:=len shr 2;
  1783. end
  1784. else
  1785. if (len and 1)=0 then
  1786. begin
  1787. opsize:=S_W;
  1788. len:=len shr 1;
  1789. end;
  1790. if ispowerof2(len, power) then
  1791. list.concat(Taicpu.op_const_reg(A_SHL,S_L,power,r2))
  1792. else
  1793. list.concat(Taicpu.op_const_reg(A_IMUL,S_L,len,r2));
  1794. list.concat(Taicpu.op_none(A_REP,S_NO));
  1795. case opsize of
  1796. S_B : list.concat(Taicpu.Op_none(A_MOVSB,S_NO));
  1797. S_W : list.concat(Taicpu.Op_none(A_MOVSW,S_NO));
  1798. S_L : list.concat(Taicpu.Op_none(A_MOVSD,S_NO));
  1799. end;
  1800. rg.ungetregisterint(list,r);
  1801. r2.number:=NR_ESI;
  1802. list.concat(Taicpu.op_reg(A_POP,S_L,r2));
  1803. r2.number:=NR_ECX;
  1804. list.concat(Taicpu.op_reg(A_POP,S_L,r2));
  1805. { patch the new address }
  1806. a_load_reg_ref(list,OS_INT,rsp,ref);
  1807. !!!!}
  1808. end;
  1809. procedure tcgppc.g_overflowcheck(list: taasmoutput; const p: tnode);
  1810. var
  1811. hl : tasmlabel;
  1812. r:Tregister;
  1813. begin
  1814. if not(cs_check_overflow in aktlocalswitches) then
  1815. exit;
  1816. objectlibrary.getlabel(hl);
  1817. if not ((p.resulttype.def.deftype=pointerdef) or
  1818. ((p.resulttype.def.deftype=orddef) and
  1819. (torddef(p.resulttype.def).typ in [u64bit,u16bit,u32bit,u8bit,uchar,
  1820. bool8bit,bool16bit,bool32bit]))) then
  1821. begin
  1822. r.enum:=R_CR7;
  1823. list.concat(taicpu.op_reg(A_MCRXR,r));
  1824. a_jmp(list,A_BC,C_OV,7,hl)
  1825. end
  1826. else
  1827. a_jmp_cond(list,OC_AE,hl);
  1828. a_call_name(list,'FPC_OVERFLOW');
  1829. a_label(list,hl);
  1830. end;
  1831. {***************** This is private property, keep out! :) *****************}
  1832. function tcgppc.issimpleref(const ref: treference): boolean;
  1833. begin
  1834. if (ref.base.number = NR_NO) and
  1835. (ref.index.number <> NR_NO) then
  1836. internalerror(200208101);
  1837. result :=
  1838. not(assigned(ref.symbol)) and
  1839. (((ref.index.number = NR_NO) and
  1840. (ref.offset >= low(smallint)) and
  1841. (ref.offset <= high(smallint))) or
  1842. ((ref.index.number <> NR_NO) and
  1843. (ref.offset = 0)));
  1844. end;
  1845. function tcgppc.fixref(list: taasmoutput; var ref: treference): boolean;
  1846. var
  1847. tmpreg: tregister;
  1848. begin
  1849. result := false;
  1850. if (ref.base.number = NR_NO) then
  1851. ref.base := ref.index;
  1852. if (ref.base.number <> NR_NO) then
  1853. begin
  1854. if (ref.index.number <> NR_NO) and
  1855. ((ref.offset <> 0) or assigned(ref.symbol)) then
  1856. begin
  1857. result := true;
  1858. tmpreg := cg.get_scratch_reg_int(list,OS_INT);
  1859. if not assigned(ref.symbol) and
  1860. (cardinal(ref.offset-low(smallint)) <=
  1861. high(smallint)-low(smallint)) then
  1862. begin
  1863. list.concat(taicpu.op_reg_reg_const(
  1864. A_ADDI,tmpreg,ref.base,ref.offset));
  1865. ref.offset := 0;
  1866. end
  1867. else
  1868. begin
  1869. list.concat(taicpu.op_reg_reg_reg(
  1870. A_ADD,tmpreg,ref.base,ref.index));
  1871. ref.index.number := NR_NO;
  1872. end;
  1873. ref.base := tmpreg;
  1874. end
  1875. end
  1876. else
  1877. if ref.index.number <> NR_NO then
  1878. internalerror(200208102);
  1879. end;
  1880. { find out whether a is of the form 11..00..11b or 00..11...00. If }
  1881. { that's the case, we can use rlwinm to do an AND operation }
  1882. function tcgppc.get_rlwi_const(a: aword; var l1, l2: longint): boolean;
  1883. var
  1884. temp : longint;
  1885. testbit : aword;
  1886. compare: boolean;
  1887. begin
  1888. get_rlwi_const := false;
  1889. if (a = 0) or (a = $ffffffff) then
  1890. exit;
  1891. { start with the lowest bit }
  1892. testbit := 1;
  1893. { check its value }
  1894. compare := boolean(a and testbit);
  1895. { find out how long the run of bits with this value is }
  1896. { (it's impossible that all bits are 1 or 0, because in that case }
  1897. { this function wouldn't have been called) }
  1898. l1 := 31;
  1899. while (((a and testbit) <> 0) = compare) do
  1900. begin
  1901. testbit := testbit shl 1;
  1902. dec(l1);
  1903. end;
  1904. { check the length of the run of bits that comes next }
  1905. compare := not compare;
  1906. l2 := l1;
  1907. while (((a and testbit) <> 0) = compare) and
  1908. (l2 >= 0) do
  1909. begin
  1910. testbit := testbit shl 1;
  1911. dec(l2);
  1912. end;
  1913. { and finally the check whether the rest of the bits all have the }
  1914. { same value }
  1915. compare := not compare;
  1916. temp := l2;
  1917. if temp >= 0 then
  1918. if (a shr (31-temp)) <> ((-ord(compare)) shr (31-temp)) then
  1919. exit;
  1920. { we have done "not(not(compare))", so compare is back to its }
  1921. { initial value. If the lowest bit was 0, a is of the form }
  1922. { 00..11..00 and we need "rlwinm reg,reg,0,l2+1,l1", (+1 }
  1923. { because l2 now contains the position of the last zero of the }
  1924. { first run instead of that of the first 1) so switch l1 and l2 }
  1925. { in that case (we will generate "rlwinm reg,reg,0,l1,l2") }
  1926. if not compare then
  1927. begin
  1928. temp := l1;
  1929. l1 := l2+1;
  1930. l2 := temp;
  1931. end
  1932. else
  1933. { otherwise, l1 currently contains the position of the last }
  1934. { zero instead of that of the first 1 of the second run -> +1 }
  1935. inc(l1);
  1936. { the following is the same as "if l1 = -1 then l1 := 31;" }
  1937. l1 := l1 and 31;
  1938. l2 := l2 and 31;
  1939. get_rlwi_const := true;
  1940. end;
  1941. procedure tcgppc.a_load_store(list:taasmoutput;op: tasmop;reg:tregister;
  1942. ref: treference);
  1943. var
  1944. tmpreg: tregister;
  1945. tmpref: treference;
  1946. r : Tregister;
  1947. begin
  1948. tmpreg.number := NR_NO;
  1949. if assigned(ref.symbol) or
  1950. (cardinal(ref.offset-low(smallint)) >
  1951. high(smallint)-low(smallint)) then
  1952. begin
  1953. if target_info.system = system_powerpc_macos then
  1954. begin
  1955. if ref.base.number <> NR_NO then
  1956. begin
  1957. if macos_direct_globals then
  1958. begin
  1959. {Generates
  1960. add tempreg, ref.base, RTOC
  1961. op reg, symbolplusoffset, tempreg
  1962. which is eqvivalent to the more comprehensive
  1963. addi tempreg, RTOC, symbolplusoffset
  1964. add tempreg, ref.base, tempreg
  1965. op reg, tempreg
  1966. but which saves one instruction.}
  1967. tmpreg := get_scratch_reg_address(list);
  1968. reference_reset(tmpref);
  1969. tmpref.symbol := ref.symbol;
  1970. tmpref.offset := ref.offset;
  1971. tmpref.symaddr := refs_full;
  1972. tmpref.base:= tmpreg;
  1973. r.enum:=R_INTREGISTER;
  1974. r.number:=NR_RTOC;
  1975. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,
  1976. ref.base,r));
  1977. list.concat(taicpu.op_reg_ref(op,reg,tmpref));
  1978. end
  1979. else
  1980. begin
  1981. tmpreg := get_scratch_reg_address(list);
  1982. reference_reset(tmpref);
  1983. tmpref.symbol := ref.symbol;
  1984. tmpref.offset := ref.offset;
  1985. tmpref.symaddr := refs_full;
  1986. tmpref.base.enum:= R_INTREGISTER;
  1987. tmpref.base.number:= NR_RTOC;
  1988. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  1989. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,
  1990. ref.base,tmpreg));
  1991. reference_reset(tmpref);
  1992. tmpref.offset := 0;
  1993. tmpref.symaddr := refs_full;
  1994. tmpref.base:= tmpreg;
  1995. list.concat(taicpu.op_reg_ref(op,reg,tmpref));
  1996. end;
  1997. //list.concat(tai_comment.create(strpnew('**** a_load_store 1')));
  1998. end
  1999. else
  2000. begin
  2001. if macos_direct_globals then
  2002. begin
  2003. reference_reset(tmpref);
  2004. tmpref.symbol := ref.symbol;
  2005. tmpref.offset := ref.offset;
  2006. tmpref.symaddr := refs_full;
  2007. tmpref.base.enum:= R_INTREGISTER;
  2008. tmpref.base.number:= NR_RTOC;
  2009. list.concat(taicpu.op_reg_ref(op,reg,tmpref));
  2010. end
  2011. else
  2012. begin
  2013. tmpreg := get_scratch_reg_address(list);
  2014. reference_reset(tmpref);
  2015. tmpref.symbol := ref.symbol;
  2016. tmpref.offset := ref.offset;
  2017. tmpref.symaddr := refs_full;
  2018. tmpref.base.enum:= R_INTREGISTER;
  2019. tmpref.base.number:= NR_RTOC;
  2020. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  2021. reference_reset(tmpref);
  2022. tmpref.offset := 0;
  2023. tmpref.symaddr := refs_full;
  2024. tmpref.base:= tmpreg;
  2025. list.concat(taicpu.op_reg_ref(op,reg,tmpref));
  2026. end;
  2027. //list.concat(tai_comment.create(strpnew('*** a_load_store 2')));
  2028. end;
  2029. end
  2030. else
  2031. begin
  2032. tmpreg := get_scratch_reg_address(list);
  2033. reference_reset(tmpref);
  2034. tmpref.symbol := ref.symbol;
  2035. tmpref.offset := ref.offset;
  2036. tmpref.symaddr := refs_ha;
  2037. if ref.base.number <> NR_NO then
  2038. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg,
  2039. ref.base,tmpref))
  2040. else
  2041. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  2042. ref.base := tmpreg;
  2043. ref.symaddr := refs_l;
  2044. list.concat(taicpu.op_reg_ref(op,reg,ref));
  2045. end
  2046. end
  2047. else
  2048. list.concat(taicpu.op_reg_ref(op,reg,ref));
  2049. if (tmpreg.number <> NR_NO) then
  2050. free_scratch_reg(list,tmpreg);
  2051. end;
  2052. procedure tcgppc.a_jmp(list: taasmoutput; op: tasmop; c: tasmcondflag;
  2053. crval: longint; l: tasmlabel);
  2054. var
  2055. p: taicpu;
  2056. begin
  2057. p := taicpu.op_sym(op,objectlibrary.newasmsymbol(l.name));
  2058. if op <> A_B then
  2059. create_cond_norm(c,crval,p.condition);
  2060. p.is_jmp := true;
  2061. list.concat(p)
  2062. end;
  2063. procedure tcg64fppc.a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);
  2064. begin
  2065. a_op64_reg_reg_reg(list,op,regsrc,regdst,regdst);
  2066. end;
  2067. procedure tcg64fppc.a_op64_const_reg(list : taasmoutput;op:TOpCG;value : qword;reg : tregister64);
  2068. begin
  2069. a_op64_const_reg_reg(list,op,value,reg,reg);
  2070. end;
  2071. procedure tcg64fppc.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
  2072. begin
  2073. case op of
  2074. OP_AND,OP_OR,OP_XOR:
  2075. begin
  2076. cg.a_op_reg_reg_reg(list,op,OS_32,regsrc1.reglo,regsrc2.reglo,regdst.reglo);
  2077. cg.a_op_reg_reg_reg(list,op,OS_32,regsrc1.reghi,regsrc2.reghi,regdst.reghi);
  2078. end;
  2079. OP_ADD:
  2080. begin
  2081. list.concat(taicpu.op_reg_reg_reg(A_ADDC,regdst.reglo,regsrc1.reglo,regsrc2.reglo));
  2082. list.concat(taicpu.op_reg_reg_reg(A_ADDE,regdst.reghi,regsrc1.reghi,regsrc2.reghi));
  2083. end;
  2084. OP_SUB:
  2085. begin
  2086. list.concat(taicpu.op_reg_reg_reg(A_SUBC,regdst.reglo,regsrc2.reglo,regsrc1.reglo));
  2087. list.concat(taicpu.op_reg_reg_reg(A_SUBFE,regdst.reghi,regsrc1.reghi,regsrc2.reghi));
  2088. end;
  2089. else
  2090. internalerror(2002072801);
  2091. end;
  2092. end;
  2093. procedure tcg64fppc.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : qword;regsrc,regdst : tregister64);
  2094. const
  2095. ops: array[boolean,1..3] of tasmop = ((A_ADDIC,A_ADDC,A_ADDZE),
  2096. (A_SUBIC,A_SUBC,A_ADDME));
  2097. var
  2098. tmpreg: tregister;
  2099. tmpreg64: tregister64;
  2100. newop: TOpCG;
  2101. issub: boolean;
  2102. begin
  2103. case op of
  2104. OP_AND,OP_OR,OP_XOR:
  2105. begin
  2106. cg.a_op_const_reg_reg(list,op,OS_32,cardinal(value),regsrc.reglo,regdst.reglo);
  2107. cg.a_op_const_reg_reg(list,op,OS_32,value shr 32,regsrc.reghi,
  2108. regdst.reghi);
  2109. end;
  2110. OP_ADD, OP_SUB:
  2111. begin
  2112. if (int64(value) < 0) then
  2113. begin
  2114. if op = OP_ADD then
  2115. op := OP_SUB
  2116. else
  2117. op := OP_ADD;
  2118. int64(value) := -int64(value);
  2119. end;
  2120. if (longint(value) <> 0) then
  2121. begin
  2122. issub := op = OP_SUB;
  2123. if (int64(value) > 0) and
  2124. (int64(value)-ord(issub) <= 32767) then
  2125. begin
  2126. list.concat(taicpu.op_reg_reg_const(ops[issub,1],
  2127. regdst.reglo,regsrc.reglo,longint(value)));
  2128. list.concat(taicpu.op_reg_reg(ops[issub,3],
  2129. regdst.reghi,regsrc.reghi));
  2130. end
  2131. else if ((value shr 32) = 0) then
  2132. begin
  2133. tmpreg := cg.get_scratch_reg_int(list,OS_32);
  2134. cg.a_load_const_reg(list,OS_32,cardinal(value),tmpreg);
  2135. list.concat(taicpu.op_reg_reg_reg(ops[issub,2],
  2136. regdst.reglo,regsrc.reglo,tmpreg));
  2137. cg.free_scratch_reg(list,tmpreg);
  2138. list.concat(taicpu.op_reg_reg(ops[issub,3],
  2139. regdst.reghi,regsrc.reghi));
  2140. end
  2141. else
  2142. begin
  2143. tmpreg64.reglo := cg.get_scratch_reg_int(list,OS_INT);
  2144. tmpreg64.reghi := cg.get_scratch_reg_int(list,OS_INT);
  2145. a_load64_const_reg(list,value,tmpreg64);
  2146. a_op64_reg_reg_reg(list,op,tmpreg64,regsrc,regdst);
  2147. cg.free_scratch_reg(list,tmpreg64.reghi);
  2148. cg.free_scratch_reg(list,tmpreg64.reglo);
  2149. end
  2150. end
  2151. else
  2152. begin
  2153. cg.a_load_reg_reg(list,OS_INT,OS_INT,regsrc.reglo,regdst.reglo);
  2154. cg.a_op_const_reg_reg(list,op,OS_32,value shr 32,regsrc.reghi,
  2155. regdst.reghi);
  2156. end;
  2157. end;
  2158. else
  2159. internalerror(2002072802);
  2160. end;
  2161. end;
  2162. begin
  2163. cg := tcgppc.create;
  2164. cg64 :=tcg64fppc.create;
  2165. end.
  2166. {
  2167. $Log$
  2168. Revision 1.97 2003-05-28 23:18:31 florian
  2169. * started to fix and clean up the sparc port
  2170. Revision 1.96 2003/05/24 11:59:42 jonas
  2171. * fixed integer typeconversion problems
  2172. Revision 1.95 2003/05/23 18:51:26 jonas
  2173. * fixed support for nested procedures and more parameters than those
  2174. which fit in registers (untested/probably not working: calling a
  2175. nested procedure from a deeper nested procedure)
  2176. Revision 1.94 2003/05/20 23:54:00 florian
  2177. + basic darwin support added
  2178. Revision 1.93 2003/05/15 22:14:42 florian
  2179. * fixed last commit, changing lastsaveintreg to r31 caused some strange problems
  2180. Revision 1.92 2003/05/15 21:37:00 florian
  2181. * sysv entry code saves r13 now as well
  2182. Revision 1.91 2003/05/15 19:39:09 florian
  2183. * fixed ppc compiler which was broken by Peter's changes
  2184. Revision 1.90 2003/05/12 18:43:50 jonas
  2185. * fixed g_concatcopy
  2186. Revision 1.89 2003/05/11 20:59:23 jonas
  2187. * fixed bug with large offsets in entrycode
  2188. Revision 1.88 2003/05/11 11:45:08 jonas
  2189. * fixed shifts
  2190. Revision 1.87 2003/05/11 11:07:33 jonas
  2191. * fixed optimizations in a_op_const_reg_reg()
  2192. Revision 1.86 2003/04/27 11:21:36 peter
  2193. * aktprocdef renamed to current_procdef
  2194. * procinfo renamed to current_procinfo
  2195. * procinfo will now be stored in current_module so it can be
  2196. cleaned up properly
  2197. * gen_main_procsym changed to create_main_proc and release_main_proc
  2198. to also generate a tprocinfo structure
  2199. * fixed unit implicit initfinal
  2200. Revision 1.85 2003/04/26 22:56:11 jonas
  2201. * fix to a_op64_const_reg_reg
  2202. Revision 1.84 2003/04/26 16:08:41 jonas
  2203. * fixed g_flags2reg
  2204. Revision 1.83 2003/04/26 15:25:29 florian
  2205. * fixed cmp_reg_reg_reg, cmp operands were emitted in the wrong order
  2206. Revision 1.82 2003/04/25 20:55:34 florian
  2207. * stack frame calculations are now completly done using the code generator
  2208. routines instead of generating directly assembler so also large stack frames
  2209. are handle properly
  2210. Revision 1.81 2003/04/24 11:24:00 florian
  2211. * fixed several issues with nested procedures
  2212. Revision 1.80 2003/04/23 22:18:01 peter
  2213. * fixes to get rtl compiled
  2214. Revision 1.79 2003/04/23 12:35:35 florian
  2215. * fixed several issues with powerpc
  2216. + applied a patch from Jonas for nested function calls (PowerPC only)
  2217. * ...
  2218. Revision 1.78 2003/04/16 09:26:55 jonas
  2219. * assembler procedures now again get a stackframe if they have local
  2220. variables. No space is reserved for a function result however.
  2221. Also, the register parameters aren't automatically saved on the stack
  2222. anymore in assembler procedures.
  2223. Revision 1.77 2003/04/06 16:39:11 jonas
  2224. * don't generate entry/exit code for assembler procedures
  2225. Revision 1.76 2003/03/22 18:01:13 jonas
  2226. * fixed linux entry/exit code generation
  2227. Revision 1.75 2003/03/19 14:26:26 jonas
  2228. * fixed R_TOC bugs introduced by new register allocator conversion
  2229. Revision 1.74 2003/03/13 22:57:45 olle
  2230. * change in a_loadaddr_ref_reg
  2231. Revision 1.73 2003/03/12 22:43:38 jonas
  2232. * more powerpc and generic fixes related to the new register allocator
  2233. Revision 1.72 2003/03/11 21:46:24 jonas
  2234. * lots of new regallocator fixes, both in generic and ppc-specific code
  2235. (ppc compiler still can't compile the linux system unit though)
  2236. Revision 1.71 2003/02/19 22:00:16 daniel
  2237. * Code generator converted to new register notation
  2238. - Horribily outdated todo.txt removed
  2239. Revision 1.70 2003/01/13 17:17:50 olle
  2240. * changed global var access, TOC now contain pointers to globals
  2241. * fixed handling of function pointers
  2242. Revision 1.69 2003/01/09 22:00:53 florian
  2243. * fixed some PowerPC issues
  2244. Revision 1.68 2003/01/08 18:43:58 daniel
  2245. * Tregister changed into a record
  2246. Revision 1.67 2002/12/15 19:22:01 florian
  2247. * fixed some crashes and a rte 201
  2248. Revision 1.66 2002/11/28 10:55:16 olle
  2249. * macos: changing code gen for references to globals
  2250. Revision 1.65 2002/11/07 15:50:23 jonas
  2251. * fixed bctr(l) problems
  2252. Revision 1.64 2002/11/04 18:24:19 olle
  2253. * macos: globals are located in TOC and relative r2, instead of absolute
  2254. Revision 1.63 2002/10/28 22:24:28 olle
  2255. * macos entry/exit: only used registers are saved
  2256. - macos entry/exit: stackptr not saved in r31 anymore
  2257. * macos entry/exit: misc fixes
  2258. Revision 1.62 2002/10/19 23:51:48 olle
  2259. * macos stack frame size computing updated
  2260. + macos epilogue: control register now restored
  2261. * macos prologue and epilogue: fp reg now saved and restored
  2262. Revision 1.61 2002/10/19 12:50:36 olle
  2263. * reorganized prologue and epilogue routines
  2264. Revision 1.60 2002/10/02 21:49:51 florian
  2265. * all A_BL instructions replaced by calls to a_call_name
  2266. Revision 1.59 2002/10/02 13:24:58 jonas
  2267. * changed a_call_* so that no superfluous code is generated anymore
  2268. Revision 1.58 2002/09/17 18:54:06 jonas
  2269. * a_load_reg_reg() now has two size parameters: source and dest. This
  2270. allows some optimizations on architectures that don't encode the
  2271. register size in the register name.
  2272. Revision 1.57 2002/09/10 21:22:25 jonas
  2273. + added some internal errors
  2274. * fixed bug in sysv exit code
  2275. Revision 1.56 2002/09/08 20:11:56 jonas
  2276. * fixed TOpCmp2AsmCond array (some unsigned equivalents were wrong)
  2277. Revision 1.55 2002/09/08 13:03:26 jonas
  2278. * several large offset-related fixes
  2279. Revision 1.54 2002/09/07 17:54:58 florian
  2280. * first part of PowerPC fixes
  2281. Revision 1.53 2002/09/07 15:25:14 peter
  2282. * old logs removed and tabs fixed
  2283. Revision 1.52 2002/09/02 10:14:51 jonas
  2284. + a_call_reg()
  2285. * small fix in a_call_ref()
  2286. Revision 1.51 2002/09/02 06:09:02 jonas
  2287. * fixed range error
  2288. Revision 1.50 2002/09/01 21:04:49 florian
  2289. * several powerpc related stuff fixed
  2290. Revision 1.49 2002/09/01 12:09:27 peter
  2291. + a_call_reg, a_call_loc added
  2292. * removed exprasmlist references
  2293. Revision 1.48 2002/08/31 21:38:02 jonas
  2294. * fixed a_call_ref (it should load ctr, not lr)
  2295. Revision 1.47 2002/08/31 21:30:45 florian
  2296. * fixed several problems caused by Jonas' commit :)
  2297. Revision 1.46 2002/08/31 19:25:50 jonas
  2298. + implemented a_call_ref()
  2299. Revision 1.45 2002/08/18 22:16:14 florian
  2300. + the ppc gas assembler writer adds now registers aliases
  2301. to the assembler file
  2302. Revision 1.44 2002/08/17 18:23:53 florian
  2303. * some assembler writer bugs fixed
  2304. Revision 1.43 2002/08/17 09:23:49 florian
  2305. * first part of procinfo rewrite
  2306. Revision 1.42 2002/08/16 14:24:59 carl
  2307. * issameref() to test if two references are the same (then emit no opcodes)
  2308. + ret_in_reg to replace ret_in_acc
  2309. (fix some register allocation bugs at the same time)
  2310. + save_std_register now has an extra parameter which is the
  2311. usedinproc registers
  2312. Revision 1.41 2002/08/15 08:13:54 carl
  2313. - a_load_sym_ofs_reg removed
  2314. * loadvmt now calls loadaddr_ref_reg instead
  2315. Revision 1.40 2002/08/11 14:32:32 peter
  2316. * renamed current_library to objectlibrary
  2317. Revision 1.39 2002/08/11 13:24:18 peter
  2318. * saving of asmsymbols in ppu supported
  2319. * asmsymbollist global is removed and moved into a new class
  2320. tasmlibrarydata that will hold the info of a .a file which
  2321. corresponds with a single module. Added librarydata to tmodule
  2322. to keep the library info stored for the module. In the future the
  2323. objectfiles will also be stored to the tasmlibrarydata class
  2324. * all getlabel/newasmsymbol and friends are moved to the new class
  2325. Revision 1.38 2002/08/11 11:39:31 jonas
  2326. + powerpc-specific genlinearlist
  2327. Revision 1.37 2002/08/10 17:15:31 jonas
  2328. * various fixes and optimizations
  2329. Revision 1.36 2002/08/06 20:55:23 florian
  2330. * first part of ppc calling conventions fix
  2331. Revision 1.35 2002/08/06 07:12:05 jonas
  2332. * fixed bug in g_flags2reg()
  2333. * and yet more constant operation fixes :)
  2334. Revision 1.34 2002/08/05 08:58:53 jonas
  2335. * fixed compilation problems
  2336. Revision 1.33 2002/08/04 12:57:55 jonas
  2337. * more misc. fixes, mostly constant-related
  2338. }