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a64att.inc
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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%!s(int64=10) %!d(string=hai) anos |
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a64atts.inc
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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%!s(int64=10) %!d(string=hai) anos |
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a64ins.dat
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c0548cadb0
* added some missing instructions and aliases, reordered them according
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%!s(int64=10) %!d(string=hai) anos |
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a64nop.inc
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0197b84b7f
+ instruction table generator for arm64
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%!s(int64=13) %!d(string=hai) anos |
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a64op.inc
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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%!s(int64=10) %!d(string=hai) anos |
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a64reg.dat
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f1fb880f18
* fixed debug register values for vector registers
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%!s(int64=10) %!d(string=hai) anos |
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a64tab.inc
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585e4a9a14
* corrected cosmetic ARM/AArch64 copy/paste leftovers (patch by
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%!s(int64=10) %!d(string=hai) anos |
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aasmcpu.pas
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4fbb2d9cf0
--- Merging r42809 into '.':
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%!s(int64=5) %!d(string=hai) anos |
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agcpugas.pas
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4fbb2d9cf0
--- Merging r42809 into '.':
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%!s(int64=5) %!d(string=hai) anos |
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aoptcpu.pas
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e1af3ecc5d
+ assembler optimizer unit skeleton
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%!s(int64=13) %!d(string=hai) anos |
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aoptcpub.pas
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55bc5d7972
* completed TAoptBaseCpu.RegModifiedByInstruction()
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%!s(int64=10) %!d(string=hai) anos |
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aoptcpud.pas
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e1af3ecc5d
+ assembler optimizer unit skeleton
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%!s(int64=13) %!d(string=hai) anos |
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cgcpu.pas
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0dd9e4d6a5
Fixes for aarch64.
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%!s(int64=6) %!d(string=hai) anos |
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cpubase.pas
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36f9ce1cb2
Merge of trunk commits 39983,39986,40109
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%!s(int64=6) %!d(string=hai) anos |
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cpuinfo.pas
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1f20cfe991
Merge of several commits related to enhancements in PPU writing
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%!s(int64=5) %!d(string=hai) anos |
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cpunode.pas
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a0efde8167
* automatically generate necessary indirect symbols when a new assembler
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%!s(int64=9) %!d(string=hai) anos |
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cpupara.pas
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fcc7daf98d
Merged revision(s) 41412 from trunk:
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%!s(int64=6) %!d(string=hai) anos |
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cpupi.pas
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880d438704
* renamed t<cpuname>procinfo to tcpuprocinfo for all targets, so we can
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%!s(int64=8) %!d(string=hai) anos |
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cputarg.pas
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0654857ce1
Merged aarch64-android, x86_64-android targets and fixes for the Android target.
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%!s(int64=6) %!d(string=hai) anos |
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hlcgcpu.pas
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fc9e9e804a
--- Merging r40512 into '.':
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%!s(int64=6) %!d(string=hai) anos |
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itcpugas.pas
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046184dfe9
+ ARM64 GAS instruction table unit
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%!s(int64=13) %!d(string=hai) anos |
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ncpuadd.pas
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b821e31442
* force constants into a registers in the 32x32->64 optimized case
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%!s(int64=10) %!d(string=hai) anos |
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ncpucnv.pas
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0fc1fd6ac1
* replaced current_procinfo.currtrue/falselabel with storing the true/false
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%!s(int64=10) %!d(string=hai) anos |
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ncpuinl.pas
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41fba0c4f7
* switched to using the stack pointer as base register for the temp allocator
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%!s(int64=10) %!d(string=hai) anos |
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ncpumat.pas
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ada5060a34
* set pi_do_call for AArch64 mod/div nodes, as they call FPC_DIVBYZERO
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%!s(int64=10) %!d(string=hai) anos |
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ncpumem.pas
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4686f61002
* keep track of the temp position separately from the offset in references,
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%!s(int64=7) %!d(string=hai) anos |
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ncpuset.pas
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4686f61002
* keep track of the temp position separately from the offset in references,
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%!s(int64=7) %!d(string=hai) anos |
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ra64con.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64dwa.inc
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f1fb880f18
* fixed debug register values for vector registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64nor.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64num.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64rni.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64sri.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64sta.inc
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f1fb880f18
* fixed debug register values for vector registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64std.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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ra64sup.inc
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9c55fa6f6c
+ FPCR, FPSR and TPIDR registers
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%!s(int64=10) %!d(string=hai) anos |
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racpu.pas
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558b8967b6
+ Aarch64 assembler reader
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%!s(int64=10) %!d(string=hai) anos |
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racpugas.pas
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4fbb2d9cf0
--- Merging r42809 into '.':
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%!s(int64=5) %!d(string=hai) anos |
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rgcpu.pas
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4686f61002
* keep track of the temp position separately from the offset in references,
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%!s(int64=7) %!d(string=hai) anos |
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symcpu.pas
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7dd1d6aa77
o fixes handling of iso i/o parameters/program parameters:
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%!s(int64=10) %!d(string=hai) anos |
marco
4fbb2d9cf0
--- Merging r42809 into '.':