aoptcpu.pas 46 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. function InvertSkipInstruction(var p: tai): boolean;
  32. { uses the same constructor as TAopObj }
  33. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  34. procedure PeepHoleOptPass2;override;
  35. End;
  36. Implementation
  37. uses
  38. cutils,
  39. verbose,
  40. cpuinfo,
  41. aasmbase,aasmcpu,aasmdata,
  42. aoptutils,
  43. globals,globtype,
  44. cgutils;
  45. type
  46. TAsmOpSet = set of TAsmOp;
  47. function CanBeCond(p : tai) : boolean;
  48. begin
  49. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  50. end;
  51. function RefsEqual(const r1, r2: treference): boolean;
  52. begin
  53. refsequal :=
  54. (r1.offset = r2.offset) and
  55. (r1.base = r2.base) and
  56. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  57. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  58. (r1.relsymbol = r2.relsymbol) and
  59. (r1.addressmode = r2.addressmode) and
  60. (r1.volatility=[]) and
  61. (r2.volatility=[]);
  62. end;
  63. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  64. begin
  65. result:=oper1.typ=oper2.typ;
  66. if result then
  67. case oper1.typ of
  68. top_const:
  69. Result:=oper1.val = oper2.val;
  70. top_reg:
  71. Result:=oper1.reg = oper2.reg;
  72. top_ref:
  73. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  74. else Result:=false;
  75. end
  76. end;
  77. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  78. begin
  79. result := (oper.typ = top_reg) and (oper.reg = reg);
  80. end;
  81. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  82. begin
  83. result :=
  84. (instr.typ = ait_instruction) and
  85. (taicpu(instr).opcode = op);
  86. end;
  87. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  88. begin
  89. result :=
  90. (instr.typ = ait_instruction) and
  91. (taicpu(instr).opcode in ops);
  92. end;
  93. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  94. begin
  95. result :=
  96. (instr.typ = ait_instruction) and
  97. (taicpu(instr).opcode in ops) and
  98. (taicpu(instr).ops=opcount);
  99. end;
  100. {$ifdef DEBUG_AOPTCPU}
  101. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  102. begin
  103. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  104. end;
  105. {$else DEBUG_AOPTCPU}
  106. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  107. begin
  108. end;
  109. {$endif DEBUG_AOPTCPU}
  110. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  111. begin
  112. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  113. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  114. Result:=true
  115. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  116. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  117. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  118. Result:=true
  119. else
  120. Result:=inherited RegInInstruction(Reg, p1);
  121. end;
  122. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  123. var Next: tai; reg: TRegister): Boolean;
  124. begin
  125. Next:=Current;
  126. repeat
  127. Result:=GetNextInstruction(Next,Next);
  128. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  129. (is_calljmp(taicpu(Next).opcode));
  130. end;
  131. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  132. var
  133. p: taicpu;
  134. begin
  135. if not assigned(hp) or
  136. (hp.typ <> ait_instruction) then
  137. begin
  138. Result := false;
  139. exit;
  140. end;
  141. p := taicpu(hp);
  142. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  143. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  144. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  145. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  146. end;
  147. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  148. var
  149. p: taicpu;
  150. i: longint;
  151. begin
  152. Result := false;
  153. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  154. exit;
  155. p:=taicpu(hp);
  156. i:=0;
  157. { we do not care about the stack pointer }
  158. if p.opcode in [A_POP] then
  159. exit;
  160. { first operand only written?
  161. then skip it }
  162. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  163. i:=1;
  164. while i<p.ops do
  165. begin
  166. case p.oper[i]^.typ of
  167. top_reg:
  168. Result := (p.oper[i]^.reg = reg) or
  169. { MOVW }
  170. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  171. top_ref:
  172. Result :=
  173. (p.oper[i]^.ref^.base = reg) or
  174. (p.oper[i]^.ref^.index = reg);
  175. end;
  176. { Bailout if we found something }
  177. if Result then
  178. exit;
  179. Inc(i);
  180. end;
  181. end;
  182. {
  183. Turns
  184. sbis ?
  185. jmp .Lx
  186. op
  187. .Lx:
  188. Into
  189. sbic ?
  190. op
  191. For all types of skip instructions
  192. }
  193. function TCpuAsmOptimizer.InvertSkipInstruction(var p: tai): boolean;
  194. function GetNextInstructionWithoutLabel(p: tai; var next: tai): boolean;
  195. begin
  196. repeat
  197. result:=GetNextInstruction(p,next);
  198. p:=next;
  199. until
  200. (not result) or
  201. (not assigned(next)) or
  202. (next.typ in [ait_instruction]);
  203. result:=assigned(next) and (next.typ in [ait_instruction]);
  204. end;
  205. var
  206. hp1, hp2, hp3: tai;
  207. s: string;
  208. begin
  209. result:=false;
  210. if GetNextInstruction(taicpu(p),hp1) and
  211. (hp1.typ=ait_instruction) and
  212. (taicpu(hp1).opcode in [A_RJMP,A_JMP]) and
  213. (taicpu(hp1).ops=1) and
  214. (taicpu(hp1).oper[0]^.typ=top_ref) and
  215. (taicpu(hp1).oper[0]^.ref^.offset=0) and
  216. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  217. GetNextInstructionWithoutLabel(hp1,hp2) and
  218. (hp2.typ=ait_instruction) and
  219. (not taicpu(hp2).is_jmp) and
  220. GetNextInstruction(hp2,hp3) and
  221. FindLabel(TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol),hp3) then
  222. begin
  223. DebugMsg('SkipJump2InvertedSkip', p);
  224. case taicpu(p).opcode of
  225. A_SBIS: taicpu(p).opcode:=A_SBIC;
  226. A_SBIC: taicpu(p).opcode:=A_SBIS;
  227. A_SBRS: taicpu(p).opcode:=A_SBRC;
  228. A_SBRC: taicpu(p).opcode:=A_SBRS;
  229. end;
  230. TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol).decrefs;
  231. asml.remove(hp1);
  232. hp1.free;
  233. end;
  234. end;
  235. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  236. var
  237. hp1,hp2,hp3,hp4,hp5: tai;
  238. alloc, dealloc: tai_regalloc;
  239. i: integer;
  240. l: TAsmLabel;
  241. begin
  242. result := false;
  243. case p.typ of
  244. ait_instruction:
  245. begin
  246. {
  247. change
  248. <op> reg,x,y
  249. cp reg,r1
  250. into
  251. <op>s reg,x,y
  252. }
  253. { this optimization can applied only to the currently enabled operations because
  254. the other operations do not update all flags and FPC does not track flag usage }
  255. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  256. A_INC,A_LSL,A_LSR,
  257. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  258. GetNextInstruction(p, hp1) and
  259. ((MatchInstruction(hp1, A_CP) and
  260. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  261. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  262. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  263. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  264. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  265. A_LSL,A_LSR,
  266. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  267. (MatchInstruction(hp1, A_CPI) and
  268. (taicpu(p).opcode = A_ANDI) and
  269. (taicpu(p).oper[1]^.typ=top_const) and
  270. (taicpu(hp1).oper[1]^.typ=top_const) and
  271. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  272. GetNextInstruction(hp1, hp2) and
  273. { be careful here, following instructions could use other flags
  274. however after a jump fpc never depends on the value of flags }
  275. { All above instructions set Z and N according to the following
  276. Z := result = 0;
  277. N := result[31];
  278. EQ = Z=1; NE = Z=0;
  279. MI = N=1; PL = N=0; }
  280. MatchInstruction(hp2, A_BRxx) and
  281. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  282. { sub/sbc set all flags }
  283. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  284. no flag allocation tracking implemented yet on avr
  285. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  286. begin
  287. { move flag allocation if possible }
  288. { no flag allocation tracking implemented yet on avr
  289. GetLastInstruction(hp1, hp2);
  290. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  291. if assigned(hp2) then
  292. begin
  293. asml.Remove(hp2);
  294. asml.insertbefore(hp2, p);
  295. end;
  296. }
  297. // If we compare to the same value we are masking then invert the comparison
  298. if (taicpu(hp1).opcode=A_CPI) or
  299. { sub/sbc with reverted? }
  300. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  301. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  302. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  303. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  304. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  305. DebugMsg('Peephole OpCp2Op performed', p);
  306. asml.remove(hp1);
  307. hp1.free;
  308. Result:=true;
  309. end
  310. else
  311. case taicpu(p).opcode of
  312. A_LDI:
  313. begin
  314. { turn
  315. ldi reg0, imm
  316. <op> reg1, reg0
  317. dealloc reg0
  318. into
  319. <op>i reg1, imm
  320. }
  321. if MatchOpType(taicpu(p),top_reg,top_const) and
  322. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  323. MatchInstruction(hp1,[A_CP,A_MOV,A_AND,A_SUB],2) and
  324. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  325. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  326. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  327. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  328. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  329. begin
  330. TransferUsedRegs(TmpUsedRegs);
  331. UpdateUsedRegs(TmpUsedRegs,tai(p.next));
  332. UpdateUsedRegs(TmpUsedRegs,tai(hp1.next));
  333. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  334. begin
  335. case taicpu(hp1).opcode of
  336. A_CP:
  337. taicpu(hp1).opcode:=A_CPI;
  338. A_MOV:
  339. taicpu(hp1).opcode:=A_LDI;
  340. A_AND:
  341. taicpu(hp1).opcode:=A_ANDI;
  342. A_SUB:
  343. taicpu(hp1).opcode:=A_SUBI;
  344. else
  345. internalerror(2016111901);
  346. end;
  347. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  348. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  349. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  350. if assigned(alloc) and assigned(dealloc) then
  351. begin
  352. asml.Remove(alloc);
  353. alloc.Free;
  354. asml.Remove(dealloc);
  355. dealloc.Free;
  356. end;
  357. DebugMsg('Peephole LdiOp2Opi performed', p);
  358. RemoveCurrentP(p);
  359. end;
  360. end;
  361. end;
  362. A_STS:
  363. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  364. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  365. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  366. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  367. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  368. (taicpu(p).oper[0]^.ref^.offset>=32) and
  369. (taicpu(p).oper[0]^.ref^.offset<=95) then
  370. begin
  371. DebugMsg('Peephole Sts2Out performed', p);
  372. taicpu(p).opcode:=A_OUT;
  373. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  374. end;
  375. A_LDS:
  376. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  377. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  378. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  379. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  380. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  381. (taicpu(p).oper[1]^.ref^.offset>=32) and
  382. (taicpu(p).oper[1]^.ref^.offset<=95) then
  383. begin
  384. DebugMsg('Peephole Lds2In performed', p);
  385. taicpu(p).opcode:=A_IN;
  386. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  387. end;
  388. A_IN:
  389. if GetNextInstruction(p,hp1) then
  390. begin
  391. {
  392. in rX,Y
  393. ori rX,n
  394. out Y,rX
  395. into
  396. sbi rX,lg(n)
  397. }
  398. if (taicpu(p).oper[1]^.val<=31) and
  399. MatchInstruction(hp1,A_ORI) and
  400. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  401. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  402. GetNextInstruction(hp1,hp2) and
  403. MatchInstruction(hp2,A_OUT) and
  404. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  405. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  406. begin
  407. DebugMsg('Peephole InOriOut2Sbi performed', p);
  408. taicpu(p).opcode:=A_SBI;
  409. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  410. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  411. asml.Remove(hp1);
  412. hp1.Free;
  413. asml.Remove(hp2);
  414. hp2.Free;
  415. result:=true;
  416. end
  417. {
  418. in rX,Y
  419. andi rX,not(n)
  420. out Y,rX
  421. into
  422. cbi rX,lg(n)
  423. }
  424. else if (taicpu(p).oper[1]^.val<=31) and
  425. MatchInstruction(hp1,A_ANDI) and
  426. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  427. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  428. GetNextInstruction(hp1,hp2) and
  429. MatchInstruction(hp2,A_OUT) and
  430. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  431. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  432. begin
  433. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  434. taicpu(p).opcode:=A_CBI;
  435. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  436. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  437. asml.Remove(hp1);
  438. hp1.Free;
  439. asml.Remove(hp2);
  440. hp2.Free;
  441. result:=true;
  442. end
  443. {
  444. in rX,Y
  445. andi rX,n
  446. breq/brne L1
  447. into
  448. sbis/sbic Y,lg(n)
  449. jmp L1
  450. .Ltemp:
  451. }
  452. else if (taicpu(p).oper[1]^.val<=31) and
  453. MatchInstruction(hp1,A_ANDI) and
  454. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  455. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  456. GetNextInstruction(hp1,hp2) and
  457. MatchInstruction(hp2,A_BRxx) and
  458. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  459. begin
  460. if taicpu(hp2).condition=C_EQ then
  461. taicpu(p).opcode:=A_SBIS
  462. else
  463. taicpu(p).opcode:=A_SBIC;
  464. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  465. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  466. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  467. asml.Remove(hp1);
  468. hp1.Free;
  469. taicpu(hp2).condition:=C_None;
  470. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  471. taicpu(hp2).opcode:=A_JMP
  472. else
  473. taicpu(hp2).opcode:=A_RJMP;
  474. current_asmdata.getjumplabel(l);
  475. l.increfs;
  476. asml.InsertAfter(tai_label.create(l), hp2);
  477. result:=true;
  478. end;
  479. end;
  480. A_SBRS,
  481. A_SBRC:
  482. begin
  483. {
  484. Turn
  485. in rx, y
  486. sbr* rx, z
  487. Into
  488. sbi* y, z
  489. }
  490. if (taicpu(p).ops=2) and
  491. (taicpu(p).oper[0]^.typ=top_reg) and
  492. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  493. GetLastInstruction(p,hp1) and
  494. (hp1.typ=ait_instruction) and
  495. (taicpu(hp1).opcode=A_IN) and
  496. (taicpu(hp1).ops=2) and
  497. (taicpu(hp1).oper[1]^.typ=top_const) and
  498. (taicpu(hp1).oper[1]^.val in [0..31]) and
  499. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^.reg) and
  500. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, hp1, p)) then
  501. begin
  502. if taicpu(p).opcode=A_SBRS then
  503. taicpu(p).opcode:=A_SBIS
  504. else
  505. taicpu(p).opcode:=A_SBIC;
  506. taicpu(p).loadconst(0, taicpu(hp1).oper[1]^.val);
  507. DebugMsg('Peephole InSbrx2Sbix performed', p);
  508. asml.Remove(hp1);
  509. hp1.free;
  510. result:=true;
  511. end;
  512. if InvertSkipInstruction(p) then
  513. result:=true;
  514. end;
  515. A_ANDI:
  516. begin
  517. {
  518. Turn
  519. andi rx, #pow2
  520. brne l
  521. <op>
  522. l:
  523. Into
  524. sbrs rx, #(1 shl imm)
  525. <op>
  526. l:
  527. }
  528. if (taicpu(p).ops=2) and
  529. (taicpu(p).oper[1]^.typ=top_const) and
  530. ispowerof2(taicpu(p).oper[1]^.val,i) and
  531. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  532. GetNextInstruction(p,hp1) and
  533. (hp1.typ=ait_instruction) and
  534. (taicpu(hp1).opcode=A_BRxx) and
  535. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  536. (taicpu(hp1).ops>0) and
  537. (taicpu(hp1).oper[0]^.typ = top_ref) and
  538. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  539. GetNextInstruction(hp1,hp2) and
  540. (hp2.typ=ait_instruction) and
  541. GetNextInstruction(hp2,hp3) and
  542. (hp3.typ=ait_label) and
  543. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  544. begin
  545. DebugMsg('Peephole AndiBr2Sbr performed', p);
  546. taicpu(p).oper[1]^.val:=i;
  547. if taicpu(hp1).condition=C_NE then
  548. taicpu(p).opcode:=A_SBRS
  549. else
  550. taicpu(p).opcode:=A_SBRC;
  551. asml.Remove(hp1);
  552. hp1.free;
  553. result:=true;
  554. end
  555. {
  556. Remove
  557. andi rx, #y
  558. dealloc rx
  559. }
  560. else if (taicpu(p).ops=2) and
  561. (taicpu(p).oper[0]^.typ=top_reg) and
  562. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  563. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  564. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  565. begin
  566. DebugMsg('Redundant Andi removed', p);
  567. result:=RemoveCurrentP(p);
  568. end;
  569. end;
  570. A_ADD:
  571. begin
  572. if (taicpu(p).oper[1]^.reg=NR_R1) and
  573. GetNextInstruction(p, hp1) and
  574. MatchInstruction(hp1,A_ADC) then
  575. begin
  576. DebugMsg('Peephole AddAdc2Add performed', p);
  577. result:=RemoveCurrentP(p);
  578. end;
  579. end;
  580. A_SUB:
  581. begin
  582. if (taicpu(p).oper[1]^.reg=NR_R1) and
  583. GetNextInstruction(p, hp1) and
  584. MatchInstruction(hp1,A_SBC) then
  585. begin
  586. DebugMsg('Peephole SubSbc2Sub performed', p);
  587. taicpu(hp1).opcode:=A_SUB;
  588. result:=RemoveCurrentP(p);
  589. end;
  590. end;
  591. A_CLR:
  592. begin
  593. { turn the common
  594. clr rX
  595. mov/ld rX, rY
  596. into
  597. mov/ld rX, rY
  598. }
  599. if (taicpu(p).ops=1) and
  600. (taicpu(p).oper[0]^.typ=top_reg) and
  601. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  602. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  603. (hp1.typ=ait_instruction) and
  604. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  605. (taicpu(hp1).ops>0) and
  606. (taicpu(hp1).oper[0]^.typ=top_reg) and
  607. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  608. begin
  609. DebugMsg('Peephole ClrMov2Mov performed', p);
  610. result:=RemoveCurrentP(p);
  611. end
  612. { turn
  613. clr rX
  614. ...
  615. adc rY, rX
  616. into
  617. ...
  618. adc rY, r1
  619. }
  620. else if (taicpu(p).ops=1) and
  621. (taicpu(p).oper[0]^.typ=top_reg) and
  622. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  623. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  624. (hp1.typ=ait_instruction) and
  625. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  626. (taicpu(hp1).ops=2) and
  627. (taicpu(hp1).oper[1]^.typ=top_reg) and
  628. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  629. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  630. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  631. begin
  632. DebugMsg('Peephole ClrAdc2Adc performed', p);
  633. taicpu(hp1).oper[1]^.reg:=NR_R1;
  634. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  635. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  636. if assigned(alloc) and assigned(dealloc) then
  637. begin
  638. asml.Remove(alloc);
  639. alloc.Free;
  640. asml.Remove(dealloc);
  641. dealloc.Free;
  642. end;
  643. result:=RemoveCurrentP(p);
  644. end;
  645. end;
  646. A_PUSH:
  647. begin
  648. { turn
  649. push reg0
  650. push reg1
  651. pop reg3
  652. pop reg2
  653. into
  654. movw reg2,reg0
  655. or
  656. mov reg3,reg1
  657. mov reg2,reg0
  658. }
  659. if GetNextInstruction(p,hp1) and
  660. MatchInstruction(hp1,A_PUSH) and
  661. GetNextInstruction(hp1,hp2) and
  662. MatchInstruction(hp2,A_POP) and
  663. GetNextInstruction(hp2,hp3) and
  664. MatchInstruction(hp3,A_POP) then
  665. begin
  666. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  667. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  668. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  669. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  670. begin
  671. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  672. taicpu(hp3).ops:=2;
  673. taicpu(hp3).opcode:=A_MOVW;
  674. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  675. RemoveCurrentP(p);
  676. RemoveCurrentP(p);
  677. result:=RemoveCurrentP(p);
  678. end
  679. else
  680. begin
  681. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  682. taicpu(p).ops:=2;
  683. taicpu(p).opcode:=A_MOV;
  684. taicpu(hp1).ops:=2;
  685. taicpu(hp1).opcode:=A_MOV;
  686. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  687. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  688. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  689. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  690. { life range of reg2 and reg3 is increased, fix register allocation entries }
  691. TransferUsedRegs(TmpUsedRegs);
  692. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  693. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  694. TransferUsedRegs(TmpUsedRegs);
  695. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  696. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  697. UpdateUsedRegs(tai(p.Next));
  698. asml.Remove(hp2);
  699. hp2.Free;
  700. asml.Remove(hp3);
  701. hp3.Free;
  702. result:=true;
  703. end
  704. end;
  705. end;
  706. A_CALL:
  707. if (cs_opt_level4 in current_settings.optimizerswitches) and
  708. GetNextInstruction(p,hp1) and
  709. MatchInstruction(hp1,A_RET) then
  710. begin
  711. DebugMsg('Peephole CallReg2Jmp performed', p);
  712. taicpu(p).opcode:=A_JMP;
  713. asml.Remove(hp1);
  714. hp1.Free;
  715. result:=true;
  716. end;
  717. A_RCALL:
  718. if (cs_opt_level4 in current_settings.optimizerswitches) and
  719. GetNextInstruction(p,hp1) and
  720. MatchInstruction(hp1,A_RET) then
  721. begin
  722. DebugMsg('Peephole RCallReg2RJmp performed', p);
  723. taicpu(p).opcode:=A_RJMP;
  724. asml.Remove(hp1);
  725. hp1.Free;
  726. result:=true;
  727. end;
  728. A_MOV:
  729. begin
  730. { change
  731. mov reg0, reg1
  732. dealloc reg0
  733. into
  734. dealloc reg0
  735. }
  736. if MatchOpType(taicpu(p),top_reg,top_reg) then
  737. begin
  738. TransferUsedRegs(TmpUsedRegs);
  739. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  740. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  741. { reg. allocation information before calls is not perfect, so don't do this before
  742. calls/icalls }
  743. GetNextInstruction(p,hp1) and
  744. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  745. begin
  746. DebugMsg('Peephole Mov2Nop performed', p);
  747. result:=RemoveCurrentP(p);
  748. exit;
  749. end;
  750. end;
  751. { turn
  752. mov reg0, reg1
  753. <op> reg2,reg0
  754. dealloc reg0
  755. into
  756. <op> reg2,reg1
  757. }
  758. if MatchOpType(taicpu(p),top_reg,top_reg) and
  759. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  760. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  761. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  762. A_OUT,A_IN]) or
  763. { the reference register of ST/STD cannot be replaced }
  764. (MatchInstruction(hp1,[A_STD,A_ST,A_STS]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  765. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  766. {(taicpu(hp1).ops=1) and
  767. (taicpu(hp1).oper[0]^.typ = top_reg) and
  768. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  769. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  770. begin
  771. DebugMsg('Peephole MovOp2Op performed', p);
  772. for i := 0 to taicpu(hp1).ops-1 do
  773. if taicpu(hp1).oper[i]^.typ=top_reg then
  774. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  775. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  776. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  777. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  778. if assigned(alloc) and assigned(dealloc) then
  779. begin
  780. asml.Remove(alloc);
  781. alloc.Free;
  782. asml.Remove(dealloc);
  783. dealloc.Free;
  784. end;
  785. { life range of reg1 is increased }
  786. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  787. { p will be removed, update used register as we continue
  788. with the next instruction after p }
  789. result:=RemoveCurrentP(p);
  790. end
  791. { remove
  792. mov reg0,reg0
  793. }
  794. else if (taicpu(p).ops=2) and
  795. (taicpu(p).oper[0]^.typ = top_reg) and
  796. (taicpu(p).oper[1]^.typ = top_reg) and
  797. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  798. begin
  799. DebugMsg('Peephole RedundantMov performed', p);
  800. result:=RemoveCurrentP(p);
  801. end
  802. {
  803. Turn
  804. mov rx,ry
  805. op rx,rz
  806. mov ry, rx
  807. Into
  808. op ry,rz
  809. }
  810. else if (taicpu(p).ops=2) and
  811. MatchOpType(taicpu(p),top_reg,top_reg) and
  812. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  813. (hp1.typ=ait_instruction) and
  814. (taicpu(hp1).ops >= 1) and
  815. (taicpu(hp1).oper[0]^.typ = top_reg) and
  816. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  817. MatchInstruction(hp2,A_MOV) and
  818. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  819. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  820. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  821. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  822. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  823. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  824. A_INC,A_DEC,
  825. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  826. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  827. begin
  828. DebugMsg('Peephole MovOpMov2Op performed', p);
  829. if (taicpu(hp1).ops=2) and
  830. (taicpu(hp1).oper[1]^.typ=top_reg) and
  831. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  832. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  833. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  834. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  835. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  836. if assigned(alloc) and assigned(dealloc) then
  837. begin
  838. asml.Remove(alloc);
  839. alloc.Free;
  840. asml.Remove(dealloc);
  841. dealloc.Free;
  842. end;
  843. asml.remove(hp2);
  844. hp2.free;
  845. result:=RemoveCurrentP(p);
  846. end
  847. {
  848. Turn
  849. mov rx,ry
  850. op rx,rw
  851. mov rw,rx
  852. Into
  853. op rw,ry
  854. }
  855. else if (taicpu(p).ops=2) and
  856. MatchOpType(taicpu(p),top_reg,top_reg) and
  857. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  858. (hp1.typ=ait_instruction) and
  859. (taicpu(hp1).ops = 2) and
  860. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  861. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  862. (hp2.typ=ait_instruction) and
  863. (taicpu(hp2).opcode=A_MOV) and
  864. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  865. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  866. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  867. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  868. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  869. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  870. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  871. begin
  872. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  873. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  874. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  875. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  876. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  877. if assigned(alloc) and assigned(dealloc) then
  878. begin
  879. asml.Remove(alloc);
  880. alloc.Free;
  881. asml.Remove(dealloc);
  882. dealloc.Free;
  883. end;
  884. result:=RemoveCurrentP(p);
  885. asml.remove(hp2);
  886. hp2.free;
  887. end
  888. { fold
  889. mov reg2,reg0
  890. mov reg3,reg1
  891. to
  892. movw reg2,reg0
  893. }
  894. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  895. (taicpu(p).ops=2) and
  896. (taicpu(p).oper[0]^.typ = top_reg) and
  897. (taicpu(p).oper[1]^.typ = top_reg) and
  898. getnextinstruction(p,hp1) and
  899. (hp1.typ = ait_instruction) and
  900. (taicpu(hp1).opcode = A_MOV) and
  901. (taicpu(hp1).ops=2) and
  902. (taicpu(hp1).oper[0]^.typ = top_reg) and
  903. (taicpu(hp1).oper[1]^.typ = top_reg) and
  904. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  905. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  906. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  907. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  908. begin
  909. DebugMsg('Peephole MovMov2Movw performed', p);
  910. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  911. if assigned(alloc) then
  912. begin
  913. asml.Remove(alloc);
  914. asml.InsertBefore(alloc,p);
  915. { proper book keeping of currently used registers }
  916. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  917. end;
  918. taicpu(p).opcode:=A_MOVW;
  919. asml.remove(hp1);
  920. hp1.free;
  921. result:=true;
  922. end
  923. {
  924. This removes the first mov from
  925. mov rX,...
  926. mov rX,...
  927. }
  928. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  929. while MatchInstruction(hp1,A_MOV) and
  930. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  931. { don't remove the first mov if the second is a mov rX,rX }
  932. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  933. begin
  934. DebugMsg('Peephole MovMov2Mov performed', p);
  935. result:=RemoveCurrentP(p);
  936. GetNextInstruction(hp1,hp1);
  937. if not assigned(hp1) then
  938. break;
  939. end;
  940. end;
  941. A_SBIC,
  942. A_SBIS:
  943. begin
  944. {
  945. Turn
  946. sbic/sbis X, y
  947. jmp .L1
  948. op
  949. .L1:
  950. into
  951. sbis/sbic X,y
  952. op
  953. .L1:
  954. }
  955. if InvertSkipInstruction(p) then
  956. result:=true
  957. {
  958. Turn
  959. sbiX X, y
  960. jmp .L1
  961. jmp .L2
  962. .L1:
  963. op
  964. .L2:
  965. into
  966. sbiX X,y
  967. .L1:
  968. op
  969. .L2:
  970. }
  971. else if GetNextInstruction(p, hp1) and
  972. (hp1.typ=ait_instruction) and
  973. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  974. (taicpu(hp1).ops>0) and
  975. (taicpu(hp1).oper[0]^.typ = top_ref) and
  976. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  977. GetNextInstruction(hp1, hp2) and
  978. (hp2.typ=ait_instruction) and
  979. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  980. (taicpu(hp2).ops>0) and
  981. (taicpu(hp2).oper[0]^.typ = top_ref) and
  982. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  983. GetNextInstruction(hp2, hp3) and
  984. (hp3.typ=ait_label) and
  985. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  986. GetNextInstruction(hp3, hp4) and
  987. (hp4.typ=ait_instruction) and
  988. GetNextInstruction(hp4, hp5) and
  989. (hp3.typ=ait_label) and
  990. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  991. begin
  992. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  993. tai_label(hp3).labsym.decrefs;
  994. tai_label(hp5).labsym.decrefs;
  995. AsmL.remove(hp1);
  996. taicpu(hp1).Free;
  997. AsmL.remove(hp2);
  998. taicpu(hp2).Free;
  999. result:=true;
  1000. end;
  1001. end;
  1002. end;
  1003. end;
  1004. end;
  1005. end;
  1006. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  1007. begin
  1008. end;
  1009. begin
  1010. casmoptimizer:=TCpuAsmOptimizer;
  1011. End.