cpubase.pas 17 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Contains the base types for the SPARC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cpubase;
  18. {$i fpcdefs.inc}
  19. {$ModeSwitch advancedrecords}
  20. interface
  21. uses
  22. globtype,strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
  23. {*****************************************************************************
  24. Assembler Opcodes
  25. *****************************************************************************}
  26. type
  27. { TODO: CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
  28. { don't change the order of these opcodes! }
  29. TAsmOp=({$i opcode.inc});
  30. {# This should define the array of instructions as string }
  31. op2strtable=array[tasmop] of string[11];
  32. Const
  33. {# First value of opcode enumeration }
  34. firstop = low(tasmop);
  35. {# Last value of opcode enumeration }
  36. lastop = high(tasmop);
  37. std_op2str:op2strtable=({$i strinst.inc});
  38. {*****************************************************************************
  39. Registers
  40. *****************************************************************************}
  41. {$ifdef SPARC}
  42. type
  43. { Number of registers used for indexing in tables }
  44. tregisterindex=0..{$i rspnor.inc}-1;
  45. const
  46. { Available Superregisters }
  47. {$i rspsup.inc}
  48. { No Subregisters }
  49. R_SUBWHOLE = R_SUBNONE;
  50. { Available Registers }
  51. {$i rspcon.inc}
  52. first_int_imreg = $20;
  53. first_fpu_imreg = $20;
  54. { MM Super register first and last }
  55. first_mm_supreg = 0;
  56. first_mm_imreg = 1;
  57. { TODO: Calculate bsstart}
  58. regnumber_count_bsstart = 128;
  59. regnumber_table : array[tregisterindex] of tregister = (
  60. {$i rspnum.inc}
  61. );
  62. regstabs_table : array[tregisterindex] of ShortInt = (
  63. {$i rspstab.inc}
  64. );
  65. regdwarf_table : array[tregisterindex] of ShortInt = (
  66. {$i rspdwrf.inc}
  67. );
  68. { Aliases for full register LoadStore instructions }
  69. A_ST_R = A_ST;
  70. A_LD_R = A_LD;
  71. {$endif SPARC}
  72. {$ifdef SPARC64}
  73. type
  74. { Number of registers used for indexing in tables }
  75. tregisterindex=0..{$i rsp64nor.inc}-1;
  76. const
  77. { Available Superregisters }
  78. {$i rsp64sup.inc}
  79. { No Subregisters }
  80. R_SUBWHOLE = R_SUBNONE;
  81. { Available Registers }
  82. {$i rsp64con.inc}
  83. first_int_imreg = $20;
  84. first_fpu_imreg = $20;
  85. { MM Super register first and last }
  86. first_mm_supreg = 0;
  87. first_mm_imreg = 1;
  88. { TODO: Calculate bsstart}
  89. regnumber_count_bsstart = 128;
  90. regnumber_table : array[tregisterindex] of tregister = (
  91. {$i rsp64num.inc}
  92. );
  93. regstabs_table : array[tregisterindex] of ShortInt = (
  94. {$i rsp64stab.inc}
  95. );
  96. regdwarf_table : array[tregisterindex] of ShortInt = (
  97. {$i rsp64dwrf.inc}
  98. );
  99. { Aliases for full register LoadStore instructions }
  100. A_ST_R = A_STX;
  101. A_LD_R = A_LDX;
  102. {$endif SPARC64}
  103. {*****************************************************************************
  104. Conditions
  105. *****************************************************************************}
  106. type
  107. TAsmCond=(C_None,
  108. C_A,C_AE,C_B,C_BE,
  109. C_G,C_GE,C_L,C_LE,
  110. C_E,C_NE,
  111. C_POS,C_NEG,C_VC,C_VS,
  112. C_FE,C_FG,C_FL,C_FGE,C_FLE,C_FNE,
  113. C_FU,C_FUG,C_FUL,C_FUGE,C_FULE,C_FO,C_FUE,C_FLG
  114. );
  115. const
  116. firstIntCond=C_A;
  117. lastIntCond=C_VS;
  118. firstFloatCond=C_FE;
  119. lastFloatCond=C_FNE;
  120. floatAsmConds=[C_FE..C_FLG];
  121. cond2str:array[TAsmCond] of string[3]=('',
  122. 'gu','cc','cs','leu',
  123. 'g','ge','l','le',
  124. 'e','ne',
  125. 'pos','neg','vc','vs',
  126. 'e','g','l','ge','le','ne',
  127. 'u','ug','ul','uge','ule','o','ue','lg'
  128. );
  129. {*****************************************************************************
  130. Flags
  131. *****************************************************************************}
  132. type
  133. TSparcFlags = (
  134. { Integer results }
  135. F_E, {Equal}
  136. F_NE, {Not Equal}
  137. F_G, {Greater}
  138. F_L, {Less}
  139. F_GE, {Greater or Equal}
  140. F_LE, {Less or Equal}
  141. F_A, {Above}
  142. F_AE, {Above or Equal, synonym: Carry Clear}
  143. F_B, {Below, synonym: Carry Set}
  144. F_BE, {Below or Equal}
  145. { Floating point results }
  146. F_FE, {Equal}
  147. F_FNE, {Not Equal}
  148. F_FG, {Greater}
  149. F_FL, {Less}
  150. F_FGE, {Greater or Equal}
  151. F_FLE {Less or Equal}
  152. );
  153. TResFlags = record
  154. { either icc or xcc (64 bit }
  155. FlagReg : TRegister;
  156. Flags : TSparcFlags;
  157. procedure Init(r : TRegister;f : TSparcFlags);
  158. end;
  159. {*****************************************************************************
  160. Operand Sizes
  161. *****************************************************************************}
  162. {*****************************************************************************
  163. Constants
  164. *****************************************************************************}
  165. const
  166. max_operands = 3;
  167. maxintregs = 8;
  168. maxfpuregs = 8;
  169. maxaddrregs = 0;
  170. maxvarregs = 8;
  171. varregs : Array [1..maxvarregs] of Tsuperregister =
  172. (RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7);
  173. maxfpuvarregs = 1;
  174. fpuvarregs : Array [1..maxfpuvarregs] of TsuperRegister =
  175. (RS_F2);
  176. {*****************************************************************************
  177. Default generic sizes
  178. *****************************************************************************}
  179. {$ifdef SPARC64}
  180. {# Defines the default address size for a processor, }
  181. OS_ADDR = OS_64;
  182. {# the natural int size for a processor,
  183. has to match osuinttype/ossinttype as initialized in psystem }
  184. OS_INT = OS_64;
  185. OS_SINT = OS_S64;
  186. {$else SPARC64}
  187. {# Defines the default address size for a processor, }
  188. OS_ADDR = OS_32;
  189. {# the natural int size for a processor,
  190. has to match osuinttype/ossinttype as initialized in psystem }
  191. OS_INT = OS_32;
  192. OS_SINT = OS_S32;
  193. {$endif SPARC64}
  194. {# the maximum float size for a processor, }
  195. OS_FLOAT = OS_F64;
  196. {# the size of a vector register for a processor }
  197. OS_VECTOR = OS_M64;
  198. {*****************************************************************************
  199. Generic Register names
  200. *****************************************************************************}
  201. {# Stack pointer register }
  202. NR_STACK_POINTER_REG = NR_O6;
  203. RS_STACK_POINTER_REG = RS_O6;
  204. {# Frame pointer register }
  205. NR_FRAME_POINTER_REG = NR_I6;
  206. RS_FRAME_POINTER_REG = RS_I6;
  207. {# Register for addressing absolute data in a position independant way,
  208. such as in PIC code. The exact meaning is ABI specific. For
  209. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  210. Taken from GCC rs6000.h
  211. }
  212. { TODO: As indicated in rs6000.h, but can't find it anywhere else!}
  213. {PIC_OFFSET_REG = R_30;}
  214. { Return address for DWARF }
  215. NR_RETURN_ADDRESS_REG = NR_I7;
  216. { the return_result_reg, is used inside the called function to store its return
  217. value when that is a scalar value otherwise a pointer to the address of the
  218. result is placed inside it }
  219. { Results are returned in this register (32-bit values) }
  220. NR_FUNCTION_RETURN_REG = NR_I0;
  221. RS_FUNCTION_RETURN_REG = RS_I0;
  222. { Low part of 64bit return value }
  223. NR_FUNCTION_RETURN64_LOW_REG = NR_I1;
  224. RS_FUNCTION_RETURN64_LOW_REG = RS_I1;
  225. { High part of 64bit return value }
  226. NR_FUNCTION_RETURN64_HIGH_REG = NR_I0;
  227. RS_FUNCTION_RETURN64_HIGH_REG = RS_I0;
  228. { The value returned from a function is available in this register }
  229. NR_FUNCTION_RESULT_REG = NR_O0;
  230. RS_FUNCTION_RESULT_REG = RS_O0;
  231. { The lowh part of 64bit value returned from a function }
  232. NR_FUNCTION_RESULT64_LOW_REG = NR_O1;
  233. RS_FUNCTION_RESULT64_LOW_REG = RS_O1;
  234. { The high part of 64bit value returned from a function }
  235. NR_FUNCTION_RESULT64_HIGH_REG = NR_O0;
  236. RS_FUNCTION_RESULT64_HIGH_REG = RS_O0;
  237. NR_FPU_RESULT_REG = NR_F0;
  238. NR_MM_RESULT_REG = NR_NO;
  239. PARENT_FRAMEPOINTER_OFFSET = 68; { o0 }
  240. NR_DEFAULTFLAGS = NR_PSR;
  241. RS_DEFAULTFLAGS = RS_PSR;
  242. {*****************************************************************************
  243. GCC /ABI linking information
  244. *****************************************************************************}
  245. {# Required parameter alignment when calling a routine declared as
  246. stdcall and cdecl. The alignment value should be the one defined
  247. by GCC or the target ABI.
  248. The value of this constant is equal to the constant
  249. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  250. }
  251. std_param_align = sizeof(AWord);
  252. {$ifdef SPARC64}
  253. STACK_BIAS = 2047;
  254. {$endif SPARC64}
  255. {*****************************************************************************
  256. CPU Dependent Constants
  257. *****************************************************************************}
  258. const
  259. simm13lo=-4096;
  260. simm13hi=4095;
  261. {*****************************************************************************
  262. Helpers
  263. *****************************************************************************}
  264. function is_calljmp(o:tasmop):boolean;
  265. procedure inverse_flags(var f: TResFlags);
  266. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  267. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  268. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  269. function condition_in(const Subset, c: TAsmCond): Boolean;
  270. function flags_to_cond(const f: TResFlags) : TAsmCond;
  271. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  272. function reg_cgsize(const reg: tregister): tcgsize;
  273. function std_regname(r:Tregister):string;
  274. function std_regnum_search(const s:string):Tregister;
  275. function findreg_by_number(r:Tregister):tregisterindex;
  276. function dwarf_reg(r:tregister):shortint;
  277. function dwarf_reg_no_error(r:tregister):shortint;
  278. function eh_return_data_regno(nr: longint): longint;
  279. implementation
  280. uses
  281. rgBase,verbose;
  282. {$ifdef SPARC}
  283. const
  284. std_regname_table : TRegNameTAble = (
  285. {$i rspstd.inc}
  286. );
  287. regnumber_index : TRegisterIndexTable = (
  288. {$i rsprni.inc}
  289. );
  290. std_regname_index : TRegisterIndexTable = (
  291. {$i rspsri.inc}
  292. );
  293. {$endif SPARC}
  294. {$ifdef SPARC64}
  295. const
  296. std_regname_table : TRegNameTAble = (
  297. {$i rsp64std.inc}
  298. );
  299. regnumber_index : TRegisterIndexTable = (
  300. {$i rsp64rni.inc}
  301. );
  302. std_regname_index : TRegisterIndexTable = (
  303. {$i rsp64sri.inc}
  304. );
  305. {$endif SPARC64}
  306. {*****************************************************************************
  307. Helpers
  308. *****************************************************************************}
  309. function is_calljmp(o:tasmop):boolean;
  310. const
  311. CallJmpOp=[A_JMPL..A_CBccc];
  312. begin
  313. is_calljmp:=(o in CallJmpOp);
  314. end;
  315. procedure inverse_flags(var f: TResFlags);
  316. const
  317. inv_flags: array[TSparcFlags] of TSparcFlags =
  318. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_BE,F_B,F_AE,F_A,
  319. F_FNE,F_FE,F_FLE,F_FGE,F_FL,F_FG);
  320. begin
  321. f.Flags:=inv_flags[f.Flags];
  322. end;
  323. function flags_to_cond(const f:TResFlags):TAsmCond;
  324. const
  325. flags_2_cond:array[TSparcFlags] of TAsmCond=
  326. (C_E,C_NE,C_G,C_L,C_GE,C_LE,C_A,C_AE,C_B,C_BE,
  327. C_FE,C_FNE,C_FG,C_FL,C_FGE,C_FLE);
  328. begin
  329. result:=flags_2_cond[f.Flags];
  330. end;
  331. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  332. begin
  333. case regtype of
  334. R_FPUREGISTER:
  335. case s of
  336. OS_F32:
  337. cgsize2subreg:=R_SUBFS;
  338. OS_F64:
  339. cgsize2subreg:=R_SUBFD;
  340. OS_F128:
  341. cgsize2subreg:=R_SUBFQ;
  342. else
  343. internalerror(2009071903);
  344. end;
  345. else
  346. begin
  347. {$ifdef SPARC32}
  348. if s in [OS_64,OS_S64] then
  349. cgsize2subreg:=R_SUBQ
  350. else
  351. {$endif SPARC32}
  352. cgsize2subreg:=R_SUBWHOLE;
  353. end;
  354. end;
  355. end;
  356. function reg_cgsize(const reg: tregister): tcgsize;
  357. begin
  358. case getregtype(reg) of
  359. R_INTREGISTER :
  360. result:=OS_INT;
  361. R_FPUREGISTER :
  362. begin
  363. if getsubreg(reg)=R_SUBFD then
  364. result:=OS_F64
  365. else
  366. result:=OS_F32;
  367. end;
  368. else
  369. internalerror(200303181);
  370. end;
  371. end;
  372. function findreg_by_number(r:Tregister):tregisterindex;
  373. begin
  374. result:=findreg_by_number_table(r,regnumber_index);
  375. end;
  376. function std_regname(r:Tregister):string;
  377. var
  378. p : tregisterindex;
  379. begin
  380. { For double floats show a pair like %f0:%f1 }
  381. if (getsubreg(r)=R_SUBFD) and
  382. (getsupreg(r)<first_fpu_imreg) then
  383. begin
  384. setsubreg(r,R_SUBFS);
  385. p:=findreg_by_number(r);
  386. if p<>0 then
  387. result:=std_regname_table[p]
  388. else
  389. result:=generic_regname(r);
  390. setsupreg(r,getsupreg(r)+1);
  391. p:=findreg_by_number(r);
  392. if p<>0 then
  393. result:=result+':'+std_regname_table[p]
  394. else
  395. result:=result+':'+generic_regname(r);
  396. end
  397. else
  398. begin
  399. p:=findreg_by_number(r);
  400. if p<>0 then
  401. result:=std_regname_table[p]
  402. else
  403. result:=generic_regname(r);
  404. end;
  405. end;
  406. function std_regnum_search(const s:string):Tregister;
  407. begin
  408. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  409. end;
  410. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  411. const
  412. inverse: array[TAsmCond] of TAsmCond=(C_None,
  413. C_BE,C_B,C_AE,C_A,
  414. C_LE,C_L,C_GE,C_G,
  415. C_NE,C_E,
  416. C_NEG,C_POS,C_VS,C_VC,
  417. C_FNE,C_FULE,C_FUGE,C_FUL,C_FUG,C_FE,
  418. C_FO,C_FLE,C_FGE,C_FL,C_FG,C_FU,C_FLG,C_FUE
  419. );
  420. begin
  421. result := inverse[c];
  422. end;
  423. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  424. begin
  425. result := c1 = c2;
  426. end;
  427. { Checks if Subset is a subset of c (e.g. "less than" is a subset of "less than or equal" }
  428. function condition_in(const Subset, c: TAsmCond): Boolean;
  429. begin
  430. Result := (c = C_None) or conditions_equal(Subset, c);
  431. { TODO: Can a SparcGEN programmer please update this procedure to
  432. detect all subsets? Thanks. [Kit] }
  433. if not Result then
  434. case Subset of
  435. C_A:
  436. Result := (c in [C_A, C_AE]);
  437. C_B:
  438. Result := (c in [C_B, C_BE]);
  439. C_E:
  440. Result := (c in [C_AE, C_BE]);
  441. C_FE:
  442. Result := (c in [C_FLE,C_FGE]);
  443. C_FL:
  444. Result := (c in [C_FLE]);
  445. C_FG:
  446. Result := (c in [C_FGE]);
  447. else
  448. Result := False;
  449. end;
  450. end;
  451. function dwarf_reg(r:tregister):shortint;
  452. begin
  453. result:=regdwarf_table[findreg_by_number(r)];
  454. if result=-1 then
  455. internalerror(200603251);
  456. end;
  457. function dwarf_reg_no_error(r:tregister):shortint;
  458. begin
  459. result:=regdwarf_table[findreg_by_number(r)];
  460. end;
  461. function eh_return_data_regno(nr: longint): longint;
  462. begin
  463. if (nr>=0) and (nr<2) then
  464. result:=nr+24
  465. else
  466. result:=-1;
  467. end;
  468. procedure TResFlags.Init(r : TRegister; f : TSparcFlags);
  469. begin
  470. FlagReg:=r;
  471. Flags:=f;
  472. end;
  473. end.