ncgmem.pas 42 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symdef,symsym,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,nutils,
  70. cgutils,cgobj,
  71. tgobj,ncgutil,objcgutl
  72. ;
  73. {*****************************************************************************
  74. TCGLOADVMTADDRNODE
  75. *****************************************************************************}
  76. procedure tcgloadvmtaddrnode.pass_generate_code;
  77. var
  78. href : treference;
  79. pool : THashSet;
  80. entry : PHashSetItem;
  81. begin
  82. location_reset(location,LOC_REGISTER,OS_ADDR);
  83. if (left.nodetype=typen) then
  84. begin
  85. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  86. if not is_objcclass(left.resultdef) then
  87. begin
  88. reference_reset_symbol(href,
  89. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname),0,
  90. sizeof(pint));
  91. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,location.register);
  92. end
  93. else
  94. begin
  95. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  96. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  97. if (target_info.system in systems_objc_nfabi) then
  98. begin
  99. { find/add necessary classref/classname pool entries }
  100. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  101. end
  102. else
  103. begin
  104. { find/add necessary classref/classname pool entries }
  105. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  106. end;
  107. reference_reset_symbol(href,tasmlabel(entry^.Data),0,sizeof(pint));
  108. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  109. end;
  110. end
  111. else
  112. begin
  113. { left contains self, load vmt from self }
  114. secondpass(left);
  115. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  116. end;
  117. end;
  118. {*****************************************************************************
  119. TCGLOADPARENTFPNODE
  120. *****************************************************************************}
  121. procedure tcgloadparentfpnode.pass_generate_code;
  122. var
  123. currpi : tprocinfo;
  124. hsym : tparavarsym;
  125. href : treference;
  126. begin
  127. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  128. begin
  129. location_reset(location,LOC_REGISTER,OS_ADDR);
  130. location.register:=current_procinfo.framepointer;
  131. end
  132. else
  133. begin
  134. currpi:=current_procinfo;
  135. location_reset(location,LOC_REGISTER,OS_ADDR);
  136. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  137. { load framepointer of current proc }
  138. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  139. if not assigned(hsym) then
  140. internalerror(200309281);
  141. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,hsym.localloc,location.register);
  142. { walk parents }
  143. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  144. begin
  145. currpi:=currpi.parent;
  146. if not assigned(currpi) then
  147. internalerror(200311201);
  148. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  149. if not assigned(hsym) then
  150. internalerror(200309282);
  151. if hsym.localloc.loc<>LOC_REFERENCE then
  152. internalerror(200309283);
  153. reference_reset_base(href,location.register,hsym.localloc.reference.offset,sizeof(pint));
  154. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  155. end;
  156. end;
  157. end;
  158. {*****************************************************************************
  159. TCGADDRNODE
  160. *****************************************************************************}
  161. procedure tcgaddrnode.pass_generate_code;
  162. begin
  163. secondpass(left);
  164. location_reset(location,LOC_REGISTER,OS_ADDR);
  165. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  166. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  167. { on x86_64-win64, array of chars can be returned in registers, however,
  168. when passing these arrays to other functions, the compiler wants to take
  169. the address of the array so when the addrnode has been created internally,
  170. we have to force the data into memory, see also tw14388.pp
  171. }
  172. if nf_internal in flags then
  173. location_force_mem(current_asmdata.CurrAsmList,left.location)
  174. else
  175. internalerror(2006111510);
  176. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
  177. end;
  178. {*****************************************************************************
  179. TCGDEREFNODE
  180. *****************************************************************************}
  181. procedure tcgderefnode.pass_generate_code;
  182. var
  183. paraloc1 : tcgpara;
  184. begin
  185. secondpass(left);
  186. { assume natural alignment, except for packed records }
  187. if not(resultdef.typ in [recorddef,objectdef]) or
  188. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  189. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  190. else
  191. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  192. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  193. location_force_reg(current_asmdata.CurrAsmList,left.location,OS_ADDR,true);
  194. case left.location.loc of
  195. LOC_CREGISTER,
  196. LOC_REGISTER:
  197. begin
  198. maybechangeloadnodereg(current_asmdata.CurrAsmList,left,true);
  199. {$ifdef cpu_uses_separate_address_registers}
  200. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  201. begin
  202. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  203. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  204. location.reference.base);
  205. end
  206. else
  207. {$endif}
  208. location.reference.base := left.location.register;
  209. end;
  210. LOC_CREFERENCE,
  211. LOC_REFERENCE:
  212. begin
  213. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  214. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,left.location,location.reference.base);
  215. end;
  216. LOC_CONSTANT:
  217. begin
  218. location.reference.offset:=left.location.value;
  219. end;
  220. else
  221. internalerror(200507031);
  222. end;
  223. if (cs_use_heaptrc in current_settings.globalswitches) and
  224. (cs_checkpointer in current_settings.localswitches) and
  225. not(cs_compilesystem in current_settings.moduleswitches) and
  226. not(tpointerdef(left.resultdef).is_far) and
  227. not(nf_no_checkpointer in flags) and
  228. { can be NR_NO in case of LOC_CONSTANT }
  229. (location.reference.base<>NR_NO) then
  230. begin
  231. paraloc1.init;
  232. paramanager.getintparaloc(pocall_default,1,paraloc1);
  233. cg.a_load_reg_cgpara(current_asmdata.CurrAsmList, OS_ADDR,location.reference.base,paraloc1);
  234. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  235. paraloc1.done;
  236. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  237. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_CHECKPOINTER',false);
  238. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  239. end;
  240. end;
  241. {*****************************************************************************
  242. TCGSUBSCRIPTNODE
  243. *****************************************************************************}
  244. procedure tcgsubscriptnode.pass_generate_code;
  245. var
  246. sym: tasmsymbol;
  247. paraloc1 : tcgpara;
  248. hreg : tregister;
  249. tmpref: treference;
  250. sref: tsubsetreference;
  251. begin
  252. secondpass(left);
  253. if codegenerror then
  254. exit;
  255. paraloc1.init;
  256. { several object types must be dereferenced implicitly }
  257. if is_implicit_pointer_object_type(left.resultdef) then
  258. begin
  259. if not is_managed_type(left.resultdef) then
  260. begin
  261. { the contents of a class are aligned to a sizeof(pointer) }
  262. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),sizeof(pint));
  263. case left.location.loc of
  264. LOC_CREGISTER,
  265. LOC_REGISTER:
  266. begin
  267. {$ifdef cpu_uses_separate_address_registers}
  268. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  269. begin
  270. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  271. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
  272. left.location.register,location.reference.base);
  273. end
  274. else
  275. {$endif}
  276. location.reference.base := left.location.register;
  277. end;
  278. LOC_CREFERENCE,
  279. LOC_REFERENCE:
  280. begin
  281. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  282. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,left.location,location.reference.base);
  283. end;
  284. LOC_CONSTANT:
  285. begin
  286. { can happen with @classtype(pointerconst).field }
  287. location.reference.offset:=left.location.value;
  288. end;
  289. else
  290. internalerror(2009092401);
  291. end;
  292. { implicit deferencing }
  293. if (cs_use_heaptrc in current_settings.globalswitches) and
  294. (cs_checkpointer in current_settings.localswitches) and
  295. not(cs_compilesystem in current_settings.moduleswitches) then
  296. begin
  297. paramanager.getintparaloc(pocall_default,1,paraloc1);
  298. cg.a_load_reg_cgpara(current_asmdata.CurrAsmList, OS_ADDR,location.reference.base,paraloc1);
  299. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  300. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  301. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_CHECKPOINTER',false);
  302. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  303. end;
  304. end
  305. else
  306. { reference-counted implicit pointer object types don't have
  307. fields -> cannot be subscripted (calls are handled via call
  308. nodes) }
  309. internalerror(2011011901);
  310. end
  311. else
  312. begin
  313. location_copy(location,left.location);
  314. { some abi's require that functions return (some) records in }
  315. { registers }
  316. case location.loc of
  317. LOC_REFERENCE,
  318. LOC_CREFERENCE:
  319. ;
  320. LOC_REGISTER,
  321. LOC_CREGISTER,
  322. LOC_MMREGISTER,
  323. LOC_FPUREGISTER:
  324. begin
  325. // in case the result is not something that can be put
  326. // into an integer register (e.g.
  327. // function_returning_record().non_regable_field, or
  328. // a function returning a value > sizeof(intreg))
  329. // -> force to memory
  330. if not tstoreddef(left.resultdef).is_intregable or
  331. not tstoreddef(resultdef).is_intregable or
  332. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER]) then
  333. location_force_mem(current_asmdata.CurrAsmList,location)
  334. else
  335. begin
  336. if (left.location.loc = LOC_REGISTER) then
  337. location.loc := LOC_SUBSETREG
  338. else
  339. location.loc := LOC_CSUBSETREG;
  340. location.size:=def_cgsize(resultdef);
  341. location.sreg.subsetreg := left.location.register;
  342. location.sreg.subsetregsize := left.location.size;
  343. if not is_packed_record_or_object(left.resultdef) then
  344. begin
  345. if (target_info.endian = ENDIAN_BIG) then
  346. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8
  347. else
  348. location.sreg.startbit := (vs.fieldoffset * 8);
  349. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  350. end
  351. else
  352. begin
  353. location.sreg.bitlen := resultdef.packedbitsize;
  354. if (target_info.endian = ENDIAN_BIG) then
  355. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset
  356. else
  357. location.sreg.startbit := vs.fieldoffset;
  358. end;
  359. end;
  360. end;
  361. LOC_SUBSETREG,
  362. LOC_CSUBSETREG:
  363. begin
  364. location.size:=def_cgsize(resultdef);
  365. if not is_packed_record_or_object(left.resultdef) then
  366. begin
  367. if (target_info.endian = ENDIAN_BIG) then
  368. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  369. else
  370. inc(location.sreg.startbit, vs.fieldoffset * 8);
  371. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  372. end
  373. else
  374. begin
  375. location.sreg.bitlen := resultdef.packedbitsize;
  376. if (target_info.endian = ENDIAN_BIG) then
  377. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  378. else
  379. inc(location.sreg.startbit, vs.fieldoffset);
  380. end;
  381. end;
  382. else
  383. internalerror(2006031901);
  384. end;
  385. end;
  386. if is_objc_class_or_protocol(left.resultdef) and
  387. (target_info.system in systems_objc_nfabi) then
  388. begin
  389. if (location.loc<>LOC_REFERENCE) or
  390. (location.reference.index<>NR_NO) then
  391. internalerror(2009092402);
  392. { the actual field offset is stored in memory (to solve the
  393. "fragile base class" problem: this way the layout of base
  394. classes can be changed without breaking programs compiled against
  395. earlier versions)
  396. }
  397. sym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  398. reference_reset_symbol(tmpref,sym,0,sizeof(pint));
  399. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  400. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  401. { always packrecords C -> natural alignment }
  402. location.reference.alignment:=vs.vardef.alignment;
  403. end
  404. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  405. begin
  406. if not is_packed_record_or_object(left.resultdef) then
  407. begin
  408. inc(location.reference.offset,vs.fieldoffset);
  409. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  410. end
  411. else if (vs.fieldoffset mod 8 = 0) and
  412. (resultdef.packedbitsize mod 8 = 0) and
  413. { is different in case of e.g. packenum 2 and an enum }
  414. { which fits in 8 bits }
  415. (resultdef.size*8 = resultdef.packedbitsize) then
  416. begin
  417. inc(location.reference.offset,vs.fieldoffset div 8);
  418. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  419. end
  420. else
  421. begin
  422. sref.ref:=location.reference;
  423. sref.ref.alignment:=1;
  424. sref.bitindexreg:=NR_NO;
  425. inc(sref.ref.offset,vs.fieldoffset div 8);
  426. sref.startbit:=vs.fieldoffset mod 8;
  427. sref.bitlen:=resultdef.packedbitsize;
  428. if (left.location.loc=LOC_REFERENCE) then
  429. location.loc:=LOC_SUBSETREF
  430. else
  431. location.loc:=LOC_CSUBSETREF;
  432. location.sref:=sref;
  433. end;
  434. { also update the size of the location }
  435. location.size:=def_cgsize(resultdef);
  436. end;
  437. paraloc1.done;
  438. end;
  439. {*****************************************************************************
  440. TCGWITHNODE
  441. *****************************************************************************}
  442. procedure tcgwithnode.pass_generate_code;
  443. begin
  444. location_reset(location,LOC_VOID,OS_NO);
  445. if assigned(left) then
  446. secondpass(left);
  447. end;
  448. {*****************************************************************************
  449. TCGVECNODE
  450. *****************************************************************************}
  451. function tcgvecnode.get_mul_size : aint;
  452. begin
  453. if nf_memindex in flags then
  454. get_mul_size:=1
  455. else
  456. begin
  457. if (left.resultdef.typ=arraydef) then
  458. if not is_packed_array(left.resultdef) then
  459. get_mul_size:=tarraydef(left.resultdef).elesize
  460. else
  461. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  462. else
  463. get_mul_size:=resultdef.size;
  464. end
  465. end;
  466. { this routine must, like any other routine, not change the contents }
  467. { of base/index registers of references, as these may be regvars. }
  468. { The register allocator can coalesce one LOC_REGISTER being moved }
  469. { into another (as their live ranges won't overlap), but not a }
  470. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  471. { the live range of the LOC_CREGISTER will most likely overlap the }
  472. { the live range of the target LOC_(C)REGISTER) }
  473. { The passed register may be a LOC_CREGISTER as well. }
  474. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  475. var
  476. hreg: tregister;
  477. begin
  478. if l<>1 then
  479. begin
  480. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  481. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  482. maybe_const_reg:=hreg;
  483. end;
  484. if location.reference.base=NR_NO then
  485. location.reference.base:=maybe_const_reg
  486. else if location.reference.index=NR_NO then
  487. location.reference.index:=maybe_const_reg
  488. else
  489. begin
  490. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  491. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  492. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  493. { insert new index register }
  494. location.reference.index:=maybe_const_reg;
  495. end;
  496. { update alignment }
  497. if (location.reference.alignment=0) then
  498. internalerror(2009020704);
  499. location.reference.alignment:=newalignment(location.reference.alignment,l);
  500. end;
  501. { see remarks for tcgvecnode.update_reference_reg_mul above }
  502. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  503. var
  504. sref: tsubsetreference;
  505. offsetreg, hreg: tregister;
  506. alignpower: aint;
  507. temp : longint;
  508. begin
  509. { only orddefs are bitpacked. Even then we only need special code in }
  510. { case the bitpacked *byte size* is not a power of two, otherwise }
  511. { everything can be handled using the the regular array code. }
  512. if ((l mod 8) = 0) and
  513. (ispowerof2(l div 8,temp) or
  514. not is_ordinal(resultdef)
  515. {$ifndef cpu64bitalu}
  516. or is_64bitint(resultdef)
  517. {$endif not cpu64bitalu}
  518. ) then
  519. begin
  520. update_reference_reg_mul(maybe_const_reg,l div 8);
  521. exit;
  522. end;
  523. if (l > 8*sizeof(aint)) then
  524. internalerror(200608051);
  525. sref.ref := location.reference;
  526. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  527. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  528. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  529. { keep alignment for index }
  530. sref.ref.alignment := left.resultdef.alignment;
  531. if not ispowerof2(sref.ref.alignment,temp) then
  532. internalerror(2006081201);
  533. alignpower:=temp;
  534. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  535. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  536. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  537. if (sref.ref.base = NR_NO) then
  538. sref.ref.base := offsetreg
  539. else if (sref.ref.index = NR_NO) then
  540. sref.ref.index := offsetreg
  541. else
  542. begin
  543. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  544. sref.ref.base := offsetreg;
  545. end;
  546. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  547. sref.bitindexreg := hreg;
  548. sref.startbit := 0;
  549. sref.bitlen := resultdef.packedbitsize;
  550. if (left.location.loc = LOC_REFERENCE) then
  551. location.loc := LOC_SUBSETREF
  552. else
  553. location.loc := LOC_CSUBSETREF;
  554. location.sref := sref;
  555. end;
  556. procedure tcgvecnode.second_wideansistring;
  557. begin
  558. end;
  559. procedure tcgvecnode.second_dynamicarray;
  560. begin
  561. end;
  562. procedure tcgvecnode.rangecheck_array;
  563. var
  564. hightree : tnode;
  565. poslabel,
  566. neglabel : tasmlabel;
  567. hreg : tregister;
  568. paraloc1,paraloc2 : tcgpara;
  569. begin
  570. { omit range checking when this is an array access to a pointer which has been
  571. typecasted from an array }
  572. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  573. exit;
  574. paraloc1.init;
  575. paraloc2.init;
  576. if is_open_array(left.resultdef) or
  577. is_array_of_const(left.resultdef) then
  578. begin
  579. { cdecl functions don't have high() so we can not check the range }
  580. { (can't use current_procdef, since it may be a nested procedure) }
  581. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(left).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  582. begin
  583. { Get high value }
  584. hightree:=load_high_value_node(tparavarsym(tloadnode(left).symtableentry));
  585. { it must be available }
  586. if not assigned(hightree) then
  587. internalerror(200212201);
  588. firstpass(hightree);
  589. secondpass(hightree);
  590. { generate compares }
  591. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  592. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  593. else
  594. begin
  595. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  596. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,right.location,hreg);
  597. end;
  598. current_asmdata.getjumplabel(neglabel);
  599. current_asmdata.getjumplabel(poslabel);
  600. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  601. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  602. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  603. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  604. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  605. { release hightree }
  606. hightree.free;
  607. end;
  608. end
  609. else
  610. if is_dynamic_array(left.resultdef) then
  611. begin
  612. paramanager.getintparaloc(pocall_default,1,paraloc1);
  613. paramanager.getintparaloc(pocall_default,2,paraloc2);
  614. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  615. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  616. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  617. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  618. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  619. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  620. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  621. end;
  622. { for regular arrays, we don't have to do anything because the index has been
  623. type converted to the index type, which already inserted a range check if
  624. necessary }
  625. paraloc1.done;
  626. paraloc2.done;
  627. end;
  628. procedure tcgvecnode.rangecheck_string;
  629. var
  630. paraloc1,
  631. paraloc2: tcgpara;
  632. begin
  633. paraloc1.init;
  634. paraloc2.init;
  635. case tstringdef(left.resultdef).stringtype of
  636. { it's the same for ansi- and wide strings }
  637. st_unicodestring,
  638. st_widestring,
  639. st_ansistring:
  640. begin
  641. paramanager.getintparaloc(pocall_default,1,paraloc1);
  642. paramanager.getintparaloc(pocall_default,2,paraloc2);
  643. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  644. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  645. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  646. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  647. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  648. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_'+upper(tstringdef(left.resultdef).stringtypname)+'_RANGECHECK',false);
  649. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  650. end;
  651. st_shortstring:
  652. begin
  653. {!!!!!!!!!!!!!!!!!}
  654. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  655. end;
  656. st_longstring:
  657. begin
  658. {!!!!!!!!!!!!!!!!!}
  659. end;
  660. end;
  661. paraloc1.done;
  662. paraloc2.done;
  663. end;
  664. procedure tcgvecnode.pass_generate_code;
  665. var
  666. offsetdec,
  667. extraoffset : aint;
  668. t : tnode;
  669. otl,ofl : tasmlabel;
  670. newsize : tcgsize;
  671. mulsize,
  672. bytemulsize,
  673. alignpow : aint;
  674. isjump : boolean;
  675. paraloc1,
  676. paraloc2 : tcgpara;
  677. subsetref : tsubsetreference;
  678. temp : longint;
  679. begin
  680. paraloc1.init;
  681. paraloc2.init;
  682. mulsize:=get_mul_size;
  683. if not is_packed_array(left.resultdef) then
  684. bytemulsize:=mulsize
  685. else
  686. bytemulsize:=mulsize div 8;
  687. newsize:=def_cgsize(resultdef);
  688. secondpass(left);
  689. if left.location.loc=LOC_CREFERENCE then
  690. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  691. else
  692. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  693. { an ansistring needs to be dereferenced }
  694. if is_ansistring(left.resultdef) or
  695. is_wide_or_unicode_string(left.resultdef) then
  696. begin
  697. if nf_callunique in flags then
  698. internalerror(200304236);
  699. {DM!!!!!}
  700. case left.location.loc of
  701. LOC_REGISTER,
  702. LOC_CREGISTER :
  703. begin
  704. {$ifdef m68k}
  705. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  706. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  707. {$else m68k}
  708. location.reference.base:=left.location.register;
  709. {$endif m68k}
  710. end;
  711. LOC_CREFERENCE,
  712. LOC_REFERENCE :
  713. begin
  714. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  715. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,location.reference.base);
  716. end;
  717. else
  718. internalerror(2002032218);
  719. end;
  720. { in ansistrings/widestrings S[1] is p<w>char(S)[0] !! }
  721. if is_ansistring(left.resultdef) then
  722. offsetdec:=1
  723. else
  724. offsetdec:=2;
  725. location.reference.alignment:=offsetdec;
  726. dec(location.reference.offset,offsetdec);
  727. end
  728. else if is_dynamic_array(left.resultdef) then
  729. begin
  730. case left.location.loc of
  731. LOC_REGISTER,
  732. LOC_CREGISTER :
  733. location.reference.base:=left.location.register;
  734. LOC_REFERENCE,
  735. LOC_CREFERENCE :
  736. begin
  737. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  738. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
  739. left.location.reference,location.reference.base);
  740. end;
  741. else
  742. internalerror(2002032219);
  743. end;
  744. { a dynarray points to the start of a memory block, which
  745. we assume to be always aligned to a multiple of the
  746. pointer size
  747. }
  748. location.reference.alignment:=sizeof(pint);
  749. end
  750. else
  751. begin
  752. { may happen in case of function results }
  753. case left.location.loc of
  754. LOC_REGISTER,
  755. LOC_MMREGISTER:
  756. location_force_mem(current_asmdata.CurrAsmList,left.location);
  757. end;
  758. location_copy(location,left.location);
  759. end;
  760. { location must be memory }
  761. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  762. internalerror(200411013);
  763. { offset can only differ from 0 if arraydef }
  764. if (left.resultdef.typ=arraydef) and
  765. not(is_dynamic_array(left.resultdef)) and
  766. (not(is_packed_array(left.resultdef)) or
  767. ((mulsize mod 8 = 0) and
  768. ispowerof2(mulsize div 8,temp)) or
  769. { only orddefs are bitpacked }
  770. not is_ordinal(resultdef)
  771. {$ifndef cpu64bitalu}
  772. or is_64bitint(resultdef)
  773. {$endif not cpu64bitalu}
  774. ) then
  775. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  776. if right.nodetype=ordconstn then
  777. begin
  778. { offset can only differ from 0 if arraydef }
  779. if cs_check_range in current_settings.localswitches then
  780. begin
  781. secondpass(right);
  782. case left.resultdef.typ of
  783. arraydef :
  784. rangecheck_array;
  785. stringdef :
  786. rangecheck_string;
  787. end;
  788. end;
  789. if not(is_packed_array(left.resultdef)) or
  790. ((mulsize mod 8 = 0) and
  791. (ispowerof2(mulsize div 8,temp) or
  792. { only orddefs are bitpacked }
  793. not is_ordinal(resultdef))) then
  794. begin
  795. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  796. inc(location.reference.offset,extraoffset);
  797. { adjust alignment after to this change }
  798. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  799. { don't do this for floats etc.; needed to properly set the }
  800. { size for bitpacked arrays (e.g. a bitpacked array of }
  801. { enums who are size 2 but fit in one byte -> in the array }
  802. { they will be one byte and have to be stored like that) }
  803. if is_packed_array(left.resultdef) and
  804. (tcgsize2size[newsize] <> bytemulsize) then
  805. newsize:=int_cgsize(bytemulsize);
  806. end
  807. else
  808. begin
  809. subsetref.ref := location.reference;
  810. subsetref.ref.alignment := left.resultdef.alignment;
  811. if not ispowerof2(subsetref.ref.alignment,temp) then
  812. internalerror(2006081212);
  813. alignpow:=temp;
  814. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  815. subsetref.bitindexreg := NR_NO;
  816. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  817. subsetref.bitlen := resultdef.packedbitsize;
  818. if (left.location.loc = LOC_REFERENCE) then
  819. location.loc := LOC_SUBSETREF
  820. else
  821. location.loc := LOC_CSUBSETREF;
  822. location.sref := subsetref;
  823. end;
  824. end
  825. else
  826. { not nodetype=ordconstn }
  827. begin
  828. if (cs_opt_level1 in current_settings.optimizerswitches) and
  829. { if we do range checking, we don't }
  830. { need that fancy code (it would be }
  831. { buggy) }
  832. not(cs_check_range in current_settings.localswitches) and
  833. (left.resultdef.typ=arraydef) and
  834. not is_packed_array(left.resultdef) then
  835. begin
  836. extraoffset:=0;
  837. if (right.nodetype=addn) then
  838. begin
  839. if taddnode(right).right.nodetype=ordconstn then
  840. begin
  841. extraoffset:=tordconstnode(taddnode(right).right).value.svalue;
  842. t:=taddnode(right).left;
  843. taddnode(right).left:=nil;
  844. right.free;
  845. right:=t;
  846. end
  847. else if taddnode(right).left.nodetype=ordconstn then
  848. begin
  849. extraoffset:=tordconstnode(taddnode(right).left).value.svalue;
  850. t:=taddnode(right).right;
  851. taddnode(right).right:=nil;
  852. right.free;
  853. right:=t;
  854. end;
  855. end
  856. else if (right.nodetype=subn) then
  857. begin
  858. if taddnode(right).right.nodetype=ordconstn then
  859. begin
  860. extraoffset:=-tordconstnode(taddnode(right).right).value.svalue;
  861. t:=taddnode(right).left;
  862. taddnode(right).left:=nil;
  863. right.free;
  864. right:=t;
  865. end;
  866. end;
  867. inc(location.reference.offset,
  868. mulsize*extraoffset);
  869. end;
  870. { calculate from left to right }
  871. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  872. internalerror(200304237);
  873. isjump:=(right.expectloc=LOC_JUMP);
  874. if isjump then
  875. begin
  876. otl:=current_procinfo.CurrTrueLabel;
  877. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  878. ofl:=current_procinfo.CurrFalseLabel;
  879. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  880. end;
  881. secondpass(right);
  882. { if mulsize = 1, we won't have to modify the index }
  883. location_force_reg(current_asmdata.CurrAsmList,right.location,OS_ADDR,true);
  884. if isjump then
  885. begin
  886. current_procinfo.CurrTrueLabel:=otl;
  887. current_procinfo.CurrFalseLabel:=ofl;
  888. end
  889. else if (right.location.loc = LOC_JUMP) then
  890. internalerror(2006010801);
  891. { produce possible range check code: }
  892. if cs_check_range in current_settings.localswitches then
  893. begin
  894. if left.resultdef.typ=arraydef then
  895. rangecheck_array
  896. else if (left.resultdef.typ=stringdef) then
  897. rangecheck_string;
  898. end;
  899. { insert the register and the multiplication factor in the
  900. reference }
  901. if not is_packed_array(left.resultdef) then
  902. update_reference_reg_mul(right.location.register,mulsize)
  903. else
  904. update_reference_reg_packed(right.location.register,mulsize);
  905. end;
  906. location.size:=newsize;
  907. paraloc1.done;
  908. paraloc2.done;
  909. end;
  910. begin
  911. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  912. cloadparentfpnode:=tcgloadparentfpnode;
  913. caddrnode:=tcgaddrnode;
  914. cderefnode:=tcgderefnode;
  915. csubscriptnode:=tcgsubscriptnode;
  916. cwithnode:=tcgwithnode;
  917. cvecnode:=tcgvecnode;
  918. end.