cpuinfo.pas 8.3 KB

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  1. {
  2. Copyright (c) 2008 by the Free Pascal development team
  3. Basic Processor information for the AVR
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. {$if FPC_FULLVERSION>20700}
  17. bestrealrec = TDoubleRec;
  18. {$endif FPC_FULLVERSION>20700}
  19. ts32real = single;
  20. ts64real = double;
  21. ts80real = type extended;
  22. ts128real = type extended;
  23. ts64comp = comp;
  24. pbestreal=^bestreal;
  25. { possible supported processors for this target }
  26. tcputype =
  27. (cpu_none,
  28. cpu_avr1,
  29. cpu_avr2,
  30. cpu_avr25,
  31. cpu_avr3,
  32. cpu_avr31,
  33. cpu_avr35,
  34. cpu_avr4,
  35. cpu_avr5,
  36. cpu_avr51,
  37. cpu_avr6
  38. );
  39. tfputype =
  40. (fpu_none,
  41. fpu_soft,
  42. fp_libgcc
  43. );
  44. tcontrollertype =
  45. (ct_none,
  46. ct_avrsim,
  47. ct_attiny24,
  48. ct_attiny44,
  49. ct_attiny84,
  50. ct_attiny2313,
  51. ct_atmega48,
  52. ct_atmega88,
  53. ct_atmega168,
  54. ct_atmega368,
  55. ct_atmega8,
  56. ct_atmega16,
  57. ct_atmega32,
  58. ct_atmega64,
  59. ct_atmega128
  60. );
  61. Const
  62. { Is there support for dealing with multiple microcontrollers available }
  63. { for this platform? }
  64. ControllerSupport = true;
  65. {# Size of native extended floating point type }
  66. extended_size = 12;
  67. {# Size of a multimedia register }
  68. mmreg_size = 16;
  69. { target cpu string (used by compiler options) }
  70. target_cpu_string = 'avr';
  71. { calling conventions supported by the code generator }
  72. supported_calling_conventions : tproccalloptions = [
  73. pocall_internproc,
  74. pocall_safecall,
  75. pocall_stdcall,
  76. { same as stdcall only different name mangling }
  77. pocall_cdecl,
  78. { same as stdcall only different name mangling }
  79. pocall_cppdecl,
  80. { same as stdcall but floating point numbers are handled like equal sized integers }
  81. pocall_softfloat
  82. ];
  83. cputypestr : array[tcputype] of string[5] = ('',
  84. 'AVR1',
  85. 'AVR2',
  86. 'AVR25',
  87. 'AVR3',
  88. 'AVR31',
  89. 'AVR35',
  90. 'AVR4',
  91. 'AVR5',
  92. 'AVR51',
  93. 'AVR6'
  94. );
  95. fputypestr : array[tfputype] of string[6] = (
  96. 'NONE',
  97. 'SOFT',
  98. 'LIBGCC'
  99. );
  100. { We know that there are fields after sramsize
  101. but we don't care about this warning }
  102. {$WARN 3177 OFF}
  103. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  104. ((
  105. controllertypestr:'';
  106. controllerunitstr:'';
  107. flashbase:0;
  108. flashsize:0;
  109. srambase:0;
  110. sramsize:0;
  111. eeprombase:0;
  112. eepromsize:0
  113. ),
  114. (
  115. controllertypestr:'AVRSIM';
  116. controllerunitstr:'AVRSIM';
  117. flashbase:0;
  118. flashsize:$20000;
  119. srambase:0;
  120. sramsize:4096;
  121. eeprombase:0;
  122. eepromsize:4096;
  123. ),
  124. (
  125. controllertypestr:'ATTINY24';
  126. controllerunitstr:'ATTINYX4';
  127. flashbase:0;
  128. flashsize:2048;
  129. srambase:0;
  130. sramsize:128;
  131. eeprombase:0;
  132. eepromsize:128
  133. ),
  134. (
  135. controllertypestr:'ATTINY44';
  136. controllerunitstr:'ATTINYX4';
  137. flashbase:0;
  138. flashsize:4096;
  139. srambase:0;
  140. sramsize:256;
  141. eeprombase:0;
  142. eepromsize:256
  143. ),
  144. (
  145. controllertypestr:'ATTINY84';
  146. controllerunitstr:'ATTINYX4';
  147. flashbase:0;
  148. flashsize:8192;
  149. srambase:0;
  150. sramsize:512;
  151. eeprombase:0;
  152. eepromsize:512
  153. ),
  154. (
  155. controllertypestr:'ATTINY2313';
  156. controllerunitstr:'ATTINY2313';
  157. flashbase:0;
  158. flashsize:2048;
  159. srambase:0;
  160. sramsize:128;
  161. eeprombase:0;
  162. eepromsize:128
  163. ),
  164. (
  165. controllertypestr:'ATMEGA48';
  166. controllerunitstr:'ATMEGA48FAM';
  167. flashbase:0;
  168. flashsize:4*1024;
  169. srambase:0;
  170. sramsize:512;
  171. eeprombase:0;
  172. eepromsize:256;
  173. ),
  174. (
  175. controllertypestr:'ATMEGA88';
  176. controllerunitstr:'ATMEGA48FAM';
  177. flashbase:0;
  178. flashsize:8*1024;
  179. srambase:0;
  180. sramsize:1024;
  181. eeprombase:0;
  182. eepromsize:512;
  183. ),
  184. (
  185. controllertypestr:'ATMEGA168';
  186. controllerunitstr:'ATMEGA168FAM';
  187. flashbase:0;
  188. flashsize:16*1024;
  189. srambase:0;
  190. sramsize:1024;
  191. eeprombase:0;
  192. eepromsize:512;
  193. ),
  194. (
  195. controllertypestr:'ATMEGA368';
  196. controllerunitstr:'ATMEGA168FAM';
  197. flashbase:0;
  198. flashsize:32*1024;
  199. srambase:0;
  200. sramsize:2*1024;
  201. eeprombase:0;
  202. eepromsize:1024;
  203. ),
  204. (
  205. controllertypestr:'ATMEGA8';
  206. controllerunitstr:'ATMEGA8';
  207. flashbase:0;
  208. flashsize:$2000;
  209. srambase:0;
  210. sramsize:1024;
  211. eeprombase:0;
  212. eepromsize:512
  213. ),
  214. (
  215. controllertypestr:'ATMEGA16';
  216. controllerunitstr:'ATMEGA16';
  217. flashbase:0;
  218. flashsize:$4000;
  219. srambase:0;
  220. sramsize:1024;
  221. eeprombase:0;
  222. eepromsize:512
  223. ),
  224. (
  225. controllertypestr:'ATMEGA32';
  226. controllerunitstr:'ATMEGA32';
  227. flashbase:0;
  228. flashsize:$8000;
  229. srambase:0;
  230. sramsize:1024;
  231. eeprombase:0;
  232. eepromsize:512
  233. ),
  234. (
  235. controllertypestr:'ATMEGA64';
  236. controllerunitstr:'ATMEGA64';
  237. flashbase:0;
  238. flashsize:$10000;
  239. srambase:0;
  240. sramsize:4096;
  241. eeprombase:0;
  242. eepromsize:2048;
  243. ),
  244. (
  245. controllertypestr:'ATMEGA128';
  246. controllerunitstr:'ATMEGA128';
  247. flashbase:0;
  248. flashsize:$20000;
  249. srambase:0;
  250. sramsize:4096;
  251. eeprombase:0;
  252. eepromsize:4096;
  253. )
  254. );
  255. { Supported optimizations, only used for information }
  256. supported_optimizerswitches = genericlevel1optimizerswitches+
  257. genericlevel2optimizerswitches+
  258. genericlevel3optimizerswitches-
  259. { no need to write info about those }
  260. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  261. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  262. cs_opt_stackframe,cs_opt_nodecse,cs_opt_reorder_fields,cs_opt_fastmath];
  263. level1optimizerswitches = genericlevel1optimizerswitches;
  264. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  265. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion];
  266. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
  267. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  268. type
  269. tcpuflags =
  270. (CPUAVR_HAS_JMP_CALL,
  271. CPUAVR_HAS_MOVW,
  272. CPUAVR_HAS_LPMX,
  273. CPUAVR_HAS_MUL,
  274. CPUAVR_HAS_RAMPZ,
  275. CPUAVR_HAS_ELPM,
  276. CPUAVR_HAS_ELPMX,
  277. CPUAVR_2_BYTE_PC,
  278. CPUAVR_3_BYTE_PC
  279. );
  280. const
  281. cpu_capabilities : array[tcputype] of set of tcpuflags =
  282. ( { cpu_none } [],
  283. { cpu_avr1 } [CPUAVR_2_BYTE_PC],
  284. { cpu_avr2 } [CPUAVR_2_BYTE_PC],
  285. { cpu_avr25 } [CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC],
  286. { cpu_avr3 } [CPUAVR_HAS_JMP_CALL,CPUAVR_2_BYTE_PC],
  287. { cpu_avr31 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_2_BYTE_PC],
  288. { cpu_avr35 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_2_BYTE_PC],
  289. { cpu_avr4 } [CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC],
  290. { cpu_avr5 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_2_BYTE_PC],
  291. { cpu_avr51 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_2_BYTE_PC],
  292. { cpu_avr6 } [CPUAVR_HAS_JMP_CALL,CPUAVR_HAS_MOVW,CPUAVR_HAS_LPMX,CPUAVR_HAS_MUL,CPUAVR_HAS_RAMPZ,CPUAVR_HAS_ELPM,CPUAVR_HAS_ELPMX,CPUAVR_3_BYTE_PC]
  293. );
  294. Implementation
  295. end.