cpubase.pas 16 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Contains the base types for the SPARC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cpubase;
  18. {$i fpcdefs.inc}
  19. {$ModeSwitch advancedrecords}
  20. interface
  21. uses
  22. globtype,strings,cutils,cclasses,aasmbase,cpuinfo,cgbase;
  23. {*****************************************************************************
  24. Assembler Opcodes
  25. *****************************************************************************}
  26. type
  27. { TODO: CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
  28. { don't change the order of these opcodes! }
  29. TAsmOp=({$i opcode.inc});
  30. {# This should define the array of instructions as string }
  31. op2strtable=array[tasmop] of string[11];
  32. Const
  33. {# First value of opcode enumeration }
  34. firstop = low(tasmop);
  35. {# Last value of opcode enumeration }
  36. lastop = high(tasmop);
  37. std_op2str:op2strtable=({$i strinst.inc});
  38. {*****************************************************************************
  39. Registers
  40. *****************************************************************************}
  41. {$ifdef SPARC}
  42. type
  43. { Number of registers used for indexing in tables }
  44. tregisterindex=0..{$i rspnor.inc}-1;
  45. totherregisterset = set of tregisterindex;
  46. const
  47. { Available Superregisters }
  48. {$i rspsup.inc}
  49. { No Subregisters }
  50. R_SUBWHOLE = R_SUBNONE;
  51. { Available Registers }
  52. {$i rspcon.inc}
  53. first_int_imreg = $20;
  54. first_fpu_imreg = $20;
  55. { MM Super register first and last }
  56. first_mm_supreg = 0;
  57. first_mm_imreg = 1;
  58. { TODO: Calculate bsstart}
  59. regnumber_count_bsstart = 128;
  60. regnumber_table : array[tregisterindex] of tregister = (
  61. {$i rspnum.inc}
  62. );
  63. regstabs_table : array[tregisterindex] of ShortInt = (
  64. {$i rspstab.inc}
  65. );
  66. regdwarf_table : array[tregisterindex] of ShortInt = (
  67. {$i rspdwrf.inc}
  68. );
  69. {$endif SPARC}
  70. {$ifdef SPARC64}
  71. type
  72. { Number of registers used for indexing in tables }
  73. tregisterindex=0..{$i rsp64nor.inc}-1;
  74. totherregisterset = set of tregisterindex;
  75. const
  76. { Available Superregisters }
  77. {$i rsp64sup.inc}
  78. { No Subregisters }
  79. R_SUBWHOLE = R_SUBNONE;
  80. { Available Registers }
  81. {$i rsp64con.inc}
  82. first_int_imreg = $20;
  83. first_fpu_imreg = $20;
  84. { MM Super register first and last }
  85. first_mm_supreg = 0;
  86. first_mm_imreg = 1;
  87. { TODO: Calculate bsstart}
  88. regnumber_count_bsstart = 128;
  89. regnumber_table : array[tregisterindex] of tregister = (
  90. {$i rsp64num.inc}
  91. );
  92. regstabs_table : array[tregisterindex] of ShortInt = (
  93. {$i rsp64stab.inc}
  94. );
  95. regdwarf_table : array[tregisterindex] of ShortInt = (
  96. {$i rsp64dwrf.inc}
  97. );
  98. {$endif SPARC64}
  99. {*****************************************************************************
  100. Conditions
  101. *****************************************************************************}
  102. type
  103. TAsmCond=(C_None,
  104. C_A,C_AE,C_B,C_BE,
  105. C_G,C_GE,C_L,C_LE,
  106. C_E,C_NE,
  107. C_POS,C_NEG,C_VC,C_VS,
  108. C_FE,C_FG,C_FL,C_FGE,C_FLE,C_FNE,
  109. C_FU,C_FUG,C_FUL,C_FUGE,C_FULE,C_FO,C_FUE,C_FLG
  110. );
  111. const
  112. firstIntCond=C_A;
  113. lastIntCond=C_VS;
  114. firstFloatCond=C_FE;
  115. lastFloatCond=C_FNE;
  116. floatAsmConds=[C_FE..C_FLG];
  117. cond2str:array[TAsmCond] of string[3]=('',
  118. 'gu','cc','cs','leu',
  119. 'g','ge','l','le',
  120. 'e','ne',
  121. 'pos','neg','vc','vs',
  122. 'e','g','l','ge','le','ne',
  123. 'u','ug','ul','uge','ule','o','ue','lg'
  124. );
  125. {*****************************************************************************
  126. Flags
  127. *****************************************************************************}
  128. type
  129. TSparcFlags = (
  130. { Integer results }
  131. F_E, {Equal}
  132. F_NE, {Not Equal}
  133. F_G, {Greater}
  134. F_L, {Less}
  135. F_GE, {Greater or Equal}
  136. F_LE, {Less or Equal}
  137. F_A, {Above}
  138. F_AE, {Above or Equal, synonym: Carry Clear}
  139. F_B, {Below, synonym: Carry Set}
  140. F_BE, {Below or Equal}
  141. { Floating point results }
  142. F_FE, {Equal}
  143. F_FNE, {Not Equal}
  144. F_FG, {Greater}
  145. F_FL, {Less}
  146. F_FGE, {Greater or Equal}
  147. F_FLE {Less or Equal}
  148. );
  149. TResFlags = record
  150. { either icc or xcc (64 bit }
  151. FlagReg : TRegister;
  152. Flags : TSparcFlags;
  153. procedure Init(r : TRegister;f : TSparcFlags);
  154. end;
  155. {*****************************************************************************
  156. Operand Sizes
  157. *****************************************************************************}
  158. {*****************************************************************************
  159. Constants
  160. *****************************************************************************}
  161. const
  162. max_operands = 3;
  163. maxintregs = 8;
  164. maxfpuregs = 8;
  165. maxaddrregs = 0;
  166. maxvarregs = 8;
  167. varregs : Array [1..maxvarregs] of Tsuperregister =
  168. (RS_L0,RS_L1,RS_L2,RS_L3,RS_L4,RS_L5,RS_L6,RS_L7);
  169. maxfpuvarregs = 1;
  170. fpuvarregs : Array [1..maxfpuvarregs] of TsuperRegister =
  171. (RS_F2);
  172. {*****************************************************************************
  173. Default generic sizes
  174. *****************************************************************************}
  175. {$ifdef SPARC64}
  176. {# Defines the default address size for a processor, }
  177. OS_ADDR = OS_64;
  178. {# the natural int size for a processor,
  179. has to match osuinttype/ossinttype as initialized in psystem }
  180. OS_INT = OS_64;
  181. OS_SINT = OS_S64;
  182. {$else SPARC64}
  183. {# Defines the default address size for a processor, }
  184. OS_ADDR = OS_32;
  185. {# the natural int size for a processor,
  186. has to match osuinttype/ossinttype as initialized in psystem }
  187. OS_INT = OS_32;
  188. OS_SINT = OS_S32;
  189. {$endif SPARC64}
  190. {# the maximum float size for a processor, }
  191. OS_FLOAT = OS_F64;
  192. {# the size of a vector register for a processor }
  193. OS_VECTOR = OS_M64;
  194. {*****************************************************************************
  195. Generic Register names
  196. *****************************************************************************}
  197. {# Stack pointer register }
  198. NR_STACK_POINTER_REG = NR_O6;
  199. RS_STACK_POINTER_REG = RS_O6;
  200. {# Frame pointer register }
  201. NR_FRAME_POINTER_REG = NR_I6;
  202. RS_FRAME_POINTER_REG = RS_I6;
  203. {# Register for addressing absolute data in a position independant way,
  204. such as in PIC code. The exact meaning is ABI specific. For
  205. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  206. Taken from GCC rs6000.h
  207. }
  208. { TODO: As indicated in rs6000.h, but can't find it anywhere else!}
  209. {PIC_OFFSET_REG = R_30;}
  210. { Return address for DWARF }
  211. NR_RETURN_ADDRESS_REG = NR_I7;
  212. { the return_result_reg, is used inside the called function to store its return
  213. value when that is a scalar value otherwise a pointer to the address of the
  214. result is placed inside it }
  215. { Results are returned in this register (32-bit values) }
  216. NR_FUNCTION_RETURN_REG = NR_I0;
  217. RS_FUNCTION_RETURN_REG = RS_I0;
  218. { Low part of 64bit return value }
  219. NR_FUNCTION_RETURN64_LOW_REG = NR_I1;
  220. RS_FUNCTION_RETURN64_LOW_REG = RS_I1;
  221. { High part of 64bit return value }
  222. NR_FUNCTION_RETURN64_HIGH_REG = NR_I0;
  223. RS_FUNCTION_RETURN64_HIGH_REG = RS_I0;
  224. { The value returned from a function is available in this register }
  225. NR_FUNCTION_RESULT_REG = NR_O0;
  226. RS_FUNCTION_RESULT_REG = RS_O0;
  227. { The lowh part of 64bit value returned from a function }
  228. NR_FUNCTION_RESULT64_LOW_REG = NR_O1;
  229. RS_FUNCTION_RESULT64_LOW_REG = RS_O1;
  230. { The high part of 64bit value returned from a function }
  231. NR_FUNCTION_RESULT64_HIGH_REG = NR_O0;
  232. RS_FUNCTION_RESULT64_HIGH_REG = RS_O0;
  233. NR_FPU_RESULT_REG = NR_F0;
  234. NR_MM_RESULT_REG = NR_NO;
  235. PARENT_FRAMEPOINTER_OFFSET = 68; { o0 }
  236. NR_DEFAULTFLAGS = NR_PSR;
  237. RS_DEFAULTFLAGS = RS_PSR;
  238. {*****************************************************************************
  239. GCC /ABI linking information
  240. *****************************************************************************}
  241. {# Registers which must be saved when calling a routine declared as
  242. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  243. saved should be the ones as defined in the target ABI and / or GCC.
  244. This value can be deduced from CALLED_USED_REGISTERS array in the
  245. GCC source.
  246. }
  247. saved_standard_registers : array[0..0] of tsuperregister = (RS_INVALID);
  248. { this is only for the generic code which is not used for this architecture }
  249. saved_address_registers : array[0..0] of tsuperregister = (RS_INVALID);
  250. saved_mm_registers : array[0..0] of tsuperregister = (RS_INVALID);
  251. {# Required parameter alignment when calling a routine declared as
  252. stdcall and cdecl. The alignment value should be the one defined
  253. by GCC or the target ABI.
  254. The value of this constant is equal to the constant
  255. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  256. }
  257. std_param_align = 4; { for 32-bit version only }
  258. {$ifdef SPARC64}
  259. STACK_BIAS = 2047;
  260. {$endif SPARC64}
  261. {*****************************************************************************
  262. CPU Dependent Constants
  263. *****************************************************************************}
  264. const
  265. simm13lo=-4096;
  266. simm13hi=4095;
  267. {*****************************************************************************
  268. Helpers
  269. *****************************************************************************}
  270. function is_calljmp(o:tasmop):boolean;
  271. procedure inverse_flags(var f: TResFlags);
  272. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  273. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  274. function flags_to_cond(const f: TResFlags) : TAsmCond;
  275. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  276. function reg_cgsize(const reg: tregister): tcgsize;
  277. function std_regname(r:Tregister):string;
  278. function std_regnum_search(const s:string):Tregister;
  279. function findreg_by_number(r:Tregister):tregisterindex;
  280. function dwarf_reg(r:tregister):shortint;
  281. implementation
  282. uses
  283. rgBase,verbose;
  284. {$ifdef SPARC}
  285. const
  286. std_regname_table : TRegNameTAble = (
  287. {$i rspstd.inc}
  288. );
  289. regnumber_index : TRegisterIndexTable = (
  290. {$i rsprni.inc}
  291. );
  292. std_regname_index : TRegisterIndexTable = (
  293. {$i rspsri.inc}
  294. );
  295. {$endif SPARC}
  296. {$ifdef SPARC64}
  297. const
  298. std_regname_table : TRegNameTAble = (
  299. {$i rsp64std.inc}
  300. );
  301. regnumber_index : TRegisterIndexTable = (
  302. {$i rsp64rni.inc}
  303. );
  304. std_regname_index : TRegisterIndexTable = (
  305. {$i rsp64sri.inc}
  306. );
  307. {$endif SPARC64}
  308. {*****************************************************************************
  309. Helpers
  310. *****************************************************************************}
  311. function is_calljmp(o:tasmop):boolean;
  312. const
  313. CallJmpOp=[A_JMPL..A_CBccc];
  314. begin
  315. is_calljmp:=(o in CallJmpOp);
  316. end;
  317. procedure inverse_flags(var f: TResFlags);
  318. const
  319. inv_flags: array[TSparcFlags] of TSparcFlags =
  320. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_BE,F_B,F_AE,F_A,
  321. F_FNE,F_FE,F_FLE,F_FGE,F_FL,F_FG);
  322. begin
  323. f.Flags:=inv_flags[f.Flags];
  324. end;
  325. function flags_to_cond(const f:TResFlags):TAsmCond;
  326. const
  327. flags_2_cond:array[TSparcFlags] of TAsmCond=
  328. (C_E,C_NE,C_G,C_L,C_GE,C_LE,C_A,C_AE,C_B,C_BE,
  329. C_FE,C_FNE,C_FG,C_FL,C_FGE,C_FLE);
  330. begin
  331. result:=flags_2_cond[f.Flags];
  332. end;
  333. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  334. begin
  335. case regtype of
  336. R_FPUREGISTER:
  337. case s of
  338. OS_F32:
  339. cgsize2subreg:=R_SUBFS;
  340. OS_F64:
  341. cgsize2subreg:=R_SUBFD;
  342. OS_F128:
  343. cgsize2subreg:=R_SUBFQ;
  344. else
  345. internalerror(2009071903);
  346. end;
  347. else
  348. begin
  349. {$ifdef SPARC32}
  350. if s in [OS_64,OS_S64] then
  351. cgsize2subreg:=R_SUBQ
  352. else
  353. {$endif SPARC32}
  354. cgsize2subreg:=R_SUBWHOLE;
  355. end;
  356. end;
  357. end;
  358. function reg_cgsize(const reg: tregister): tcgsize;
  359. begin
  360. case getregtype(reg) of
  361. R_INTREGISTER :
  362. result:=OS_32;
  363. R_FPUREGISTER :
  364. begin
  365. if getsubreg(reg)=R_SUBFD then
  366. result:=OS_F64
  367. else
  368. result:=OS_F32;
  369. end;
  370. else
  371. internalerror(200303181);
  372. end;
  373. end;
  374. function findreg_by_number(r:Tregister):tregisterindex;
  375. begin
  376. result:=findreg_by_number_table(r,regnumber_index);
  377. end;
  378. function std_regname(r:Tregister):string;
  379. var
  380. p : tregisterindex;
  381. begin
  382. { For double floats show a pair like %f0:%f1 }
  383. if (getsubreg(r)=R_SUBFD) and
  384. (getsupreg(r)<first_fpu_imreg) then
  385. begin
  386. setsubreg(r,R_SUBFS);
  387. p:=findreg_by_number(r);
  388. if p<>0 then
  389. result:=std_regname_table[p]
  390. else
  391. result:=generic_regname(r);
  392. setsupreg(r,getsupreg(r)+1);
  393. p:=findreg_by_number(r);
  394. if p<>0 then
  395. result:=result+':'+std_regname_table[p]
  396. else
  397. result:=result+':'+generic_regname(r);
  398. end
  399. else
  400. begin
  401. p:=findreg_by_number(r);
  402. if p<>0 then
  403. result:=std_regname_table[p]
  404. else
  405. result:=generic_regname(r);
  406. end;
  407. end;
  408. function std_regnum_search(const s:string):Tregister;
  409. begin
  410. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  411. end;
  412. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  413. const
  414. inverse: array[TAsmCond] of TAsmCond=(C_None,
  415. C_BE,C_B,C_AE,C_A,
  416. C_LE,C_L,C_GE,C_G,
  417. C_NE,C_E,
  418. C_NEG,C_POS,C_VS,C_VC,
  419. C_FNE,C_FULE,C_FUGE,C_FUL,C_FUG,C_FE,
  420. C_FO,C_FLE,C_FGE,C_FL,C_FG,C_FU,C_FLG,C_FUE
  421. );
  422. begin
  423. result := inverse[c];
  424. end;
  425. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  426. begin
  427. result := c1 = c2;
  428. end;
  429. function dwarf_reg(r:tregister):shortint;
  430. begin
  431. result:=regdwarf_table[findreg_by_number(r)];
  432. if result=-1 then
  433. internalerror(200603251);
  434. end;
  435. procedure TResFlags.Init(r : TRegister; f : TSparcFlags);
  436. begin
  437. FlagReg:=r;
  438. Flags:=f;
  439. end;
  440. end.