rgx86.pas 13 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. This unit implements the x86 specific class for the register
  4. allocator
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit rgx86;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. cclasses,globtype,
  23. cpubase,cpuinfo,cgbase,cgutils,
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. rgobj;
  26. type
  27. trgx86 = class(trgobj)
  28. function get_spill_subreg(r : tregister) : tsubregister;override;
  29. function do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;override;
  30. end;
  31. tpushedsavedloc = record
  32. case byte of
  33. 0: (pushed: boolean);
  34. 1: (ofs: longint);
  35. end;
  36. tpushedsavedfpu = array[tsuperregister] of tpushedsavedloc;
  37. trgx86fpu = class
  38. { The "usableregsxxx" contain all registers of type "xxx" that }
  39. { aren't currently allocated to a regvar. The "unusedregsxxx" }
  40. { contain all registers of type "xxx" that aren't currently }
  41. { allocated }
  42. unusedregsfpu,usableregsfpu : Tsuperregisterset;
  43. { these counters contain the number of elements in the }
  44. { unusedregsxxx/usableregsxxx sets }
  45. countunusedregsfpu : byte;
  46. { Contains the registers which are really used by the proc itself.
  47. It doesn't take care of registers used by called procedures
  48. }
  49. used_in_proc : tcpuregisterset;
  50. {reg_pushes_other : regvarother_longintarray;
  51. is_reg_var_other : regvarother_booleanarray;
  52. regvar_loaded_other : regvarother_booleanarray;}
  53. { tries to hold the amount of times which the current tree is processed }
  54. t_times: longint;
  55. fpuvaroffset : byte;
  56. constructor create;
  57. function getregisterfpu(list: TAsmList) : tregister;
  58. procedure ungetregisterfpu(list: TAsmList; r : tregister);
  59. { pushes and restores registers }
  60. procedure saveusedfpuregisters(list:TAsmList;
  61. var saved:Tpushedsavedfpu;
  62. const s:Tcpuregisterset);
  63. procedure restoreusedfpuregisters(list:TAsmList;
  64. const saved:Tpushedsavedfpu);
  65. { corrects the fpu stack register by ofs }
  66. function correct_fpuregister(r : tregister;ofs : byte) : tregister;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. verbose;
  72. const
  73. { This value is used in tsaved. If the array value is equal
  74. to this, then this means that this register is not used.}
  75. reg_not_saved = $7fffffff;
  76. {******************************************************************************
  77. Trgcpu
  78. ******************************************************************************}
  79. function trgx86.get_spill_subreg(r : tregister) : tsubregister;
  80. begin
  81. result:=getsubreg(r);
  82. end;
  83. function trgx86.do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;
  84. {Decide wether a "replace" spill is possible, i.e. wether we can replace a register
  85. in an instruction by a memory reference. For example, in "mov ireg26d,0", the imaginary
  86. register ireg26d can be replaced by a memory reference.}
  87. var
  88. replaceoper : longint;
  89. begin
  90. result:=false;
  91. with instr do
  92. begin
  93. replaceoper:=-1;
  94. case ops of
  95. 1 :
  96. begin
  97. if (oper[0]^.typ=top_reg) then
  98. begin
  99. if get_alias(getsupreg(oper[0]^.reg))<>orgreg then
  100. internalerror(200410101);
  101. replaceoper:=0;
  102. end;
  103. end;
  104. 2,3 :
  105. begin
  106. { We can handle opcodes with 2 and 3 operands the same way. The opcodes
  107. with 3 registers are shrd/shld, where the 3rd operand is const or CL,
  108. that doesn't need spilling }
  109. if (oper[0]^.typ=top_reg) and
  110. (oper[1]^.typ=top_reg) and
  111. (get_alias(getsupreg(oper[0]^.reg))<>get_alias(getsupreg(oper[1]^.reg))) then
  112. begin
  113. { One of the arguments shall be able to be replaced }
  114. if (getregtype(oper[0]^.reg)=regtype) and
  115. (get_alias(getsupreg(oper[0]^.reg))=orgreg) then
  116. replaceoper:=0
  117. else
  118. if (getregtype(oper[1]^.reg)=regtype) and
  119. (get_alias(getsupreg(oper[1]^.reg))=orgreg) then
  120. replaceoper:=1
  121. else
  122. internalerror(200704281);
  123. end;
  124. if (oper[0]^.typ=top_reg) and
  125. (oper[1]^.typ=top_const) then
  126. begin
  127. if (getregtype(oper[0]^.reg)=regtype) and
  128. (get_alias(getsupreg(oper[0]^.reg))=orgreg) then
  129. replaceoper:=0
  130. else
  131. internalerror(200704282);
  132. end;
  133. if (oper[0]^.typ=top_const) and
  134. (oper[1]^.typ=top_reg) then
  135. begin
  136. if (getregtype(oper[1]^.reg)=regtype) and
  137. (get_alias(getsupreg(oper[1]^.reg))=orgreg) then
  138. replaceoper:=1
  139. else
  140. internalerror(200704283);
  141. end;
  142. case replaceoper of
  143. 0 :
  144. begin
  145. { Some instructions don't allow memory references
  146. for source }
  147. case instr.opcode of
  148. A_BT,
  149. A_BTS,
  150. A_BTC,
  151. A_BTR :
  152. replaceoper:=-1;
  153. end;
  154. end;
  155. 1 :
  156. begin
  157. { Some instructions don't allow memory references
  158. for destination }
  159. case instr.opcode of
  160. A_MOVZX,
  161. A_MOVSX,
  162. A_MULSS,
  163. A_MULSD,
  164. A_SUBSS,
  165. A_SUBSD,
  166. A_ADDSD,
  167. A_ADDSS,
  168. A_DIVSD,
  169. A_DIVSS,
  170. A_SHLD,
  171. A_SHRD,
  172. A_CVTDQ2PD,
  173. A_CVTDQ2PS,
  174. A_CVTPD2DQ,
  175. A_CVTPD2PI,
  176. A_CVTPD2PS,
  177. A_CVTPI2PD,
  178. A_CVTPS2DQ,
  179. A_CVTPS2PD,
  180. A_CVTSD2SI,
  181. A_CVTSD2SS,
  182. A_CVTSI2SD,
  183. A_CVTSS2SD,
  184. A_CVTTPD2PI,
  185. A_CVTTPD2DQ,
  186. A_CVTTPS2DQ,
  187. A_CVTTSD2SI,
  188. A_CVTPI2PS,
  189. A_CVTPS2PI,
  190. A_CVTSI2SS,
  191. A_CVTSS2SI,
  192. A_CVTTPS2PI,
  193. A_CVTTSS2SI,
  194. A_IMUL,
  195. A_XORPD,
  196. A_XORPS,
  197. A_ORPD,
  198. A_ORPS,
  199. A_ANDPD,
  200. A_ANDPS:
  201. replaceoper:=-1;
  202. end;
  203. end;
  204. end;
  205. end;
  206. end;
  207. { Replace register with spill reference }
  208. if replaceoper<>-1 then
  209. begin
  210. oper[replaceoper]^.typ:=top_ref;
  211. new(oper[replaceoper]^.ref);
  212. oper[replaceoper]^.ref^:=spilltemp;
  213. { memory locations aren't guaranteed to be aligned }
  214. case opcode of
  215. A_MOVAPS:
  216. opcode:=A_MOVSS;
  217. A_MOVAPD:
  218. opcode:=A_MOVSD;
  219. end;
  220. result:=true;
  221. end;
  222. end;
  223. end;
  224. {******************************************************************************
  225. Trgx86fpu
  226. ******************************************************************************}
  227. constructor Trgx86fpu.create;
  228. begin
  229. used_in_proc:=[];
  230. t_times := 0;
  231. unusedregsfpu:=usableregsfpu;
  232. end;
  233. function trgx86fpu.getregisterfpu(list: TAsmList) : tregister;
  234. begin
  235. { note: don't return R_ST0, see comments above implementation of }
  236. { a_loadfpu_* methods in cgcpu (JM) }
  237. result:=NR_ST;
  238. end;
  239. procedure trgx86fpu.ungetregisterfpu(list : TAsmList; r : tregister);
  240. begin
  241. { nothing to do, fpu stack management is handled by the load/ }
  242. { store operations in cgcpu (JM) }
  243. end;
  244. function trgx86fpu.correct_fpuregister(r : tregister;ofs : byte) : tregister;
  245. begin
  246. correct_fpuregister:=r;
  247. setsupreg(correct_fpuregister,ofs);
  248. end;
  249. procedure trgx86fpu.saveusedfpuregisters(list: TAsmList;
  250. var saved : tpushedsavedfpu;
  251. const s: tcpuregisterset);
  252. var
  253. r : tregister;
  254. hr : treference;
  255. begin
  256. used_in_proc:=used_in_proc+s;
  257. {$warning TODO firstsavefpureg}
  258. (*
  259. { don't try to save the fpu registers if not desired (e.g. for }
  260. { the 80x86) }
  261. if firstsavefpureg <> R_NO then
  262. for r.enum:=firstsavefpureg to lastsavefpureg do
  263. begin
  264. saved[r.enum].ofs:=reg_not_saved;
  265. { if the register is used by the calling subroutine and if }
  266. { it's not a regvar (those are handled separately) }
  267. if not is_reg_var_other[r.enum] and
  268. (r.enum in s) and
  269. { and is present in use }
  270. not(r.enum in unusedregsfpu) then
  271. begin
  272. { then save it }
  273. tg.GetTemp(list,extended_size,tt_persistent,hr);
  274. saved[r.enum].ofs:=hr.offset;
  275. cg.a_loadfpu_reg_ref(list,OS_FLOAT,OS_FLOAT,r,hr);
  276. cg.a_reg_dealloc(list,r);
  277. include(unusedregsfpu,r.enum);
  278. inc(countunusedregsfpu);
  279. end;
  280. end;
  281. *)
  282. end;
  283. procedure trgx86fpu.restoreusedfpuregisters(list : TAsmList;
  284. const saved : tpushedsavedfpu);
  285. var
  286. r,r2 : tregister;
  287. hr : treference;
  288. begin
  289. {$warning TODO firstsavefpureg}
  290. (*
  291. if firstsavefpureg <> R_NO then
  292. for r.enum:=lastsavefpureg downto firstsavefpureg do
  293. begin
  294. if saved[r.enum].ofs <> reg_not_saved then
  295. begin
  296. r2.enum:=R_INTREGISTER;
  297. r2.number:=NR_FRAME_POINTER_REG;
  298. reference_reset_base(hr,r2,saved[r.enum].ofs);
  299. cg.a_reg_alloc(list,r);
  300. cg.a_loadfpu_ref_reg(list,OS_FLOAT,OS_FLOAT,hr,r);
  301. if not (r.enum in unusedregsfpu) then
  302. { internalerror(10)
  303. in n386cal we always save/restore the reg *state*
  304. using save/restoreunusedstate -> the current state
  305. may not be real (JM) }
  306. else
  307. begin
  308. dec(countunusedregsfpu);
  309. exclude(unusedregsfpu,r.enum);
  310. end;
  311. tg.UnGetTemp(list,hr);
  312. end;
  313. end;
  314. *)
  315. end;
  316. (*
  317. procedure Trgx86fpu.saveotherregvars(list: TAsmList; const s: totherregisterset);
  318. var
  319. r: Tregister;
  320. begin
  321. if not(cs_opt_regvar in current_settings.optimizerswitches) then
  322. exit;
  323. if firstsavefpureg <> NR_NO then
  324. for r.enum := firstsavefpureg to lastsavefpureg do
  325. if is_reg_var_other[r.enum] and
  326. (r.enum in s) then
  327. store_regvar(list,r);
  328. end;
  329. *)
  330. end.