daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { useful for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO);
  49. {********************************* Types *********************************}
  50. type
  51. TRegEnum = RS_EAX..RS_ESP;
  52. TRegArray = Array[TRegEnum] of tsuperregister;
  53. TRegSet = Set of TRegEnum;
  54. toptreginfo = Record
  55. NewRegsEncountered, OldRegsEncountered: TRegSet;
  56. RegsLoadedForRef: TRegSet;
  57. lastReload: array[RS_EAX..RS_ESP] of tai;
  58. New2OldReg: TRegArray;
  59. end;
  60. {possible actions on an operand: read, write or modify (= read & write)}
  61. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  62. {the possible states of a flag}
  63. TFlagContents = (F_Unknown, F_notSet, F_Set);
  64. TContent = Packed Record
  65. {start and end of block instructions that defines the
  66. content of this register.}
  67. StartMod: tai;
  68. MemWrite: taicpu;
  69. {how many instructions starting with StarMod does the block consist of}
  70. NrOfMods: Word;
  71. {the type of the content of the register: unknown, memory, constant}
  72. Typ: Byte;
  73. case byte of
  74. {starts at 0, gets increased everytime the register is written to}
  75. 1: (WState: Byte;
  76. {starts at 0, gets increased everytime the register is read from}
  77. RState: Byte);
  78. { to compare both states in one operation }
  79. 2: (state: word);
  80. end;
  81. {Contents of the integer registers}
  82. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  83. {contents of the FPU registers}
  84. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  85. {$ifdef tempOpts}
  86. { linked list which allows searching/deleting based on value, no extra frills}
  87. PSearchLinkedListItem = ^TSearchLinkedListItem;
  88. TSearchLinkedListItem = object(TLinkedList_Item)
  89. constructor init;
  90. function equals(p: PSearchLinkedListItem): boolean; virtual;
  91. end;
  92. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  93. TSearchDoubleIntItem = object(TLinkedList_Item)
  94. constructor init(_int1,_int2: longint);
  95. function equals(p: PSearchLinkedListItem): boolean; virtual;
  96. private
  97. int1, int2: longint;
  98. end;
  99. PSearchLinkedList = ^TSearchLinkedList;
  100. TSearchLinkedList = object(TLinkedList)
  101. function searchByValue(p: PSearchLinkedListItem): boolean;
  102. procedure removeByValue(p: PSearchLinkedListItem);
  103. end;
  104. {$endif tempOpts}
  105. {information record with the contents of every register. Every tai object
  106. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  107. TtaiProp = Record
  108. Regs: TRegContent;
  109. { FPURegs: TRegFPUContent;} {currently not yet used}
  110. { allocated Registers }
  111. UsedRegs: TRegSet;
  112. { status of the direction flag }
  113. DirFlag: TFlagContents;
  114. {$ifdef tempOpts}
  115. { currently used temps }
  116. tempAllocs: PSearchLinkedList;
  117. {$endif tempOpts}
  118. { can this instruction be removed? }
  119. CanBeRemoved: Boolean;
  120. { are the resultflags set by this instruction used? }
  121. FlagsUsed: Boolean;
  122. end;
  123. ptaiprop = ^TtaiProp;
  124. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  125. PtaiPropBlock = ^TtaiPropBlock;
  126. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  127. TLabelTableItem = Record
  128. taiObj: tai;
  129. {$ifDef JumpAnal}
  130. InstrNr: Longint;
  131. RefsFound: Word;
  132. JmpsProcessed: Word
  133. {$endif JumpAnal}
  134. end;
  135. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  136. PLabelTable = ^TLabelTable;
  137. {*********************** procedures and functions ************************}
  138. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  139. function RefsEqual(const R1, R2: TReference): Boolean;
  140. function isgp32reg(supreg: tsuperregister): Boolean;
  141. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  142. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  143. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  144. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function reginop(supreg: tsuperregister; const o:toper): boolean;
  146. function instrWritesFlags(p: tai): boolean;
  147. function instrReadsFlags(p: tai): boolean;
  148. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  149. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  150. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  151. const c: tcontent): boolean;
  152. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  153. const c: tcontent; var memwritedestroyed: boolean): boolean;
  154. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  155. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  156. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  157. procedure SkipHead(var p: tai);
  158. function labelCanBeSkipped(p: tai_label): boolean;
  159. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  160. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  161. hp: tai): boolean;
  162. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  163. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  164. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  165. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  166. function sizescompatible(loadsize,newsize: topsize): boolean;
  167. function OpsEqual(const o1,o2:toper): Boolean;
  168. type
  169. tdfaobj = class
  170. constructor create(_list: TAsmList); virtual;
  171. function pass_1(_blockstart: tai): tai;
  172. function pass_generate_code: boolean;
  173. procedure clear;
  174. function getlabelwithsym(sym: tasmlabel): tai;
  175. private
  176. { asm list we're working on }
  177. list: TAsmList;
  178. { current part of the asm list }
  179. blockstart, blockend: tai;
  180. { the amount of taiObjects in the current part of the assembler list }
  181. nroftaiobjs: longint;
  182. { Array which holds all TtaiProps }
  183. taipropblock: ptaipropblock;
  184. { all labels in the current block: their value mapped to their location }
  185. lolab, hilab, labdif: longint;
  186. labeltable: plabeltable;
  187. { Walks through the list to find the lowest and highest label number, inits the }
  188. { labeltable and fixes/optimizes some regallocs }
  189. procedure initlabeltable;
  190. function initdfapass2: boolean;
  191. procedure dodfapass2;
  192. end;
  193. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  194. procedure incState(var S: Byte; amount: longint);
  195. {******************************* Variables *******************************}
  196. var
  197. dfa: tdfaobj;
  198. {*********************** end of Interface section ************************}
  199. Implementation
  200. Uses
  201. {$ifdef csdebug}
  202. cutils,
  203. {$else}
  204. {$ifdef statedebug}
  205. cutils,
  206. {$else}
  207. {$ifdef allocregdebug}
  208. cutils,
  209. {$endif}
  210. {$endif}
  211. {$endif}
  212. globals, systems, verbose, symconst, cgobj,procinfo;
  213. Type
  214. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  215. var
  216. {How many instructions are between the current instruction and the last one
  217. that modified the register}
  218. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  219. {$ifdef tempOpts}
  220. constructor TSearchLinkedListItem.init;
  221. begin
  222. end;
  223. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  224. begin
  225. equals := false;
  226. end;
  227. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  228. begin
  229. int1 := _int1;
  230. int2 := _int2;
  231. end;
  232. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  233. begin
  234. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  235. (TSearchDoubleIntItem(p).int2 = int2);
  236. end;
  237. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  238. var temp: PSearchLinkedListItem;
  239. begin
  240. temp := first;
  241. while (temp <> last.next) and
  242. not(temp.equals(p)) do
  243. temp := temp.next;
  244. searchByValue := temp <> last.next;
  245. end;
  246. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  247. begin
  248. temp := first;
  249. while (temp <> last.next) and
  250. not(temp.equals(p)) do
  251. temp := temp.next;
  252. if temp <> last.next then
  253. begin
  254. remove(temp);
  255. dispose(temp,done);
  256. end;
  257. end;
  258. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  259. {updates UsedRegs with the RegAlloc Information coming after p}
  260. begin
  261. repeat
  262. while assigned(p) and
  263. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  264. ((p.typ = ait_label) and
  265. labelCanBeSkipped(tai_label(current)))) Do
  266. p := tai(p.next);
  267. while assigned(p) and
  268. (p.typ=ait_RegAlloc) Do
  269. begin
  270. case tai_regalloc(p).ratype of
  271. ra_alloc :
  272. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  273. ra_dealloc :
  274. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  275. end;
  276. p := tai(p.next);
  277. end;
  278. until not(assigned(p)) or
  279. (not(p.typ in SkipInstr) and
  280. not((p.typ = ait_label) and
  281. labelCanBeSkipped(tai_label(current))));
  282. end;
  283. {$endif tempOpts}
  284. {************************ Create the Label table ************************}
  285. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  286. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  287. { starting with Starttai and ending with the next "real" instruction }
  288. begin
  289. findregalloc := false;
  290. repeat
  291. while assigned(starttai) and
  292. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  293. ((starttai.typ = ait_label) and
  294. labelcanbeskipped(tai_label(starttai)))) do
  295. starttai := tai(starttai.next);
  296. if assigned(starttai) and
  297. (starttai.typ = ait_regalloc) then
  298. begin
  299. if (tai_regalloc(Starttai).ratype = ratyp) and
  300. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  301. begin
  302. findregalloc:=true;
  303. break;
  304. end;
  305. starttai := tai(starttai.next);
  306. end
  307. else
  308. break;
  309. until false;
  310. end;
  311. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  312. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  313. var
  314. hp2: tai;
  315. begin
  316. hp2 := p;
  317. repeat
  318. hp2 := tai(hp2.previous);
  319. if assigned(hp2) and
  320. (hp2.typ = ait_regalloc) and
  321. (tai_regalloc(hp2).ratype=ra_dealloc) and
  322. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  323. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  324. begin
  325. asml.remove(hp2);
  326. hp2.free;
  327. break;
  328. end;
  329. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  330. end;
  331. begin
  332. case current_procinfo.procdef.returndef.typ of
  333. arraydef,recorddef,pointerdef,
  334. stringdef,enumdef,procdef,objectdef,errordef,
  335. filedef,setdef,procvardef,
  336. classrefdef,forwarddef:
  337. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  338. orddef:
  339. if current_procinfo.procdef.returndef.size <> 0 then
  340. begin
  341. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  342. { for int64/qword }
  343. if current_procinfo.procdef.returndef.size = 8 then
  344. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  345. end;
  346. end;
  347. end;
  348. procedure getNoDeallocRegs(var regs: tregset);
  349. var
  350. regCounter: TSuperRegister;
  351. begin
  352. regs := [];
  353. case current_procinfo.procdef.returndef.typ of
  354. arraydef,recorddef,pointerdef,
  355. stringdef,enumdef,procdef,objectdef,errordef,
  356. filedef,setdef,procvardef,
  357. classrefdef,forwarddef:
  358. regs := [RS_EAX];
  359. orddef:
  360. if current_procinfo.procdef.returndef.size <> 0 then
  361. begin
  362. regs := [RS_EAX];
  363. { for int64/qword }
  364. if current_procinfo.procdef.returndef.size = 8 then
  365. regs := regs + [RS_EDX];
  366. end;
  367. end;
  368. for regCounter := RS_EAX to RS_EBX do
  369. { if not(regCounter in rg.usableregsint) then}
  370. include(regs,regcounter);
  371. end;
  372. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  373. var
  374. hp1: tai;
  375. funcResRegs: tregset;
  376. { funcResReg: boolean;}
  377. begin
  378. { if not(supreg in rg.usableregsint) then
  379. exit;}
  380. { if not(supreg in [RS_EDI]) then
  381. exit;}
  382. getNoDeallocRegs(funcresregs);
  383. { funcResRegs := funcResRegs - rg.usableregsint;}
  384. { funcResRegs := funcResRegs - [RS_EDI];}
  385. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  386. { funcResReg := getsupreg(reg) in funcresregs;}
  387. hp1 := p;
  388. {
  389. while not(funcResReg and
  390. (p.typ = ait_instruction) and
  391. (taicpu(p).opcode = A_JMP) and
  392. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  393. getLastInstruction(p, p) and
  394. not(regInInstruction(supreg, p)) do
  395. hp1 := p;
  396. }
  397. { don't insert a dealloc for registers which contain the function result }
  398. { if they are followed by a jump to the exit label (for exit(...)) }
  399. { if not(funcResReg) or
  400. not((hp1.typ = ait_instruction) and
  401. (taicpu(hp1).opcode = A_JMP) and
  402. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  403. begin
  404. p := tai_regalloc.deAlloc(reg,nil);
  405. insertLLItem(AsmL, hp1.previous, hp1, p);
  406. end;
  407. end;
  408. {************************ Search the Label table ************************}
  409. function findlabel(l: tasmlabel; var hp: tai): boolean;
  410. {searches for the specified label starting from hp as long as the
  411. encountered instructions are labels, to be able to optimize constructs like
  412. jne l2 jmp l2
  413. jmp l3 and l1:
  414. l1: l2:
  415. l2:}
  416. var
  417. p: tai;
  418. begin
  419. p := hp;
  420. while assigned(p) and
  421. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  422. if (p.typ <> ait_Label) or
  423. (tai_label(p).labsym <> l) then
  424. GetNextInstruction(p, p)
  425. else
  426. begin
  427. hp := p;
  428. findlabel := true;
  429. exit
  430. end;
  431. findlabel := false;
  432. end;
  433. {************************ Some general functions ************************}
  434. function tch2reg(ch: tinschange): tsuperregister;
  435. {converts a TChange variable to a TRegister}
  436. const
  437. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  438. begin
  439. if (ch <= CH_REDI) then
  440. tch2reg := ch2reg[ch]
  441. else if (ch <= CH_WEDI) then
  442. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  443. else if (ch <= CH_RWEDI) then
  444. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  445. else if (ch <= CH_MEDI) then
  446. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  447. else
  448. InternalError($db)
  449. end;
  450. { inserts new_one between prev and foll }
  451. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  452. begin
  453. if assigned(prev) then
  454. if assigned(foll) then
  455. begin
  456. if assigned(new_one) then
  457. begin
  458. new_one.previous := prev;
  459. new_one.next := foll;
  460. prev.next := new_one;
  461. foll.previous := new_one;
  462. { shgould we update line information }
  463. if (not (tai(new_one).typ in SkipLineInfo)) and
  464. (not (tai(foll).typ in SkipLineInfo)) then
  465. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  466. end;
  467. end
  468. else
  469. asml.Concat(new_one)
  470. else
  471. if assigned(foll) then
  472. asml.Insert(new_one)
  473. end;
  474. {********************* Compare parts of tai objects *********************}
  475. function regssamesize(reg1, reg2: tregister): boolean;
  476. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  477. 8bit, 16bit or 32bit)}
  478. begin
  479. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  480. internalerror(2003111602);
  481. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  482. end;
  483. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  484. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  485. OldReg and NewReg have the same size (has to be chcked in advance with
  486. RegsSameSize) and that neither equals RS_INVALID}
  487. var
  488. newsupreg, oldsupreg: tsuperregister;
  489. begin
  490. if (newreg = NR_NO) or (oldreg = NR_NO) then
  491. internalerror(2003111601);
  492. newsupreg := getsupreg(newreg);
  493. oldsupreg := getsupreg(oldreg);
  494. with RegInfo Do
  495. begin
  496. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  497. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  498. New2OldReg[newsupreg] := oldsupreg;
  499. end;
  500. end;
  501. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  502. begin
  503. case o.typ Of
  504. top_reg:
  505. if (o.reg <> NR_NO) then
  506. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  507. top_ref:
  508. begin
  509. if o.ref^.base <> NR_NO then
  510. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  511. if o.ref^.index <> NR_NO then
  512. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  513. end;
  514. end;
  515. end;
  516. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  517. begin
  518. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  519. if RegsSameSize(oldreg, newreg) then
  520. with reginfo do
  521. {here we always check for the 32 bit component, because it is possible that
  522. the 8 bit component has not been set, event though NewReg already has been
  523. processed. This happens if it has been compared with a register that doesn't
  524. have an 8 bit component (such as EDI). in that case the 8 bit component is
  525. still set to RS_NO and the comparison in the else-part will fail}
  526. if (getsupreg(oldReg) in OldRegsEncountered) then
  527. if (getsupreg(NewReg) in NewRegsEncountered) then
  528. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  529. { if we haven't encountered the new register yet, but we have encountered the
  530. old one already, the new one can only be correct if it's being written to
  531. (and consequently the old one is also being written to), otherwise
  532. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  533. movl (%eax), %eax movl (%edx), %edx
  534. are considered equivalent}
  535. else
  536. if (opact = opact_write) then
  537. begin
  538. AddReg2RegInfo(oldreg, newreg, reginfo);
  539. RegsEquivalent := true
  540. end
  541. else
  542. Regsequivalent := false
  543. else
  544. if not(getsupreg(newreg) in NewRegsEncountered) and
  545. ((opact = opact_write) or
  546. ((newreg = oldreg) and
  547. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  548. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  549. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  550. begin
  551. AddReg2RegInfo(oldreg, newreg, reginfo);
  552. RegsEquivalent := true
  553. end
  554. else
  555. RegsEquivalent := false
  556. else
  557. RegsEquivalent := false
  558. else
  559. RegsEquivalent := oldreg = newreg
  560. end;
  561. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  562. begin
  563. RefsEquivalent :=
  564. (r1.offset = r2.offset) and
  565. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  566. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  567. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  568. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  569. (r1.relsymbol = r2.relsymbol);
  570. end;
  571. function refsequal(const r1, r2: treference): boolean;
  572. begin
  573. refsequal :=
  574. (r1.offset = r2.offset) and
  575. (r1.segment = r2.segment) and (r1.base = r2.base) and
  576. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  577. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  578. (r1.relsymbol = r2.relsymbol);
  579. end;
  580. {$push}
  581. {$q-}
  582. // checks whether a write to r2 of size "size" contains address r1
  583. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  584. var
  585. realsize1, realsize2: aint;
  586. begin
  587. realsize1 := tcgsize2size[size1];
  588. realsize2 := tcgsize2size[size2];
  589. refsoverlapping :=
  590. (r2.offset <= r1.offset+realsize1) and
  591. (r1.offset <= r2.offset+realsize2) and
  592. (r1.segment = r2.segment) and (r1.base = r2.base) and
  593. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  594. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  595. (r1.relsymbol = r2.relsymbol);
  596. end;
  597. {$pop}
  598. function isgp32reg(supreg: tsuperregister): boolean;
  599. {Checks if the register is a 32 bit general purpose register}
  600. begin
  601. isgp32reg := false;
  602. {$push}{$warnings off}
  603. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  604. isgp32reg := true
  605. {$pop}
  606. end;
  607. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  608. begin {checks whether ref contains a reference to reg}
  609. reginref :=
  610. ((ref.base <> NR_NO) and
  611. (getsupreg(ref.base) = supreg)) or
  612. ((ref.index <> NR_NO) and
  613. (getsupreg(ref.index) = supreg))
  614. end;
  615. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  616. var
  617. p: taicpu;
  618. opcount: longint;
  619. begin
  620. RegReadByInstruction := false;
  621. if hp.typ <> ait_instruction then
  622. exit;
  623. p := taicpu(hp);
  624. case p.opcode of
  625. A_CALL:
  626. regreadbyinstruction := true;
  627. A_IMUL:
  628. case p.ops of
  629. 1:
  630. regReadByInstruction :=
  631. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  632. 2,3:
  633. regReadByInstruction :=
  634. reginop(supreg,p.oper[0]^) or
  635. reginop(supreg,p.oper[1]^);
  636. end;
  637. A_IDIV,A_DIV,A_MUL:
  638. begin
  639. regReadByInstruction :=
  640. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  641. end;
  642. else
  643. begin
  644. for opcount := 0 to p.ops-1 do
  645. if (p.oper[opCount]^.typ = top_ref) and
  646. reginref(supreg,p.oper[opcount]^.ref^) then
  647. begin
  648. RegReadByInstruction := true;
  649. exit
  650. end;
  651. for opcount := 1 to maxinschanges do
  652. case insprop[p.opcode].ch[opcount] of
  653. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  654. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  655. begin
  656. RegReadByInstruction := true;
  657. exit
  658. end;
  659. CH_RWOP1,CH_ROP1,CH_MOP1:
  660. if //(p.oper[0]^.typ = top_reg) and
  661. reginop(supreg,p.oper[0]^) then
  662. begin
  663. RegReadByInstruction := true;
  664. exit
  665. end;
  666. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  667. if //(p.oper[1]^.typ = top_reg) and
  668. reginop(supreg,p.oper[1]^) then
  669. begin
  670. RegReadByInstruction := true;
  671. exit
  672. end;
  673. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  674. if //(p.oper[2]^.typ = top_reg) and
  675. reginop(supreg,p.oper[2]^) then
  676. begin
  677. RegReadByInstruction := true;
  678. exit
  679. end;
  680. end;
  681. end;
  682. end;
  683. end;
  684. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  685. { Checks if reg is used by the instruction p1 }
  686. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  687. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  688. var
  689. p: taicpu;
  690. opcount: longint;
  691. begin
  692. regInInstruction := false;
  693. if p1.typ <> ait_instruction then
  694. exit;
  695. p := taicpu(p1);
  696. case p.opcode of
  697. A_CALL:
  698. regininstruction := true;
  699. A_IMUL:
  700. case p.ops of
  701. 1:
  702. regInInstruction :=
  703. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  704. 2,3:
  705. regInInstruction :=
  706. reginop(supreg,p.oper[0]^) or
  707. reginop(supreg,p.oper[1]^) or
  708. (assigned(p.oper[2]) and
  709. reginop(supreg,p.oper[2]^));
  710. end;
  711. A_IDIV,A_DIV,A_MUL:
  712. regInInstruction :=
  713. reginop(supreg,p.oper[0]^) or
  714. (supreg in [RS_EAX,RS_EDX])
  715. else
  716. begin
  717. for opcount := 0 to p.ops-1 do
  718. if (p.oper[opCount]^.typ = top_ref) and
  719. reginref(supreg,p.oper[opcount]^.ref^) then
  720. begin
  721. regInInstruction := true;
  722. exit
  723. end;
  724. for opcount := 1 to maxinschanges do
  725. case insprop[p.opcode].Ch[opCount] of
  726. CH_REAX..CH_MEDI:
  727. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  728. begin
  729. regInInstruction := true;
  730. exit;
  731. end;
  732. CH_ROp1..CH_MOp1:
  733. if reginop(supreg,p.oper[0]^) then
  734. begin
  735. regInInstruction := true;
  736. exit
  737. end;
  738. Ch_ROp2..Ch_MOp2:
  739. if reginop(supreg,p.oper[1]^) then
  740. begin
  741. regInInstruction := true;
  742. exit
  743. end;
  744. Ch_ROp3..Ch_MOp3:
  745. if reginop(supreg,p.oper[2]^) then
  746. begin
  747. regInInstruction := true;
  748. exit
  749. end;
  750. end;
  751. end;
  752. end;
  753. end;
  754. function reginop(supreg: tsuperregister; const o:toper): boolean;
  755. begin
  756. reginop := false;
  757. case o.typ Of
  758. top_reg:
  759. reginop :=
  760. (getregtype(o.reg) = R_INTREGISTER) and
  761. (supreg = getsupreg(o.reg));
  762. top_ref:
  763. reginop :=
  764. ((o.ref^.base <> NR_NO) and
  765. (supreg = getsupreg(o.ref^.base))) or
  766. ((o.ref^.index <> NR_NO) and
  767. (supreg = getsupreg(o.ref^.index)));
  768. end;
  769. end;
  770. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  771. var
  772. InstrProp: TInsProp;
  773. TmpResult: Boolean;
  774. Cnt: Word;
  775. begin
  776. TmpResult := False;
  777. if supreg = RS_INVALID then
  778. exit;
  779. if (p1.typ = ait_instruction) then
  780. case taicpu(p1).opcode of
  781. A_IMUL:
  782. With taicpu(p1) Do
  783. TmpResult :=
  784. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  785. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  786. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  787. A_DIV, A_IDIV, A_MUL:
  788. With taicpu(p1) Do
  789. TmpResult :=
  790. (supreg in [RS_EAX,RS_EDX]);
  791. else
  792. begin
  793. Cnt := 1;
  794. InstrProp := InsProp[taicpu(p1).OpCode];
  795. while (Cnt <= maxinschanges) and
  796. (InstrProp.Ch[Cnt] <> Ch_None) and
  797. not(TmpResult) Do
  798. begin
  799. case InstrProp.Ch[Cnt] Of
  800. Ch_WEAX..Ch_MEDI:
  801. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  802. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  803. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  804. reginop(supreg,taicpu(p1).oper[0]^);
  805. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  806. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  807. reginop(supreg,taicpu(p1).oper[1]^);
  808. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  809. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  810. reginop(supreg,taicpu(p1).oper[2]^);
  811. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  812. Ch_ALL: TmpResult := true;
  813. end;
  814. inc(Cnt)
  815. end
  816. end
  817. end;
  818. RegModifiedByInstruction := TmpResult
  819. end;
  820. function instrWritesFlags(p: tai): boolean;
  821. var
  822. l: longint;
  823. begin
  824. instrWritesFlags := true;
  825. case p.typ of
  826. ait_instruction:
  827. begin
  828. for l := 1 to maxinschanges do
  829. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  830. exit;
  831. end;
  832. ait_label:
  833. exit;
  834. end;
  835. instrWritesFlags := false;
  836. end;
  837. function instrReadsFlags(p: tai): boolean;
  838. var
  839. l: longint;
  840. begin
  841. instrReadsFlags := true;
  842. case p.typ of
  843. ait_instruction:
  844. begin
  845. for l := 1 to maxinschanges do
  846. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  847. exit;
  848. end;
  849. ait_label:
  850. exit;
  851. end;
  852. instrReadsFlags := false;
  853. end;
  854. {********************* GetNext and GetLastInstruction *********************}
  855. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  856. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  857. { next tai object in Next. Returns false if there isn't any }
  858. begin
  859. repeat
  860. if (Current.typ = ait_marker) and
  861. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  862. begin
  863. GetNextInstruction := False;
  864. Next := Nil;
  865. Exit
  866. end;
  867. Current := tai(current.Next);
  868. while assigned(Current) and
  869. ((current.typ in skipInstr) or
  870. ((current.typ = ait_label) and
  871. labelCanBeSkipped(tai_label(current)))) do
  872. Current := tai(current.Next);
  873. { if assigned(Current) and
  874. (current.typ = ait_Marker) and
  875. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  876. begin
  877. while assigned(Current) and
  878. ((current.typ <> ait_Marker) or
  879. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  880. Current := tai(current.Next);
  881. end;}
  882. until not(assigned(Current)) or
  883. (current.typ <> ait_Marker) or
  884. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  885. Next := Current;
  886. if assigned(Current) and
  887. not((current.typ in SkipInstr) or
  888. ((current.typ = ait_label) and
  889. labelCanBeSkipped(tai_label(current))))
  890. then
  891. GetNextInstruction :=
  892. not((current.typ = ait_marker) and
  893. (tai_marker(current).kind = mark_AsmBlockStart))
  894. else
  895. begin
  896. GetNextInstruction := False;
  897. Next := nil;
  898. end;
  899. end;
  900. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  901. {skips the ait-types in SkipInstr puts the previous tai object in
  902. Last. Returns false if there isn't any}
  903. begin
  904. repeat
  905. Current := tai(current.previous);
  906. while assigned(Current) and
  907. (((current.typ = ait_Marker) and
  908. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  909. (current.typ in SkipInstr) or
  910. ((current.typ = ait_label) and
  911. labelCanBeSkipped(tai_label(current)))) Do
  912. Current := tai(current.previous);
  913. { if assigned(Current) and
  914. (current.typ = ait_Marker) and
  915. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  916. begin
  917. while assigned(Current) and
  918. ((current.typ <> ait_Marker) or
  919. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  920. Current := tai(current.previous);
  921. end;}
  922. until not(assigned(Current)) or
  923. (current.typ <> ait_Marker) or
  924. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  925. if not(assigned(Current)) or
  926. (current.typ in SkipInstr) or
  927. ((current.typ = ait_label) and
  928. labelCanBeSkipped(tai_label(current))) or
  929. ((current.typ = ait_Marker) and
  930. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  931. then
  932. begin
  933. Last := nil;
  934. GetLastInstruction := False
  935. end
  936. else
  937. begin
  938. Last := Current;
  939. GetLastInstruction := True;
  940. end;
  941. end;
  942. procedure SkipHead(var p: tai);
  943. var
  944. oldp: tai;
  945. begin
  946. repeat
  947. oldp := p;
  948. if (p.typ in SkipInstr) or
  949. ((p.typ = ait_marker) and
  950. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd])) then
  951. GetNextInstruction(p,p)
  952. else if ((p.Typ = Ait_Marker) and
  953. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  954. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  955. TAsmList list}
  956. GetNextInstruction(tai(p.previous),p);
  957. until p = oldp
  958. end;
  959. function labelCanBeSkipped(p: tai_label): boolean;
  960. begin
  961. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  962. end;
  963. {******************* The Data Flow Analyzer functions ********************}
  964. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  965. hp: tai): boolean;
  966. { assumes reg is a 32bit register }
  967. var
  968. p: taicpu;
  969. begin
  970. if not assigned(hp) or
  971. (hp.typ <> ait_instruction) then
  972. begin
  973. regLoadedWithNewValue := false;
  974. exit;
  975. end;
  976. p := taicpu(hp);
  977. regLoadedWithNewValue :=
  978. (((p.opcode = A_MOV) or
  979. (p.opcode = A_MOVZX) or
  980. (p.opcode = A_MOVSX) or
  981. (p.opcode = A_LEA)) and
  982. (p.oper[1]^.typ = top_reg) and
  983. (getsupreg(p.oper[1]^.reg) = supreg) and
  984. (canDependOnPrevValue or
  985. (p.oper[0]^.typ = top_const) or
  986. ((p.oper[0]^.typ = top_reg) and
  987. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  988. ((p.oper[0]^.typ = top_ref) and
  989. not regInRef(supreg,p.oper[0]^.ref^)))) or
  990. ((p.opcode = A_POP) and
  991. (getsupreg(p.oper[0]^.reg) = supreg));
  992. end;
  993. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  994. {updates UsedRegs with the RegAlloc Information coming after p}
  995. begin
  996. repeat
  997. while assigned(p) and
  998. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  999. ((p.typ = ait_label) and
  1000. labelCanBeSkipped(tai_label(p))) or
  1001. ((p.typ = ait_marker) and
  1002. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd]))) do
  1003. p := tai(p.next);
  1004. while assigned(p) and
  1005. (p.typ=ait_RegAlloc) Do
  1006. begin
  1007. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1008. begin
  1009. case tai_regalloc(p).ratype of
  1010. ra_alloc :
  1011. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1012. ra_dealloc :
  1013. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1014. end;
  1015. end;
  1016. p := tai(p.next);
  1017. end;
  1018. until not(assigned(p)) or
  1019. (not(p.typ in SkipInstr) and
  1020. not((p.typ = ait_label) and
  1021. labelCanBeSkipped(tai_label(p))));
  1022. end;
  1023. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  1024. { allocates register reg between (and including) instructions p1 and p2 }
  1025. { the type of p1 and p2 must not be in SkipInstr }
  1026. { note that this routine is both called from the peephole optimizer }
  1027. { where optinfo is not yet initialised) and from the cse (where it is) }
  1028. var
  1029. hp, start: tai;
  1030. removedsomething,
  1031. firstRemovedWasAlloc,
  1032. lastRemovedWasDealloc: boolean;
  1033. supreg: tsuperregister;
  1034. begin
  1035. {$ifdef EXTDEBUG}
  1036. if assigned(p1.optinfo) and
  1037. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1038. internalerror(2004101010);
  1039. {$endif EXTDEBUG}
  1040. start := p1;
  1041. if (reg = NR_ESP) or
  1042. (reg = current_procinfo.framepointer) or
  1043. not(assigned(p1)) then
  1044. { this happens with registers which are loaded implicitely, outside the }
  1045. { current block (e.g. esi with self) }
  1046. exit;
  1047. supreg := getsupreg(reg);
  1048. { make sure we allocate it for this instruction }
  1049. getnextinstruction(p2,p2);
  1050. lastRemovedWasDealloc := false;
  1051. removedSomething := false;
  1052. firstRemovedWasAlloc := false;
  1053. {$ifdef allocregdebug}
  1054. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1055. ' from here...'));
  1056. insertllitem(asml,p1.previous,p1,hp);
  1057. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1058. ' till here...'));
  1059. insertllitem(asml,p2,p2.next,hp);
  1060. {$endif allocregdebug}
  1061. if not(supreg in initialusedregs) then
  1062. begin
  1063. hp := tai_regalloc.alloc(reg,nil);
  1064. insertllItem(asmL,p1.previous,p1,hp);
  1065. include(initialusedregs,supreg);
  1066. end;
  1067. while assigned(p1) and
  1068. (p1 <> p2) do
  1069. begin
  1070. if assigned(p1.optinfo) then
  1071. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1072. p1 := tai(p1.next);
  1073. repeat
  1074. while assigned(p1) and
  1075. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1076. p1 := tai(p1.next);
  1077. { remove all allocation/deallocation info about the register in between }
  1078. if assigned(p1) and
  1079. (p1.typ = ait_regalloc) then
  1080. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1081. begin
  1082. if not removedSomething then
  1083. begin
  1084. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1085. removedSomething := true;
  1086. end;
  1087. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1088. hp := tai(p1.Next);
  1089. asml.Remove(p1);
  1090. p1.free;
  1091. p1 := hp;
  1092. end
  1093. else p1 := tai(p1.next);
  1094. until not(assigned(p1)) or
  1095. not(p1.typ in SkipInstr);
  1096. end;
  1097. if assigned(p1) then
  1098. begin
  1099. if firstRemovedWasAlloc then
  1100. begin
  1101. hp := tai_regalloc.Alloc(reg,nil);
  1102. insertLLItem(asmL,start.previous,start,hp);
  1103. end;
  1104. if lastRemovedWasDealloc then
  1105. begin
  1106. hp := tai_regalloc.DeAlloc(reg,nil);
  1107. insertLLItem(asmL,p1.previous,p1,hp);
  1108. end;
  1109. end;
  1110. end;
  1111. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1112. var
  1113. hp: tai;
  1114. first: boolean;
  1115. begin
  1116. findregdealloc := false;
  1117. first := true;
  1118. while assigned(p.previous) and
  1119. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1120. ((tai(p.previous).typ = ait_label) and
  1121. labelCanBeSkipped(tai_label(p.previous)))) do
  1122. begin
  1123. p := tai(p.previous);
  1124. if (p.typ = ait_regalloc) and
  1125. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1126. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1127. if (tai_regalloc(p).ratype=ra_dealloc) then
  1128. if first then
  1129. begin
  1130. findregdealloc := true;
  1131. break;
  1132. end
  1133. else
  1134. begin
  1135. findRegDealloc :=
  1136. getNextInstruction(p,hp) and
  1137. regLoadedWithNewValue(supreg,false,hp);
  1138. break
  1139. end
  1140. else
  1141. first := false;
  1142. end
  1143. end;
  1144. procedure incState(var S: Byte; amount: longint);
  1145. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1146. errors}
  1147. begin
  1148. if (s <= $ff - amount) then
  1149. inc(s, amount)
  1150. else s := longint(s) + amount - $ff;
  1151. end;
  1152. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1153. { Content is the sequence of instructions that describes the contents of }
  1154. { seqReg. reg is being overwritten by the current instruction. if the }
  1155. { content of seqReg depends on reg (ie. because of a }
  1156. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1157. var
  1158. p: tai;
  1159. Counter: Word;
  1160. TmpResult: Boolean;
  1161. RegsChecked: TRegSet;
  1162. begin
  1163. RegsChecked := [];
  1164. p := Content.StartMod;
  1165. TmpResult := False;
  1166. Counter := 1;
  1167. while not(TmpResult) and
  1168. (Counter <= Content.NrOfMods) Do
  1169. begin
  1170. if (p.typ = ait_instruction) and
  1171. ((taicpu(p).opcode = A_MOV) or
  1172. (taicpu(p).opcode = A_MOVZX) or
  1173. (taicpu(p).opcode = A_MOVSX) or
  1174. (taicpu(p).opcode = A_LEA)) and
  1175. (taicpu(p).oper[0]^.typ = top_ref) then
  1176. With taicpu(p).oper[0]^.ref^ Do
  1177. if ((base = current_procinfo.FramePointer) or
  1178. (assigned(symbol) and (base = NR_NO))) and
  1179. (index = NR_NO) then
  1180. begin
  1181. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1182. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1183. break;
  1184. end
  1185. else
  1186. tmpResult :=
  1187. regReadByInstruction(supreg,p) and
  1188. regModifiedByInstruction(seqReg,p)
  1189. else
  1190. tmpResult :=
  1191. regReadByInstruction(supreg,p) and
  1192. regModifiedByInstruction(seqReg,p);
  1193. inc(Counter);
  1194. GetNextInstruction(p,p)
  1195. end;
  1196. sequenceDependsonReg := TmpResult
  1197. end;
  1198. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1199. var
  1200. counter: tsuperregister;
  1201. begin
  1202. for counter := RS_EAX to RS_EDI do
  1203. if counter <> supreg then
  1204. with p1^.regs[counter] Do
  1205. begin
  1206. if (typ in [con_ref,con_noRemoveRef]) and
  1207. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1208. if typ in [con_ref, con_invalid] then
  1209. typ := con_invalid
  1210. { con_noRemoveRef = con_unknown }
  1211. else
  1212. typ := con_unknown;
  1213. if assigned(memwrite) and
  1214. regInRef(counter,memwrite.oper[1]^.ref^) then
  1215. memwrite := nil;
  1216. end;
  1217. end;
  1218. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1219. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1220. contents of registers are loaded with a memory location based on reg.
  1221. doincState is false when this register has to be destroyed not because
  1222. it's contents are directly modified/overwritten, but because of an indirect
  1223. action (e.g. this register holds the contents of a variable and the value
  1224. of the variable in memory is changed) }
  1225. begin
  1226. {$push}{$warnings off}
  1227. { the following happens for fpu registers }
  1228. if (supreg < low(NrOfInstrSinceLastMod)) or
  1229. (supreg > high(NrOfInstrSinceLastMod)) then
  1230. exit;
  1231. {$pop}
  1232. NrOfInstrSinceLastMod[supreg] := 0;
  1233. with p1^.regs[supreg] do
  1234. begin
  1235. if doincState then
  1236. begin
  1237. incState(wstate,1);
  1238. typ := con_unknown;
  1239. startmod := nil;
  1240. end
  1241. else
  1242. if typ in [con_ref,con_const,con_invalid] then
  1243. typ := con_invalid
  1244. { con_noRemoveRef = con_unknown }
  1245. else
  1246. typ := con_unknown;
  1247. memwrite := nil;
  1248. end;
  1249. invalidateDependingRegs(p1,supreg);
  1250. end;
  1251. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1252. begin
  1253. if (p.typ = ait_instruction) then
  1254. begin
  1255. case taicpu(p).oper[0]^.typ Of
  1256. top_reg:
  1257. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1258. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1259. top_ref:
  1260. With TReference(taicpu(p).oper[0]^) Do
  1261. begin
  1262. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1263. then RegSet := RegSet + [base];
  1264. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1265. then RegSet := RegSet + [index];
  1266. end;
  1267. end;
  1268. case taicpu(p).oper[1]^.typ Of
  1269. top_reg:
  1270. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1271. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1272. top_ref:
  1273. With TReference(taicpu(p).oper[1]^) Do
  1274. begin
  1275. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1276. then RegSet := RegSet + [base];
  1277. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1278. then RegSet := RegSet + [index];
  1279. end;
  1280. end;
  1281. end;
  1282. end;}
  1283. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1284. begin {checks whether the two ops are equivalent}
  1285. OpsEquivalent := False;
  1286. if o1.typ=o2.typ then
  1287. case o1.typ Of
  1288. top_reg:
  1289. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1290. top_ref:
  1291. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1292. Top_Const:
  1293. OpsEquivalent := o1.val = o2.val;
  1294. Top_None:
  1295. OpsEquivalent := True
  1296. end;
  1297. end;
  1298. function OpsEqual(const o1,o2:toper): Boolean;
  1299. begin {checks whether the two ops are equal}
  1300. OpsEqual := False;
  1301. if o1.typ=o2.typ then
  1302. case o1.typ Of
  1303. top_reg :
  1304. OpsEqual:=o1.reg=o2.reg;
  1305. top_ref :
  1306. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1307. Top_Const :
  1308. OpsEqual:=o1.val=o2.val;
  1309. Top_None :
  1310. OpsEqual := True
  1311. end;
  1312. end;
  1313. function sizescompatible(loadsize,newsize: topsize): boolean;
  1314. begin
  1315. case loadsize of
  1316. S_B,S_BW,S_BL:
  1317. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1318. S_W,S_WL:
  1319. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1320. else
  1321. sizescompatible := newsize = S_L;
  1322. end;
  1323. end;
  1324. function opscompatible(p1,p2: taicpu): boolean;
  1325. begin
  1326. case p1.opcode of
  1327. A_MOVZX,A_MOVSX:
  1328. opscompatible :=
  1329. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1330. sizescompatible(p1.opsize,p2.opsize);
  1331. else
  1332. opscompatible :=
  1333. (p1.opcode = p2.opcode) and
  1334. (p1.ops = p2.ops) and
  1335. (p1.opsize = p2.opsize);
  1336. end;
  1337. end;
  1338. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1339. {$ifdef csdebug}
  1340. var
  1341. hp: tai;
  1342. {$endif csdebug}
  1343. begin {checks whether two taicpu instructions are equal}
  1344. if assigned(p1) and assigned(p2) and
  1345. (tai(p1).typ = ait_instruction) and
  1346. (tai(p2).typ = ait_instruction) and
  1347. opscompatible(taicpu(p1),taicpu(p2)) and
  1348. (not(assigned(taicpu(p1).oper[0])) or
  1349. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1350. (not(assigned(taicpu(p1).oper[1])) or
  1351. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1352. (not(assigned(taicpu(p1).oper[2])) or
  1353. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1354. {both instructions have the same structure:
  1355. "<operator> <operand of type1>, <operand of type 2>"}
  1356. if ((taicpu(p1).opcode = A_MOV) or
  1357. (taicpu(p1).opcode = A_MOVZX) or
  1358. (taicpu(p1).opcode = A_MOVSX) or
  1359. (taicpu(p1).opcode = A_LEA)) and
  1360. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1361. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1362. {the "old" instruction is a load of a register with a new value, not with
  1363. a value based on the contents of this register (so no "mov (reg), reg")}
  1364. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1365. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1366. {the "new" instruction is also a load of a register with a new value, and
  1367. this value is fetched from the same memory location}
  1368. begin
  1369. With taicpu(p2).oper[0]^.ref^ Do
  1370. begin
  1371. if (base <> NR_NO) and
  1372. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1373. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1374. if (index <> NR_NO) and
  1375. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1376. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1377. end;
  1378. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1379. from the reference are the same in the old and in the new instruction
  1380. sequence}
  1381. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1382. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1383. InstructionsEquivalent :=
  1384. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1385. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1386. end
  1387. {the registers are loaded with values from different memory locations. if
  1388. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1389. would be considered equivalent}
  1390. else
  1391. InstructionsEquivalent := False
  1392. else
  1393. {load register with a value based on the current value of this register}
  1394. begin
  1395. With taicpu(p2).oper[0]^.ref^ Do
  1396. begin
  1397. if (base <> NR_NO) and
  1398. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1399. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1400. {it won't do any harm if the register is already in RegsLoadedForRef}
  1401. begin
  1402. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1403. {$ifdef csdebug}
  1404. Writeln(std_regname(base), ' added');
  1405. {$endif csdebug}
  1406. end;
  1407. if (index <> NR_NO) and
  1408. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1409. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1410. begin
  1411. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1412. {$ifdef csdebug}
  1413. Writeln(std_regname(index), ' added');
  1414. {$endif csdebug}
  1415. end;
  1416. end;
  1417. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1418. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1419. begin
  1420. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1421. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1422. {$ifdef csdebug}
  1423. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1424. {$endif csdebug}
  1425. end;
  1426. InstructionsEquivalent :=
  1427. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1428. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1429. end
  1430. else
  1431. {an instruction <> mov, movzx, movsx}
  1432. begin
  1433. {$ifdef csdebug}
  1434. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1435. hp.previous := p2;
  1436. hp.next := p2.next;
  1437. p2.next.previous := hp;
  1438. p2.next := hp;
  1439. {$endif csdebug}
  1440. InstructionsEquivalent :=
  1441. (not(assigned(taicpu(p1).oper[0])) or
  1442. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1443. (not(assigned(taicpu(p1).oper[1])) or
  1444. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1445. (not(assigned(taicpu(p1).oper[2])) or
  1446. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1447. end
  1448. {the instructions haven't even got the same structure, so they're certainly
  1449. not equivalent}
  1450. else
  1451. begin
  1452. {$ifdef csdebug}
  1453. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1454. hp.previous := p2;
  1455. hp.next := p2.next;
  1456. p2.next.previous := hp;
  1457. p2.next := hp;
  1458. {$endif csdebug}
  1459. InstructionsEquivalent := False;
  1460. end;
  1461. {$ifdef csdebug}
  1462. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1463. hp.previous := p2;
  1464. hp.next := p2.next;
  1465. p2.next.previous := hp;
  1466. p2.next := hp;
  1467. {$endif csdebug}
  1468. end;
  1469. (*
  1470. function InstructionsEqual(p1, p2: tai): Boolean;
  1471. begin {checks whether two taicpu instructions are equal}
  1472. InstructionsEqual :=
  1473. assigned(p1) and assigned(p2) and
  1474. ((tai(p1).typ = ait_instruction) and
  1475. (tai(p1).typ = ait_instruction) and
  1476. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1477. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1478. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1479. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1480. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1481. end;
  1482. *)
  1483. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1484. begin
  1485. if supreg in [RS_EAX..RS_EDI] then
  1486. incState(p^.regs[supreg].rstate,1)
  1487. end;
  1488. procedure readref(p: ptaiprop; const ref: preference);
  1489. begin
  1490. if ref^.base <> NR_NO then
  1491. readreg(p, getsupreg(ref^.base));
  1492. if ref^.index <> NR_NO then
  1493. readreg(p, getsupreg(ref^.index));
  1494. end;
  1495. procedure ReadOp(p: ptaiprop;const o:toper);
  1496. begin
  1497. case o.typ Of
  1498. top_reg: readreg(p, getsupreg(o.reg));
  1499. top_ref: readref(p, o.ref);
  1500. end;
  1501. end;
  1502. function RefInInstruction(const ref: TReference; p: tai;
  1503. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1504. {checks whehter ref is used in p}
  1505. var
  1506. mysize: tcgsize;
  1507. TmpResult: Boolean;
  1508. begin
  1509. TmpResult := False;
  1510. if (p.typ = ait_instruction) then
  1511. begin
  1512. mysize := topsize2tcgsize[taicpu(p).opsize];
  1513. if (taicpu(p).ops >= 1) and
  1514. (taicpu(p).oper[0]^.typ = top_ref) then
  1515. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1516. if not(TmpResult) and
  1517. (taicpu(p).ops >= 2) and
  1518. (taicpu(p).oper[1]^.typ = top_ref) then
  1519. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1520. if not(TmpResult) and
  1521. (taicpu(p).ops >= 3) and
  1522. (taicpu(p).oper[2]^.typ = top_ref) then
  1523. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1524. end;
  1525. RefInInstruction := TmpResult;
  1526. end;
  1527. function RefInSequence(const ref: TReference; Content: TContent;
  1528. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1529. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1530. tai objects) to see whether ref is used somewhere}
  1531. var p: tai;
  1532. Counter: Word;
  1533. TmpResult: Boolean;
  1534. begin
  1535. p := Content.StartMod;
  1536. TmpResult := False;
  1537. Counter := 1;
  1538. while not(TmpResult) and
  1539. (Counter <= Content.NrOfMods) Do
  1540. begin
  1541. if (p.typ = ait_instruction) and
  1542. RefInInstruction(ref, p, RefsEq, size)
  1543. then TmpResult := True;
  1544. inc(Counter);
  1545. GetNextInstruction(p,p)
  1546. end;
  1547. RefInSequence := TmpResult
  1548. end;
  1549. {$push}
  1550. {$q-}
  1551. // checks whether a write to r2 of size "size" contains address r1
  1552. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1553. var
  1554. realsize1, realsize2: aint;
  1555. begin
  1556. realsize1 := tcgsize2size[size1];
  1557. realsize2 := tcgsize2size[size2];
  1558. arrayrefsoverlapping :=
  1559. (r2.offset <= r1.offset+realsize1) and
  1560. (r1.offset <= r2.offset+realsize2) and
  1561. (r1.segment = r2.segment) and
  1562. (r1.symbol=r2.symbol) and
  1563. (r1.base = r2.base)
  1564. end;
  1565. {$pop}
  1566. function isSimpleRef(const ref: treference): boolean;
  1567. { returns true if ref is reference to a local or global variable, to a }
  1568. { parameter or to an object field (this includes arrays). Returns false }
  1569. { otherwise. }
  1570. begin
  1571. isSimpleRef :=
  1572. assigned(ref.symbol) or
  1573. (ref.base = current_procinfo.framepointer);
  1574. end;
  1575. function containsPointerRef(p: tai): boolean;
  1576. { checks if an instruction contains a reference which is a pointer location }
  1577. var
  1578. hp: taicpu;
  1579. count: longint;
  1580. begin
  1581. containsPointerRef := false;
  1582. if p.typ <> ait_instruction then
  1583. exit;
  1584. hp := taicpu(p);
  1585. for count := 0 to hp.ops-1 do
  1586. begin
  1587. case hp.oper[count]^.typ of
  1588. top_ref:
  1589. if not isSimpleRef(hp.oper[count]^.ref^) then
  1590. begin
  1591. containsPointerRef := true;
  1592. exit;
  1593. end;
  1594. top_none:
  1595. exit;
  1596. end;
  1597. end;
  1598. end;
  1599. function containsPointerLoad(c: tcontent): boolean;
  1600. { checks whether the contents of a register contain a pointer reference }
  1601. var
  1602. p: tai;
  1603. count: longint;
  1604. begin
  1605. containsPointerLoad := false;
  1606. p := c.startmod;
  1607. for count := c.nrOfMods downto 1 do
  1608. begin
  1609. if containsPointerRef(p) then
  1610. begin
  1611. containsPointerLoad := true;
  1612. exit;
  1613. end;
  1614. getnextinstruction(p,p);
  1615. end;
  1616. end;
  1617. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1618. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1619. { returns whether the contents c of reg are invalid after regWritten is }
  1620. { is written to ref }
  1621. var
  1622. refsEq: trefCompare;
  1623. begin
  1624. if isSimpleRef(ref) then
  1625. begin
  1626. if (ref.index <> NR_NO) or
  1627. (assigned(ref.symbol) and
  1628. (ref.base <> NR_NO)) then
  1629. { local/global variable or parameter which is an array }
  1630. refsEq := @arrayRefsOverlapping
  1631. else
  1632. { local/global variable or parameter which is not an array }
  1633. refsEq := @refsOverlapping;
  1634. invalsmemwrite :=
  1635. assigned(c.memwrite) and
  1636. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1637. containsPointerRef(c.memwrite)) or
  1638. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1639. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1640. begin
  1641. writeToMemDestroysContents := false;
  1642. exit;
  1643. end;
  1644. { write something to a parameter, a local or global variable, so }
  1645. { * with uncertain optimizations on: }
  1646. { - destroy the contents of registers whose contents have somewhere a }
  1647. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1648. { are being written to memory) is not destroyed if it's StartMod is }
  1649. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1650. { expression based on ref) }
  1651. { * with uncertain optimizations off: }
  1652. { - also destroy registers that contain any pointer }
  1653. with c do
  1654. writeToMemDestroysContents :=
  1655. (typ in [con_ref,con_noRemoveRef]) and
  1656. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1657. containsPointerLoad(c)
  1658. ) or
  1659. (refInSequence(ref,c,refsEq,size) and
  1660. ((supreg <> regWritten) or
  1661. not((nrOfMods = 1) and
  1662. {StarMod is always of the type ait_instruction}
  1663. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1664. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1665. )
  1666. )
  1667. )
  1668. );
  1669. end
  1670. else
  1671. { write something to a pointer location, so }
  1672. { * with uncertain optimzations on: }
  1673. { - do not destroy registers which contain a local/global variable or }
  1674. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1675. { * with uncertain optimzations off: }
  1676. { - destroy every register which contains a memory location }
  1677. begin
  1678. invalsmemwrite :=
  1679. assigned(c.memwrite) and
  1680. (not(cs_opt_size in current_settings.optimizerswitches) or
  1681. containsPointerRef(c.memwrite));
  1682. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1683. begin
  1684. writeToMemDestroysContents := false;
  1685. exit;
  1686. end;
  1687. with c do
  1688. writeToMemDestroysContents :=
  1689. (typ in [con_ref,con_noRemoveRef]) and
  1690. (not(cs_opt_size in current_settings.optimizerswitches) or
  1691. { for movsl }
  1692. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1693. { don't destroy if reg contains a parameter, local or global variable }
  1694. containsPointerLoad(c)
  1695. );
  1696. end;
  1697. end;
  1698. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1699. const c: tcontent): boolean;
  1700. { returns whether the contents c of reg are invalid after destReg is }
  1701. { modified }
  1702. begin
  1703. writeToRegDestroysContents :=
  1704. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1705. sequenceDependsOnReg(c,supreg,destReg);
  1706. end;
  1707. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1708. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1709. { returns whether the contents c of reg are invalid after regWritten is }
  1710. { is written to op }
  1711. begin
  1712. memwritedestroyed := false;
  1713. case op.typ of
  1714. top_reg:
  1715. writeDestroysContents :=
  1716. (getregtype(op.reg) = R_INTREGISTER) and
  1717. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1718. top_ref:
  1719. writeDestroysContents :=
  1720. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1721. else
  1722. writeDestroysContents := false;
  1723. end;
  1724. end;
  1725. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1726. { destroys all registers which possibly contain a reference to ref, regWritten }
  1727. { is the register whose contents are being written to memory (if this proc }
  1728. { is called because of a "mov?? %reg, (mem)" instruction) }
  1729. var
  1730. counter: tsuperregister;
  1731. destroymemwrite: boolean;
  1732. begin
  1733. for counter := RS_EAX to RS_EDI Do
  1734. begin
  1735. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1736. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1737. destroyReg(ptaiprop(p.optInfo), counter, false)
  1738. else if destroymemwrite then
  1739. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1740. end;
  1741. end;
  1742. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1743. var Counter: tsuperregister;
  1744. begin {initializes/desrtoys all registers}
  1745. For Counter := RS_EAX To RS_EDI Do
  1746. begin
  1747. if read then
  1748. readreg(p, Counter);
  1749. DestroyReg(p, Counter, written);
  1750. p^.regs[counter].MemWrite := nil;
  1751. end;
  1752. p^.DirFlag := F_Unknown;
  1753. end;
  1754. procedure DestroyOp(taiObj: tai; const o:Toper);
  1755. {$ifdef statedebug}
  1756. var
  1757. hp: tai;
  1758. {$endif statedebug}
  1759. begin
  1760. case o.typ Of
  1761. top_reg:
  1762. begin
  1763. {$ifdef statedebug}
  1764. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1765. hp.next := taiobj.next;
  1766. hp.previous := taiobj;
  1767. taiobj.next := hp;
  1768. if assigned(hp.next) then
  1769. hp.next.previous := hp;
  1770. {$endif statedebug}
  1771. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1772. end;
  1773. top_ref:
  1774. begin
  1775. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1776. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1777. end;
  1778. end;
  1779. end;
  1780. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1781. p: taicpu; supreg: tsuperregister);
  1782. {$ifdef statedebug}
  1783. var
  1784. hp: tai;
  1785. {$endif statedebug}
  1786. begin
  1787. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1788. if (typ in [con_ref,con_noRemoveRef]) then
  1789. begin
  1790. incState(wstate,1);
  1791. { also store how many instructions are part of the sequence in the first }
  1792. { instructions ptaiprop, so it can be easily accessed from within }
  1793. { CheckSequence}
  1794. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1795. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1796. NrOfInstrSinceLastMod[supreg] := 0;
  1797. invalidateDependingRegs(p.optinfo,supreg);
  1798. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1799. {$ifdef StateDebug}
  1800. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1801. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1802. InsertLLItem(AsmL, p, p.next, hp);
  1803. {$endif StateDebug}
  1804. end
  1805. else
  1806. begin
  1807. {$ifdef statedebug}
  1808. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1809. insertllitem(asml,p,p.next,hp);
  1810. {$endif statedebug}
  1811. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1812. {$ifdef StateDebug}
  1813. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1814. InsertLLItem(AsmL, p, p.next, hp);
  1815. {$endif StateDebug}
  1816. end
  1817. end;
  1818. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1819. p: taicpu; const oper: TOper);
  1820. begin
  1821. if oper.typ = top_reg then
  1822. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1823. else
  1824. begin
  1825. ReadOp(ptaiprop(p.optinfo), oper);
  1826. DestroyOp(p, oper);
  1827. end
  1828. end;
  1829. {*************************************************************************************}
  1830. {************************************** TDFAOBJ **************************************}
  1831. {*************************************************************************************}
  1832. constructor tdfaobj.create(_list: TAsmList);
  1833. begin
  1834. list := _list;
  1835. blockstart := nil;
  1836. blockend := nil;
  1837. nroftaiobjs := 0;
  1838. taipropblock := nil;
  1839. lolab := 0;
  1840. hilab := 0;
  1841. labdif := 0;
  1842. labeltable := nil;
  1843. end;
  1844. procedure tdfaobj.initlabeltable;
  1845. var
  1846. labelfound: boolean;
  1847. p, prev: tai;
  1848. hp1, hp2: tai;
  1849. {$ifdef i386}
  1850. regcounter,
  1851. supreg : tsuperregister;
  1852. {$endif i386}
  1853. usedregs, nodeallocregs: tregset;
  1854. begin
  1855. labelfound := false;
  1856. lolab := maxlongint;
  1857. hilab := 0;
  1858. p := blockstart;
  1859. prev := p;
  1860. while assigned(p) do
  1861. begin
  1862. if (tai(p).typ = ait_label) then
  1863. if not labelcanbeskipped(tai_label(p)) then
  1864. begin
  1865. labelfound := true;
  1866. if (tai_Label(p).labsym.labelnr < lolab) then
  1867. lolab := tai_label(p).labsym.labelnr;
  1868. if (tai_Label(p).labsym.labelnr > hilab) then
  1869. hilab := tai_label(p).labsym.labelnr;
  1870. end;
  1871. prev := p;
  1872. getnextinstruction(p, p);
  1873. end;
  1874. if (prev.typ = ait_marker) and
  1875. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1876. blockend := prev
  1877. else blockend := nil;
  1878. if labelfound then
  1879. labdif := hilab+1-lolab
  1880. else labdif := 0;
  1881. usedregs := [];
  1882. if (labdif <> 0) then
  1883. begin
  1884. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1885. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1886. end;
  1887. p := blockstart;
  1888. prev := p;
  1889. while (p <> blockend) do
  1890. begin
  1891. case p.typ of
  1892. ait_label:
  1893. if not labelcanbeskipped(tai_label(p)) then
  1894. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1895. {$ifdef i386}
  1896. ait_regalloc:
  1897. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1898. begin
  1899. supreg:=getsupreg(tai_regalloc(p).reg);
  1900. case tai_regalloc(p).ratype of
  1901. ra_alloc :
  1902. begin
  1903. if not(supreg in usedregs) then
  1904. include(usedregs, supreg)
  1905. else
  1906. begin
  1907. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1908. hp1 := tai(p.previous);
  1909. list.remove(p);
  1910. p.free;
  1911. p := hp1;
  1912. end;
  1913. end;
  1914. ra_dealloc :
  1915. begin
  1916. exclude(usedregs, supreg);
  1917. hp1 := p;
  1918. hp2 := nil;
  1919. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1920. getnextinstruction(hp1, hp1) and
  1921. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1922. hp2 := hp1;
  1923. if hp2 <> nil then
  1924. begin
  1925. hp1 := tai(p.previous);
  1926. list.remove(p);
  1927. insertllitem(list, hp2, tai(hp2.next), p);
  1928. p := hp1;
  1929. end
  1930. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1931. and getnextinstruction(p,hp1) then
  1932. begin
  1933. hp1 := tai(p.previous);
  1934. list.remove(p);
  1935. p.free;
  1936. p := hp1;
  1937. // don't include here, since then the allocation will be removed when it's processed
  1938. // include(usedregs,supreg);
  1939. end;
  1940. end;
  1941. end;
  1942. end;
  1943. {$endif i386}
  1944. end;
  1945. repeat
  1946. prev := p;
  1947. p := tai(p.next);
  1948. until not(assigned(p)) or
  1949. (p = blockend) or
  1950. not(p.typ in (skipinstr - [ait_regalloc]));
  1951. end;
  1952. {$ifdef i386}
  1953. { don't add deallocation for function result variable or for regvars}
  1954. getNoDeallocRegs(noDeallocRegs);
  1955. usedRegs := usedRegs - noDeallocRegs;
  1956. for regCounter := RS_EAX to RS_EDI do
  1957. if regCounter in usedRegs then
  1958. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1959. {$endif i386}
  1960. end;
  1961. function tdfaobj.pass_1(_blockstart: tai): tai;
  1962. begin
  1963. blockstart := _blockstart;
  1964. initlabeltable;
  1965. pass_1 := blockend;
  1966. end;
  1967. function tdfaobj.initdfapass2: boolean;
  1968. {reserves memory for the PtaiProps in one big memory block when not using
  1969. TP, returns False if not enough memory is available for the optimizer in all
  1970. cases}
  1971. var
  1972. p: tai;
  1973. count: Longint;
  1974. { TmpStr: String; }
  1975. begin
  1976. p := blockstart;
  1977. skiphead(p);
  1978. nroftaiobjs := 0;
  1979. while (p <> blockend) do
  1980. begin
  1981. {$ifDef JumpAnal}
  1982. case p.typ of
  1983. ait_label:
  1984. begin
  1985. if not labelcanbeskipped(tai_label(p)) then
  1986. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1987. end;
  1988. ait_instruction:
  1989. begin
  1990. if taicpu(p).is_jmp then
  1991. begin
  1992. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1993. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1994. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1995. end;
  1996. end;
  1997. { ait_instruction:
  1998. begin
  1999. if (taicpu(p).opcode = A_PUSH) and
  2000. (taicpu(p).oper[0]^.typ = top_symbol) and
  2001. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2002. begin
  2003. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2004. if}
  2005. end;
  2006. {$endif JumpAnal}
  2007. inc(NrOftaiObjs);
  2008. getnextinstruction(p,p);
  2009. end;
  2010. if nroftaiobjs <> 0 then
  2011. begin
  2012. initdfapass2 := True;
  2013. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2014. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2015. p := blockstart;
  2016. skiphead(p);
  2017. for count := 1 To nroftaiobjs do
  2018. begin
  2019. ptaiprop(p.optinfo) := @taipropblock^[count];
  2020. getnextinstruction(p, p);
  2021. end;
  2022. end
  2023. else
  2024. initdfapass2 := false;
  2025. end;
  2026. procedure tdfaobj.dodfapass2;
  2027. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2028. contents for the instructions starting with p. Returns the last tai which has
  2029. been processed}
  2030. var
  2031. curprop, LastFlagsChangeProp: ptaiprop;
  2032. Cnt, InstrCnt : Longint;
  2033. InstrProp: TInsProp;
  2034. UsedRegs: TRegSet;
  2035. prev,p : tai;
  2036. tmpref: TReference;
  2037. tmpsupreg: tsuperregister;
  2038. {$ifdef statedebug}
  2039. hp : tai;
  2040. {$endif}
  2041. {$ifdef AnalyzeLoops}
  2042. hp : tai;
  2043. TmpState: Byte;
  2044. {$endif AnalyzeLoops}
  2045. begin
  2046. p := BlockStart;
  2047. LastFlagsChangeProp := nil;
  2048. prev := nil;
  2049. UsedRegs := [];
  2050. UpdateUsedregs(UsedRegs, p);
  2051. SkipHead(p);
  2052. BlockStart := p;
  2053. InstrCnt := 1;
  2054. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2055. while (p <> Blockend) Do
  2056. begin
  2057. curprop := @taiPropBlock^[InstrCnt];
  2058. if assigned(prev)
  2059. then
  2060. begin
  2061. {$ifdef JumpAnal}
  2062. if (p.Typ <> ait_label) then
  2063. {$endif JumpAnal}
  2064. begin
  2065. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2066. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2067. curprop^.FlagsUsed := false;
  2068. end
  2069. end
  2070. else
  2071. begin
  2072. fillchar(curprop^, SizeOf(curprop^), 0);
  2073. { For tmpreg := RS_EAX to RS_EDI Do
  2074. curprop^.regs[tmpreg].WState := 1;}
  2075. end;
  2076. curprop^.UsedRegs := UsedRegs;
  2077. curprop^.CanBeRemoved := False;
  2078. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2079. For tmpsupreg := RS_EAX To RS_EDI Do
  2080. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2081. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2082. else
  2083. begin
  2084. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2085. curprop^.regs[tmpsupreg].typ := con_unknown;
  2086. end;
  2087. case p.typ Of
  2088. ait_marker:;
  2089. ait_label:
  2090. {$ifndef JumpAnal}
  2091. if not labelCanBeSkipped(tai_label(p)) then
  2092. DestroyAllRegs(curprop,false,false);
  2093. {$else JumpAnal}
  2094. begin
  2095. if not labelCanBeSkipped(tai_label(p)) then
  2096. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2097. {$ifDef AnalyzeLoops}
  2098. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2099. {$else AnalyzeLoops}
  2100. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2101. {$endif AnalyzeLoops}
  2102. then
  2103. {all jumps to this label have been found}
  2104. {$ifDef AnalyzeLoops}
  2105. if (JmpsProcessed > 0)
  2106. then
  2107. {$endif AnalyzeLoops}
  2108. {we've processed at least one jump to this label}
  2109. begin
  2110. if (GetLastInstruction(p, hp) and
  2111. not(((hp.typ = ait_instruction)) and
  2112. (taicpu_labeled(hp).is_jmp))
  2113. then
  2114. {previous instruction not a JMP -> the contents of the registers after the
  2115. previous intruction has been executed have to be taken into account as well}
  2116. For tmpsupreg := RS_EAX to RS_EDI Do
  2117. begin
  2118. if (curprop^.regs[tmpsupreg].WState <>
  2119. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2120. then DestroyReg(curprop, tmpsupreg, true)
  2121. end
  2122. end
  2123. {$ifDef AnalyzeLoops}
  2124. else
  2125. {a label from a backward jump (e.g. a loop), no jump to this label has
  2126. already been processed}
  2127. if GetLastInstruction(p, hp) and
  2128. not(hp.typ = ait_instruction) and
  2129. (taicpu_labeled(hp).opcode = A_JMP))
  2130. then
  2131. {previous instruction not a jmp, so keep all the registers' contents from the
  2132. previous instruction}
  2133. begin
  2134. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2135. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2136. end
  2137. else
  2138. {previous instruction a jmp and no jump to this label processed yet}
  2139. begin
  2140. hp := p;
  2141. Cnt := InstrCnt;
  2142. {continue until we find a jump to the label or a label which has already
  2143. been processed}
  2144. while GetNextInstruction(hp, hp) and
  2145. not((hp.typ = ait_instruction) and
  2146. (taicpu(hp).is_jmp) and
  2147. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2148. not((hp.typ = ait_label) and
  2149. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2150. = tai_Label(hp).labsym^.RefCount) and
  2151. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2152. inc(Cnt);
  2153. if (hp.typ = ait_label)
  2154. then
  2155. {there's a processed label after the current one}
  2156. begin
  2157. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2158. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2159. end
  2160. else
  2161. {there's no label anymore after the current one, or they haven't been
  2162. processed yet}
  2163. begin
  2164. GetLastInstruction(p, hp);
  2165. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2166. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2167. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2168. end
  2169. end
  2170. {$endif AnalyzeLoops}
  2171. else
  2172. {not all references to this label have been found, so destroy all registers}
  2173. begin
  2174. GetLastInstruction(p, hp);
  2175. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2176. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2177. DestroyAllRegs(curprop,true,true)
  2178. end;
  2179. end;
  2180. {$endif JumpAnal}
  2181. ait_stab, ait_force_line, ait_function_name:;
  2182. ait_align: ; { may destroy flags !!! }
  2183. ait_instruction:
  2184. begin
  2185. if taicpu(p).is_jmp or
  2186. (taicpu(p).opcode = A_JMP) then
  2187. begin
  2188. {$ifNDef JumpAnal}
  2189. for tmpsupreg := RS_EAX to RS_EDI do
  2190. with curprop^.regs[tmpsupreg] do
  2191. case typ of
  2192. con_ref: typ := con_noRemoveRef;
  2193. con_const: typ := con_noRemoveConst;
  2194. con_invalid: typ := con_unknown;
  2195. end;
  2196. {$else JumpAnal}
  2197. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2198. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2199. begin
  2200. if (InstrCnt < InstrNr)
  2201. then
  2202. {forward jump}
  2203. if (JmpsProcessed = 0) then
  2204. {no jump to this label has been processed yet}
  2205. begin
  2206. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2207. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2208. inc(JmpsProcessed);
  2209. end
  2210. else
  2211. begin
  2212. For tmpreg := RS_EAX to RS_EDI Do
  2213. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2214. curprop^.regs[tmpreg].WState) then
  2215. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2216. inc(JmpsProcessed);
  2217. end
  2218. {$ifdef AnalyzeLoops}
  2219. else
  2220. { backward jump, a loop for example}
  2221. { if (JmpsProcessed > 0) or
  2222. not(GetLastInstruction(taiObj, hp) and
  2223. (hp.typ = ait_labeled_instruction) and
  2224. (taicpu_labeled(hp).opcode = A_JMP))
  2225. then}
  2226. {instruction prior to label is not a jmp, or at least one jump to the label
  2227. has yet been processed}
  2228. begin
  2229. inc(JmpsProcessed);
  2230. For tmpreg := RS_EAX to RS_EDI Do
  2231. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2232. curprop^.regs[tmpreg].WState)
  2233. then
  2234. begin
  2235. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2236. Cnt := InstrNr;
  2237. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2238. begin
  2239. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2240. inc(Cnt);
  2241. end;
  2242. while (Cnt <= InstrCnt) Do
  2243. begin
  2244. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2245. inc(Cnt)
  2246. end
  2247. end;
  2248. end
  2249. { else }
  2250. {instruction prior to label is a jmp and no jumps to the label have yet been
  2251. processed}
  2252. { begin
  2253. inc(JmpsProcessed);
  2254. For tmpreg := RS_EAX to RS_EDI Do
  2255. begin
  2256. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2257. Cnt := InstrNr;
  2258. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2259. begin
  2260. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2261. inc(Cnt);
  2262. end;
  2263. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2264. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2265. begin
  2266. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2267. inc(Cnt);
  2268. end;
  2269. while (Cnt <= InstrCnt) Do
  2270. begin
  2271. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2272. inc(Cnt)
  2273. end
  2274. end
  2275. end}
  2276. {$endif AnalyzeLoops}
  2277. end;
  2278. {$endif JumpAnal}
  2279. end
  2280. else
  2281. begin
  2282. InstrProp := InsProp[taicpu(p).opcode];
  2283. case taicpu(p).opcode Of
  2284. A_MOV, A_MOVZX, A_MOVSX:
  2285. begin
  2286. case taicpu(p).oper[0]^.typ Of
  2287. top_ref, top_reg:
  2288. case taicpu(p).oper[1]^.typ Of
  2289. top_reg:
  2290. begin
  2291. {$ifdef statedebug}
  2292. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2293. insertllitem(list,p,p.next,hp);
  2294. {$endif statedebug}
  2295. readOp(curprop, taicpu(p).oper[0]^);
  2296. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2297. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2298. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2299. begin
  2300. with curprop^.regs[tmpsupreg] Do
  2301. begin
  2302. incState(wstate,1);
  2303. { also store how many instructions are part of the sequence in the first }
  2304. { instruction's ptaiprop, so it can be easily accessed from within }
  2305. { CheckSequence }
  2306. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2307. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2308. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2309. { Destroy the contents of the registers }
  2310. { that depended on the previous value of }
  2311. { this register }
  2312. invalidateDependingRegs(curprop,tmpsupreg);
  2313. curprop^.regs[tmpsupreg].memwrite := nil;
  2314. end;
  2315. end
  2316. else
  2317. begin
  2318. {$ifdef statedebug}
  2319. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2320. insertllitem(list,p,p.next,hp);
  2321. {$endif statedebug}
  2322. destroyReg(curprop, tmpsupreg, true);
  2323. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2324. with curprop^.regs[tmpsupreg] Do
  2325. begin
  2326. typ := con_ref;
  2327. startmod := p;
  2328. nrOfMods := 1;
  2329. end
  2330. end;
  2331. {$ifdef StateDebug}
  2332. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2333. insertllitem(list,p,p.next,hp);
  2334. {$endif StateDebug}
  2335. end;
  2336. top_ref:
  2337. begin
  2338. readref(curprop, taicpu(p).oper[1]^.ref);
  2339. if taicpu(p).oper[0]^.typ = top_reg then
  2340. begin
  2341. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2342. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2343. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2344. taicpu(p);
  2345. end
  2346. else
  2347. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2348. end;
  2349. end;
  2350. top_Const:
  2351. begin
  2352. case taicpu(p).oper[1]^.typ Of
  2353. top_reg:
  2354. begin
  2355. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2356. {$ifdef statedebug}
  2357. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2358. insertllitem(list,p,p.next,hp);
  2359. {$endif statedebug}
  2360. With curprop^.regs[tmpsupreg] Do
  2361. begin
  2362. DestroyReg(curprop, tmpsupreg, true);
  2363. typ := Con_Const;
  2364. StartMod := p;
  2365. nrOfMods := 1;
  2366. end
  2367. end;
  2368. top_ref:
  2369. begin
  2370. readref(curprop, taicpu(p).oper[1]^.ref);
  2371. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2372. end;
  2373. end;
  2374. end;
  2375. end;
  2376. end;
  2377. A_DIV, A_IDIV, A_MUL:
  2378. begin
  2379. ReadOp(curprop, taicpu(p).oper[0]^);
  2380. readreg(curprop,RS_EAX);
  2381. if (taicpu(p).OpCode = A_IDIV) or
  2382. (taicpu(p).OpCode = A_DIV) then
  2383. begin
  2384. readreg(curprop,RS_EDX);
  2385. end;
  2386. {$ifdef statedebug}
  2387. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2388. insertllitem(list,p,p.next,hp);
  2389. {$endif statedebug}
  2390. { DestroyReg(curprop, RS_EAX, true);}
  2391. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2392. taicpu(p), RS_EAX);
  2393. DestroyReg(curprop, RS_EDX, true);
  2394. LastFlagsChangeProp := curprop;
  2395. end;
  2396. A_IMUL:
  2397. begin
  2398. ReadOp(curprop,taicpu(p).oper[0]^);
  2399. if (taicpu(p).ops >= 2) then
  2400. ReadOp(curprop,taicpu(p).oper[1]^);
  2401. if (taicpu(p).ops <= 2) then
  2402. if (taicpu(p).ops=1) then
  2403. begin
  2404. readreg(curprop,RS_EAX);
  2405. {$ifdef statedebug}
  2406. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2407. insertllitem(list,p,p.next,hp);
  2408. {$endif statedebug}
  2409. { DestroyReg(curprop, RS_EAX, true); }
  2410. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2411. taicpu(p), RS_EAX);
  2412. DestroyReg(curprop,RS_EDX, true)
  2413. end
  2414. else
  2415. AddInstr2OpContents(
  2416. {$ifdef statedebug}list,{$endif}
  2417. taicpu(p), taicpu(p).oper[1]^)
  2418. else
  2419. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2420. taicpu(p), taicpu(p).oper[2]^);
  2421. LastFlagsChangeProp := curprop;
  2422. end;
  2423. A_LEA:
  2424. begin
  2425. readop(curprop,taicpu(p).oper[0]^);
  2426. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2427. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2428. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2429. else
  2430. begin
  2431. {$ifdef statedebug}
  2432. hp := tai_comment.Create(strpnew('destroying & initing'+
  2433. std_regname(taicpu(p).oper[1]^.reg)));
  2434. insertllitem(list,p,p.next,hp);
  2435. {$endif statedebug}
  2436. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2437. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2438. begin
  2439. typ := con_ref;
  2440. startmod := p;
  2441. nrOfMods := 1;
  2442. end
  2443. end;
  2444. end;
  2445. else
  2446. begin
  2447. Cnt := 1;
  2448. while (Cnt <= maxinschanges) and
  2449. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2450. begin
  2451. case InstrProp.Ch[Cnt] Of
  2452. Ch_REAX..Ch_REDI:
  2453. begin
  2454. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2455. readreg(curprop,tmpsupreg);
  2456. end;
  2457. Ch_WEAX..Ch_RWEDI:
  2458. begin
  2459. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2460. begin
  2461. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2462. readreg(curprop,tmpsupreg);
  2463. end;
  2464. {$ifdef statedebug}
  2465. hp := tai_comment.Create(strpnew('destroying '+
  2466. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2467. insertllitem(list,p,p.next,hp);
  2468. {$endif statedebug}
  2469. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2470. DestroyReg(curprop,tmpsupreg, true);
  2471. end;
  2472. Ch_MEAX..Ch_MEDI:
  2473. begin
  2474. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2475. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2476. taicpu(p),tmpsupreg);
  2477. end;
  2478. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2479. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2480. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2481. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2482. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2483. Ch_Wop1..Ch_RWop1:
  2484. begin
  2485. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2486. ReadOp(curprop, taicpu(p).oper[0]^);
  2487. DestroyOp(p, taicpu(p).oper[0]^);
  2488. end;
  2489. Ch_Mop1:
  2490. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2491. taicpu(p), taicpu(p).oper[0]^);
  2492. Ch_Wop2..Ch_RWop2:
  2493. begin
  2494. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2495. ReadOp(curprop, taicpu(p).oper[1]^);
  2496. DestroyOp(p, taicpu(p).oper[1]^);
  2497. end;
  2498. Ch_Mop2:
  2499. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2500. taicpu(p), taicpu(p).oper[1]^);
  2501. Ch_WOp3..Ch_RWOp3:
  2502. begin
  2503. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2504. ReadOp(curprop, taicpu(p).oper[2]^);
  2505. DestroyOp(p, taicpu(p).oper[2]^);
  2506. end;
  2507. Ch_Mop3:
  2508. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2509. taicpu(p), taicpu(p).oper[2]^);
  2510. Ch_WMemEDI:
  2511. begin
  2512. readreg(curprop, RS_EDI);
  2513. fillchar(tmpref, SizeOf(tmpref), 0);
  2514. tmpref.base := NR_EDI;
  2515. tmpref.index := NR_EDI;
  2516. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2517. end;
  2518. Ch_RFlags:
  2519. if assigned(LastFlagsChangeProp) then
  2520. LastFlagsChangeProp^.FlagsUsed := true;
  2521. Ch_WFlags:
  2522. LastFlagsChangeProp := curprop;
  2523. Ch_RWFlags:
  2524. begin
  2525. if assigned(LastFlagsChangeProp) then
  2526. LastFlagsChangeProp^.FlagsUsed := true;
  2527. LastFlagsChangeProp := curprop;
  2528. end;
  2529. Ch_FPU:;
  2530. else
  2531. begin
  2532. {$ifdef statedebug}
  2533. hp := tai_comment.Create(strpnew(
  2534. 'destroying all regs for prev instruction'));
  2535. insertllitem(list,p, p.next,hp);
  2536. {$endif statedebug}
  2537. DestroyAllRegs(curprop,true,true);
  2538. LastFlagsChangeProp := curprop;
  2539. end;
  2540. end;
  2541. inc(Cnt);
  2542. end
  2543. end;
  2544. end;
  2545. end;
  2546. end
  2547. else
  2548. begin
  2549. {$ifdef statedebug}
  2550. hp := tai_comment.Create(strpnew(
  2551. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2552. insertllitem(list,p, p.next,hp);
  2553. {$endif statedebug}
  2554. DestroyAllRegs(curprop,true,true);
  2555. end;
  2556. end;
  2557. inc(InstrCnt);
  2558. prev := p;
  2559. GetNextInstruction(p, p);
  2560. end;
  2561. end;
  2562. function tdfaobj.pass_generate_code: boolean;
  2563. begin
  2564. if initdfapass2 then
  2565. begin
  2566. dodfapass2;
  2567. pass_generate_code := true
  2568. end
  2569. else
  2570. pass_generate_code := false;
  2571. end;
  2572. {$push}
  2573. {$r-}
  2574. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2575. begin
  2576. if (sym.labelnr >= lolab) and
  2577. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2578. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2579. else
  2580. getlabelwithsym := nil;
  2581. end;
  2582. {$pop}
  2583. procedure tdfaobj.clear;
  2584. begin
  2585. if labdif <> 0 then
  2586. begin
  2587. freemem(labeltable);
  2588. labeltable := nil;
  2589. end;
  2590. if assigned(taipropblock) then
  2591. begin
  2592. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2593. taipropblock := nil;
  2594. end;
  2595. end;
  2596. end.