cgobj.pas 147 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symbase,symtype,symdef,symtable,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_extend_backwards(b: boolean);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;abstract;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. This must be overriden for each CPU target.
  102. @param(size size of the operand in the register)
  103. @param(r register source of the operand)
  104. @param(cgpara where the parameter will be stored)
  105. }
  106. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  107. {# Pass a parameter, which is a constant, to a routine.
  108. A generic version is provided. This routine should
  109. be overriden for optimization purposes if the cpu
  110. permits directly sending this type of parameter.
  111. @param(size size of the operand in constant)
  112. @param(a value of constant to send)
  113. @param(cgpara where the parameter will be stored)
  114. }
  115. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  116. {# Pass the value of a parameter, which is located in memory, to a routine.
  117. A generic version is provided. This routine should
  118. be overriden for optimization purposes if the cpu
  119. permits directly sending this type of parameter.
  120. @param(size size of the operand in constant)
  121. @param(r Memory reference of value to send)
  122. @param(cgpara where the parameter will be stored)
  123. }
  124. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  125. {# Pass the value of a parameter, which can be located either in a register or memory location,
  126. to a routine.
  127. A generic version is provided.
  128. @param(l location of the operand to send)
  129. @param(nr parameter number (starting from one) of routine (from left to right))
  130. @param(cgpara where the parameter will be stored)
  131. }
  132. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  133. {# Pass the address of a reference to a routine. This routine
  134. will calculate the address of the reference, and pass this
  135. calculated address as a parameter.
  136. A generic version is provided. This routine should
  137. be overriden for optimization purposes if the cpu
  138. permits directly sending this type of parameter.
  139. @param(r reference to get address from)
  140. @param(nr parameter number (starting from one) of routine (from left to right))
  141. }
  142. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  143. { Remarks:
  144. * If a method specifies a size you have only to take care
  145. of that number of bits, i.e. load_const_reg with OP_8 must
  146. only load the lower 8 bit of the specified register
  147. the rest of the register can be undefined
  148. if necessary the compiler will call a method
  149. to zero or sign extend the register
  150. * The a_load_XX_XX with OP_64 needn't to be
  151. implemented for 32 bit
  152. processors, the code generator takes care of that
  153. * the addr size is for work with the natural pointer
  154. size
  155. * the procedures without fpu/mm are only for integer usage
  156. * normally the first location is the source and the
  157. second the destination
  158. }
  159. {# Emits instruction to call the method specified by symbol name.
  160. This routine must be overriden for each new target cpu.
  161. There is no a_call_ref because loading the reference will use
  162. a temp register on most cpu's resulting in conflicts with the
  163. registers used for the parameters (PFV)
  164. }
  165. procedure a_call_name(list : TAsmList;const s : string);virtual; abstract;
  166. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  167. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  168. { same as a_call_name, might be overriden on certain architectures to emit
  169. static calls without usage of a got trampoline }
  170. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  171. { move instructions }
  172. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  173. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  174. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  175. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  176. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  177. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  178. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  179. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  180. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  181. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  182. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  183. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  184. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  185. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  186. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  187. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  188. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  189. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  191. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  192. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  193. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  194. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  195. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  196. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  197. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  198. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  199. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  200. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  201. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  202. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  203. { fpu move instructions }
  204. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  205. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  206. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  207. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  208. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  209. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  210. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  211. { vector register move instructions }
  212. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  213. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  214. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  215. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  216. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  217. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  218. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  219. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  220. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  221. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  222. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  223. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  224. { basic arithmetic operations }
  225. { note: for operators which require only one argument (not, neg), use }
  226. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  227. { that in this case the *second* operand is used as both source and }
  228. { destination (JM) }
  229. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  230. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  231. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  232. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  233. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  234. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  235. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  236. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  237. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  238. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  239. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  240. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  241. { trinary operations for processors that support them, 'emulated' }
  242. { on others. None with "ref" arguments since I don't think there }
  243. { are any processors that support it (JM) }
  244. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  245. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  246. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  247. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  248. { comparison operations }
  249. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  250. l : tasmlabel);virtual; abstract;
  251. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  252. l : tasmlabel); virtual;
  253. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  254. l : tasmlabel);
  255. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  256. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  257. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  258. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  259. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  260. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  261. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  262. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  263. l : tasmlabel);
  264. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  265. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  266. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  267. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  268. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  269. }
  270. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  271. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  272. {
  273. This routine tries to optimize the op_const_reg/ref opcode, and should be
  274. called at the start of a_op_const_reg/ref. It returns the actual opcode
  275. to emit, and the constant value to emit. This function can opcode OP_NONE to
  276. remove the opcode and OP_MOVE to replace it with a simple load
  277. @param(op The opcode to emit, returns the opcode which must be emitted)
  278. @param(a The constant which should be emitted, returns the constant which must
  279. be emitted)
  280. }
  281. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  282. {#
  283. This routine is used in exception management nodes. It should
  284. save the exception reason currently in the FUNCTION_RETURN_REG. The
  285. save should be done either to a temp (pointed to by href).
  286. or on the stack (pushing the value on the stack).
  287. The size of the value to save is OS_S32. The default version
  288. saves the exception reason to a temp. memory area.
  289. }
  290. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  291. {#
  292. This routine is used in exception management nodes. It should
  293. save the exception reason constant. The
  294. save should be done either to a temp (pointed to by href).
  295. or on the stack (pushing the value on the stack).
  296. The size of the value to save is OS_S32. The default version
  297. saves the exception reason to a temp. memory area.
  298. }
  299. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  300. {#
  301. This routine is used in exception management nodes. It should
  302. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  303. should either be in the temp. area (pointed to by href , href should
  304. *NOT* be freed) or on the stack (the value should be popped).
  305. The size of the value to save is OS_S32. The default version
  306. saves the exception reason to a temp. memory area.
  307. }
  308. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  309. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  310. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  311. {# This should emit the opcode to copy len bytes from the source
  312. to destination.
  313. It must be overriden for each new target processor.
  314. @param(source Source reference of copy)
  315. @param(dest Destination reference of copy)
  316. }
  317. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  318. {# This should emit the opcode to copy len bytes from the an unaligned source
  319. to destination.
  320. It must be overriden for each new target processor.
  321. @param(source Source reference of copy)
  322. @param(dest Destination reference of copy)
  323. }
  324. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  325. {# This should emit the opcode to a shortrstring from the source
  326. to destination.
  327. @param(source Source reference of copy)
  328. @param(dest Destination reference of copy)
  329. }
  330. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  331. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  332. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  333. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  334. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  335. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  336. {# Generates range checking code. It is to note
  337. that this routine does not need to be overriden,
  338. as it takes care of everything.
  339. @param(p Node which contains the value to check)
  340. @param(todef Type definition of node to range check)
  341. }
  342. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  343. {# Generates overflow checking code for a node }
  344. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  345. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  346. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  347. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  348. {# Emits instructions when compilation is done in profile
  349. mode (this is set as a command line option). The default
  350. behavior does nothing, should be overriden as required.
  351. }
  352. procedure g_profilecode(list : TAsmList);virtual;
  353. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  354. @param(size Number of bytes to allocate)
  355. }
  356. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  357. {# Emits instruction for allocating the locals in entry
  358. code of a routine. This is one of the first
  359. routine called in @var(genentrycode).
  360. @param(localsize Number of bytes to allocate as locals)
  361. }
  362. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  363. {# Emits instructions for returning from a subroutine.
  364. Should also restore the framepointer and stack.
  365. @param(parasize Number of bytes of parameters to deallocate from stack)
  366. }
  367. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  368. {# This routine is called when generating the code for the entry point
  369. of a routine. It should save all registers which are not used in this
  370. routine, and which should be declared as saved in the std_saved_registers
  371. set.
  372. This routine is mainly used when linking to code which is generated
  373. by ABI-compliant compilers (like GCC), to make sure that the reserved
  374. registers of that ABI are not clobbered.
  375. @param(usedinproc Registers which are used in the code of this routine)
  376. }
  377. procedure g_save_standard_registers(list:TAsmList);virtual;
  378. {# This routine is called when generating the code for the exit point
  379. of a routine. It should restore all registers which were previously
  380. saved in @var(g_save_standard_registers).
  381. @param(usedinproc Registers which are used in the code of this routine)
  382. }
  383. procedure g_restore_standard_registers(list:TAsmList);virtual;
  384. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  385. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  386. function g_indirect_sym_load(list:TAsmList;const symname: string): tregister;virtual;
  387. protected
  388. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  389. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  390. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  391. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  392. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  393. end;
  394. {$ifndef cpu64bit}
  395. {# @abstract(Abstract code generator for 64 Bit operations)
  396. This class implements an abstract code generator class
  397. for 64 Bit operations.
  398. }
  399. tcg64 = class
  400. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  401. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  402. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  403. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  404. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  405. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  406. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  407. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  408. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  409. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  410. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  411. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  412. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  413. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  414. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  415. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  416. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  417. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  418. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  419. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  420. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  421. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  422. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  423. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  424. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  425. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  426. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  427. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  428. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  429. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  430. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  431. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  432. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  433. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  434. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  435. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  436. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  437. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  438. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  439. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  440. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  441. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  442. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  443. {
  444. This routine tries to optimize the const_reg opcode, and should be
  445. called at the start of a_op64_const_reg. It returns the actual opcode
  446. to emit, and the constant value to emit. If this routine returns
  447. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  448. @param(op The opcode to emit, returns the opcode which must be emitted)
  449. @param(a The constant which should be emitted, returns the constant which must
  450. be emitted)
  451. @param(reg The register to emit the opcode with, returns the register with
  452. which the opcode will be emitted)
  453. }
  454. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  455. { override to catch 64bit rangechecks }
  456. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  457. end;
  458. {$endif cpu64bit}
  459. var
  460. {# Main code generator class }
  461. cg : tcg;
  462. {$ifndef cpu64bit}
  463. {# Code generator class for all operations working with 64-Bit operands }
  464. cg64 : tcg64;
  465. {$endif cpu64bit}
  466. implementation
  467. uses
  468. globals,options,systems,
  469. verbose,defutil,paramgr,symsym,
  470. tgobj,cutils,procinfo,
  471. ncgrtti;
  472. {*****************************************************************************
  473. basic functionallity
  474. ******************************************************************************}
  475. constructor tcg.create;
  476. begin
  477. end;
  478. {*****************************************************************************
  479. register allocation
  480. ******************************************************************************}
  481. procedure tcg.init_register_allocators;
  482. begin
  483. fillchar(rg,sizeof(rg),0);
  484. add_reg_instruction_hook:=@add_reg_instruction;
  485. end;
  486. procedure tcg.done_register_allocators;
  487. begin
  488. { Safety }
  489. fillchar(rg,sizeof(rg),0);
  490. add_reg_instruction_hook:=nil;
  491. end;
  492. {$ifdef flowgraph}
  493. procedure Tcg.init_flowgraph;
  494. begin
  495. aktflownode:=0;
  496. end;
  497. procedure Tcg.done_flowgraph;
  498. begin
  499. end;
  500. {$endif}
  501. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  502. begin
  503. if not assigned(rg[R_INTREGISTER]) then
  504. internalerror(200312122);
  505. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  506. end;
  507. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  508. begin
  509. if not assigned(rg[R_FPUREGISTER]) then
  510. internalerror(200312123);
  511. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  512. end;
  513. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  514. begin
  515. if not assigned(rg[R_MMREGISTER]) then
  516. internalerror(2003121214);
  517. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  518. end;
  519. function tcg.getaddressregister(list:TAsmList):Tregister;
  520. begin
  521. if assigned(rg[R_ADDRESSREGISTER]) then
  522. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  523. else
  524. begin
  525. if not assigned(rg[R_INTREGISTER]) then
  526. internalerror(200312121);
  527. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  528. end;
  529. end;
  530. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  531. var
  532. subreg:Tsubregister;
  533. begin
  534. subreg:=cgsize2subreg(size);
  535. result:=reg;
  536. setsubreg(result,subreg);
  537. { notify RA }
  538. if result<>reg then
  539. list.concat(tai_regalloc.resize(result));
  540. end;
  541. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  542. begin
  543. if not assigned(rg[getregtype(r)]) then
  544. internalerror(200312125);
  545. rg[getregtype(r)].getcpuregister(list,r);
  546. end;
  547. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  548. begin
  549. if not assigned(rg[getregtype(r)]) then
  550. internalerror(200312126);
  551. rg[getregtype(r)].ungetcpuregister(list,r);
  552. end;
  553. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  554. begin
  555. if assigned(rg[rt]) then
  556. rg[rt].alloccpuregisters(list,r)
  557. else
  558. internalerror(200310092);
  559. end;
  560. procedure tcg.allocallcpuregisters(list:TAsmList);
  561. begin
  562. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  563. {$ifndef i386}
  564. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  565. {$ifdef cpumm}
  566. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  567. {$endif cpumm}
  568. {$endif i386}
  569. end;
  570. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  571. begin
  572. if assigned(rg[rt]) then
  573. rg[rt].dealloccpuregisters(list,r)
  574. else
  575. internalerror(200310093);
  576. end;
  577. procedure tcg.deallocallcpuregisters(list:TAsmList);
  578. begin
  579. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  580. {$ifndef i386}
  581. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  582. {$ifdef cpumm}
  583. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  584. {$endif cpumm}
  585. {$endif i386}
  586. end;
  587. function tcg.uses_registers(rt:Tregistertype):boolean;
  588. begin
  589. if assigned(rg[rt]) then
  590. result:=rg[rt].uses_registers
  591. else
  592. result:=false;
  593. end;
  594. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  595. var
  596. rt : tregistertype;
  597. begin
  598. rt:=getregtype(r);
  599. { Only add it when a register allocator is configured.
  600. No IE can be generated, because the VMT is written
  601. without a valid rg[] }
  602. if assigned(rg[rt]) then
  603. rg[rt].add_reg_instruction(instr,r);
  604. end;
  605. procedure tcg.add_move_instruction(instr:Taicpu);
  606. var
  607. rt : tregistertype;
  608. begin
  609. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  610. if assigned(rg[rt]) then
  611. rg[rt].add_move_instruction(instr)
  612. else
  613. internalerror(200310095);
  614. end;
  615. procedure tcg.set_regalloc_extend_backwards(b: boolean);
  616. var
  617. rt : tregistertype;
  618. begin
  619. for rt:=low(rg) to high(rg) do
  620. begin
  621. if assigned(rg[rt]) then
  622. rg[rt].extend_live_range_backwards := b;;
  623. end;
  624. end;
  625. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  626. var
  627. rt : tregistertype;
  628. begin
  629. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  630. begin
  631. if assigned(rg[rt]) then
  632. rg[rt].do_register_allocation(list,headertai);
  633. end;
  634. { running the other register allocator passes could require addition int/addr. registers
  635. when spilling so run int/addr register allocation at the end }
  636. if assigned(rg[R_INTREGISTER]) then
  637. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  638. if assigned(rg[R_ADDRESSREGISTER]) then
  639. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  640. end;
  641. procedure tcg.translate_register(var reg : tregister);
  642. begin
  643. rg[getregtype(reg)].translate_register(reg);
  644. end;
  645. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  646. begin
  647. list.concat(tai_regalloc.alloc(r,nil));
  648. end;
  649. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  650. begin
  651. list.concat(tai_regalloc.dealloc(r,nil));
  652. end;
  653. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  654. var
  655. instr : tai;
  656. begin
  657. instr:=tai_regalloc.sync(r);
  658. list.concat(instr);
  659. add_reg_instruction(instr,r);
  660. end;
  661. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  662. begin
  663. list.concat(tai_label.create(l));
  664. end;
  665. {*****************************************************************************
  666. for better code generation these methods should be overridden
  667. ******************************************************************************}
  668. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  669. var
  670. ref : treference;
  671. begin
  672. cgpara.check_simple_location;
  673. case cgpara.location^.loc of
  674. LOC_REGISTER,LOC_CREGISTER:
  675. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  676. LOC_REFERENCE,LOC_CREFERENCE:
  677. begin
  678. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  679. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  680. end
  681. else
  682. internalerror(2002071004);
  683. end;
  684. end;
  685. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  686. var
  687. ref : treference;
  688. begin
  689. cgpara.check_simple_location;
  690. case cgpara.location^.loc of
  691. LOC_REGISTER,LOC_CREGISTER:
  692. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  693. LOC_REFERENCE,LOC_CREFERENCE:
  694. begin
  695. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  696. a_load_const_ref(list,cgpara.location^.size,a,ref);
  697. end
  698. else
  699. internalerror(2002071004);
  700. end;
  701. end;
  702. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  703. var
  704. ref : treference;
  705. begin
  706. cgpara.check_simple_location;
  707. case cgpara.location^.loc of
  708. LOC_REGISTER,LOC_CREGISTER:
  709. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  710. LOC_REFERENCE,LOC_CREFERENCE:
  711. begin
  712. reference_reset(ref);
  713. ref.base:=cgpara.location^.reference.index;
  714. ref.offset:=cgpara.location^.reference.offset;
  715. if (size <> OS_NO) and
  716. (tcgsize2size[size] < sizeof(aint)) then
  717. begin
  718. if (cgpara.size = OS_NO) or
  719. assigned(cgpara.location^.next) then
  720. internalerror(2006052401);
  721. a_load_ref_ref(list,size,cgpara.size,r,ref);
  722. end
  723. else
  724. { use concatcopy, because the parameter can be larger than }
  725. { what the OS_* constants can handle }
  726. g_concatcopy(list,r,ref,cgpara.intsize);
  727. end
  728. else
  729. internalerror(2002071004);
  730. end;
  731. end;
  732. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  733. begin
  734. case l.loc of
  735. LOC_REGISTER,
  736. LOC_CREGISTER :
  737. a_param_reg(list,l.size,l.register,cgpara);
  738. LOC_CONSTANT :
  739. a_param_const(list,l.size,l.value,cgpara);
  740. LOC_CREFERENCE,
  741. LOC_REFERENCE :
  742. a_param_ref(list,l.size,l.reference,cgpara);
  743. else
  744. internalerror(2002032211);
  745. end;
  746. end;
  747. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  748. var
  749. hr : tregister;
  750. begin
  751. cgpara.check_simple_location;
  752. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  753. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  754. else
  755. begin
  756. hr:=getaddressregister(list);
  757. a_loadaddr_ref_reg(list,r,hr);
  758. a_param_reg(list,OS_ADDR,hr,cgpara);
  759. end;
  760. end;
  761. {****************************************************************************
  762. some generic implementations
  763. ****************************************************************************}
  764. {$ifopt r+}
  765. {$define rangeon}
  766. {$r-}
  767. {$endif}
  768. {$ifopt q+}
  769. {$define overflowon}
  770. {$q-}
  771. {$endif}
  772. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  773. var
  774. bitmask: aword;
  775. tmpreg: tregister;
  776. stopbit: byte;
  777. begin
  778. tmpreg:=getintregister(list,sreg.subsetregsize);
  779. if (subsetsize in [OS_S8..OS_S128]) then
  780. begin
  781. { sign extend in case the value has a bitsize mod 8 <> 0 }
  782. { both instructions will be optimized away if not }
  783. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  784. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  785. end
  786. else
  787. begin
  788. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  789. stopbit := sreg.startbit + sreg.bitlen;
  790. // on x86(64), 1 shl 32(64) = 1 instead of 0
  791. // use aword to prevent overflow with 1 shl 31
  792. if (stopbit - sreg.startbit <> AIntBits) then
  793. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  794. else
  795. bitmask := high(aword);
  796. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  797. end;
  798. tmpreg := makeregsize(list,tmpreg,subsetsize);
  799. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  800. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  801. end;
  802. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  803. begin
  804. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  805. end;
  806. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  807. var
  808. bitmask: aword;
  809. tmpreg: tregister;
  810. stopbit: byte;
  811. begin
  812. stopbit := sreg.startbit + sreg.bitlen;
  813. // on x86(64), 1 shl 32(64) = 1 instead of 0
  814. if (stopbit <> AIntBits) then
  815. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  816. else
  817. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  818. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  819. begin
  820. tmpreg:=getintregister(list,sreg.subsetregsize);
  821. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  822. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  823. if (slopt <> SL_REGNOSRCMASK) then
  824. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  825. end;
  826. if (slopt <> SL_SETMAX) then
  827. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  828. case slopt of
  829. SL_SETZERO : ;
  830. SL_SETMAX :
  831. if (sreg.bitlen <> AIntBits) then
  832. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  833. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  834. sreg.subsetreg)
  835. else
  836. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  837. else
  838. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  839. end;
  840. end;
  841. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  842. var
  843. tmpreg: tregister;
  844. bitmask: aword;
  845. stopbit: byte;
  846. begin
  847. if (fromsreg.bitlen >= tosreg.bitlen) then
  848. begin
  849. tmpreg := getintregister(list,tosreg.subsetregsize);
  850. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  851. if (fromsreg.startbit <= tosreg.startbit) then
  852. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  853. else
  854. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  855. stopbit := tosreg.startbit + tosreg.bitlen;
  856. // on x86(64), 1 shl 32(64) = 1 instead of 0
  857. if (stopbit <> AIntBits) then
  858. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  859. else
  860. bitmask := (aword(1) shl tosreg.startbit) - 1;
  861. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  862. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  863. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  864. end
  865. else
  866. begin
  867. tmpreg := getintregister(list,tosubsetsize);
  868. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  869. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  870. end;
  871. end;
  872. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  873. var
  874. tmpreg: tregister;
  875. begin
  876. tmpreg := getintregister(list,tosize);
  877. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  878. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  879. end;
  880. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  881. var
  882. tmpreg: tregister;
  883. begin
  884. tmpreg := getintregister(list,subsetsize);
  885. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  886. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  887. end;
  888. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  889. var
  890. bitmask: aword;
  891. stopbit: byte;
  892. begin
  893. stopbit := sreg.startbit + sreg.bitlen;
  894. // on x86(64), 1 shl 32(64) = 1 instead of 0
  895. if (stopbit <> AIntBits) then
  896. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  897. else
  898. bitmask := (aword(1) shl sreg.startbit) - 1;
  899. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  900. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  901. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  902. end;
  903. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  904. begin
  905. case loc.loc of
  906. LOC_REFERENCE,LOC_CREFERENCE:
  907. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  908. LOC_REGISTER,LOC_CREGISTER:
  909. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  910. LOC_CONSTANT:
  911. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  912. LOC_SUBSETREG,LOC_CSUBSETREG:
  913. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  914. LOC_SUBSETREF,LOC_CSUBSETREF:
  915. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  916. else
  917. internalerror(200608053);
  918. end;
  919. end;
  920. (*
  921. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  922. in memory. They are like a regular reference, but contain an extra bit
  923. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  924. and a bit length (always constant).
  925. Bit packed values are stored differently in memory depending on whether we
  926. are on a big or a little endian system (compatible with at least GPC). The
  927. size of the basic working unit is always the smallest power-of-2 byte size
  928. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  929. bytes, 17..32 bits -> 4 bytes etc).
  930. On a big endian, 5-bit: values are stored like this:
  931. 11111222 22333334 44445555 56666677 77788888
  932. The leftmost bit of each 5-bit value corresponds to the most significant
  933. bit.
  934. On little endian, it goes like this:
  935. 22211111 43333322 55554444 77666665 88888777
  936. In this case, per byte the left-most bit is more significant than those on
  937. the right, but the bits in the next byte are all more significant than
  938. those in the previous byte (e.g., the 222 in the first byte are the low
  939. three bits of that value, while the 22 in the second byte are the upper
  940. two bits.
  941. Big endian, 9 bit values:
  942. 11111111 12222222 22333333 33344444 ...
  943. Little endian, 9 bit values:
  944. 11111111 22222221 33333322 44444333 ...
  945. This is memory representation and the 16 bit values are byteswapped.
  946. Similarly as in the previous case, the 2222222 string contains the lower
  947. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  948. registers (two 16 bit registers in the current implementation, although a
  949. single 32 bit register would be possible too, in particular if 32 bit
  950. alignment can be guaranteed), this becomes:
  951. 22222221 11111111 44444333 33333322 ...
  952. (l)ow u l l u l u
  953. The startbit/bitindex in a subsetreference always refers to
  954. a) on big endian: the most significant bit of the value
  955. (bits counted from left to right, both memory an registers)
  956. b) on little endian: the least significant bit when the value
  957. is loaded in a register (bit counted from right to left)
  958. Although a) results in more complex code for big endian systems, it's
  959. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  960. Apple's universal interfaces which depend on these layout differences).
  961. Note: when changing the loadsize calculated in get_subsetref_load_info,
  962. make sure the appropriate alignment is guaranteed, at least in case of
  963. {$defined cpurequiresproperalignment}.
  964. *)
  965. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  966. var
  967. intloadsize: aint;
  968. begin
  969. intloadsize := packedbitsloadsize(sref.bitlen);
  970. {$if not defined(arm)}
  971. { may need to be split into several smaller loads/stores }
  972. if (tf_requires_proper_alignment in target_info.flags) and
  973. (intloadsize <> sref.ref.alignment) then
  974. internalerror(2006082011);
  975. {$endif not defined(arm)}
  976. if (intloadsize = 0) then
  977. internalerror(2006081310);
  978. if (intloadsize > sizeof(aint)) then
  979. intloadsize := sizeof(aint);
  980. loadsize := int_cgsize(intloadsize);
  981. if (loadsize = OS_NO) then
  982. internalerror(2006081311);
  983. if (sref.bitlen > sizeof(aint)*8) then
  984. internalerror(2006081312);
  985. extra_load :=
  986. (sref.bitlen <> 1) and
  987. ((sref.bitindexreg <> NR_NO) or
  988. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  989. end;
  990. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  991. var
  992. restbits: byte;
  993. begin
  994. if (target_info.endian = endian_big) then
  995. begin
  996. { valuereg contains the upper bits, extra_value_reg the lower }
  997. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  998. if (subsetsize in [OS_S8..OS_S128]) then
  999. begin
  1000. { sign extend }
  1001. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1002. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1003. end
  1004. else
  1005. begin
  1006. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1007. { mask other bits }
  1008. if (sref.bitlen <> AIntBits) then
  1009. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1010. end;
  1011. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1012. end
  1013. else
  1014. begin
  1015. { valuereg contains the lower bits, extra_value_reg the upper }
  1016. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1017. if (subsetsize in [OS_S8..OS_S128]) then
  1018. begin
  1019. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1020. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1021. end
  1022. else
  1023. begin
  1024. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1025. { mask other bits }
  1026. if (sref.bitlen <> AIntBits) then
  1027. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1028. end;
  1029. end;
  1030. { merge }
  1031. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1032. end;
  1033. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1034. var
  1035. tmpreg: tregister;
  1036. begin
  1037. tmpreg := getintregister(list,OS_INT);
  1038. if (target_info.endian = endian_big) then
  1039. begin
  1040. { since this is a dynamic index, it's possible that the value }
  1041. { is entirely in valuereg. }
  1042. { get the data in valuereg in the right place }
  1043. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1044. if (subsetsize in [OS_S8..OS_S128]) then
  1045. begin
  1046. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1047. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1048. end
  1049. else
  1050. begin
  1051. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1052. if (loadbitsize <> AIntBits) then
  1053. { mask left over bits }
  1054. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1055. end;
  1056. tmpreg := getintregister(list,OS_INT);
  1057. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1058. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1059. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1060. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1061. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1062. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1063. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1064. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1065. { => extra_value_reg is now 0 }
  1066. { merge }
  1067. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1068. { no need to mask, necessary masking happened earlier on }
  1069. end
  1070. else
  1071. begin
  1072. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1073. { Y-x = -(Y-x) }
  1074. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1075. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1076. { tmpreg is in the range 1..<cpu_bitsize> -> will zero extra_value_reg }
  1077. { if all bits are in valuereg }
  1078. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1079. {$ifdef x86}
  1080. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1081. if (loadbitsize = AIntBits) then
  1082. begin
  1083. { if (tmpreg >= cpu_bit_size) then tmpreg := 1 else tmpreg := 0 }
  1084. a_op_const_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpreg);
  1085. { if (tmpreg = cpu_bit_size) then tmpreg := 0 else tmpreg := -1 }
  1086. a_op_const_reg(list,OP_SUB,OS_INT,1,tmpreg);
  1087. { if (tmpreg = cpu_bit_size) then extra_value_reg := 0 }
  1088. a_op_reg_reg(list,OP_AND,OS_INT,tmpreg,extra_value_reg);
  1089. end;
  1090. {$endif x86}
  1091. { merge }
  1092. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1093. { sign extend or mask other bits }
  1094. if (subsetsize in [OS_S8..OS_S128]) then
  1095. begin
  1096. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1097. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1098. end
  1099. else
  1100. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1101. end;
  1102. end;
  1103. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1104. var
  1105. tmpref: treference;
  1106. valuereg,extra_value_reg: tregister;
  1107. tosreg: tsubsetregister;
  1108. loadsize: tcgsize;
  1109. loadbitsize: byte;
  1110. extra_load: boolean;
  1111. begin
  1112. get_subsetref_load_info(sref,loadsize,extra_load);
  1113. loadbitsize := tcgsize2size[loadsize]*8;
  1114. { load the (first part) of the bit sequence }
  1115. valuereg := cg.getintregister(list,OS_INT);
  1116. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1117. if not extra_load then
  1118. begin
  1119. { everything is guaranteed to be in a single register of loadsize }
  1120. if (sref.bitindexreg = NR_NO) then
  1121. begin
  1122. { use subsetreg routine, it may have been overridden with an optimized version }
  1123. tosreg.subsetreg := valuereg;
  1124. tosreg.subsetregsize := OS_INT;
  1125. { subsetregs always count bits from right to left }
  1126. if (target_info.endian = endian_big) then
  1127. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1128. else
  1129. tosreg.startbit := sref.startbit;
  1130. tosreg.bitlen := sref.bitlen;
  1131. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1132. exit;
  1133. end
  1134. else
  1135. begin
  1136. if (sref.startbit <> 0) then
  1137. internalerror(2006081510);
  1138. if (target_info.endian = endian_big) then
  1139. begin
  1140. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1141. if (subsetsize in [OS_S8..OS_S128]) then
  1142. begin
  1143. { sign extend to entire register }
  1144. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1145. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1146. end
  1147. else
  1148. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1149. end
  1150. else
  1151. begin
  1152. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1153. if (subsetsize in [OS_S8..OS_S128]) then
  1154. begin
  1155. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1156. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1157. end
  1158. end;
  1159. { mask other bits/sign extend }
  1160. if not(subsetsize in [OS_S8..OS_S128]) then
  1161. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1162. end
  1163. end
  1164. else
  1165. begin
  1166. { load next value as well }
  1167. extra_value_reg := getintregister(list,OS_INT);
  1168. tmpref := sref.ref;
  1169. inc(tmpref.offset,loadbitsize div 8);
  1170. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1171. if (sref.bitindexreg = NR_NO) then
  1172. { can be overridden to optimize }
  1173. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1174. else
  1175. begin
  1176. if (sref.startbit <> 0) then
  1177. internalerror(2006080610);
  1178. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg);
  1179. end;
  1180. end;
  1181. { store in destination }
  1182. { avoid unnecessary sign extension and zeroing }
  1183. valuereg := makeregsize(list,valuereg,OS_INT);
  1184. destreg := makeregsize(list,destreg,OS_INT);
  1185. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1186. destreg := makeregsize(list,destreg,tosize);
  1187. end;
  1188. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1189. begin
  1190. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1191. end;
  1192. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1193. var
  1194. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1195. tosreg, fromsreg: tsubsetregister;
  1196. tmpref: treference;
  1197. loadsize: tcgsize;
  1198. loadbitsize: byte;
  1199. extra_load: boolean;
  1200. begin
  1201. { the register must be able to contain the requested value }
  1202. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1203. internalerror(2006081613);
  1204. get_subsetref_load_info(sref,loadsize,extra_load);
  1205. loadbitsize := tcgsize2size[loadsize]*8;
  1206. { load the (first part) of the bit sequence }
  1207. valuereg := cg.getintregister(list,OS_INT);
  1208. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1209. { constant offset of bit sequence? }
  1210. if not extra_load then
  1211. begin
  1212. if (sref.bitindexreg = NR_NO) then
  1213. begin
  1214. { use subsetreg routine, it may have been overridden with an optimized version }
  1215. tosreg.subsetreg := valuereg;
  1216. tosreg.subsetregsize := OS_INT;
  1217. { subsetregs always count bits from right to left }
  1218. if (target_info.endian = endian_big) then
  1219. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1220. else
  1221. tosreg.startbit := sref.startbit;
  1222. tosreg.bitlen := sref.bitlen;
  1223. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1224. end
  1225. else
  1226. begin
  1227. if (sref.startbit <> 0) then
  1228. internalerror(2006081710);
  1229. { should be handled by normal code and will give wrong result }
  1230. { on x86 for the '1 shl bitlen' below }
  1231. if (sref.bitlen = AIntBits) then
  1232. internalerror(2006081711);
  1233. { calculated correct shiftcount for big endian }
  1234. tmpindexreg := getintregister(list,OS_INT);
  1235. a_load_reg_reg(list,OS_INT,OS_INT,sref.bitindexreg,tmpindexreg);
  1236. if (target_info.endian = endian_big) then
  1237. begin
  1238. a_op_const_reg(list,OP_SUB,OS_INT,loadbitsize-sref.bitlen,tmpindexreg);
  1239. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1240. end;
  1241. { zero the bits we have to insert }
  1242. if (slopt <> SL_SETMAX) then
  1243. begin
  1244. maskreg := getintregister(list,OS_INT);
  1245. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1246. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1247. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1248. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1249. end;
  1250. { insert the value }
  1251. if (slopt <> SL_SETZERO) then
  1252. begin
  1253. tmpreg := getintregister(list,OS_INT);
  1254. if (slopt <> SL_SETMAX) then
  1255. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1256. else if (sref.bitlen <> AIntBits) then
  1257. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1258. else
  1259. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1260. if (slopt <> SL_REGNOSRCMASK) then
  1261. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1262. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg);
  1263. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1264. end;
  1265. end;
  1266. { store back to memory }
  1267. valuereg := makeregsize(list,valuereg,loadsize);
  1268. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1269. exit;
  1270. end
  1271. else
  1272. begin
  1273. { load next value }
  1274. extra_value_reg := getintregister(list,OS_INT);
  1275. tmpref := sref.ref;
  1276. inc(tmpref.offset,loadbitsize div 8);
  1277. { should maybe be taken out too, can be done more efficiently }
  1278. { on e.g. i386 with shld/shrd }
  1279. if (sref.bitindexreg = NR_NO) then
  1280. begin
  1281. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1282. fromsreg.subsetreg := fromreg;
  1283. fromsreg.subsetregsize := fromsize;
  1284. tosreg.subsetreg := valuereg;
  1285. tosreg.subsetregsize := OS_INT;
  1286. { transfer first part }
  1287. fromsreg.bitlen := loadbitsize-sref.startbit;
  1288. tosreg.bitlen := fromsreg.bitlen;
  1289. if (target_info.endian = endian_big) then
  1290. begin
  1291. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1292. { upper bits of the value ... }
  1293. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1294. { ... to bit 0 }
  1295. tosreg.startbit := 0
  1296. end
  1297. else
  1298. begin
  1299. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1300. { lower bits of the value ... }
  1301. fromsreg.startbit := 0;
  1302. { ... to startbit }
  1303. tosreg.startbit := sref.startbit;
  1304. end;
  1305. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1306. valuereg := makeregsize(list,valuereg,loadsize);
  1307. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1308. { transfer second part }
  1309. if (target_info.endian = endian_big) then
  1310. begin
  1311. { extra_value_reg must contain the lower bits of the value at bits }
  1312. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1313. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1314. { - bitlen - startbit }
  1315. fromsreg.startbit := 0;
  1316. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1317. end
  1318. else
  1319. begin
  1320. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1321. fromsreg.startbit := fromsreg.bitlen;
  1322. tosreg.startbit := 0;
  1323. end;
  1324. tosreg.subsetreg := extra_value_reg;
  1325. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1326. tosreg.bitlen := fromsreg.bitlen;
  1327. a_load_subsetreg_subsetreg(list,fromsize,subsetsize,fromsreg,tosreg);
  1328. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1329. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1330. exit;
  1331. end
  1332. else
  1333. begin
  1334. if (sref.startbit <> 0) then
  1335. internalerror(2006081812);
  1336. { should be handled by normal code and will give wrong result }
  1337. { on x86 for the '1 shl bitlen' below }
  1338. if (sref.bitlen = AIntBits) then
  1339. internalerror(2006081713);
  1340. { generate mask to zero the bits we have to insert }
  1341. if (slopt <> SL_SETMAX) then
  1342. begin
  1343. maskreg := getintregister(list,OS_INT);
  1344. if (target_info.endian = endian_big) then
  1345. begin
  1346. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1347. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1348. end
  1349. else
  1350. begin
  1351. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1352. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1353. end;
  1354. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1355. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1356. end;
  1357. { insert the value }
  1358. if (slopt <> SL_SETZERO) then
  1359. begin
  1360. tmpreg := getintregister(list,OS_INT);
  1361. if (slopt <> SL_SETMAX) then
  1362. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1363. else if (sref.bitlen <> AIntBits) then
  1364. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1365. else
  1366. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1367. if (target_info.endian = endian_big) then
  1368. begin
  1369. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1370. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1371. { mask left over bits }
  1372. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1373. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1374. end
  1375. else
  1376. begin
  1377. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1378. { mask left over bits }
  1379. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1380. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1381. end;
  1382. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1383. end;
  1384. valuereg := makeregsize(list,valuereg,loadsize);
  1385. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1386. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1387. tmpindexreg := getintregister(list,OS_INT);
  1388. { load current array value }
  1389. if (slopt <> SL_SETZERO) then
  1390. begin
  1391. tmpreg := getintregister(list,OS_INT);
  1392. if (slopt <> SL_SETMAX) then
  1393. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1394. else if (sref.bitlen <> AIntBits) then
  1395. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1396. else
  1397. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1398. end;
  1399. { generate mask to zero the bits we have to insert }
  1400. if (slopt <> SL_SETMAX) then
  1401. begin
  1402. maskreg := getintregister(list,OS_INT);
  1403. if (target_info.endian = endian_big) then
  1404. begin
  1405. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1406. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1407. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1408. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1409. end
  1410. else
  1411. begin
  1412. { Y-x = -(Y-x) }
  1413. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1414. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1415. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1416. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1417. {$ifdef x86}
  1418. { on i386 "x shl 32 = x shl 0", on x86/64 "x shl 64 = x shl 0". Fix so it's 0. }
  1419. if (loadbitsize = AIntBits) then
  1420. begin
  1421. valuereg := getintregister(list,OS_INT);
  1422. { if (tmpindexreg >= cpu_bit_size) then valuereg := 1 else valuereg := 0 }
  1423. a_op_const_reg_reg(list,OP_SHR,OS_INT,{$ifdef cpu64bit}6{$else}5{$endif},tmpindexreg,valuereg);
  1424. { if (tmpindexreg = cpu_bit_size) then valuereg := 0 else valuereg := -1 }
  1425. a_op_const_reg(list,OP_SUB,OS_INT,1,valuereg);
  1426. { if (tmpindexreg = cpu_bit_size) then tmpreg := maskreg := 0 }
  1427. if (slopt <> SL_SETZERO) then
  1428. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,tmpreg);
  1429. a_op_reg_reg(list,OP_AND,OS_INT,valuereg,maskreg);
  1430. end;
  1431. {$endif x86}
  1432. end;
  1433. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1434. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1435. end;
  1436. if (slopt <> SL_SETZERO) then
  1437. begin
  1438. if (target_info.endian = endian_big) then
  1439. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1440. else
  1441. begin
  1442. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1443. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1444. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1445. end;
  1446. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1447. end;
  1448. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1449. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1450. end;
  1451. end;
  1452. end;
  1453. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1454. var
  1455. tmpreg: tregister;
  1456. begin
  1457. tmpreg := getintregister(list,tosubsetsize);
  1458. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1459. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1460. end;
  1461. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1462. var
  1463. tmpreg: tregister;
  1464. begin
  1465. tmpreg := getintregister(list,tosize);
  1466. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1467. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1468. end;
  1469. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1470. var
  1471. tmpreg: tregister;
  1472. begin
  1473. tmpreg := getintregister(list,subsetsize);
  1474. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1475. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1476. end;
  1477. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1478. var
  1479. tmpreg: tregister;
  1480. slopt: tsubsetloadopt;
  1481. begin
  1482. { perform masking of the source value in advance }
  1483. slopt := SL_REGNOSRCMASK;
  1484. if (sref.bitlen <> AIntBits) then
  1485. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1486. if (
  1487. { broken x86 "x shl regbitsize = x" }
  1488. ((sref.bitlen <> AIntBits) and
  1489. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1490. ((sref.bitlen = AIntBits) and
  1491. (a = -1))
  1492. ) then
  1493. slopt := SL_SETMAX
  1494. else if (a = 0) then
  1495. slopt := SL_SETZERO;
  1496. tmpreg := getintregister(list,subsetsize);
  1497. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1498. a_load_const_reg(list,subsetsize,a,tmpreg);
  1499. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1500. end;
  1501. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1502. begin
  1503. case loc.loc of
  1504. LOC_REFERENCE,LOC_CREFERENCE:
  1505. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1506. LOC_REGISTER,LOC_CREGISTER:
  1507. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1508. LOC_SUBSETREG,LOC_CSUBSETREG:
  1509. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1510. LOC_SUBSETREF,LOC_CSUBSETREF:
  1511. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1512. else
  1513. internalerror(200608054);
  1514. end;
  1515. end;
  1516. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1517. var
  1518. tmpreg: tregister;
  1519. begin
  1520. tmpreg := getintregister(list,tosubsetsize);
  1521. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1522. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1523. end;
  1524. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1525. var
  1526. tmpreg: tregister;
  1527. begin
  1528. tmpreg := getintregister(list,tosubsetsize);
  1529. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1530. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1531. end;
  1532. {$ifdef rangeon}
  1533. {$r+}
  1534. {$undef rangeon}
  1535. {$endif}
  1536. {$ifdef overflowon}
  1537. {$q+}
  1538. {$undef overflowon}
  1539. {$endif}
  1540. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1541. var
  1542. tmpref : treference;
  1543. tmpreg : tregister;
  1544. i : longint;
  1545. begin
  1546. if ref.alignment<>0 then
  1547. begin
  1548. tmpref:=ref;
  1549. case FromSize of
  1550. OS_16,OS_S16:
  1551. begin
  1552. if target_info.endian=endian_big then
  1553. inc(tmpref.offset);
  1554. a_load_reg_ref(list,OS_8,OS_8,register,Ref);
  1555. a_op_const_reg(list,OP_SHR,OS_8,8,register);
  1556. if target_info.endian=endian_big then
  1557. dec(tmpref.offset)
  1558. else
  1559. inc(tmpref.offset);
  1560. a_load_reg_ref(list,OS_8,OS_8,register,Ref);
  1561. end;
  1562. OS_32,OS_S32:
  1563. begin
  1564. if target_info.endian=endian_big then
  1565. inc(tmpref.offset,3);
  1566. a_load_reg_ref(list,OS_8,OS_8,register,Ref);
  1567. for i:=1 to 3 do
  1568. begin
  1569. a_op_const_reg(list,OP_SHR,OS_8,8,register);
  1570. if target_info.endian=endian_big then
  1571. dec(tmpref.offset)
  1572. else
  1573. inc(tmpref.offset);
  1574. a_load_reg_ref(list,OS_8,OS_8,register,Ref);
  1575. end;
  1576. end
  1577. else
  1578. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1579. end;
  1580. end
  1581. else
  1582. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1583. end;
  1584. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1585. var
  1586. tmpref : treference;
  1587. tmpreg : tregister;
  1588. i : longint;
  1589. begin
  1590. if ref.alignment<>0 then
  1591. begin
  1592. tmpref:=ref;
  1593. case FromSize of
  1594. OS_16,OS_S16:
  1595. begin
  1596. if target_info.endian=endian_little then
  1597. inc(tmpref.offset);
  1598. a_load_ref_reg(list,OS_8,OS_8,Ref,register);
  1599. a_op_const_reg(list,OP_SHL,OS_8,8,register);
  1600. if target_info.endian=endian_little then
  1601. dec(tmpref.offset)
  1602. else
  1603. inc(tmpref.offset);
  1604. tmpreg:=getintregister(list,OS_INT);
  1605. a_load_ref_reg(list,OS_8,OS_16,Ref,tmpreg);
  1606. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1607. end;
  1608. OS_32,OS_S32:
  1609. begin
  1610. if target_info.endian=endian_little then
  1611. inc(tmpref.offset,3);
  1612. a_load_ref_reg(list,OS_8,OS_8,Ref,register);
  1613. for i:=1 to 3 do
  1614. begin
  1615. a_op_const_reg(list,OP_SHL,OS_8,8,register);
  1616. if target_info.endian=endian_little then
  1617. dec(tmpref.offset)
  1618. else
  1619. inc(tmpref.offset);
  1620. tmpreg:=getintregister(list,OS_INT);
  1621. a_load_ref_reg(list,OS_8,OS_32,Ref,tmpreg);
  1622. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1623. end;
  1624. end
  1625. else
  1626. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1627. end;
  1628. end
  1629. else
  1630. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1631. end;
  1632. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1633. var
  1634. tmpreg: tregister;
  1635. begin
  1636. { verify if we have the same reference }
  1637. if references_equal(sref,dref) then
  1638. exit;
  1639. tmpreg:=getintregister(list,tosize);
  1640. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1641. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1642. end;
  1643. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1644. var
  1645. tmpreg: tregister;
  1646. begin
  1647. tmpreg:=getintregister(list,size);
  1648. a_load_const_reg(list,size,a,tmpreg);
  1649. a_load_reg_ref(list,size,size,tmpreg,ref);
  1650. end;
  1651. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1652. begin
  1653. case loc.loc of
  1654. LOC_REFERENCE,LOC_CREFERENCE:
  1655. a_load_const_ref(list,loc.size,a,loc.reference);
  1656. LOC_REGISTER,LOC_CREGISTER:
  1657. a_load_const_reg(list,loc.size,a,loc.register);
  1658. LOC_SUBSETREG,LOC_CSUBSETREG:
  1659. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1660. LOC_SUBSETREF,LOC_CSUBSETREF:
  1661. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1662. else
  1663. internalerror(200203272);
  1664. end;
  1665. end;
  1666. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1667. begin
  1668. case loc.loc of
  1669. LOC_REFERENCE,LOC_CREFERENCE:
  1670. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1671. LOC_REGISTER,LOC_CREGISTER:
  1672. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1673. LOC_SUBSETREG,LOC_CSUBSETREG:
  1674. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1675. LOC_SUBSETREF,LOC_CSUBSETREF:
  1676. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1677. else
  1678. internalerror(200203271);
  1679. end;
  1680. end;
  1681. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1682. begin
  1683. case loc.loc of
  1684. LOC_REFERENCE,LOC_CREFERENCE:
  1685. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1686. LOC_REGISTER,LOC_CREGISTER:
  1687. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1688. LOC_CONSTANT:
  1689. a_load_const_reg(list,tosize,loc.value,reg);
  1690. LOC_SUBSETREG,LOC_CSUBSETREG:
  1691. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  1692. LOC_SUBSETREF,LOC_CSUBSETREF:
  1693. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  1694. else
  1695. internalerror(200109092);
  1696. end;
  1697. end;
  1698. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1699. begin
  1700. case loc.loc of
  1701. LOC_REFERENCE,LOC_CREFERENCE:
  1702. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1703. LOC_REGISTER,LOC_CREGISTER:
  1704. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1705. LOC_CONSTANT:
  1706. a_load_const_ref(list,tosize,loc.value,ref);
  1707. LOC_SUBSETREG,LOC_CSUBSETREG:
  1708. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  1709. LOC_SUBSETREF,LOC_CSUBSETREF:
  1710. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  1711. else
  1712. internalerror(200109302);
  1713. end;
  1714. end;
  1715. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  1716. begin
  1717. case loc.loc of
  1718. LOC_REFERENCE,LOC_CREFERENCE:
  1719. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  1720. LOC_REGISTER,LOC_CREGISTER:
  1721. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  1722. LOC_CONSTANT:
  1723. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  1724. LOC_SUBSETREG,LOC_CSUBSETREG:
  1725. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  1726. LOC_SUBSETREF,LOC_CSUBSETREF:
  1727. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  1728. else
  1729. internalerror(2006052310);
  1730. end;
  1731. end;
  1732. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  1733. begin
  1734. case loc.loc of
  1735. LOC_REFERENCE,LOC_CREFERENCE:
  1736. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  1737. LOC_REGISTER,LOC_CREGISTER:
  1738. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  1739. LOC_SUBSETREG,LOC_CSUBSETREG:
  1740. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  1741. LOC_SUBSETREF,LOC_CSUBSETREF:
  1742. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  1743. else
  1744. internalerror(2006051510);
  1745. end;
  1746. end;
  1747. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  1748. var
  1749. powerval : longint;
  1750. begin
  1751. case op of
  1752. OP_OR :
  1753. begin
  1754. { or with zero returns same result }
  1755. if a = 0 then
  1756. op:=OP_NONE
  1757. else
  1758. { or with max returns max }
  1759. if a = -1 then
  1760. op:=OP_MOVE;
  1761. end;
  1762. OP_AND :
  1763. begin
  1764. { and with max returns same result }
  1765. if (a = -1) then
  1766. op:=OP_NONE
  1767. else
  1768. { and with 0 returns 0 }
  1769. if a=0 then
  1770. op:=OP_MOVE;
  1771. end;
  1772. OP_DIV :
  1773. begin
  1774. { division by 1 returns result }
  1775. if a = 1 then
  1776. op:=OP_NONE
  1777. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1778. begin
  1779. a := powerval;
  1780. op:= OP_SHR;
  1781. end;
  1782. end;
  1783. OP_IDIV:
  1784. begin
  1785. if a = 1 then
  1786. op:=OP_NONE;
  1787. end;
  1788. OP_MUL,OP_IMUL:
  1789. begin
  1790. if a = 1 then
  1791. op:=OP_NONE
  1792. else
  1793. if a=0 then
  1794. op:=OP_MOVE
  1795. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1796. begin
  1797. a := powerval;
  1798. op:= OP_SHL;
  1799. end;
  1800. end;
  1801. OP_ADD,OP_SUB:
  1802. begin
  1803. if a = 0 then
  1804. op:=OP_NONE;
  1805. end;
  1806. OP_SAR,OP_SHL,OP_SHR:
  1807. begin
  1808. if a = 0 then
  1809. op:=OP_NONE;
  1810. end;
  1811. end;
  1812. end;
  1813. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  1814. begin
  1815. case loc.loc of
  1816. LOC_REFERENCE, LOC_CREFERENCE:
  1817. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1818. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1819. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  1820. else
  1821. internalerror(200203301);
  1822. end;
  1823. end;
  1824. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  1825. begin
  1826. case loc.loc of
  1827. LOC_REFERENCE, LOC_CREFERENCE:
  1828. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1829. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1830. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1831. else
  1832. internalerror(48991);
  1833. end;
  1834. end;
  1835. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1836. var
  1837. ref : treference;
  1838. begin
  1839. case cgpara.location^.loc of
  1840. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1841. begin
  1842. cgpara.check_simple_location;
  1843. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  1844. end;
  1845. LOC_REFERENCE,LOC_CREFERENCE:
  1846. begin
  1847. cgpara.check_simple_location;
  1848. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1849. a_loadfpu_reg_ref(list,size,size,r,ref);
  1850. end;
  1851. LOC_REGISTER,LOC_CREGISTER:
  1852. begin
  1853. { paramfpu_ref does the check_simpe_location check here if necessary }
  1854. tg.GetTemp(list,TCGSize2Size[size],tt_normal,ref);
  1855. a_loadfpu_reg_ref(list,size,size,r,ref);
  1856. a_paramfpu_ref(list,size,ref,cgpara);
  1857. tg.Ungettemp(list,ref);
  1858. end;
  1859. else
  1860. internalerror(2002071004);
  1861. end;
  1862. end;
  1863. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1864. var
  1865. href : treference;
  1866. begin
  1867. cgpara.check_simple_location;
  1868. case cgpara.location^.loc of
  1869. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1870. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  1871. LOC_REFERENCE,LOC_CREFERENCE:
  1872. begin
  1873. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1874. { concatcopy should choose the best way to copy the data }
  1875. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1876. end;
  1877. else
  1878. internalerror(200402201);
  1879. end;
  1880. end;
  1881. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  1882. var
  1883. tmpreg : tregister;
  1884. begin
  1885. tmpreg:=getintregister(list,size);
  1886. a_load_ref_reg(list,size,size,ref,tmpreg);
  1887. a_op_const_reg(list,op,size,a,tmpreg);
  1888. a_load_reg_ref(list,size,size,tmpreg,ref);
  1889. end;
  1890. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  1891. var
  1892. tmpreg: tregister;
  1893. begin
  1894. tmpreg := cg.getintregister(list, size);
  1895. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  1896. a_op_const_reg(list,op,size,a,tmpreg);
  1897. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  1898. end;
  1899. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  1900. var
  1901. tmpreg: tregister;
  1902. begin
  1903. tmpreg := cg.getintregister(list, size);
  1904. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  1905. a_op_const_reg(list,op,size,a,tmpreg);
  1906. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  1907. end;
  1908. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  1909. begin
  1910. case loc.loc of
  1911. LOC_REGISTER, LOC_CREGISTER:
  1912. a_op_const_reg(list,op,loc.size,a,loc.register);
  1913. LOC_REFERENCE, LOC_CREFERENCE:
  1914. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1915. LOC_SUBSETREG, LOC_CSUBSETREG:
  1916. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  1917. LOC_SUBSETREF, LOC_CSUBSETREF:
  1918. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  1919. else
  1920. internalerror(200109061);
  1921. end;
  1922. end;
  1923. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1924. var
  1925. tmpreg : tregister;
  1926. begin
  1927. tmpreg:=getintregister(list,size);
  1928. a_load_ref_reg(list,size,size,ref,tmpreg);
  1929. a_op_reg_reg(list,op,size,reg,tmpreg);
  1930. a_load_reg_ref(list,size,size,tmpreg,ref);
  1931. end;
  1932. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1933. var
  1934. tmpreg: tregister;
  1935. begin
  1936. case op of
  1937. OP_NOT,OP_NEG:
  1938. { handle it as "load ref,reg; op reg" }
  1939. begin
  1940. a_load_ref_reg(list,size,size,ref,reg);
  1941. a_op_reg_reg(list,op,size,reg,reg);
  1942. end;
  1943. else
  1944. begin
  1945. tmpreg:=getintregister(list,size);
  1946. a_load_ref_reg(list,size,size,ref,tmpreg);
  1947. a_op_reg_reg(list,op,size,tmpreg,reg);
  1948. end;
  1949. end;
  1950. end;
  1951. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  1952. var
  1953. tmpreg: tregister;
  1954. begin
  1955. tmpreg := cg.getintregister(list, opsize);
  1956. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  1957. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1958. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  1959. end;
  1960. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  1961. var
  1962. tmpreg: tregister;
  1963. begin
  1964. tmpreg := cg.getintregister(list, opsize);
  1965. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  1966. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  1967. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  1968. end;
  1969. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1970. begin
  1971. case loc.loc of
  1972. LOC_REGISTER, LOC_CREGISTER:
  1973. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1974. LOC_REFERENCE, LOC_CREFERENCE:
  1975. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1976. LOC_SUBSETREG, LOC_CSUBSETREG:
  1977. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  1978. LOC_SUBSETREF, LOC_CSUBSETREF:
  1979. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  1980. else
  1981. internalerror(200109061);
  1982. end;
  1983. end;
  1984. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1985. var
  1986. tmpreg: tregister;
  1987. begin
  1988. case loc.loc of
  1989. LOC_REGISTER,LOC_CREGISTER:
  1990. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1991. LOC_REFERENCE,LOC_CREFERENCE:
  1992. begin
  1993. tmpreg:=getintregister(list,loc.size);
  1994. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1995. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1996. end;
  1997. LOC_SUBSETREG, LOC_CSUBSETREG:
  1998. begin
  1999. tmpreg:=getintregister(list,loc.size);
  2000. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2001. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2002. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2003. end;
  2004. LOC_SUBSETREF, LOC_CSUBSETREF:
  2005. begin
  2006. tmpreg:=getintregister(list,loc.size);
  2007. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2008. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2009. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2010. end;
  2011. else
  2012. internalerror(200109061);
  2013. end;
  2014. end;
  2015. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2016. a:aint;src,dst:Tregister);
  2017. begin
  2018. a_load_reg_reg(list,size,size,src,dst);
  2019. a_op_const_reg(list,op,size,a,dst);
  2020. end;
  2021. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2022. size: tcgsize; src1, src2, dst: tregister);
  2023. var
  2024. tmpreg: tregister;
  2025. begin
  2026. if (dst<>src1) then
  2027. begin
  2028. a_load_reg_reg(list,size,size,src2,dst);
  2029. a_op_reg_reg(list,op,size,src1,dst);
  2030. end
  2031. else
  2032. begin
  2033. tmpreg:=getintregister(list,size);
  2034. a_load_reg_reg(list,size,size,src2,tmpreg);
  2035. a_op_reg_reg(list,op,size,src1,tmpreg);
  2036. a_load_reg_reg(list,size,size,tmpreg,dst);
  2037. end;
  2038. end;
  2039. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2040. begin
  2041. a_op_const_reg_reg(list,op,size,a,src,dst);
  2042. ovloc.loc:=LOC_VOID;
  2043. end;
  2044. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2045. begin
  2046. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2047. ovloc.loc:=LOC_VOID;
  2048. end;
  2049. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2050. l : tasmlabel);
  2051. var
  2052. tmpreg: tregister;
  2053. begin
  2054. tmpreg:=getintregister(list,size);
  2055. a_load_ref_reg(list,size,size,ref,tmpreg);
  2056. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2057. end;
  2058. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2059. l : tasmlabel);
  2060. var
  2061. tmpreg : tregister;
  2062. begin
  2063. case loc.loc of
  2064. LOC_REGISTER,LOC_CREGISTER:
  2065. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2066. LOC_REFERENCE,LOC_CREFERENCE:
  2067. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2068. LOC_SUBSETREG, LOC_CSUBSETREG:
  2069. begin
  2070. tmpreg:=getintregister(list,size);
  2071. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2072. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2073. end;
  2074. LOC_SUBSETREF, LOC_CSUBSETREF:
  2075. begin
  2076. tmpreg:=getintregister(list,size);
  2077. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2078. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2079. end;
  2080. else
  2081. internalerror(200109061);
  2082. end;
  2083. end;
  2084. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2085. var
  2086. tmpreg: tregister;
  2087. begin
  2088. tmpreg:=getintregister(list,size);
  2089. a_load_ref_reg(list,size,size,ref,tmpreg);
  2090. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2091. end;
  2092. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2093. var
  2094. tmpreg: tregister;
  2095. begin
  2096. tmpreg:=getintregister(list,size);
  2097. a_load_ref_reg(list,size,size,ref,tmpreg);
  2098. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2099. end;
  2100. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2101. begin
  2102. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2103. end;
  2104. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2105. begin
  2106. case loc.loc of
  2107. LOC_REGISTER,
  2108. LOC_CREGISTER:
  2109. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2110. LOC_REFERENCE,
  2111. LOC_CREFERENCE :
  2112. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2113. LOC_CONSTANT:
  2114. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2115. LOC_SUBSETREG,
  2116. LOC_CSUBSETREG:
  2117. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2118. LOC_SUBSETREF,
  2119. LOC_CSUBSETREF:
  2120. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2121. else
  2122. internalerror(200203231);
  2123. end;
  2124. end;
  2125. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2126. var
  2127. tmpreg: tregister;
  2128. begin
  2129. tmpreg:=getintregister(list, cmpsize);
  2130. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2131. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2132. end;
  2133. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2134. var
  2135. tmpreg: tregister;
  2136. begin
  2137. tmpreg:=getintregister(list, cmpsize);
  2138. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2139. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2140. end;
  2141. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2142. l : tasmlabel);
  2143. var
  2144. tmpreg: tregister;
  2145. begin
  2146. case loc.loc of
  2147. LOC_REGISTER,LOC_CREGISTER:
  2148. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2149. LOC_REFERENCE,LOC_CREFERENCE:
  2150. begin
  2151. tmpreg:=getintregister(list,size);
  2152. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2153. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2154. end;
  2155. LOC_SUBSETREG, LOC_CSUBSETREG:
  2156. begin
  2157. tmpreg:=getintregister(list, size);
  2158. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2159. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2160. end;
  2161. LOC_SUBSETREF, LOC_CSUBSETREF:
  2162. begin
  2163. tmpreg:=getintregister(list, size);
  2164. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2165. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2166. end;
  2167. else
  2168. internalerror(200109061);
  2169. end;
  2170. end;
  2171. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2172. begin
  2173. case loc.loc of
  2174. LOC_MMREGISTER,LOC_CMMREGISTER:
  2175. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2176. LOC_REFERENCE,LOC_CREFERENCE:
  2177. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2178. else
  2179. internalerror(200310121);
  2180. end;
  2181. end;
  2182. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2183. begin
  2184. case loc.loc of
  2185. LOC_MMREGISTER,LOC_CMMREGISTER:
  2186. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2187. LOC_REFERENCE,LOC_CREFERENCE:
  2188. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2189. else
  2190. internalerror(200310122);
  2191. end;
  2192. end;
  2193. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2194. var
  2195. href : treference;
  2196. begin
  2197. cgpara.check_simple_location;
  2198. case cgpara.location^.loc of
  2199. LOC_MMREGISTER,LOC_CMMREGISTER:
  2200. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2201. LOC_REFERENCE,LOC_CREFERENCE:
  2202. begin
  2203. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  2204. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2205. end
  2206. else
  2207. internalerror(200310123);
  2208. end;
  2209. end;
  2210. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2211. var
  2212. hr : tregister;
  2213. hs : tmmshuffle;
  2214. begin
  2215. cgpara.check_simple_location;
  2216. hr:=getmmregister(list,cgpara.location^.size);
  2217. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2218. if realshuffle(shuffle) then
  2219. begin
  2220. hs:=shuffle^;
  2221. removeshuffles(hs);
  2222. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2223. end
  2224. else
  2225. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2226. end;
  2227. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2228. begin
  2229. case loc.loc of
  2230. LOC_MMREGISTER,LOC_CMMREGISTER:
  2231. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2232. LOC_REFERENCE,LOC_CREFERENCE:
  2233. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2234. else
  2235. internalerror(200310123);
  2236. end;
  2237. end;
  2238. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2239. var
  2240. hr : tregister;
  2241. hs : tmmshuffle;
  2242. begin
  2243. hr:=getmmregister(list,size);
  2244. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2245. if realshuffle(shuffle) then
  2246. begin
  2247. hs:=shuffle^;
  2248. removeshuffles(hs);
  2249. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2250. end
  2251. else
  2252. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2253. end;
  2254. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2255. var
  2256. hr : tregister;
  2257. hs : tmmshuffle;
  2258. begin
  2259. hr:=getmmregister(list,size);
  2260. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2261. if realshuffle(shuffle) then
  2262. begin
  2263. hs:=shuffle^;
  2264. removeshuffles(hs);
  2265. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2266. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2267. end
  2268. else
  2269. begin
  2270. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2271. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2272. end;
  2273. end;
  2274. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2275. begin
  2276. case loc.loc of
  2277. LOC_CMMREGISTER,LOC_MMREGISTER:
  2278. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2279. LOC_CREFERENCE,LOC_REFERENCE:
  2280. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2281. else
  2282. internalerror(200312232);
  2283. end;
  2284. end;
  2285. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2286. begin
  2287. g_concatcopy(list,source,dest,len);
  2288. end;
  2289. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2290. var
  2291. cgpara1,cgpara2,cgpara3 : TCGPara;
  2292. begin
  2293. cgpara1.init;
  2294. cgpara2.init;
  2295. cgpara3.init;
  2296. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2297. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2298. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2299. paramanager.allocparaloc(list,cgpara3);
  2300. a_paramaddr_ref(list,dest,cgpara3);
  2301. paramanager.allocparaloc(list,cgpara2);
  2302. a_paramaddr_ref(list,source,cgpara2);
  2303. paramanager.allocparaloc(list,cgpara1);
  2304. a_param_const(list,OS_INT,len,cgpara1);
  2305. paramanager.freeparaloc(list,cgpara3);
  2306. paramanager.freeparaloc(list,cgpara2);
  2307. paramanager.freeparaloc(list,cgpara1);
  2308. allocallcpuregisters(list);
  2309. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  2310. deallocallcpuregisters(list);
  2311. cgpara3.done;
  2312. cgpara2.done;
  2313. cgpara1.done;
  2314. end;
  2315. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2316. var
  2317. cgpara1,cgpara2 : TCGPara;
  2318. begin
  2319. cgpara1.init;
  2320. cgpara2.init;
  2321. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2322. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2323. paramanager.allocparaloc(list,cgpara2);
  2324. a_paramaddr_ref(list,dest,cgpara2);
  2325. paramanager.allocparaloc(list,cgpara1);
  2326. a_paramaddr_ref(list,source,cgpara1);
  2327. paramanager.freeparaloc(list,cgpara2);
  2328. paramanager.freeparaloc(list,cgpara1);
  2329. allocallcpuregisters(list);
  2330. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE');
  2331. deallocallcpuregisters(list);
  2332. cgpara2.done;
  2333. cgpara1.done;
  2334. end;
  2335. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2336. var
  2337. href : treference;
  2338. incrfunc : string;
  2339. cgpara1,cgpara2 : TCGPara;
  2340. begin
  2341. cgpara1.init;
  2342. cgpara2.init;
  2343. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2344. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2345. if is_interfacecom(t) then
  2346. incrfunc:='FPC_INTF_INCR_REF'
  2347. else if is_ansistring(t) then
  2348. incrfunc:='FPC_ANSISTR_INCR_REF'
  2349. else if is_widestring(t) then
  2350. incrfunc:='FPC_WIDESTR_INCR_REF'
  2351. else if is_dynamic_array(t) then
  2352. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2353. else
  2354. incrfunc:='';
  2355. { call the special incr function or the generic addref }
  2356. if incrfunc<>'' then
  2357. begin
  2358. paramanager.allocparaloc(list,cgpara1);
  2359. { widestrings aren't ref. counted on all platforms so we need the address
  2360. to create a real copy }
  2361. if is_widestring(t) then
  2362. a_paramaddr_ref(list,ref,cgpara1)
  2363. else
  2364. { these functions get the pointer by value }
  2365. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2366. paramanager.freeparaloc(list,cgpara1);
  2367. allocallcpuregisters(list);
  2368. a_call_name(list,incrfunc);
  2369. deallocallcpuregisters(list);
  2370. end
  2371. else
  2372. begin
  2373. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2374. paramanager.allocparaloc(list,cgpara2);
  2375. a_paramaddr_ref(list,href,cgpara2);
  2376. paramanager.allocparaloc(list,cgpara1);
  2377. a_paramaddr_ref(list,ref,cgpara1);
  2378. paramanager.freeparaloc(list,cgpara1);
  2379. paramanager.freeparaloc(list,cgpara2);
  2380. allocallcpuregisters(list);
  2381. a_call_name(list,'FPC_ADDREF');
  2382. deallocallcpuregisters(list);
  2383. end;
  2384. cgpara2.done;
  2385. cgpara1.done;
  2386. end;
  2387. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2388. var
  2389. href : treference;
  2390. decrfunc : string;
  2391. needrtti : boolean;
  2392. cgpara1,cgpara2 : TCGPara;
  2393. tempreg1,tempreg2 : TRegister;
  2394. begin
  2395. cgpara1.init;
  2396. cgpara2.init;
  2397. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2398. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2399. needrtti:=false;
  2400. if is_interfacecom(t) then
  2401. decrfunc:='FPC_INTF_DECR_REF'
  2402. else if is_ansistring(t) then
  2403. decrfunc:='FPC_ANSISTR_DECR_REF'
  2404. else if is_widestring(t) then
  2405. decrfunc:='FPC_WIDESTR_DECR_REF'
  2406. else if is_dynamic_array(t) then
  2407. begin
  2408. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2409. needrtti:=true;
  2410. end
  2411. else
  2412. decrfunc:='';
  2413. { call the special decr function or the generic decref }
  2414. if decrfunc<>'' then
  2415. begin
  2416. if needrtti then
  2417. begin
  2418. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2419. tempreg2:=getaddressregister(list);
  2420. a_loadaddr_ref_reg(list,href,tempreg2);
  2421. end;
  2422. tempreg1:=getaddressregister(list);
  2423. a_loadaddr_ref_reg(list,ref,tempreg1);
  2424. if needrtti then
  2425. begin
  2426. paramanager.allocparaloc(list,cgpara2);
  2427. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2428. paramanager.freeparaloc(list,cgpara2);
  2429. end;
  2430. paramanager.allocparaloc(list,cgpara1);
  2431. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2432. paramanager.freeparaloc(list,cgpara1);
  2433. allocallcpuregisters(list);
  2434. a_call_name(list,decrfunc);
  2435. deallocallcpuregisters(list);
  2436. end
  2437. else
  2438. begin
  2439. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2440. paramanager.allocparaloc(list,cgpara2);
  2441. a_paramaddr_ref(list,href,cgpara2);
  2442. paramanager.allocparaloc(list,cgpara1);
  2443. a_paramaddr_ref(list,ref,cgpara1);
  2444. paramanager.freeparaloc(list,cgpara1);
  2445. paramanager.freeparaloc(list,cgpara2);
  2446. allocallcpuregisters(list);
  2447. a_call_name(list,'FPC_DECREF');
  2448. deallocallcpuregisters(list);
  2449. end;
  2450. cgpara2.done;
  2451. cgpara1.done;
  2452. end;
  2453. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2454. var
  2455. href : treference;
  2456. cgpara1,cgpara2 : TCGPara;
  2457. begin
  2458. cgpara1.init;
  2459. cgpara2.init;
  2460. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2461. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2462. if is_ansistring(t) or
  2463. is_widestring(t) or
  2464. is_interfacecom(t) or
  2465. is_dynamic_array(t) then
  2466. a_load_const_ref(list,OS_ADDR,0,ref)
  2467. else
  2468. begin
  2469. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2470. paramanager.allocparaloc(list,cgpara2);
  2471. a_paramaddr_ref(list,href,cgpara2);
  2472. paramanager.allocparaloc(list,cgpara1);
  2473. a_paramaddr_ref(list,ref,cgpara1);
  2474. paramanager.freeparaloc(list,cgpara1);
  2475. paramanager.freeparaloc(list,cgpara2);
  2476. allocallcpuregisters(list);
  2477. a_call_name(list,'FPC_INITIALIZE');
  2478. deallocallcpuregisters(list);
  2479. end;
  2480. cgpara1.done;
  2481. cgpara2.done;
  2482. end;
  2483. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2484. var
  2485. href : treference;
  2486. cgpara1,cgpara2 : TCGPara;
  2487. begin
  2488. cgpara1.init;
  2489. cgpara2.init;
  2490. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2491. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2492. if is_ansistring(t) or
  2493. is_widestring(t) or
  2494. is_interfacecom(t) then
  2495. begin
  2496. g_decrrefcount(list,t,ref);
  2497. a_load_const_ref(list,OS_ADDR,0,ref);
  2498. end
  2499. else
  2500. begin
  2501. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0);
  2502. paramanager.allocparaloc(list,cgpara2);
  2503. a_paramaddr_ref(list,href,cgpara2);
  2504. paramanager.allocparaloc(list,cgpara1);
  2505. a_paramaddr_ref(list,ref,cgpara1);
  2506. paramanager.freeparaloc(list,cgpara1);
  2507. paramanager.freeparaloc(list,cgpara2);
  2508. allocallcpuregisters(list);
  2509. a_call_name(list,'FPC_FINALIZE');
  2510. deallocallcpuregisters(list);
  2511. end;
  2512. cgpara1.done;
  2513. cgpara2.done;
  2514. end;
  2515. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2516. { generate range checking code for the value at location p. The type }
  2517. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2518. { is the original type used at that location. When both defs are equal }
  2519. { the check is also insert (needed for succ,pref,inc,dec) }
  2520. const
  2521. aintmax=high(aint);
  2522. var
  2523. neglabel : tasmlabel;
  2524. hreg : tregister;
  2525. lto,hto,
  2526. lfrom,hfrom : TConstExprInt;
  2527. fromsize, tosize: cardinal;
  2528. from_signed, to_signed: boolean;
  2529. begin
  2530. { range checking on and range checkable value? }
  2531. if not(cs_check_range in current_settings.localswitches) or
  2532. not(fromdef.typ in [orddef,enumdef]) then
  2533. exit;
  2534. {$ifndef cpu64bit}
  2535. { handle 64bit rangechecks separate for 32bit processors }
  2536. if is_64bit(fromdef) or is_64bit(todef) then
  2537. begin
  2538. cg64.g_rangecheck64(list,l,fromdef,todef);
  2539. exit;
  2540. end;
  2541. {$endif cpu64bit}
  2542. { only check when assigning to scalar, subranges are different, }
  2543. { when todef=fromdef then the check is always generated }
  2544. getrange(fromdef,lfrom,hfrom);
  2545. getrange(todef,lto,hto);
  2546. from_signed := is_signed(fromdef);
  2547. to_signed := is_signed(todef);
  2548. { check the rangedef of the array, not the array itself }
  2549. { (only change now, since getrange needs the arraydef) }
  2550. if (todef.typ = arraydef) then
  2551. todef := tarraydef(todef).rangedef;
  2552. { no range check if from and to are equal and are both longint/dword }
  2553. { no range check if from and to are equal and are both longint/dword }
  2554. { (if we have a 32bit processor) or int64/qword, since such }
  2555. { operations can at most cause overflows (JM) }
  2556. { Note that these checks are mostly processor independent, they only }
  2557. { have to be changed once we introduce 64bit subrange types }
  2558. {$ifdef cpu64bit}
  2559. if (fromdef = todef) and
  2560. (fromdef.typ=orddef) and
  2561. (((((torddef(fromdef).ordtype = s64bit) and
  2562. (lfrom = low(int64)) and
  2563. (hfrom = high(int64))) or
  2564. ((torddef(fromdef).ordtype = u64bit) and
  2565. (lfrom = low(qword)) and
  2566. (hfrom = high(qword))) or
  2567. ((torddef(fromdef).ordtype = scurrency) and
  2568. (lfrom = low(int64)) and
  2569. (hfrom = high(int64)))))) then
  2570. exit;
  2571. {$else cpu64bit}
  2572. if (fromdef = todef) and
  2573. (fromdef.typ=orddef) and
  2574. (((((torddef(fromdef).ordtype = s32bit) and
  2575. (lfrom = low(longint)) and
  2576. (hfrom = high(longint))) or
  2577. ((torddef(fromdef).ordtype = u32bit) and
  2578. (lfrom = low(cardinal)) and
  2579. (hfrom = high(cardinal)))))) then
  2580. exit;
  2581. {$endif cpu64bit}
  2582. { optimize some range checks away in safe cases }
  2583. fromsize := fromdef.size;
  2584. tosize := todef.size;
  2585. if ((from_signed = to_signed) or
  2586. (not from_signed)) and
  2587. (lto<=lfrom) and (hto>=hfrom) and
  2588. (fromsize <= tosize) then
  2589. begin
  2590. { if fromsize < tosize, and both have the same signed-ness or }
  2591. { fromdef is unsigned, then all bit patterns from fromdef are }
  2592. { valid for todef as well }
  2593. if (fromsize < tosize) then
  2594. exit;
  2595. if (fromsize = tosize) and
  2596. (from_signed = to_signed) then
  2597. { only optimize away if all bit patterns which fit in fromsize }
  2598. { are valid for the todef }
  2599. begin
  2600. {$ifopt Q+}
  2601. {$define overflowon}
  2602. {$Q-}
  2603. {$endif}
  2604. if to_signed then
  2605. begin
  2606. { calculation of the low/high ranges must not overflow 64 bit
  2607. otherwise we end up comparing with zero for 64 bit data types on
  2608. 64 bit processors }
  2609. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2610. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2611. exit
  2612. end
  2613. else
  2614. begin
  2615. { calculation of the low/high ranges must not overflow 64 bit
  2616. otherwise we end up having all zeros for 64 bit data types on
  2617. 64 bit processors }
  2618. if (lto = 0) and
  2619. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2620. exit
  2621. end;
  2622. {$ifdef overflowon}
  2623. {$Q+}
  2624. {$undef overflowon}
  2625. {$endif}
  2626. end
  2627. end;
  2628. { generate the rangecheck code for the def where we are going to }
  2629. { store the result }
  2630. { use the trick that }
  2631. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2632. { To be able to do that, we have to make sure however that either }
  2633. { fromdef and todef are both signed or unsigned, or that we leave }
  2634. { the parts < 0 and > maxlongint out }
  2635. if from_signed xor to_signed then
  2636. begin
  2637. if from_signed then
  2638. { from is signed, to is unsigned }
  2639. begin
  2640. { if high(from) < 0 -> always range error }
  2641. if (hfrom < 0) or
  2642. { if low(to) > maxlongint also range error }
  2643. (lto > aintmax) then
  2644. begin
  2645. a_call_name(list,'FPC_RANGEERROR');
  2646. exit
  2647. end;
  2648. { from is signed and to is unsigned -> when looking at to }
  2649. { as an signed value, it must be < maxaint (otherwise }
  2650. { it will become negative, which is invalid since "to" is unsigned) }
  2651. if hto > aintmax then
  2652. hto := aintmax;
  2653. end
  2654. else
  2655. { from is unsigned, to is signed }
  2656. begin
  2657. if (lfrom > aintmax) or
  2658. (hto < 0) then
  2659. begin
  2660. a_call_name(list,'FPC_RANGEERROR');
  2661. exit
  2662. end;
  2663. { from is unsigned and to is signed -> when looking at to }
  2664. { as an unsigned value, it must be >= 0 (since negative }
  2665. { values are the same as values > maxlongint) }
  2666. if lto < 0 then
  2667. lto := 0;
  2668. end;
  2669. end;
  2670. hreg:=getintregister(list,OS_INT);
  2671. a_load_loc_reg(list,OS_INT,l,hreg);
  2672. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  2673. current_asmdata.getjumplabel(neglabel);
  2674. {
  2675. if from_signed then
  2676. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  2677. else
  2678. }
  2679. {$ifdef cpu64bit}
  2680. if qword(hto-lto)>qword(aintmax) then
  2681. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  2682. else
  2683. {$endif cpu64bit}
  2684. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  2685. a_call_name(list,'FPC_RANGEERROR');
  2686. a_label(list,neglabel);
  2687. end;
  2688. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2689. begin
  2690. g_overflowCheck(list,loc,def);
  2691. end;
  2692. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2693. var
  2694. tmpreg : tregister;
  2695. begin
  2696. tmpreg:=getintregister(list,size);
  2697. g_flags2reg(list,size,f,tmpreg);
  2698. a_load_reg_ref(list,size,size,tmpreg,ref);
  2699. end;
  2700. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2701. var
  2702. OKLabel : tasmlabel;
  2703. cgpara1 : TCGPara;
  2704. begin
  2705. if (cs_check_object in current_settings.localswitches) or
  2706. (cs_check_range in current_settings.localswitches) then
  2707. begin
  2708. current_asmdata.getjumplabel(oklabel);
  2709. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2710. cgpara1.init;
  2711. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2712. paramanager.allocparaloc(list,cgpara1);
  2713. a_param_const(list,OS_INT,210,cgpara1);
  2714. paramanager.freeparaloc(list,cgpara1);
  2715. a_call_name(list,'FPC_HANDLEERROR');
  2716. a_label(list,oklabel);
  2717. cgpara1.done;
  2718. end;
  2719. end;
  2720. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2721. var
  2722. hrefvmt : treference;
  2723. cgpara1,cgpara2 : TCGPara;
  2724. begin
  2725. cgpara1.init;
  2726. cgpara2.init;
  2727. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2728. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2729. if (cs_check_object in current_settings.localswitches) then
  2730. begin
  2731. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0);
  2732. paramanager.allocparaloc(list,cgpara2);
  2733. a_paramaddr_ref(list,hrefvmt,cgpara2);
  2734. paramanager.allocparaloc(list,cgpara1);
  2735. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2736. paramanager.freeparaloc(list,cgpara1);
  2737. paramanager.freeparaloc(list,cgpara2);
  2738. allocallcpuregisters(list);
  2739. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  2740. deallocallcpuregisters(list);
  2741. end
  2742. else
  2743. if (cs_check_range in current_settings.localswitches) then
  2744. begin
  2745. paramanager.allocparaloc(list,cgpara1);
  2746. a_param_reg(list,OS_ADDR,reg,cgpara1);
  2747. paramanager.freeparaloc(list,cgpara1);
  2748. allocallcpuregisters(list);
  2749. a_call_name(list,'FPC_CHECK_OBJECT');
  2750. deallocallcpuregisters(list);
  2751. end;
  2752. cgpara1.done;
  2753. cgpara2.done;
  2754. end;
  2755. {*****************************************************************************
  2756. Entry/Exit Code Functions
  2757. *****************************************************************************}
  2758. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  2759. var
  2760. sizereg,sourcereg,lenreg : tregister;
  2761. cgpara1,cgpara2,cgpara3 : TCGPara;
  2762. begin
  2763. { because some abis don't support dynamic stack allocation properly
  2764. open array value parameters are copied onto the heap
  2765. }
  2766. { calculate necessary memory }
  2767. { read/write operations on one register make the life of the register allocator hard }
  2768. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2769. begin
  2770. lenreg:=getintregister(list,OS_INT);
  2771. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2772. end
  2773. else
  2774. lenreg:=lenloc.register;
  2775. sizereg:=getintregister(list,OS_INT);
  2776. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2777. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2778. { load source }
  2779. sourcereg:=getaddressregister(list);
  2780. a_loadaddr_ref_reg(list,ref,sourcereg);
  2781. { do getmem call }
  2782. cgpara1.init;
  2783. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2784. paramanager.allocparaloc(list,cgpara1);
  2785. a_param_reg(list,OS_INT,sizereg,cgpara1);
  2786. paramanager.freeparaloc(list,cgpara1);
  2787. allocallcpuregisters(list);
  2788. a_call_name(list,'FPC_GETMEM');
  2789. deallocallcpuregisters(list);
  2790. cgpara1.done;
  2791. { return the new address }
  2792. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2793. { do move call }
  2794. cgpara1.init;
  2795. cgpara2.init;
  2796. cgpara3.init;
  2797. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2798. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2799. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2800. { load size }
  2801. paramanager.allocparaloc(list,cgpara3);
  2802. a_param_reg(list,OS_INT,sizereg,cgpara3);
  2803. { load destination }
  2804. paramanager.allocparaloc(list,cgpara2);
  2805. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  2806. { load source }
  2807. paramanager.allocparaloc(list,cgpara1);
  2808. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  2809. paramanager.freeparaloc(list,cgpara3);
  2810. paramanager.freeparaloc(list,cgpara2);
  2811. paramanager.freeparaloc(list,cgpara1);
  2812. allocallcpuregisters(list);
  2813. a_call_name(list,'FPC_MOVE');
  2814. deallocallcpuregisters(list);
  2815. cgpara3.done;
  2816. cgpara2.done;
  2817. cgpara1.done;
  2818. end;
  2819. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2820. var
  2821. cgpara1 : TCGPara;
  2822. begin
  2823. { do move call }
  2824. cgpara1.init;
  2825. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2826. { load source }
  2827. paramanager.allocparaloc(list,cgpara1);
  2828. a_param_loc(list,l,cgpara1);
  2829. paramanager.freeparaloc(list,cgpara1);
  2830. allocallcpuregisters(list);
  2831. a_call_name(list,'FPC_FREEMEM');
  2832. deallocallcpuregisters(list);
  2833. cgpara1.done;
  2834. end;
  2835. procedure tcg.g_save_standard_registers(list:TAsmList);
  2836. var
  2837. href : treference;
  2838. size : longint;
  2839. r : integer;
  2840. begin
  2841. { Get temp }
  2842. size:=0;
  2843. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2844. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2845. inc(size,sizeof(aint));
  2846. if size>0 then
  2847. begin
  2848. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  2849. { Copy registers to temp }
  2850. href:=current_procinfo.save_regs_ref;
  2851. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2852. begin
  2853. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2854. begin
  2855. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2856. inc(href.offset,sizeof(aint));
  2857. end;
  2858. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2859. end;
  2860. end;
  2861. end;
  2862. procedure tcg.g_restore_standard_registers(list:TAsmList);
  2863. var
  2864. href : treference;
  2865. r : integer;
  2866. hreg : tregister;
  2867. begin
  2868. { Copy registers from temp }
  2869. href:=current_procinfo.save_regs_ref;
  2870. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2871. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2872. begin
  2873. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2874. { Allocate register so the optimizer does not remove the load }
  2875. a_reg_alloc(list,hreg);
  2876. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2877. inc(href.offset,sizeof(aint));
  2878. end;
  2879. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2880. end;
  2881. procedure tcg.g_profilecode(list : TAsmList);
  2882. begin
  2883. end;
  2884. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2885. begin
  2886. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2887. end;
  2888. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  2889. begin
  2890. a_load_const_ref(list, OS_INT, a, href);
  2891. end;
  2892. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2893. begin
  2894. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2895. end;
  2896. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  2897. var
  2898. hsym : tsym;
  2899. href : treference;
  2900. paraloc : tcgparalocation;
  2901. begin
  2902. { calculate the parameter info for the procdef }
  2903. if not procdef.has_paraloc_info then
  2904. begin
  2905. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  2906. procdef.has_paraloc_info:=true;
  2907. end;
  2908. hsym:=tsym(procdef.parast.Find('self'));
  2909. if not(assigned(hsym) and
  2910. (hsym.typ=paravarsym)) then
  2911. internalerror(200305251);
  2912. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  2913. case paraloc.loc of
  2914. LOC_REGISTER:
  2915. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  2916. LOC_REFERENCE:
  2917. begin
  2918. { offset in the wrapper needs to be adjusted for the stored
  2919. return address }
  2920. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  2921. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  2922. end
  2923. else
  2924. internalerror(200309189);
  2925. end;
  2926. end;
  2927. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2928. begin
  2929. a_call_name(list,s);
  2930. end;
  2931. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string): tregister;
  2932. var
  2933. l: tasmsymbol;
  2934. ref: treference;
  2935. begin
  2936. result := NR_NO;
  2937. case target_info.system of
  2938. system_powerpc_darwin,
  2939. system_i386_darwin,
  2940. system_powerpc64_darwin,
  2941. system_x86_64_darwin:
  2942. begin
  2943. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  2944. if not(assigned(l)) then
  2945. begin
  2946. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_COMMON,AT_DATA);
  2947. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2948. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)));
  2949. {$ifdef cpu64bit}
  2950. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  2951. {$else cpu64bit}
  2952. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2953. {$endif cpu64bit}
  2954. end;
  2955. result := cg.getaddressregister(list);
  2956. reference_reset_symbol(ref,l,0);
  2957. { ref.base:=current_procinfo.got;
  2958. ref.relsymbol:=current_procinfo.CurrGOTLabel;}
  2959. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2960. end;
  2961. end;
  2962. end;
  2963. {*****************************************************************************
  2964. TCG64
  2965. *****************************************************************************}
  2966. {$ifndef cpu64bit}
  2967. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2968. begin
  2969. a_load64_reg_reg(list,regsrc,regdst);
  2970. a_op64_const_reg(list,op,size,value,regdst);
  2971. end;
  2972. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2973. var
  2974. tmpreg64 : tregister64;
  2975. begin
  2976. { when src1=dst then we need to first create a temp to prevent
  2977. overwriting src1 with src2 }
  2978. if (regsrc1.reghi=regdst.reghi) or
  2979. (regsrc1.reglo=regdst.reghi) or
  2980. (regsrc1.reghi=regdst.reglo) or
  2981. (regsrc1.reglo=regdst.reglo) then
  2982. begin
  2983. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2984. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2985. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2986. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2987. a_load64_reg_reg(list,tmpreg64,regdst);
  2988. end
  2989. else
  2990. begin
  2991. a_load64_reg_reg(list,regsrc2,regdst);
  2992. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2993. end;
  2994. end;
  2995. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2996. var
  2997. tmpreg64 : tregister64;
  2998. begin
  2999. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3000. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3001. a_load64_subsetref_reg(list,sref,tmpreg64);
  3002. a_op64_const_reg(list,op,size,a,tmpreg64);
  3003. a_load64_reg_subsetref(list,tmpreg64,sref);
  3004. end;
  3005. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3006. var
  3007. tmpreg64 : tregister64;
  3008. begin
  3009. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3010. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3011. a_load64_subsetref_reg(list,sref,tmpreg64);
  3012. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3013. a_load64_reg_subsetref(list,tmpreg64,sref);
  3014. end;
  3015. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3016. var
  3017. tmpreg64 : tregister64;
  3018. begin
  3019. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3020. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3021. a_load64_subsetref_reg(list,sref,tmpreg64);
  3022. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3023. a_load64_reg_subsetref(list,tmpreg64,sref);
  3024. end;
  3025. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3026. var
  3027. tmpreg64 : tregister64;
  3028. begin
  3029. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3030. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3031. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3032. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3033. end;
  3034. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3035. begin
  3036. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3037. ovloc.loc:=LOC_VOID;
  3038. end;
  3039. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3040. begin
  3041. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3042. ovloc.loc:=LOC_VOID;
  3043. end;
  3044. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3045. begin
  3046. case l.loc of
  3047. LOC_REFERENCE, LOC_CREFERENCE:
  3048. a_load64_ref_subsetref(list,l.reference,sref);
  3049. LOC_REGISTER,LOC_CREGISTER:
  3050. a_load64_reg_subsetref(list,l.register64,sref);
  3051. LOC_CONSTANT :
  3052. a_load64_const_subsetref(list,l.value64,sref);
  3053. LOC_SUBSETREF,LOC_CSUBSETREF:
  3054. a_load64_subsetref_subsetref(list,l.sref,sref);
  3055. else
  3056. internalerror(2006082210);
  3057. end;
  3058. end;
  3059. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3060. begin
  3061. case l.loc of
  3062. LOC_REFERENCE, LOC_CREFERENCE:
  3063. a_load64_subsetref_ref(list,sref,l.reference);
  3064. LOC_REGISTER,LOC_CREGISTER:
  3065. a_load64_subsetref_reg(list,sref,l.register64);
  3066. LOC_SUBSETREF,LOC_CSUBSETREF:
  3067. a_load64_subsetref_subsetref(list,sref,l.sref);
  3068. else
  3069. internalerror(2006082211);
  3070. end;
  3071. end;
  3072. {$endif cpu64bit}
  3073. initialization
  3074. ;
  3075. finalization
  3076. cg.free;
  3077. {$ifndef cpu64bit}
  3078. cg64.free;
  3079. {$endif cpu64bit}
  3080. end.