ncgutil.pas 84 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Helper routines for all code generators
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgutil;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,cpuinfo,
  22. globtype,
  23. cpubase,cgbase,parabase,cgutils,
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. symconst,symbase,symdef,symsym,symtype,symtable
  26. {$ifndef cpu64bitalu}
  27. ,cg64f32
  28. {$endif not cpu64bitalu}
  29. ;
  30. type
  31. tloadregvars = (lr_dont_load_regvars, lr_load_regvars);
  32. pusedregvars = ^tusedregvars;
  33. tusedregvars = record
  34. intregvars, fpuregvars, mmregvars: Tsuperregisterworklist;
  35. end;
  36. {
  37. Not used currently, implemented because I thought we had to
  38. synchronise around if/then/else as well, but not needed. May
  39. still be useful for SSA once we get around to implementing
  40. that (JM)
  41. pusedregvarscommon = ^tusedregvarscommon;
  42. tusedregvarscommon = record
  43. allregvars, commonregvars, myregvars: tusedregvars;
  44. end;
  45. }
  46. procedure firstcomplex(p : tbinarynode);
  47. procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
  48. // procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
  49. procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  50. procedure location_allocate_register(list:TAsmList;out l: tlocation;def: tdef;constant: boolean);
  51. { loads a cgpara into a tlocation; assumes that loc.loc is already
  52. initialised }
  53. procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
  54. { allocate registers for a tlocation; assumes that loc.loc is already
  55. set to LOC_CREGISTER/LOC_CFPUREGISTER/... }
  56. procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
  57. procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
  58. function has_alias_name(pd:tprocdef;const s:string):boolean;
  59. procedure alloc_proc_symbol(pd: tprocdef);
  60. procedure gen_proc_entry_code(list:TAsmList);
  61. procedure gen_proc_exit_code(list:TAsmList);
  62. procedure gen_stack_check_size_para(list:TAsmList);
  63. procedure gen_stack_check_call(list:TAsmList);
  64. procedure gen_save_used_regs(list:TAsmList);
  65. procedure gen_restore_used_regs(list:TAsmList);
  66. procedure gen_load_para_value(list:TAsmList);
  67. procedure gen_external_stub(list:TAsmList;pd:tprocdef;const externalname:string);
  68. procedure gen_load_vmt_register(list:TAsmList;objdef:tobjectdef;selfloc:tlocation;var vmtreg:tregister);
  69. procedure get_used_regvars(n: tnode; var rv: tusedregvars);
  70. { adds the regvars used in n and its children to rv.allregvars,
  71. those which were already in rv.allregvars to rv.commonregvars and
  72. uses rv.myregvars as scratch (so that two uses of the same regvar
  73. in a single tree to make it appear in commonregvars). Useful to
  74. find out which regvars are used in two different node trees
  75. e.g. in the "else" and "then" path, or in various case blocks }
  76. // procedure get_used_regvars_common(n: tnode; var rv: tusedregvarscommon);
  77. procedure gen_sync_regvars(list:TAsmList; var rv: tusedregvars);
  78. { Allocate the buffers for exception management and setjmp environment.
  79. Return a pointer to these buffers, send them to the utility routine
  80. so they are registered, and then call setjmp.
  81. Then compare the result of setjmp with 0, and if not equal
  82. to zero, then jump to exceptlabel.
  83. Also store the result of setjmp to a temporary space by calling g_save_exception_reason
  84. It is to note that this routine may be called *after* the stackframe of a
  85. routine has been called, therefore on machines where the stack cannot
  86. be modified, all temps should be allocated on the heap instead of the
  87. stack. }
  88. const
  89. EXCEPT_BUF_SIZE = 3*sizeof(pint);
  90. type
  91. texceptiontemps=record
  92. jmpbuf,
  93. envbuf,
  94. reasonbuf : treference;
  95. end;
  96. procedure get_exception_temps(list:TAsmList;var t:texceptiontemps);
  97. procedure unget_exception_temps(list:TAsmList;const t:texceptiontemps);
  98. procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
  99. procedure free_exception(list:TAsmList;const t:texceptiontemps;a:aint;endexceptlabel:tasmlabel;onlyfree:boolean);
  100. procedure gen_alloc_symtable(list:TAsmList;pd:tprocdef;st:TSymtable);
  101. procedure gen_free_symtable(list:TAsmList;st:TSymtable);
  102. procedure location_free(list: TAsmList; const location : TLocation);
  103. function getprocalign : shortint;
  104. procedure gen_fpc_dummy(list : TAsmList);
  105. procedure gen_load_frame_for_exceptfilter(list : TAsmList);
  106. implementation
  107. uses
  108. version,
  109. cutils,cclasses,
  110. globals,systems,verbose,export,
  111. ppu,defutil,
  112. procinfo,paramgr,fmodule,
  113. regvars,dbgbase,
  114. pass_1,pass_2,
  115. nbas,ncon,nld,nmem,nutils,ngenutil,
  116. tgobj,cgobj,cgcpu,hlcgobj,hlcgcpu
  117. {$ifdef powerpc}
  118. , cpupi
  119. {$endif}
  120. {$ifdef powerpc64}
  121. , cpupi
  122. {$endif}
  123. {$ifdef SUPPORT_MMX}
  124. , cgx86
  125. {$endif SUPPORT_MMX}
  126. ;
  127. {*****************************************************************************
  128. Misc Helpers
  129. *****************************************************************************}
  130. {$if first_mm_imreg = 0}
  131. {$WARN 4044 OFF} { Comparison might be always false ... }
  132. {$endif}
  133. procedure location_free(list: TAsmList; const location : TLocation);
  134. begin
  135. case location.loc of
  136. LOC_VOID:
  137. ;
  138. LOC_REGISTER,
  139. LOC_CREGISTER:
  140. begin
  141. {$ifdef cpu64bitalu}
  142. { x86-64 system v abi:
  143. structs with up to 16 bytes are returned in registers }
  144. if location.size in [OS_128,OS_S128] then
  145. begin
  146. if getsupreg(location.register)<first_int_imreg then
  147. cg.ungetcpuregister(list,location.register);
  148. if getsupreg(location.registerhi)<first_int_imreg then
  149. cg.ungetcpuregister(list,location.registerhi);
  150. end
  151. {$else cpu64bitalu}
  152. if location.size in [OS_64,OS_S64] then
  153. begin
  154. if getsupreg(location.register64.reglo)<first_int_imreg then
  155. cg.ungetcpuregister(list,location.register64.reglo);
  156. if getsupreg(location.register64.reghi)<first_int_imreg then
  157. cg.ungetcpuregister(list,location.register64.reghi);
  158. end
  159. {$endif cpu64bitalu}
  160. else
  161. if getsupreg(location.register)<first_int_imreg then
  162. cg.ungetcpuregister(list,location.register);
  163. end;
  164. LOC_FPUREGISTER,
  165. LOC_CFPUREGISTER:
  166. begin
  167. if getsupreg(location.register)<first_fpu_imreg then
  168. cg.ungetcpuregister(list,location.register);
  169. end;
  170. LOC_MMREGISTER,
  171. LOC_CMMREGISTER :
  172. begin
  173. if getsupreg(location.register)<first_mm_imreg then
  174. cg.ungetcpuregister(list,location.register);
  175. end;
  176. LOC_REFERENCE,
  177. LOC_CREFERENCE :
  178. begin
  179. if paramanager.use_fixed_stack then
  180. location_freetemp(list,location);
  181. end;
  182. else
  183. internalerror(2004110211);
  184. end;
  185. end;
  186. procedure firstcomplex(p : tbinarynode);
  187. var
  188. fcl, fcr: longint;
  189. ncl, ncr: longint;
  190. begin
  191. { always calculate boolean AND and OR from left to right }
  192. if (p.nodetype in [orn,andn]) and
  193. is_boolean(p.left.resultdef) then
  194. begin
  195. if nf_swapped in p.flags then
  196. internalerror(200709253);
  197. end
  198. else
  199. begin
  200. fcl:=node_resources_fpu(p.left);
  201. fcr:=node_resources_fpu(p.right);
  202. ncl:=node_complexity(p.left);
  203. ncr:=node_complexity(p.right);
  204. { We swap left and right if
  205. a) right needs more floating point registers than left, and
  206. left needs more than 0 floating point registers (if it
  207. doesn't need any, swapping won't change the floating
  208. point register pressure)
  209. b) both left and right need an equal amount of floating
  210. point registers or right needs no floating point registers,
  211. and in addition right has a higher complexity than left
  212. (+- needs more integer registers, but not necessarily)
  213. }
  214. if ((fcr>fcl) and
  215. (fcl>0)) or
  216. (((fcr=fcl) or
  217. (fcr=0)) and
  218. (ncr>ncl)) then
  219. p.swapleftright
  220. end;
  221. end;
  222. procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
  223. {
  224. produces jumps to true respectively false labels using boolean expressions
  225. depending on whether the loading of regvars is currently being
  226. synchronized manually (such as in an if-node) or automatically (most of
  227. the other cases where this procedure is called), loadregvars can be
  228. "lr_load_regvars" or "lr_dont_load_regvars"
  229. }
  230. var
  231. opsize : tcgsize;
  232. storepos : tfileposinfo;
  233. tmpreg : tregister;
  234. begin
  235. if nf_error in p.flags then
  236. exit;
  237. storepos:=current_filepos;
  238. current_filepos:=p.fileinfo;
  239. if is_boolean(p.resultdef) then
  240. begin
  241. {$ifdef OLDREGVARS}
  242. if loadregvars = lr_load_regvars then
  243. load_all_regvars(list);
  244. {$endif OLDREGVARS}
  245. if is_constboolnode(p) then
  246. begin
  247. if Tordconstnode(p).value.uvalue<>0 then
  248. cg.a_jmp_always(list,current_procinfo.CurrTrueLabel)
  249. else
  250. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel)
  251. end
  252. else
  253. begin
  254. opsize:=def_cgsize(p.resultdef);
  255. case p.location.loc of
  256. LOC_SUBSETREG,LOC_CSUBSETREG,
  257. LOC_SUBSETREF,LOC_CSUBSETREF:
  258. begin
  259. tmpreg := cg.getintregister(list,OS_INT);
  260. hlcg.a_load_loc_reg(list,p.resultdef,osuinttype,p.location,tmpreg);
  261. cg.a_cmp_const_reg_label(list,OS_INT,OC_NE,0,tmpreg,current_procinfo.CurrTrueLabel);
  262. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  263. end;
  264. LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE :
  265. begin
  266. {$ifdef cpu64bitalu}
  267. if opsize in [OS_128,OS_S128] then
  268. begin
  269. hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
  270. tmpreg:=cg.getintregister(list,OS_64);
  271. cg.a_op_reg_reg_reg(list,OP_OR,OS_64,p.location.register128.reglo,p.location.register128.reghi,tmpreg);
  272. location_reset(p.location,LOC_REGISTER,OS_64);
  273. p.location.register:=tmpreg;
  274. opsize:=OS_64;
  275. end;
  276. {$else cpu64bitalu}
  277. if opsize in [OS_64,OS_S64] then
  278. begin
  279. hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
  280. tmpreg:=cg.getintregister(list,OS_32);
  281. cg.a_op_reg_reg_reg(list,OP_OR,OS_32,p.location.register64.reglo,p.location.register64.reghi,tmpreg);
  282. location_reset(p.location,LOC_REGISTER,OS_32);
  283. p.location.register:=tmpreg;
  284. opsize:=OS_32;
  285. end;
  286. {$endif cpu64bitalu}
  287. cg.a_cmp_const_loc_label(list,opsize,OC_NE,0,p.location,current_procinfo.CurrTrueLabel);
  288. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  289. end;
  290. LOC_JUMP:
  291. ;
  292. {$ifdef cpuflags}
  293. LOC_FLAGS :
  294. begin
  295. cg.a_jmp_flags(list,p.location.resflags,current_procinfo.CurrTrueLabel);
  296. cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
  297. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  298. end;
  299. {$endif cpuflags}
  300. else
  301. begin
  302. printnode(output,p);
  303. internalerror(200308241);
  304. end;
  305. end;
  306. end;
  307. end
  308. else
  309. internalerror(200112305);
  310. current_filepos:=storepos;
  311. end;
  312. (*
  313. This code needs fixing. It is not safe to use rgint; on the m68000 it
  314. would be rgaddr.
  315. procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
  316. begin
  317. case t.loc of
  318. LOC_REGISTER:
  319. begin
  320. { can't be a regvar, since it would be LOC_CREGISTER then }
  321. exclude(regs,getsupreg(t.register));
  322. if t.register64.reghi<>NR_NO then
  323. exclude(regs,getsupreg(t.register64.reghi));
  324. end;
  325. LOC_CREFERENCE,LOC_REFERENCE:
  326. begin
  327. if not(cs_opt_regvar in current_settings.optimizerswitches) or
  328. (getsupreg(t.reference.base) in cg.rgint.usableregs) then
  329. exclude(regs,getsupreg(t.reference.base));
  330. if not(cs_opt_regvar in current_settings.optimizerswitches) or
  331. (getsupreg(t.reference.index) in cg.rgint.usableregs) then
  332. exclude(regs,getsupreg(t.reference.index));
  333. end;
  334. end;
  335. end;
  336. *)
  337. {*****************************************************************************
  338. EXCEPTION MANAGEMENT
  339. *****************************************************************************}
  340. procedure get_exception_temps(list:TAsmList;var t:texceptiontemps);
  341. begin
  342. get_jumpbuf_size;
  343. tg.GetTemp(list,EXCEPT_BUF_SIZE,sizeof(pint),tt_persistent,t.envbuf);
  344. tg.GetTemp(list,jmp_buf_size,jmp_buf_align,tt_persistent,t.jmpbuf);
  345. tg.GetTemp(list,sizeof(pint),sizeof(pint),tt_persistent,t.reasonbuf);
  346. end;
  347. procedure unget_exception_temps(list:TAsmList;const t:texceptiontemps);
  348. begin
  349. tg.Ungettemp(list,t.jmpbuf);
  350. tg.ungettemp(list,t.envbuf);
  351. tg.ungettemp(list,t.reasonbuf);
  352. end;
  353. procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
  354. const
  355. {$ifdef cpu16bitaddr}
  356. pushexceptaddr_frametype_cgsize = OS_S16;
  357. setjmp_result_cgsize = OS_S16;
  358. {$else cpu16bitaddr}
  359. pushexceptaddr_frametype_cgsize = OS_S32;
  360. setjmp_result_cgsize = OS_S32;
  361. {$endif cpu16bitaddr}
  362. var
  363. paraloc1,paraloc2,paraloc3 : tcgpara;
  364. pd: tprocdef;
  365. begin
  366. pd:=search_system_proc('fpc_pushexceptaddr');
  367. paraloc1.init;
  368. paraloc2.init;
  369. paraloc3.init;
  370. paramanager.getintparaloc(pd,1,paraloc1);
  371. paramanager.getintparaloc(pd,2,paraloc2);
  372. paramanager.getintparaloc(pd,3,paraloc3);
  373. if pd.is_pushleftright then
  374. begin
  375. { push type of exceptionframe }
  376. cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
  377. cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
  378. cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
  379. end
  380. else
  381. begin
  382. cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
  383. cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
  384. { push type of exceptionframe }
  385. cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
  386. end;
  387. paramanager.freecgpara(list,paraloc3);
  388. paramanager.freecgpara(list,paraloc2);
  389. paramanager.freecgpara(list,paraloc1);
  390. cg.allocallcpuregisters(list);
  391. cg.a_call_name(list,'FPC_PUSHEXCEPTADDR',false);
  392. cg.deallocallcpuregisters(list);
  393. pd:=search_system_proc('fpc_setjmp');
  394. paramanager.getintparaloc(pd,1,paraloc1);
  395. cg.a_load_reg_cgpara(list,OS_ADDR,NR_FUNCTION_RESULT_REG,paraloc1);
  396. paramanager.freecgpara(list,paraloc1);
  397. cg.allocallcpuregisters(list);
  398. cg.a_call_name(list,'FPC_SETJMP',false);
  399. cg.deallocallcpuregisters(list);
  400. cg.alloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
  401. cg.g_exception_reason_save(list, t.reasonbuf);
  402. cg.a_cmp_const_reg_label(list,setjmp_result_cgsize,OC_NE,0,cg.makeregsize(list,NR_FUNCTION_RESULT_REG,setjmp_result_cgsize),exceptlabel);
  403. cg.dealloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
  404. paraloc1.done;
  405. paraloc2.done;
  406. paraloc3.done;
  407. end;
  408. procedure free_exception(list:TAsmList;const t:texceptiontemps;a:aint;endexceptlabel:tasmlabel;onlyfree:boolean);
  409. begin
  410. cg.allocallcpuregisters(list);
  411. cg.a_call_name(list,'FPC_POPADDRSTACK',false);
  412. cg.deallocallcpuregisters(list);
  413. if not onlyfree then
  414. begin
  415. { g_exception_reason_load already allocates NR_FUNCTION_RESULT_REG }
  416. cg.g_exception_reason_load(list, t.reasonbuf);
  417. cg.a_cmp_const_reg_label(list,OS_INT,OC_EQ,a,NR_FUNCTION_RESULT_REG,endexceptlabel);
  418. cg.a_reg_dealloc(list,NR_FUNCTION_RESULT_REG);
  419. end;
  420. end;
  421. {*****************************************************************************
  422. TLocation
  423. *****************************************************************************}
  424. procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
  425. var
  426. tmpreg: tregister;
  427. begin
  428. if (setbase<>0) then
  429. begin
  430. if not(l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  431. internalerror(2007091502);
  432. { subtract the setbase }
  433. case l.loc of
  434. LOC_CREGISTER:
  435. begin
  436. tmpreg := cg.getintregister(list,l.size);
  437. cg.a_op_const_reg_reg(list,OP_SUB,l.size,setbase,l.register,tmpreg);
  438. l.loc:=LOC_REGISTER;
  439. l.register:=tmpreg;
  440. end;
  441. LOC_REGISTER:
  442. begin
  443. cg.a_op_const_reg(list,OP_SUB,l.size,setbase,l.register);
  444. end;
  445. end;
  446. end;
  447. end;
  448. procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  449. var
  450. reg : tregister;
  451. begin
  452. if (l.loc<>LOC_MMREGISTER) and
  453. ((l.loc<>LOC_CMMREGISTER) or (not maybeconst)) then
  454. begin
  455. reg:=cg.getmmregister(list,OS_VECTOR);
  456. cg.a_loadmm_loc_reg(list,OS_VECTOR,l,reg,nil);
  457. location_freetemp(list,l);
  458. location_reset(l,LOC_MMREGISTER,OS_VECTOR);
  459. l.register:=reg;
  460. end;
  461. end;
  462. procedure location_allocate_register(list: TAsmList;out l: tlocation;def: tdef;constant: boolean);
  463. begin
  464. l.size:=def_cgsize(def);
  465. if (def.typ=floatdef) and
  466. not(cs_fp_emulation in current_settings.moduleswitches) then
  467. begin
  468. if use_vectorfpu(def) then
  469. begin
  470. if constant then
  471. location_reset(l,LOC_CMMREGISTER,l.size)
  472. else
  473. location_reset(l,LOC_MMREGISTER,l.size);
  474. l.register:=cg.getmmregister(list,l.size);
  475. end
  476. else
  477. begin
  478. if constant then
  479. location_reset(l,LOC_CFPUREGISTER,l.size)
  480. else
  481. location_reset(l,LOC_FPUREGISTER,l.size);
  482. l.register:=cg.getfpuregister(list,l.size);
  483. end;
  484. end
  485. else
  486. begin
  487. if constant then
  488. location_reset(l,LOC_CREGISTER,l.size)
  489. else
  490. location_reset(l,LOC_REGISTER,l.size);
  491. {$ifdef cpu64bitalu}
  492. if l.size in [OS_128,OS_S128,OS_F128] then
  493. begin
  494. l.register128.reglo:=cg.getintregister(list,OS_64);
  495. l.register128.reghi:=cg.getintregister(list,OS_64);
  496. end
  497. else
  498. {$else cpu64bitalu}
  499. if l.size in [OS_64,OS_S64,OS_F64] then
  500. begin
  501. l.register64.reglo:=cg.getintregister(list,OS_32);
  502. l.register64.reghi:=cg.getintregister(list,OS_32);
  503. end
  504. else
  505. {$endif cpu64bitalu}
  506. { Note: for widths of records (and maybe objects, classes, etc.) an
  507. address register could be set here, but that is later
  508. changed to an intregister neverthless when in the
  509. tcgassignmentnode thlcgobj.maybe_change_load_node_reg is
  510. called for the temporary node; so the workaround for now is
  511. to fix the symptoms... }
  512. l.register:=cg.getintregister(list,l.size);
  513. end;
  514. end;
  515. {****************************************************************************
  516. Init/Finalize Code
  517. ****************************************************************************}
  518. procedure copyvalueparas(p:TObject;arg:pointer);
  519. var
  520. href : treference;
  521. hreg : tregister;
  522. list : TAsmList;
  523. hsym : tparavarsym;
  524. l : longint;
  525. localcopyloc : tlocation;
  526. sizedef : tdef;
  527. begin
  528. list:=TAsmList(arg);
  529. if (tsym(p).typ=paravarsym) and
  530. (tparavarsym(p).varspez=vs_value) and
  531. (paramanager.push_addr_param(tparavarsym(p).varspez,tparavarsym(p).vardef,current_procinfo.procdef.proccalloption)) then
  532. begin
  533. { we have no idea about the alignment at the caller side }
  534. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,true,1);
  535. if is_open_array(tparavarsym(p).vardef) or
  536. is_array_of_const(tparavarsym(p).vardef) then
  537. begin
  538. { cdecl functions don't have a high pointer so it is not possible to generate
  539. a local copy }
  540. if not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
  541. begin
  542. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  543. if not assigned(hsym) then
  544. internalerror(200306061);
  545. hreg:=cg.getaddressregister(list);
  546. if not is_packed_array(tparavarsym(p).vardef) then
  547. hlcg.g_copyvaluepara_openarray(list,href,hsym.initialloc,tarraydef(tparavarsym(p).vardef),hreg)
  548. else
  549. internalerror(2006080401);
  550. // cg.g_copyvaluepara_packedopenarray(list,href,hsym.intialloc,tarraydef(tparavarsym(p).vardef).elepackedbitsize,hreg);
  551. sizedef:=getpointerdef(tparavarsym(p).vardef);
  552. hlcg.a_load_reg_loc(list,sizedef,sizedef,hreg,tparavarsym(p).initialloc);
  553. end;
  554. end
  555. else
  556. begin
  557. { Allocate space for the local copy }
  558. l:=tparavarsym(p).getsize;
  559. localcopyloc.loc:=LOC_REFERENCE;
  560. localcopyloc.size:=int_cgsize(l);
  561. tg.GetLocal(list,l,tparavarsym(p).vardef,localcopyloc.reference);
  562. { Copy data }
  563. if is_shortstring(tparavarsym(p).vardef) then
  564. begin
  565. { this code is only executed before the code for the body and the entry/exit code is generated
  566. so we're allowed to include pi_do_call here; after pass1 is run, this isn't allowed anymore
  567. }
  568. include(current_procinfo.flags,pi_do_call);
  569. hlcg.g_copyshortstring(list,href,localcopyloc.reference,tstringdef(tparavarsym(p).vardef));
  570. end
  571. else if tparavarsym(p).vardef.typ = variantdef then
  572. begin
  573. { this code is only executed before the code for the body and the entry/exit code is generated
  574. so we're allowed to include pi_do_call here; after pass1 is run, this isn't allowed anymore
  575. }
  576. include(current_procinfo.flags,pi_do_call);
  577. hlcg.g_copyvariant(list,href,localcopyloc.reference,tvariantdef(tparavarsym(p).vardef))
  578. end
  579. else
  580. begin
  581. { pass proper alignment info }
  582. localcopyloc.reference.alignment:=tparavarsym(p).vardef.alignment;
  583. cg.g_concatcopy(list,href,localcopyloc.reference,tparavarsym(p).vardef.size);
  584. end;
  585. { update localloc of varsym }
  586. tg.Ungetlocal(list,tparavarsym(p).localloc.reference);
  587. tparavarsym(p).localloc:=localcopyloc;
  588. tparavarsym(p).initialloc:=localcopyloc;
  589. end;
  590. end;
  591. end;
  592. { generates the code for incrementing the reference count of parameters and
  593. initialize out parameters }
  594. procedure init_paras(p:TObject;arg:pointer);
  595. var
  596. href : treference;
  597. hsym : tparavarsym;
  598. eldef : tdef;
  599. list : TAsmList;
  600. needs_inittable : boolean;
  601. begin
  602. list:=TAsmList(arg);
  603. if (tsym(p).typ=paravarsym) then
  604. begin
  605. needs_inittable:=is_managed_type(tparavarsym(p).vardef);
  606. if not needs_inittable then
  607. exit;
  608. case tparavarsym(p).varspez of
  609. vs_value :
  610. begin
  611. { variants are already handled by the call to fpc_variant_copy_overwrite if
  612. they are passed by reference }
  613. if not((tparavarsym(p).vardef.typ=variantdef) and
  614. paramanager.push_addr_param(tparavarsym(p).varspez,tparavarsym(p).vardef,current_procinfo.procdef.proccalloption)) then
  615. begin
  616. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,is_open_array(tparavarsym(p).vardef),sizeof(pint));
  617. if is_open_array(tparavarsym(p).vardef) then
  618. begin
  619. { open arrays do not contain correct element count in their rtti,
  620. the actual count must be passed separately. }
  621. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  622. eldef:=tarraydef(tparavarsym(p).vardef).elementdef;
  623. if not assigned(hsym) then
  624. internalerror(201003031);
  625. hlcg.g_array_rtti_helper(list,eldef,href,hsym.initialloc,'fpc_addref_array');
  626. end
  627. else
  628. hlcg.g_incrrefcount(list,tparavarsym(p).vardef,href);
  629. end;
  630. end;
  631. vs_out :
  632. begin
  633. { we have no idea about the alignment at the callee side,
  634. and the user also cannot specify "unaligned" here, so
  635. assume worst case }
  636. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,true,1);
  637. if is_open_array(tparavarsym(p).vardef) then
  638. begin
  639. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  640. eldef:=tarraydef(tparavarsym(p).vardef).elementdef;
  641. if not assigned(hsym) then
  642. internalerror(201103033);
  643. hlcg.g_array_rtti_helper(list,eldef,href,hsym.initialloc,'fpc_initialize_array');
  644. end
  645. else
  646. hlcg.g_initialize(list,tparavarsym(p).vardef,href);
  647. end;
  648. end;
  649. end;
  650. end;
  651. procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
  652. begin
  653. case loc.loc of
  654. LOC_CREGISTER:
  655. begin
  656. {$ifdef cpu64bitalu}
  657. if loc.size in [OS_128,OS_S128] then
  658. begin
  659. loc.register128.reglo:=cg.getintregister(list,OS_64);
  660. loc.register128.reghi:=cg.getintregister(list,OS_64);
  661. end
  662. else
  663. {$else cpu64bitalu}
  664. if loc.size in [OS_64,OS_S64] then
  665. begin
  666. loc.register64.reglo:=cg.getintregister(list,OS_32);
  667. loc.register64.reghi:=cg.getintregister(list,OS_32);
  668. end
  669. else
  670. {$endif cpu64bitalu}
  671. loc.register:=cg.getintregister(list,loc.size);
  672. end;
  673. LOC_CFPUREGISTER:
  674. begin
  675. loc.register:=cg.getfpuregister(list,loc.size);
  676. end;
  677. LOC_CMMREGISTER:
  678. begin
  679. loc.register:=cg.getmmregister(list,loc.size);
  680. end;
  681. end;
  682. end;
  683. procedure gen_alloc_regvar(list:TAsmList;sym: tabstractnormalvarsym; allocreg: boolean);
  684. begin
  685. if allocreg then
  686. gen_alloc_regloc(list,sym.initialloc);
  687. if (pi_has_label in current_procinfo.flags) then
  688. begin
  689. { Allocate register already, to prevent first allocation to be
  690. inside a loop }
  691. {$if defined(cpu64bitalu)}
  692. if sym.initialloc.size in [OS_128,OS_S128] then
  693. begin
  694. cg.a_reg_sync(list,sym.initialloc.register128.reglo);
  695. cg.a_reg_sync(list,sym.initialloc.register128.reghi);
  696. end
  697. else
  698. {$elseif defined(cpu32bitalu)}
  699. if sym.initialloc.size in [OS_64,OS_S64] then
  700. begin
  701. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  702. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  703. end
  704. else
  705. {$elseif defined(cpu16bitalu)}
  706. if sym.initialloc.size in [OS_64,OS_S64] then
  707. begin
  708. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  709. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reglo));
  710. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  711. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reghi));
  712. end
  713. else
  714. if sym.initialloc.size in [OS_32,OS_S32] then
  715. begin
  716. cg.a_reg_sync(list,sym.initialloc.register);
  717. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register));
  718. end
  719. else
  720. {$elseif defined(cpu8bitalu)}
  721. if sym.initialloc.size in [OS_64,OS_S64] then
  722. begin
  723. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  724. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reglo));
  725. cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register64.reglo)));
  726. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register64.reglo))));
  727. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  728. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register64.reghi));
  729. cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register64.reghi)));
  730. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register64.reghi))));
  731. end
  732. else
  733. if sym.initialloc.size in [OS_32,OS_S32] then
  734. begin
  735. cg.a_reg_sync(list,sym.initialloc.register);
  736. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register));
  737. cg.a_reg_sync(list,GetNextReg(GetNextReg(sym.initialloc.register)));
  738. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(sym.initialloc.register))));
  739. end
  740. else
  741. if sym.initialloc.size in [OS_16,OS_S16] then
  742. begin
  743. cg.a_reg_sync(list,sym.initialloc.register);
  744. cg.a_reg_sync(list,GetNextReg(sym.initialloc.register));
  745. end
  746. else
  747. {$endif}
  748. cg.a_reg_sync(list,sym.initialloc.register);
  749. end;
  750. sym.localloc:=sym.initialloc;
  751. end;
  752. procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
  753. procedure unget_para(const paraloc:TCGParaLocation);
  754. begin
  755. case paraloc.loc of
  756. LOC_REGISTER :
  757. begin
  758. if getsupreg(paraloc.register)<first_int_imreg then
  759. cg.ungetcpuregister(list,paraloc.register);
  760. end;
  761. LOC_MMREGISTER :
  762. begin
  763. if getsupreg(paraloc.register)<first_mm_imreg then
  764. cg.ungetcpuregister(list,paraloc.register);
  765. end;
  766. LOC_FPUREGISTER :
  767. begin
  768. if getsupreg(paraloc.register)<first_fpu_imreg then
  769. cg.ungetcpuregister(list,paraloc.register);
  770. end;
  771. end;
  772. end;
  773. var
  774. paraloc : pcgparalocation;
  775. href : treference;
  776. sizeleft : aint;
  777. {$if defined(sparc) or defined(arm) or defined(mips)}
  778. tempref : treference;
  779. {$endif defined(sparc) or defined(arm) or defined(mips)}
  780. {$ifdef mips}
  781. tmpreg : tregister;
  782. {$endif mips}
  783. {$ifndef cpu64bitalu}
  784. tempreg : tregister;
  785. reg64 : tregister64;
  786. {$endif not cpu64bitalu}
  787. begin
  788. paraloc:=para.location;
  789. if not assigned(paraloc) then
  790. internalerror(200408203);
  791. { skip e.g. empty records }
  792. if (paraloc^.loc = LOC_VOID) then
  793. exit;
  794. case destloc.loc of
  795. LOC_REFERENCE :
  796. begin
  797. { If the parameter location is reused we don't need to copy
  798. anything }
  799. if not reusepara then
  800. begin
  801. href:=destloc.reference;
  802. sizeleft:=para.intsize;
  803. while assigned(paraloc) do
  804. begin
  805. if (paraloc^.size=OS_NO) then
  806. begin
  807. { Can only be a reference that contains the rest
  808. of the parameter }
  809. if (paraloc^.loc<>LOC_REFERENCE) or
  810. assigned(paraloc^.next) then
  811. internalerror(2005013010);
  812. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  813. inc(href.offset,sizeleft);
  814. sizeleft:=0;
  815. end
  816. else
  817. begin
  818. cg.a_load_cgparaloc_ref(list,paraloc^,href,tcgsize2size[paraloc^.size],destloc.reference.alignment);
  819. inc(href.offset,TCGSize2Size[paraloc^.size]);
  820. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  821. end;
  822. unget_para(paraloc^);
  823. paraloc:=paraloc^.next;
  824. end;
  825. end;
  826. end;
  827. LOC_REGISTER,
  828. LOC_CREGISTER :
  829. begin
  830. {$ifdef cpu64bitalu}
  831. if (para.size in [OS_128,OS_S128,OS_F128]) and
  832. ({ in case of fpu emulation, or abi's that pass fpu values
  833. via integer registers }
  834. (vardef.typ=floatdef) or
  835. is_methodpointer(vardef) or
  836. is_record(vardef)) then
  837. begin
  838. case paraloc^.loc of
  839. LOC_REGISTER:
  840. begin
  841. if not assigned(paraloc^.next) then
  842. internalerror(200410104);
  843. if (target_info.endian=ENDIAN_BIG) then
  844. begin
  845. { paraloc^ -> high
  846. paraloc^.next -> low }
  847. unget_para(paraloc^);
  848. gen_alloc_regloc(list,destloc);
  849. { reg->reg, alignment is irrelevant }
  850. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reghi,8);
  851. unget_para(paraloc^.next^);
  852. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reglo,8);
  853. end
  854. else
  855. begin
  856. { paraloc^ -> low
  857. paraloc^.next -> high }
  858. unget_para(paraloc^);
  859. gen_alloc_regloc(list,destloc);
  860. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reglo,8);
  861. unget_para(paraloc^.next^);
  862. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reghi,8);
  863. end;
  864. end;
  865. LOC_REFERENCE:
  866. begin
  867. gen_alloc_regloc(list,destloc);
  868. reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
  869. cg128.a_load128_ref_reg(list,href,destloc.register128);
  870. unget_para(paraloc^);
  871. end;
  872. else
  873. internalerror(2012090607);
  874. end
  875. end
  876. else
  877. {$else cpu64bitalu}
  878. if (para.size in [OS_64,OS_S64,OS_F64]) and
  879. (is_64bit(vardef) or
  880. { in case of fpu emulation, or abi's that pass fpu values
  881. via integer registers }
  882. (vardef.typ=floatdef) or
  883. is_methodpointer(vardef) or
  884. is_record(vardef)) then
  885. begin
  886. case paraloc^.loc of
  887. LOC_REGISTER:
  888. begin
  889. case para.locations_count of
  890. {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
  891. { 4 paralocs? }
  892. 4:
  893. if (target_info.endian=ENDIAN_BIG) then
  894. begin
  895. { paraloc^ -> high
  896. paraloc^.next^.next -> low }
  897. unget_para(paraloc^);
  898. gen_alloc_regloc(list,destloc);
  899. { reg->reg, alignment is irrelevant }
  900. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,GetNextReg(destloc.register64.reghi),2);
  901. unget_para(paraloc^.next^);
  902. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,2);
  903. unget_para(paraloc^.next^.next^);
  904. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,GetNextReg(destloc.register64.reglo),2);
  905. unget_para(paraloc^.next^.next^.next^);
  906. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,2);
  907. end
  908. else
  909. begin
  910. { paraloc^ -> low
  911. paraloc^.next^.next -> high }
  912. unget_para(paraloc^);
  913. gen_alloc_regloc(list,destloc);
  914. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,destloc.register64.reglo,2);
  915. unget_para(paraloc^.next^);
  916. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,GetNextReg(destloc.register64.reglo),2);
  917. unget_para(paraloc^.next^.next^);
  918. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,destloc.register64.reghi,2);
  919. unget_para(paraloc^.next^.next^.next^);
  920. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,GetNextReg(destloc.register64.reghi),2);
  921. end;
  922. {$endif defined(cpu16bitalu) or defined(cpu8bitalu)}
  923. 2:
  924. if (target_info.endian=ENDIAN_BIG) then
  925. begin
  926. { paraloc^ -> high
  927. paraloc^.next -> low }
  928. unget_para(paraloc^);
  929. gen_alloc_regloc(list,destloc);
  930. { reg->reg, alignment is irrelevant }
  931. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reghi,4);
  932. unget_para(paraloc^.next^);
  933. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reglo,4);
  934. end
  935. else
  936. begin
  937. { paraloc^ -> low
  938. paraloc^.next -> high }
  939. unget_para(paraloc^);
  940. gen_alloc_regloc(list,destloc);
  941. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reglo,4);
  942. unget_para(paraloc^.next^);
  943. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reghi,4);
  944. end;
  945. else
  946. { unexpected number of paralocs }
  947. internalerror(200410104);
  948. end;
  949. end;
  950. LOC_REFERENCE:
  951. begin
  952. gen_alloc_regloc(list,destloc);
  953. reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
  954. cg64.a_load64_ref_reg(list,href,destloc.register64);
  955. unget_para(paraloc^);
  956. end;
  957. else
  958. internalerror(2005101501);
  959. end
  960. end
  961. else
  962. {$endif cpu64bitalu}
  963. begin
  964. if assigned(paraloc^.next) then
  965. begin
  966. if (destloc.size in [OS_PAIR,OS_SPAIR]) and
  967. (para.Size in [OS_PAIR,OS_SPAIR]) then
  968. begin
  969. unget_para(paraloc^);
  970. gen_alloc_regloc(list,destloc);
  971. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
  972. unget_para(paraloc^.Next^);
  973. {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
  974. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
  975. {$else}
  976. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint));
  977. {$endif}
  978. end
  979. {$if defined(cpu8bitalu)}
  980. else if (destloc.size in [OS_32,OS_S32]) and
  981. (para.Size in [OS_32,OS_S32]) then
  982. begin
  983. unget_para(paraloc^);
  984. gen_alloc_regloc(list,destloc);
  985. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
  986. unget_para(paraloc^.Next^);
  987. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
  988. unget_para(paraloc^.Next^.Next^);
  989. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^.Next^,GetNextReg(GetNextReg(destloc.register)),sizeof(aint));
  990. unget_para(paraloc^.Next^.Next^.Next^);
  991. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^.Next^.Next^,GetNextReg(GetNextReg(GetNextReg(destloc.register))),sizeof(aint));
  992. end
  993. {$endif defined(cpu8bitalu)}
  994. else
  995. internalerror(200410105);
  996. end
  997. else
  998. begin
  999. unget_para(paraloc^);
  1000. gen_alloc_regloc(list,destloc);
  1001. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,sizeof(aint));
  1002. end;
  1003. end;
  1004. end;
  1005. LOC_FPUREGISTER,
  1006. LOC_CFPUREGISTER :
  1007. begin
  1008. {$ifdef mips}
  1009. if (destloc.size = paraloc^.Size) and
  1010. (paraloc^.Loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  1011. begin
  1012. unget_para(paraloc^);
  1013. gen_alloc_regloc(list,destloc);
  1014. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,para.alignment);
  1015. end
  1016. else if (destloc.size = OS_F32) and
  1017. (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1018. begin
  1019. gen_alloc_regloc(list,destloc);
  1020. unget_para(paraloc^);
  1021. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,destloc.register));
  1022. end
  1023. { TODO: Produces invalid code, needs fixing together with regalloc setup. }
  1024. {
  1025. else if (destloc.size = OS_F64) and
  1026. (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) and
  1027. (paraloc^.next^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1028. begin
  1029. gen_alloc_regloc(list,destloc);
  1030. tmpreg:=destloc.register;
  1031. unget_para(paraloc^);
  1032. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,tmpreg));
  1033. setsupreg(tmpreg,getsupreg(tmpreg)+1);
  1034. unget_para(paraloc^.next^);
  1035. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.Next^.register,tmpreg));
  1036. end
  1037. }
  1038. else
  1039. begin
  1040. sizeleft := TCGSize2Size[destloc.size];
  1041. tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
  1042. href:=tempref;
  1043. while assigned(paraloc) do
  1044. begin
  1045. unget_para(paraloc^);
  1046. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  1047. inc(href.offset,TCGSize2Size[paraloc^.size]);
  1048. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  1049. paraloc:=paraloc^.next;
  1050. end;
  1051. gen_alloc_regloc(list,destloc);
  1052. cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
  1053. tg.UnGetTemp(list,tempref);
  1054. end;
  1055. {$else mips}
  1056. {$if defined(sparc) or defined(arm)}
  1057. { Arm and Sparc passes floats in int registers, when loading to fpu register
  1058. we need a temp }
  1059. sizeleft := TCGSize2Size[destloc.size];
  1060. tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
  1061. href:=tempref;
  1062. while assigned(paraloc) do
  1063. begin
  1064. unget_para(paraloc^);
  1065. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  1066. inc(href.offset,TCGSize2Size[paraloc^.size]);
  1067. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  1068. paraloc:=paraloc^.next;
  1069. end;
  1070. gen_alloc_regloc(list,destloc);
  1071. cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
  1072. tg.UnGetTemp(list,tempref);
  1073. {$else defined(sparc) or defined(arm)}
  1074. unget_para(paraloc^);
  1075. gen_alloc_regloc(list,destloc);
  1076. { from register to register -> alignment is irrelevant }
  1077. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
  1078. if assigned(paraloc^.next) then
  1079. internalerror(200410109);
  1080. {$endif defined(sparc) or defined(arm)}
  1081. {$endif mips}
  1082. end;
  1083. LOC_MMREGISTER,
  1084. LOC_CMMREGISTER :
  1085. begin
  1086. {$ifndef cpu64bitalu}
  1087. { ARM vfp floats are passed in integer registers }
  1088. if (para.size=OS_F64) and
  1089. (paraloc^.size in [OS_32,OS_S32]) and
  1090. use_vectorfpu(vardef) then
  1091. begin
  1092. { we need 2x32bit reg }
  1093. if not assigned(paraloc^.next) or
  1094. assigned(paraloc^.next^.next) then
  1095. internalerror(2009112421);
  1096. unget_para(paraloc^.next^);
  1097. case paraloc^.next^.loc of
  1098. LOC_REGISTER:
  1099. tempreg:=paraloc^.next^.register;
  1100. LOC_REFERENCE:
  1101. begin
  1102. tempreg:=cg.getintregister(list,OS_32);
  1103. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,tempreg,4);
  1104. end;
  1105. else
  1106. internalerror(2012051301);
  1107. end;
  1108. { don't free before the above, because then the getintregister
  1109. could reallocate this register and overwrite it }
  1110. unget_para(paraloc^);
  1111. gen_alloc_regloc(list,destloc);
  1112. if (target_info.endian=endian_big) then
  1113. { paraloc^ -> high
  1114. paraloc^.next -> low }
  1115. reg64:=joinreg64(tempreg,paraloc^.register)
  1116. else
  1117. reg64:=joinreg64(paraloc^.register,tempreg);
  1118. cg64.a_loadmm_intreg64_reg(list,OS_F64,reg64,destloc.register);
  1119. end
  1120. else
  1121. {$endif not cpu64bitalu}
  1122. begin
  1123. unget_para(paraloc^);
  1124. gen_alloc_regloc(list,destloc);
  1125. { from register to register -> alignment is irrelevant }
  1126. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
  1127. { data could come in two memory locations, for now
  1128. we simply ignore the sanity check (FK)
  1129. if assigned(paraloc^.next) then
  1130. internalerror(200410108);
  1131. }
  1132. end;
  1133. end;
  1134. else
  1135. internalerror(2010052903);
  1136. end;
  1137. end;
  1138. procedure gen_load_para_value(list:TAsmList);
  1139. procedure get_para(const paraloc:TCGParaLocation);
  1140. begin
  1141. case paraloc.loc of
  1142. LOC_REGISTER :
  1143. begin
  1144. if getsupreg(paraloc.register)<first_int_imreg then
  1145. cg.getcpuregister(list,paraloc.register);
  1146. end;
  1147. LOC_MMREGISTER :
  1148. begin
  1149. if getsupreg(paraloc.register)<first_mm_imreg then
  1150. cg.getcpuregister(list,paraloc.register);
  1151. end;
  1152. LOC_FPUREGISTER :
  1153. begin
  1154. if getsupreg(paraloc.register)<first_fpu_imreg then
  1155. cg.getcpuregister(list,paraloc.register);
  1156. end;
  1157. end;
  1158. end;
  1159. var
  1160. i : longint;
  1161. currpara : tparavarsym;
  1162. paraloc : pcgparalocation;
  1163. begin
  1164. if (po_assembler in current_procinfo.procdef.procoptions) or
  1165. { exceptfilters have a single hidden 'parentfp' parameter, which
  1166. is handled by tcg.g_proc_entry. }
  1167. (current_procinfo.procdef.proctypeoption=potype_exceptfilter) then
  1168. exit;
  1169. { Allocate registers used by parameters }
  1170. for i:=0 to current_procinfo.procdef.paras.count-1 do
  1171. begin
  1172. currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
  1173. paraloc:=currpara.paraloc[calleeside].location;
  1174. while assigned(paraloc) do
  1175. begin
  1176. if paraloc^.loc in [LOC_REGISTER,LOC_FPUREGISTER,LOC_MMREGISTER] then
  1177. get_para(paraloc^);
  1178. paraloc:=paraloc^.next;
  1179. end;
  1180. end;
  1181. { Copy parameters to local references/registers }
  1182. for i:=0 to current_procinfo.procdef.paras.count-1 do
  1183. begin
  1184. currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
  1185. gen_load_cgpara_loc(list,currpara.vardef,currpara.paraloc[calleeside],currpara.initialloc,paramanager.param_use_paraloc(currpara.paraloc[calleeside]));
  1186. { gen_load_cgpara_loc() already allocated the initialloc
  1187. -> don't allocate again }
  1188. if currpara.initialloc.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER] then
  1189. gen_alloc_regvar(list,currpara,false);
  1190. end;
  1191. { generate copies of call by value parameters, must be done before
  1192. the initialization and body is parsed because the refcounts are
  1193. incremented using the local copies }
  1194. current_procinfo.procdef.parast.SymList.ForEachCall(@copyvalueparas,list);
  1195. {$ifdef powerpc}
  1196. { unget the register that contains the stack pointer before the procedure entry, }
  1197. { which is used to access the parameters in their original callee-side location }
  1198. if (tppcprocinfo(current_procinfo).needs_frame_pointer) then
  1199. cg.a_reg_dealloc(list,NR_R12);
  1200. {$endif powerpc}
  1201. {$ifdef powerpc64}
  1202. { unget the register that contains the stack pointer before the procedure entry, }
  1203. { which is used to access the parameters in their original callee-side location }
  1204. if (tppcprocinfo(current_procinfo).needs_frame_pointer) then
  1205. cg.a_reg_dealloc(list, NR_OLD_STACK_POINTER_REG);
  1206. {$endif powerpc64}
  1207. if not(po_assembler in current_procinfo.procdef.procoptions) then
  1208. begin
  1209. { initialize refcounted paras, and trash others. Needed here
  1210. instead of in gen_initialize_code, because when a reference is
  1211. intialised or trashed while the pointer to that reference is kept
  1212. in a regvar, we add a register move and that one again has to
  1213. come after the parameter loading code as far as the register
  1214. allocator is concerned }
  1215. current_procinfo.procdef.parast.SymList.ForEachCall(@init_paras,list);
  1216. end;
  1217. end;
  1218. {****************************************************************************
  1219. Entry/Exit
  1220. ****************************************************************************}
  1221. function has_alias_name(pd:tprocdef;const s:string):boolean;
  1222. var
  1223. item : TCmdStrListItem;
  1224. begin
  1225. result:=true;
  1226. if pd.mangledname=s then
  1227. exit;
  1228. item := TCmdStrListItem(pd.aliasnames.first);
  1229. while assigned(item) do
  1230. begin
  1231. if item.str=s then
  1232. exit;
  1233. item := TCmdStrListItem(item.next);
  1234. end;
  1235. result:=false;
  1236. end;
  1237. procedure alloc_proc_symbol(pd: tprocdef);
  1238. var
  1239. item : TCmdStrListItem;
  1240. begin
  1241. item := TCmdStrListItem(pd.aliasnames.first);
  1242. while assigned(item) do
  1243. begin
  1244. current_asmdata.DefineAsmSymbol(item.str,AB_GLOBAL,AT_FUNCTION);
  1245. item := TCmdStrListItem(item.next);
  1246. end;
  1247. end;
  1248. procedure gen_proc_entry_code(list:TAsmList);
  1249. var
  1250. hitemp,
  1251. lotemp, stack_frame_size : longint;
  1252. begin
  1253. { generate call frame marker for dwarf call frame info }
  1254. current_asmdata.asmcfi.start_frame(list);
  1255. { All temps are know, write offsets used for information }
  1256. if (cs_asm_source in current_settings.globalswitches) and
  1257. (current_procinfo.tempstart<>tg.lasttemp) then
  1258. begin
  1259. if tg.direction>0 then
  1260. begin
  1261. lotemp:=current_procinfo.tempstart;
  1262. hitemp:=tg.lasttemp;
  1263. end
  1264. else
  1265. begin
  1266. lotemp:=tg.lasttemp;
  1267. hitemp:=current_procinfo.tempstart;
  1268. end;
  1269. list.concat(Tai_comment.Create(strpnew('Temps allocated between '+std_regname(current_procinfo.framepointer)+
  1270. tostr_with_plus(lotemp)+' and '+std_regname(current_procinfo.framepointer)+tostr_with_plus(hitemp))));
  1271. end;
  1272. { generate target specific proc entry code }
  1273. stack_frame_size := current_procinfo.calc_stackframe_size;
  1274. if (stack_frame_size <> 0) and
  1275. (po_nostackframe in current_procinfo.procdef.procoptions) then
  1276. message1(parser_e_nostackframe_with_locals,tostr(stack_frame_size));
  1277. hlcg.g_proc_entry(list,stack_frame_size,(po_nostackframe in current_procinfo.procdef.procoptions));
  1278. end;
  1279. procedure gen_proc_exit_code(list:TAsmList);
  1280. var
  1281. parasize : longint;
  1282. begin
  1283. { c style clearstack does not need to remove parameters from the stack, only the
  1284. return value when it was pushed by arguments }
  1285. if current_procinfo.procdef.proccalloption in clearstack_pocalls then
  1286. begin
  1287. parasize:=0;
  1288. if paramanager.ret_in_param(current_procinfo.procdef.returndef,current_procinfo.procdef) then
  1289. inc(parasize,sizeof(pint));
  1290. end
  1291. else
  1292. begin
  1293. parasize:=current_procinfo.para_stack_size;
  1294. { the parent frame pointer para has to be removed by the caller in
  1295. case of Delphi-style parent frame pointer passing }
  1296. if not paramanager.use_fixed_stack and
  1297. (po_delphi_nested_cc in current_procinfo.procdef.procoptions) then
  1298. dec(parasize,sizeof(pint));
  1299. end;
  1300. { generate target specific proc exit code }
  1301. hlcg.g_proc_exit(list,parasize,(po_nostackframe in current_procinfo.procdef.procoptions));
  1302. { release return registers, needed for optimizer }
  1303. if not is_void(current_procinfo.procdef.returndef) then
  1304. paramanager.freecgpara(list,current_procinfo.procdef.funcretloc[calleeside]);
  1305. { end of frame marker for call frame info }
  1306. current_asmdata.asmcfi.end_frame(list);
  1307. end;
  1308. procedure gen_stack_check_size_para(list:TAsmList);
  1309. var
  1310. paraloc1 : tcgpara;
  1311. pd : tprocdef;
  1312. begin
  1313. pd:=search_system_proc('fpc_stackcheck');
  1314. paraloc1.init;
  1315. paramanager.getintparaloc(pd,1,paraloc1);
  1316. cg.a_load_const_cgpara(list,OS_INT,current_procinfo.calc_stackframe_size,paraloc1);
  1317. paramanager.freecgpara(list,paraloc1);
  1318. paraloc1.done;
  1319. end;
  1320. procedure gen_stack_check_call(list:TAsmList);
  1321. var
  1322. paraloc1 : tcgpara;
  1323. pd : tprocdef;
  1324. begin
  1325. pd:=search_system_proc('fpc_stackcheck');
  1326. paraloc1.init;
  1327. { Also alloc the register needed for the parameter }
  1328. paramanager.getintparaloc(pd,1,paraloc1);
  1329. paramanager.freecgpara(list,paraloc1);
  1330. { Call the helper }
  1331. cg.allocallcpuregisters(list);
  1332. cg.a_call_name(list,'FPC_STACKCHECK',false);
  1333. cg.deallocallcpuregisters(list);
  1334. paraloc1.done;
  1335. end;
  1336. procedure gen_save_used_regs(list:TAsmList);
  1337. begin
  1338. { Pure assembler routines need to save the registers themselves }
  1339. if (po_assembler in current_procinfo.procdef.procoptions) then
  1340. exit;
  1341. { oldfpccall expects all registers to be destroyed }
  1342. if current_procinfo.procdef.proccalloption<>pocall_oldfpccall then
  1343. cg.g_save_registers(list);
  1344. end;
  1345. procedure gen_restore_used_regs(list:TAsmList);
  1346. begin
  1347. { Pure assembler routines need to save the registers themselves }
  1348. if (po_assembler in current_procinfo.procdef.procoptions) then
  1349. exit;
  1350. { oldfpccall expects all registers to be destroyed }
  1351. if current_procinfo.procdef.proccalloption<>pocall_oldfpccall then
  1352. cg.g_restore_registers(list);
  1353. end;
  1354. {****************************************************************************
  1355. External handling
  1356. ****************************************************************************}
  1357. procedure gen_external_stub(list:TAsmList;pd:tprocdef;const externalname:string);
  1358. begin
  1359. create_hlcodegen;
  1360. { add the procedure to the al_procedures }
  1361. maybe_new_object_file(list);
  1362. new_section(list,sec_code,lower(pd.mangledname),current_settings.alignment.procalign);
  1363. list.concat(Tai_align.create(current_settings.alignment.procalign));
  1364. if (po_global in pd.procoptions) then
  1365. list.concat(Tai_symbol.createname_global(pd.mangledname,AT_FUNCTION,0))
  1366. else
  1367. list.concat(Tai_symbol.createname(pd.mangledname,AT_FUNCTION,0));
  1368. cg.g_external_wrapper(list,pd,externalname);
  1369. destroy_hlcodegen;
  1370. end;
  1371. {****************************************************************************
  1372. Const Data
  1373. ****************************************************************************}
  1374. procedure gen_alloc_symtable(list:TAsmList;pd:tprocdef;st:TSymtable);
  1375. procedure setlocalloc(vs:tabstractnormalvarsym);
  1376. begin
  1377. if cs_asm_source in current_settings.globalswitches then
  1378. begin
  1379. case vs.initialloc.loc of
  1380. LOC_REFERENCE :
  1381. begin
  1382. if not assigned(vs.initialloc.reference.symbol) then
  1383. list.concat(Tai_comment.Create(strpnew('Var '+vs.realname+' located at '+
  1384. std_regname(vs.initialloc.reference.base)+tostr_with_plus(vs.initialloc.reference.offset))));
  1385. end;
  1386. end;
  1387. end;
  1388. vs.localloc:=vs.initialloc;
  1389. FillChar(vs.currentregloc,sizeof(vs.currentregloc),0);
  1390. end;
  1391. var
  1392. i : longint;
  1393. sym : tsym;
  1394. vs : tabstractnormalvarsym;
  1395. isaddr : boolean;
  1396. begin
  1397. for i:=0 to st.SymList.Count-1 do
  1398. begin
  1399. sym:=tsym(st.SymList[i]);
  1400. case sym.typ of
  1401. staticvarsym :
  1402. begin
  1403. vs:=tabstractnormalvarsym(sym);
  1404. { The code in loadnode.pass_generatecode will create the
  1405. LOC_REFERENCE instead for all none register variables. This is
  1406. required because we can't store an asmsymbol in the localloc because
  1407. the asmsymbol is invalid after an unit is compiled. This gives
  1408. problems when this procedure is inlined in another unit (PFV) }
  1409. if vs.is_regvar(false) then
  1410. begin
  1411. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable];
  1412. vs.initialloc.size:=def_cgsize(vs.vardef);
  1413. gen_alloc_regvar(list,vs,true);
  1414. setlocalloc(vs);
  1415. end;
  1416. end;
  1417. paravarsym :
  1418. begin
  1419. vs:=tabstractnormalvarsym(sym);
  1420. { Parameters passed to assembler procedures need to be kept
  1421. in the original location }
  1422. if (po_assembler in pd.procoptions) then
  1423. tparavarsym(vs).paraloc[calleeside].get_location(vs.initialloc)
  1424. { exception filters receive their frame pointer as a parameter }
  1425. else if (pd.proctypeoption=potype_exceptfilter) and
  1426. (vo_is_parentfp in vs.varoptions) then
  1427. begin
  1428. location_reset(vs.initialloc,LOC_REGISTER,OS_ADDR);
  1429. vs.initialloc.register:=NR_FRAME_POINTER_REG;
  1430. end
  1431. else
  1432. begin
  1433. isaddr:=paramanager.push_addr_param(vs.varspez,vs.vardef,pd.proccalloption);
  1434. if isaddr then
  1435. vs.initialloc.size:=OS_ADDR
  1436. else
  1437. vs.initialloc.size:=def_cgsize(vs.vardef);
  1438. if vs.is_regvar(isaddr) then
  1439. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable]
  1440. else
  1441. begin
  1442. vs.initialloc.loc:=LOC_REFERENCE;
  1443. { Reuse the parameter location for values to are at a single location on the stack }
  1444. if paramanager.param_use_paraloc(tparavarsym(sym).paraloc[calleeside]) then
  1445. begin
  1446. reference_reset_base(vs.initialloc.reference,tparavarsym(sym).paraloc[calleeside].location^.reference.index,
  1447. tparavarsym(sym).paraloc[calleeside].location^.reference.offset,tparavarsym(sym).paraloc[calleeside].alignment);
  1448. end
  1449. else
  1450. begin
  1451. if isaddr then
  1452. tg.GetLocal(list,sizeof(pint),voidpointertype,vs.initialloc.reference)
  1453. else
  1454. tg.GetLocal(list,vs.getsize,tparavarsym(sym).paraloc[calleeside].alignment,vs.vardef,vs.initialloc.reference);
  1455. end;
  1456. end;
  1457. end;
  1458. setlocalloc(vs);
  1459. end;
  1460. localvarsym :
  1461. begin
  1462. vs:=tabstractnormalvarsym(sym);
  1463. vs.initialloc.size:=def_cgsize(vs.vardef);
  1464. if ([po_assembler,po_nostackframe] * pd.procoptions = [po_assembler,po_nostackframe]) and
  1465. (vo_is_funcret in vs.varoptions) then
  1466. begin
  1467. paramanager.create_funcretloc_info(pd,calleeside);
  1468. if assigned(pd.funcretloc[calleeside].location^.next) then
  1469. begin
  1470. { can't replace references to "result" with a complex
  1471. location expression inside assembler code }
  1472. location_reset(vs.initialloc,LOC_INVALID,OS_NO);
  1473. end
  1474. else
  1475. pd.funcretloc[calleeside].get_location(vs.initialloc);
  1476. end
  1477. else if (m_delphi in current_settings.modeswitches) and
  1478. (po_assembler in pd.procoptions) and
  1479. (vo_is_funcret in vs.varoptions) and
  1480. (vs.refs=0) then
  1481. begin
  1482. { not referenced, so don't allocate. Use dummy to }
  1483. { avoid ie's later on because of LOC_INVALID }
  1484. vs.initialloc.loc:=LOC_REGISTER;
  1485. vs.initialloc.size:=OS_INT;
  1486. vs.initialloc.register:=NR_FUNCTION_RESULT_REG;
  1487. end
  1488. else if vs.is_regvar(false) then
  1489. begin
  1490. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable];
  1491. gen_alloc_regvar(list,vs,true);
  1492. end
  1493. else
  1494. begin
  1495. vs.initialloc.loc:=LOC_REFERENCE;
  1496. tg.GetLocal(list,vs.getsize,vs.vardef,vs.initialloc.reference);
  1497. end;
  1498. setlocalloc(vs);
  1499. end;
  1500. end;
  1501. end;
  1502. end;
  1503. procedure add_regvars(var rv: tusedregvars; const location: tlocation);
  1504. begin
  1505. case location.loc of
  1506. LOC_CREGISTER:
  1507. {$if defined(cpu64bitalu)}
  1508. if location.size in [OS_128,OS_S128] then
  1509. begin
  1510. rv.intregvars.addnodup(getsupreg(location.register128.reglo));
  1511. rv.intregvars.addnodup(getsupreg(location.register128.reghi));
  1512. end
  1513. else
  1514. {$elseif defined(cpu32bitalu)}
  1515. if location.size in [OS_64,OS_S64] then
  1516. begin
  1517. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1518. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1519. end
  1520. else
  1521. {$elseif defined(cpu16bitalu)}
  1522. if location.size in [OS_64,OS_S64] then
  1523. begin
  1524. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1525. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reglo)));
  1526. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1527. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reghi)));
  1528. end
  1529. else
  1530. if location.size in [OS_32,OS_S32] then
  1531. begin
  1532. rv.intregvars.addnodup(getsupreg(location.register));
  1533. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register)));
  1534. end
  1535. else
  1536. {$elseif defined(cpu8bitalu)}
  1537. if location.size in [OS_64,OS_S64] then
  1538. begin
  1539. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1540. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reglo)));
  1541. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register64.reglo))));
  1542. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register64.reglo)))));
  1543. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1544. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register64.reghi)));
  1545. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register64.reghi))));
  1546. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register64.reghi)))));
  1547. end
  1548. else
  1549. if location.size in [OS_32,OS_S32] then
  1550. begin
  1551. rv.intregvars.addnodup(getsupreg(location.register));
  1552. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register)));
  1553. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(location.register))));
  1554. rv.intregvars.addnodup(getsupreg(GetNextReg(GetNextReg(GetNextReg(location.register)))));
  1555. end
  1556. else
  1557. if location.size in [OS_16,OS_S16] then
  1558. begin
  1559. rv.intregvars.addnodup(getsupreg(location.register));
  1560. rv.intregvars.addnodup(getsupreg(GetNextReg(location.register)));
  1561. end
  1562. else
  1563. {$endif}
  1564. rv.intregvars.addnodup(getsupreg(location.register));
  1565. LOC_CFPUREGISTER:
  1566. rv.fpuregvars.addnodup(getsupreg(location.register));
  1567. LOC_CMMREGISTER:
  1568. rv.mmregvars.addnodup(getsupreg(location.register));
  1569. end;
  1570. end;
  1571. function do_get_used_regvars(var n: tnode; arg: pointer): foreachnoderesult;
  1572. var
  1573. rv: pusedregvars absolute arg;
  1574. begin
  1575. case (n.nodetype) of
  1576. temprefn:
  1577. { We only have to synchronise a tempnode before a loop if it is }
  1578. { not created inside the loop, and only synchronise after the }
  1579. { loop if it's not destroyed inside the loop. If it's created }
  1580. { before the loop and not yet destroyed, then before the loop }
  1581. { is secondpassed tempinfo^.valid will be true, and we get the }
  1582. { correct registers. If it's not destroyed inside the loop, }
  1583. { then after the loop has been secondpassed tempinfo^.valid }
  1584. { be true and we also get the right registers. In other cases, }
  1585. { tempinfo^.valid will be false and so we do not add }
  1586. { unnecessary registers. This way, we don't have to look at }
  1587. { tempcreate and tempdestroy nodes to get this info (JM) }
  1588. if (ti_valid in ttemprefnode(n).tempinfo^.flags) then
  1589. add_regvars(rv^,ttemprefnode(n).tempinfo^.location);
  1590. loadn:
  1591. if (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
  1592. add_regvars(rv^,tabstractnormalvarsym(tloadnode(n).symtableentry).localloc);
  1593. vecn:
  1594. { range checks sometimes need the high parameter }
  1595. if (cs_check_range in current_settings.localswitches) and
  1596. (is_open_array(tvecnode(n).left.resultdef) or
  1597. is_array_of_const(tvecnode(n).left.resultdef)) and
  1598. not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
  1599. add_regvars(rv^,tabstractnormalvarsym(get_high_value_sym(tparavarsym(tloadnode(tvecnode(n).left).symtableentry))).localloc)
  1600. end;
  1601. result := fen_true;
  1602. end;
  1603. procedure get_used_regvars(n: tnode; var rv: tusedregvars);
  1604. begin
  1605. foreachnodestatic(n,@do_get_used_regvars,@rv);
  1606. end;
  1607. (*
  1608. See comments at declaration of pusedregvarscommon
  1609. function do_get_used_regvars_common(var n: tnode; arg: pointer): foreachnoderesult;
  1610. var
  1611. rv: pusedregvarscommon absolute arg;
  1612. begin
  1613. if (n.nodetype = loadn) and
  1614. (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
  1615. with tabstractnormalvarsym(tloadnode(n).symtableentry).localloc do
  1616. case loc of
  1617. LOC_CREGISTER:
  1618. { if not yet encountered in this node tree }
  1619. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1620. { but nevertheless already encountered somewhere }
  1621. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1622. { then it's a regvar used in two or more node trees }
  1623. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1624. LOC_CFPUREGISTER:
  1625. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1626. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1627. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1628. LOC_CMMREGISTER:
  1629. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1630. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1631. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1632. end;
  1633. result := fen_true;
  1634. end;
  1635. procedure get_used_regvars_common(n: tnode; var rv: tusedregvarscommon);
  1636. begin
  1637. rv.myregvars.intregvars.clear;
  1638. rv.myregvars.fpuregvars.clear;
  1639. rv.myregvars.mmregvars.clear;
  1640. foreachnodestatic(n,@do_get_used_regvars_common,@rv);
  1641. end;
  1642. *)
  1643. procedure gen_sync_regvars(list:TAsmList; var rv: tusedregvars);
  1644. var
  1645. count: longint;
  1646. begin
  1647. for count := 1 to rv.intregvars.length do
  1648. cg.a_reg_sync(list,newreg(R_INTREGISTER,rv.intregvars.readidx(count-1),R_SUBWHOLE));
  1649. for count := 1 to rv.fpuregvars.length do
  1650. cg.a_reg_sync(list,newreg(R_FPUREGISTER,rv.fpuregvars.readidx(count-1),R_SUBWHOLE));
  1651. for count := 1 to rv.mmregvars.length do
  1652. cg.a_reg_sync(list,newreg(R_MMREGISTER,rv.mmregvars.readidx(count-1),R_SUBWHOLE));
  1653. end;
  1654. procedure gen_free_symtable(list:TAsmList;st:TSymtable);
  1655. var
  1656. i : longint;
  1657. sym : tsym;
  1658. begin
  1659. for i:=0 to st.SymList.Count-1 do
  1660. begin
  1661. sym:=tsym(st.SymList[i]);
  1662. if (sym.typ in [staticvarsym,localvarsym,paravarsym]) then
  1663. begin
  1664. with tabstractnormalvarsym(sym) do
  1665. begin
  1666. { Note: We need to keep the data available in memory
  1667. for the sub procedures that can access local data
  1668. in the parent procedures }
  1669. case localloc.loc of
  1670. LOC_CREGISTER :
  1671. if (pi_has_label in current_procinfo.flags) then
  1672. {$if defined(cpu64bitalu)}
  1673. if def_cgsize(vardef) in [OS_128,OS_S128] then
  1674. begin
  1675. cg.a_reg_sync(list,localloc.register128.reglo);
  1676. cg.a_reg_sync(list,localloc.register128.reghi);
  1677. end
  1678. else
  1679. {$elseif defined(cpu32bitalu)}
  1680. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1681. begin
  1682. cg.a_reg_sync(list,localloc.register64.reglo);
  1683. cg.a_reg_sync(list,localloc.register64.reghi);
  1684. end
  1685. else
  1686. {$elseif defined(cpu16bitalu)}
  1687. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1688. begin
  1689. cg.a_reg_sync(list,localloc.register64.reglo);
  1690. cg.a_reg_sync(list,GetNextReg(localloc.register64.reglo));
  1691. cg.a_reg_sync(list,localloc.register64.reghi);
  1692. cg.a_reg_sync(list,GetNextReg(localloc.register64.reghi));
  1693. end
  1694. else
  1695. if def_cgsize(vardef) in [OS_32,OS_S32] then
  1696. begin
  1697. cg.a_reg_sync(list,localloc.register);
  1698. cg.a_reg_sync(list,GetNextReg(localloc.register));
  1699. end
  1700. else
  1701. {$elseif defined(cpu8bitalu)}
  1702. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1703. begin
  1704. cg.a_reg_sync(list,localloc.register64.reglo);
  1705. cg.a_reg_sync(list,GetNextReg(localloc.register64.reglo));
  1706. cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register64.reglo)));
  1707. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register64.reglo))));
  1708. cg.a_reg_sync(list,localloc.register64.reghi);
  1709. cg.a_reg_sync(list,GetNextReg(localloc.register64.reghi));
  1710. cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register64.reghi)));
  1711. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register64.reghi))));
  1712. end
  1713. else
  1714. if def_cgsize(vardef) in [OS_32,OS_S32] then
  1715. begin
  1716. cg.a_reg_sync(list,localloc.register);
  1717. cg.a_reg_sync(list,GetNextReg(localloc.register));
  1718. cg.a_reg_sync(list,GetNextReg(GetNextReg(localloc.register)));
  1719. cg.a_reg_sync(list,GetNextReg(GetNextReg(GetNextReg(localloc.register))));
  1720. end
  1721. else
  1722. if def_cgsize(vardef) in [OS_16,OS_S16] then
  1723. begin
  1724. cg.a_reg_sync(list,localloc.register);
  1725. cg.a_reg_sync(list,GetNextReg(localloc.register));
  1726. end
  1727. else
  1728. {$endif}
  1729. cg.a_reg_sync(list,localloc.register);
  1730. LOC_CFPUREGISTER,
  1731. LOC_CMMREGISTER:
  1732. if (pi_has_label in current_procinfo.flags) then
  1733. cg.a_reg_sync(list,localloc.register);
  1734. LOC_REFERENCE :
  1735. begin
  1736. if typ in [localvarsym,paravarsym] then
  1737. tg.Ungetlocal(list,localloc.reference);
  1738. end;
  1739. end;
  1740. end;
  1741. end;
  1742. end;
  1743. end;
  1744. procedure gen_load_vmt_register(list:TAsmList;objdef:tobjectdef;selfloc:tlocation;var vmtreg:tregister);
  1745. var
  1746. href : treference;
  1747. selfdef: tdef;
  1748. begin
  1749. if is_object(objdef) then
  1750. begin
  1751. case selfloc.loc of
  1752. LOC_CREFERENCE,
  1753. LOC_REFERENCE:
  1754. begin
  1755. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1756. cg.a_loadaddr_ref_reg(list,selfloc.reference,href.base);
  1757. selfdef:=getpointerdef(objdef);
  1758. end;
  1759. else
  1760. internalerror(200305056);
  1761. end;
  1762. end
  1763. else
  1764. { This is also valid for Objective-C classes: vmt_offset is 0 there,
  1765. and the first "field" of an Objective-C class instance is a pointer
  1766. to its "meta-class". }
  1767. begin
  1768. selfdef:=objdef;
  1769. case selfloc.loc of
  1770. LOC_REGISTER:
  1771. begin
  1772. {$ifdef cpu_uses_separate_address_registers}
  1773. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  1774. begin
  1775. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1776. cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,selfloc.register,href.base);
  1777. end
  1778. else
  1779. {$endif cpu_uses_separate_address_registers}
  1780. reference_reset_base(href,selfloc.register,objdef.vmt_offset,sizeof(pint));
  1781. end;
  1782. LOC_CONSTANT,
  1783. LOC_CREGISTER,
  1784. LOC_CREFERENCE,
  1785. LOC_REFERENCE,
  1786. LOC_CSUBSETREG,
  1787. LOC_SUBSETREG,
  1788. LOC_CSUBSETREF,
  1789. LOC_SUBSETREF:
  1790. begin
  1791. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1792. { todo: pass actual vmt pointer type to hlcg }
  1793. hlcg.a_load_loc_reg(list,voidpointertype,voidpointertype,selfloc,href.base);
  1794. end;
  1795. else
  1796. internalerror(200305057);
  1797. end;
  1798. end;
  1799. vmtreg:=cg.getaddressregister(list);
  1800. hlcg.g_maybe_testself(list,selfdef,href.base);
  1801. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,vmtreg);
  1802. { test validity of VMT }
  1803. if not(is_interface(objdef)) and
  1804. not(is_cppclass(objdef)) and
  1805. not(is_objc_class_or_protocol(objdef)) then
  1806. cg.g_maybe_testvmt(list,vmtreg,objdef);
  1807. end;
  1808. function getprocalign : shortint;
  1809. begin
  1810. { gprof uses 16 byte granularity }
  1811. if (cs_profile in current_settings.moduleswitches) then
  1812. result:=16
  1813. else
  1814. result:=current_settings.alignment.procalign;
  1815. end;
  1816. procedure gen_fpc_dummy(list : TAsmList);
  1817. begin
  1818. {$ifdef i386}
  1819. { fix me! }
  1820. list.concat(Taicpu.Op_const_reg(A_MOV,S_L,1,NR_EAX));
  1821. list.concat(Taicpu.Op_const(A_RET,S_W,12));
  1822. {$endif i386}
  1823. end;
  1824. procedure gen_load_frame_for_exceptfilter(list : TAsmList);
  1825. var
  1826. para: tparavarsym;
  1827. begin
  1828. para:=tparavarsym(current_procinfo.procdef.paras[0]);
  1829. if not (vo_is_parentfp in para.varoptions) then
  1830. InternalError(201201142);
  1831. if (para.paraloc[calleeside].location^.loc<>LOC_REGISTER) or
  1832. (para.paraloc[calleeside].location^.next<>nil) then
  1833. InternalError(201201143);
  1834. cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,para.paraloc[calleeside].location^.register,
  1835. NR_FRAME_POINTER_REG);
  1836. end;
  1837. end.