cpubase.pas 27 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Contains the base types for the m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. { This Unit contains the base types for the m68k
  19. }
  20. unit cpubase;
  21. {$i fpcdefs.inc}
  22. interface
  23. uses
  24. strings,cutils,cclasses,aasmbase,cpuinfo,cginfo;
  25. {*****************************************************************************
  26. Assembler Opcodes
  27. *****************************************************************************}
  28. type
  29. { warning: CPU32 opcodes are not fully compatible with the MC68020. }
  30. { 68000 only opcodes }
  31. tasmop = (a_abcd,
  32. a_add,a_adda,a_addi,a_addq,a_addx,a_and,a_andi,
  33. a_asl,a_asr,a_bcc,a_bcs,a_beq,a_bge,a_bgt,a_bhi,
  34. a_ble,a_bls,a_blt,a_bmi,a_bne,a_bpl,a_bvc,a_bvs,
  35. a_bchg,a_bclr,a_bra,a_bset,a_bsr,a_btst,a_chk,
  36. a_clr,a_cmp,a_cmpa,a_cmpi,a_cmpm,a_dbcc,a_dbcs,a_dbeq,a_dbge,
  37. a_dbgt,a_dbhi,a_dble,a_dbls,a_dblt,a_dbmi,a_dbne,a_dbra,
  38. a_dbpl,a_dbt,a_dbvc,a_dbvs,a_dbf,a_divs,a_divu,
  39. a_eor,a_eori,a_exg,a_illegal,a_ext,a_jmp,a_jsr,
  40. a_lea,a_link,a_lsl,a_lsr,a_move,a_movea,a_movei,a_moveq,
  41. a_movem,a_movep,a_muls,a_mulu,a_nbcd,a_neg,a_negx,
  42. a_nop,a_not,a_or,a_ori,a_pea,a_rol,a_ror,a_roxl,
  43. a_roxr,a_rtr,a_rts,a_sbcd,a_scc,a_scs,a_seq,a_sge,
  44. a_sgt,a_shi,a_sle,a_sls,a_slt,a_smi,a_sne,
  45. a_spl,a_st,a_svc,a_svs,a_sf,a_sub,a_suba,a_subi,a_subq,
  46. a_subx,a_swap,a_tas,a_trap,a_trapv,a_tst,a_unlk,
  47. a_rte,a_reset,a_stop,
  48. { mc68010 instructions }
  49. a_bkpt,a_movec,a_moves,a_rtd,
  50. { mc68020 instructions }
  51. a_bfchg,a_bfclr,a_bfexts,a_bfextu,a_bfffo,
  52. a_bfins,a_bfset,a_bftst,a_callm,a_cas,a_cas2,
  53. a_chk2,a_cmp2,a_divsl,a_divul,a_extb,a_pack,a_rtm,
  54. a_trapcc,a_tracs,a_trapeq,a_trapf,a_trapge,a_trapgt,
  55. a_traphi,a_traple,a_trapls,a_traplt,a_trapmi,a_trapne,
  56. a_trappl,a_trapt,a_trapvc,a_trapvs,a_unpk,
  57. { fpu processor instructions - directly supported only. }
  58. { ieee aware and misc. condition codes not supported }
  59. a_fabs,a_fadd,
  60. a_fbeq,a_fbne,a_fbngt,a_fbgt,a_fbge,a_fbnge,
  61. a_fblt,a_fbnlt,a_fble,a_fbgl,a_fbngl,a_fbgle,a_fbngle,
  62. a_fdbeq,a_fdbne,a_fdbgt,a_fdbngt,a_fdbge,a_fdbnge,
  63. a_fdblt,a_fdbnlt,a_fdble,a_fdbgl,a_fdbngl,a_fdbgle,a_fdbngle,
  64. a_fseq,a_fsne,a_fsgt,a_fsngt,a_fsge,a_fsnge,
  65. a_fslt,a_fsnlt,a_fsle,a_fsgl,a_fsngl,a_fsgle,a_fsngle,
  66. a_fcmp,a_fdiv,a_fmove,a_fmovem,
  67. a_fmul,a_fneg,a_fnop,a_fsqrt,a_fsub,a_fsgldiv,
  68. a_fsflmul,a_ftst,
  69. a_ftrapeq,a_ftrapne,a_ftrapgt,a_ftrapngt,a_ftrapge,a_ftrapnge,
  70. a_ftraplt,a_ftrapnlt,a_ftraple,a_ftrapgl,a_ftrapngl,a_ftrapgle,a_ftrapngle,
  71. { protected instructions }
  72. a_cprestore,a_cpsave,
  73. { fpu unit protected instructions }
  74. { and 68030/68851 common mmu instructions }
  75. { (this may include 68040 mmu instructions) }
  76. a_frestore,a_fsave,a_pflush,a_pflusha,a_pload,a_pmove,a_ptest,
  77. { useful for assembly language output }
  78. a_label,a_none,a_dbxx,a_sxx,a_bxx,a_fbxx);
  79. {# This should define the array of instructions as string }
  80. op2strtable=array[tasmop] of string[11];
  81. Const
  82. {# First value of opcode enumeration }
  83. firstop = low(tasmop);
  84. {# Last value of opcode enumeration }
  85. lastop = high(tasmop);
  86. {*****************************************************************************
  87. Registers
  88. *****************************************************************************}
  89. {$packenum 1}
  90. type
  91. Toldregister = (
  92. R_NO,R_D0,R_D1,R_D2,R_D3,R_D4,R_D5,R_D6,R_D7,
  93. R_A0,R_A1,R_A2,R_A3,R_A4,R_A5,R_A6,R_SP,
  94. { PUSH/PULL- quick and dirty hack }
  95. R_SPPUSH,R_SPPULL,
  96. { misc. }
  97. R_CCR,R_FP0,R_FP1,R_FP2,R_FP3,R_FP4,R_FP5,R_FP6,
  98. R_FP7,R_FPCR,R_SR,R_SSP,R_DFC,R_SFC,R_VBR,R_FPSR,
  99. R_INTREGISTER,R_FLOATREGISTER);
  100. Tnewregister=word;
  101. Tregister=record
  102. enum:Toldregister;
  103. number:word;
  104. end;
  105. Tsuperregister=byte;
  106. Tsubregister=byte;
  107. {# Set type definition for registers }
  108. tregisterset = set of Toldregister;
  109. Tsupregset = set of Tsuperregister;
  110. {$packenum normal}
  111. { A type to store register locations for 64 Bit values. }
  112. tregister64 = packed record
  113. reglo,reghi : tregister;
  114. end;
  115. { alias for compact code }
  116. treg64 = tregister64;
  117. {New register coding:}
  118. {Special registers:}
  119. const
  120. NR_NO = $0000; {Invalid register}
  121. {Normal registers:}
  122. {General purpose registers:}
  123. NR_D0 = $0100; NR_D1 = $0200; NR_D2 = $0300;
  124. NR_D3 = $0400; NR_D4 = $0500; NR_D5 = $0600;
  125. NR_D6 = $0700; NR_D7 = $0800; NR_A0 = $0900;
  126. NR_A1 = $0A00; NR_A2 = $0B00; NR_A3 = $0C00;
  127. NR_A4 = $0D00; NR_A5 = $0E00; NR_A6 = $0F00;
  128. NR_A7 = $1000;
  129. {Super registers.}
  130. RS_D0 = $01; RS_D1 = $02; RS_D2 = $03;
  131. RS_D3 = $04; RS_D4 = $05; RS_D5 = $06;
  132. RS_D6 = $07; RS_D7 = $08; RS_A0 = $09;
  133. RS_A1 = $0A; RS_A2 = $0B; RS_A3 = $0C;
  134. RS_A4 = $0D; RS_A5 = $0E; RS_A6 = $0F;
  135. RS_A7 = $10;
  136. {Sub register numbers:}
  137. R_SUBL = $00; {8 bits}
  138. R_SUBW = $01; {16 bits}
  139. R_SUBD = $02; {32 bits}
  140. {The subregister that specifies the entire register.}
  141. R_SUBWHOLE = R_SUBD; {i386}
  142. {R_SUBWHOLE = R_SUBQ;} {Hammer}
  143. {Number of first and last superregister.}
  144. first_supreg = $01;
  145. last_supreg = $10;
  146. first_imreg = $11;
  147. last_imreg = $ff;
  148. {# First register in the tregister enumeration }
  149. firstreg = low(Toldregister);
  150. {# Last register in the tregister enumeration }
  151. lastreg = R_FPSR;
  152. type
  153. {# Type definition for the array of string of register nnames }
  154. reg2strtable = array[firstreg..lastreg] of string[7];
  155. regname2regnumrec = record
  156. name:string[6];
  157. number:Tnewregister;
  158. end;
  159. const
  160. std_reg2str : reg2strtable =
  161. ('', 'd0','d1','d2','d3','d4','d5','d6','d7',
  162. 'a0','a1','a2','a3','a4','a5','a6','sp',
  163. '-(sp)','(sp)+',
  164. 'ccr','fp0','fp1','fp2','fp3','fp4','fp5',
  165. 'fp6','fp7','fpcr','sr','ssp','dfc',
  166. 'sfc','vbr','fpsr');
  167. {*****************************************************************************
  168. Conditions
  169. *****************************************************************************}
  170. {*****************************************************************************
  171. Conditions
  172. *****************************************************************************}
  173. type
  174. TAsmCond=(C_None,
  175. C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
  176. C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
  177. );
  178. const
  179. cond2str:array[TAsmCond] of string[3]=('',
  180. 'cc','ls','cs','lt','eq','mi','f','ne',
  181. 'ge','pl','gt','t','hi','vc','le','vs'
  182. );
  183. {*****************************************************************************
  184. Flags
  185. *****************************************************************************}
  186. type
  187. TResFlags = (
  188. F_E,F_NE,
  189. F_G,F_L,F_GE,F_LE,F_C,F_NC,F_A,F_AE,F_B,F_BE);
  190. {*****************************************************************************
  191. Reference
  192. *****************************************************************************}
  193. type
  194. trefoptions=(ref_none,ref_parafixup,ref_localfixup,ref_selffixup);
  195. { direction of address register : }
  196. { (An) (An)+ -(An) }
  197. tdirection = (dir_none,dir_inc,dir_dec);
  198. { reference record }
  199. preference = ^treference;
  200. treference = packed record
  201. base,
  202. index : tregister;
  203. scalefactor : byte;
  204. offset : longint;
  205. symbol : tasmsymbol;
  206. offsetfixup : longint;
  207. options : trefoptions;
  208. { indexed increment and decrement mode }
  209. { (An)+ and -(An) }
  210. direction : tdirection;
  211. end;
  212. { reference record }
  213. pparareference = ^tparareference;
  214. tparareference = packed record
  215. index : tregister;
  216. offset : longint;
  217. end;
  218. {*****************************************************************************
  219. Operands
  220. *****************************************************************************}
  221. { Types of operand }
  222. toptype=(top_none,top_reg,top_ref,top_const,top_symbol,top_reglist);
  223. tregisterlist = set of Toldregister;
  224. toper=record
  225. ot : longint;
  226. case typ : toptype of
  227. top_none : ();
  228. top_reg : (reg:tregister);
  229. top_ref : (ref:preference);
  230. top_const : (val:aword);
  231. top_symbol : (sym:tasmsymbol;symofs:longint);
  232. { used for pushing/popping multiple registers }
  233. top_reglist : (registerlist:Tsupregset);
  234. end;
  235. {*****************************************************************************
  236. Generic Location
  237. *****************************************************************************}
  238. type
  239. { tparamlocation describes where a parameter for a procedure is stored.
  240. References are given from the caller's point of view. The usual
  241. TLocation isn't used, because contains a lot of unnessary fields.
  242. }
  243. tparalocation = packed record
  244. size : TCGSize;
  245. loc : TCGLoc;
  246. sp_fixup : longint;
  247. case TCGLoc of
  248. LOC_REFERENCE : (reference : tparareference);
  249. { segment in reference at the same place as in loc_register }
  250. LOC_REGISTER,LOC_CREGISTER : (
  251. case longint of
  252. 1 : (register,registerhigh : tregister);
  253. { overlay a registerlow }
  254. 2 : (registerlow : tregister);
  255. { overlay a 64 Bit register type }
  256. 3 : (reg64 : tregister64);
  257. 4 : (register64 : tregister64);
  258. );
  259. end;
  260. tlocation = packed record
  261. loc : TCGLoc;
  262. size : TCGSize;
  263. case TCGLoc of
  264. LOC_FLAGS : (resflags : tresflags);
  265. LOC_CONSTANT : (
  266. case longint of
  267. 1 : (value : AWord);
  268. { can't do this, this layout depends on the host cpu. Use }
  269. { lo(valueqword)/hi(valueqword) instead (JM) }
  270. { 2 : (valuelow, valuehigh:AWord); }
  271. { overlay a complete 64 Bit value }
  272. 3 : (valueqword : qword);
  273. );
  274. LOC_CREFERENCE,
  275. LOC_REFERENCE : (reference : treference);
  276. { segment in reference at the same place as in loc_register }
  277. LOC_REGISTER,LOC_CREGISTER : (
  278. case longint of
  279. 1 : (register,registerhigh,segment : tregister);
  280. { overlay a registerlow }
  281. 2 : (registerlow : tregister);
  282. { overlay a 64 Bit register type }
  283. 3 : (reg64 : tregister64);
  284. 4 : (register64 : tregister64);
  285. );
  286. end;
  287. {*****************************************************************************
  288. Operand Sizes
  289. *****************************************************************************}
  290. { S_NO = No Size of operand }
  291. { S_B = 8-bit size operand }
  292. { S_W = 16-bit size operand }
  293. { S_L = 32-bit size operand }
  294. { Floating point types }
  295. { S_FS = single type (32 bit) }
  296. { S_FD = double/64bit integer }
  297. { S_FX = Extended type }
  298. topsize = (S_NO,S_B,S_W,S_L,S_FS,S_FD,S_FX,S_IQ);
  299. {*****************************************************************************
  300. Constants
  301. *****************************************************************************}
  302. const
  303. {# maximum number of operands in assembler instruction }
  304. max_operands = 4;
  305. lvaluelocations = [LOC_REFERENCE,LOC_CFPUREGISTER,LOC_CREGISTER];
  306. general_registers = [R_D0..R_D7];
  307. general_superregisters = [RS_D0..RS_D7];
  308. {# low and high of the available maximum width integer general purpose }
  309. { registers }
  310. LoGPReg = R_D0;
  311. HiGPReg = R_D7;
  312. {# low and high of every possible width general purpose register (same as }
  313. { above on most architctures apart from the 80x86) }
  314. LoReg = LoGPReg;
  315. HiReg = HiGPReg;
  316. { Table of registers which can be allocated by the code generator
  317. internally, when generating the code.
  318. legend:
  319. xxxregs = set of all possibly used registers of that type in the code
  320. generator
  321. usableregsxxx = set of all 32bit components of registers that can be
  322. possible allocated to a regvar or using getregisterxxx (this
  323. excludes registers which can be only used for parameter
  324. passing on ABI's that define this)
  325. c_countusableregsxxx = amount of registers in the usableregsxxx set }
  326. maxintregs = 8;
  327. intregs = [R_D0..R_D7];
  328. usableregsint = [RS_D2..RS_D7];
  329. c_countusableregsint = 6;
  330. maxfpuregs = 8;
  331. fpuregs = [R_FP0..R_FP7];
  332. usableregsfpu = [R_FP2..R_FP7];
  333. c_countusableregsfpu = 6;
  334. mmregs = [];
  335. usableregsmm = [];
  336. c_countusableregsmm = 0;
  337. maxaddrregs = 8;
  338. addrregs = [R_A0..R_SP];
  339. usableregsaddr = [RS_A2..RS_A4];
  340. c_countusableregsaddr = 3;
  341. { The first register in the usableregsint array }
  342. firstsaveintreg = RS_D2;
  343. { The last register in the usableregsint array }
  344. lastsaveintreg = RS_D7;
  345. { The first register in the usableregsfpu array }
  346. firstsavefpureg = R_FP2;
  347. { The last register in the usableregsfpu array }
  348. lastsavefpureg = R_FP7;
  349. { these constants are m68k specific }
  350. { The first register in the usableregsaddr array }
  351. firstsaveaddrreg = RS_A2;
  352. { The last register in the usableregsaddr array }
  353. lastsaveaddrreg = RS_A4;
  354. firstsavemmreg = R_NO;
  355. lastsavemmreg = R_NO;
  356. {
  357. Defines the maxinum number of integer registers which can be used as variable registers
  358. }
  359. maxvarregs = 6;
  360. { Array of integer registers which can be used as variable registers }
  361. varregs : Array [1..maxvarregs] of Toldregister =
  362. (R_D2,R_D3,R_D4,R_D5,R_D6,R_D7);
  363. {
  364. Defines the maxinum number of float registers which can be used as variable registers
  365. }
  366. maxfpuvarregs = 6;
  367. { Array of float registers which can be used as variable registers }
  368. fpuvarregs : Array [1..maxfpuvarregs] of Toldregister =
  369. (R_FP2,R_FP3,R_FP4,R_FP5,R_FP6,R_FP7);
  370. {
  371. Defines the number of integer registers which are used in the ABI to pass parameters
  372. (might be empty on systems which use the stack to pass parameters)
  373. }
  374. max_param_regs_int = 0;
  375. {param_regs_int: Array[1..max_param_regs_int] of tregister =
  376. (R_3,R_4,R_5,R_6,R_7,R_8,R_9,R_10);}
  377. {
  378. Defines the number of float registers which are used in the ABI to pass parameters
  379. (might be empty on systems which use the stack to pass parameters)
  380. }
  381. max_param_regs_fpu = 0;
  382. {param_regs_fpu: Array[1..max_param_regs_fpu] of tregister =
  383. (R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,R_F10,R_F11,R_F12,R_F13);}
  384. {
  385. Defines the number of mmx registers which are used in the ABI to pass parameters
  386. (might be empty on systems which use the stack to pass parameters)
  387. }
  388. max_param_regs_mm = 0;
  389. {param_regs_mm: Array[1..max_param_regs_mm] of tregister =
  390. (R_M1,R_M2,R_M3,R_M4,R_M5,R_M6,R_M7,R_M8,R_M9,R_M10,R_M11,R_M12,R_M13);}
  391. {# Registers which are defined as scratch integer and no need to save across
  392. routine calls or in assembler blocks.
  393. }
  394. max_scratch_regs = 4;
  395. scratch_regs: Array[1..max_scratch_regs] of Tsuperregister = (RS_D0,RS_D1,RS_A0,RS_A1);
  396. {*****************************************************************************
  397. Default generic sizes
  398. *****************************************************************************}
  399. {# Defines the default address size for a processor, }
  400. OS_ADDR = OS_32;
  401. {# the natural int size for a processor, }
  402. OS_INT = OS_32;
  403. {# the maximum float size for a processor, }
  404. OS_FLOAT = OS_F64;
  405. {# the size of a vector register for a processor }
  406. OS_VECTOR = OS_M128;
  407. {*****************************************************************************
  408. GDB Information
  409. *****************************************************************************}
  410. {# Register indexes for stabs information, when some
  411. parameters or variables are stored in registers.
  412. Taken from m68kelf.h (DBX_REGISTER_NUMBER)
  413. from GCC 3.x source code.
  414. This is not compatible with the m68k-sun
  415. implementation.
  416. }
  417. stab_regindex : array[firstreg..lastreg] of shortint =
  418. (-1, { R_NO }
  419. 0,1,2,3,4,5,6,7, { R_D0..R_D7 }
  420. 8,9,10,11,12,13,14,15, { R_A0..R_A7 }
  421. -1,-1,-1, { R_SPPUSH, R_SPPULL, R_CCR }
  422. 18,19,20,21,22,23,24,25, { R_FP0..R_FP7 }
  423. -1,-1,-1,-1,-1,-1,-1);
  424. {*****************************************************************************
  425. Generic Register names
  426. *****************************************************************************}
  427. {# Stack pointer register }
  428. stack_pointer_reg = R_SP;
  429. NR_STACK_POINTER_REG = NR_A7;
  430. RS_STACK_POINTER_REG = RS_A7;
  431. {# Frame pointer register }
  432. frame_pointer_reg = R_A6;
  433. NR_FRAME_POINTER_REG = NR_A6;
  434. RS_FRAME_POINTER_REG = RS_A6;
  435. {# Self pointer register : contains the instance address of an
  436. object or class. }
  437. self_pointer_reg = R_A5;
  438. NR_SELF_POINTER_REG = NR_A5;
  439. RS_SELF_POINTER_REG = RS_A5;
  440. {# Register for addressing absolute data in a position independant way,
  441. such as in PIC code. The exact meaning is ABI specific. For
  442. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  443. }
  444. pic_offset_reg = R_A5;
  445. {# Results are returned in this register (32-bit values) }
  446. accumulator = R_D0;
  447. NR_ACCUMULATOR = NR_D0;
  448. RS_ACCUMULATOR = RS_D0;
  449. {the return_result_reg, is used inside the called function to store its return
  450. value when that is a scalar value otherwise a pointer to the address of the
  451. result is placed inside it}
  452. return_result_reg = accumulator;
  453. NR_RETURN_RESULT_REG = NR_ACCUMULATOR;
  454. RS_RETURN_RESULT_REG = RS_ACCUMULATOR;
  455. {the function_result_reg contains the function result after a call to a scalar
  456. function othewise it contains a pointer to the returned result}
  457. function_result_reg = accumulator;
  458. {# Hi-Results are returned in this register (64-bit value high register) }
  459. accumulatorhigh = R_D1;
  460. NR_ACCUMULATORHIGH = NR_D1;
  461. RS_ACCUMULATORHIGH = RS_D1;
  462. {# Floating point results will be placed into this register }
  463. FPU_RESULT_REG = R_FP0;
  464. mmresultreg = R_NO;
  465. {*****************************************************************************
  466. GCC /ABI linking information
  467. *****************************************************************************}
  468. {# Registers which must be saved when calling a routine declared as
  469. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  470. saved should be the ones as defined in the target ABI and / or GCC.
  471. This value can be deduced from CALLED_USED_REGISTERS array in the
  472. GCC source.
  473. }
  474. std_saved_registers = [RS_D2..RS_D7,RS_A2..RS_A5];
  475. {# Required parameter alignment when calling a routine declared as
  476. stdcall and cdecl. The alignment value should be the one defined
  477. by GCC or the target ABI.
  478. The value of this constant is equal to the constant
  479. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  480. }
  481. std_param_align = 4; { for 32-bit version only }
  482. {*****************************************************************************
  483. CPU Dependent Constants
  484. *****************************************************************************}
  485. {*****************************************************************************
  486. Helpers
  487. *****************************************************************************}
  488. function is_calljmp(o:tasmop):boolean;
  489. procedure inverse_flags(var r : TResFlags);
  490. function flags_to_cond(const f: TResFlags) : TAsmCond;
  491. procedure convert_register_to_enum(var r:Tregister);
  492. function cgsize2subreg(s:Tcgsize):Tsubregister;
  493. function supreg_name(r:Tsuperregister):string;
  494. implementation
  495. uses
  496. verbose;
  497. {*****************************************************************************
  498. Helpers
  499. *****************************************************************************}
  500. function is_calljmp(o:tasmop):boolean;
  501. begin
  502. is_calljmp := false;
  503. if o in [A_BXX,A_FBXX,A_DBXX,A_BCC..A_BVS,A_DBCC..A_DBVS,A_FBEQ..A_FSNGLE,
  504. A_JSR,A_BSR,A_JMP] then
  505. is_calljmp := true;
  506. end;
  507. procedure inverse_flags(var r: TResFlags);
  508. const flagsinvers : array[F_E..F_BE] of tresflags =
  509. (F_NE,F_E,
  510. F_LE,F_GE,
  511. F_L,F_G,
  512. F_NC,F_C,
  513. F_BE,F_B,
  514. F_AE,F_A);
  515. begin
  516. r:=flagsinvers[r];
  517. end;
  518. function flags_to_cond(const f: TResFlags) : TAsmCond;
  519. const flags2cond: array[tresflags] of tasmcond = (
  520. C_EQ,{F_E equal}
  521. C_NE,{F_NE not equal}
  522. C_GT,{F_G gt signed}
  523. C_LT,{F_L lt signed}
  524. C_GE,{F_GE ge signed}
  525. C_LE,{F_LE le signed}
  526. C_CS,{F_C carry set}
  527. C_CC,{F_NC carry clear}
  528. C_HI,{F_A gt unsigned}
  529. C_CC,{F_AE ge unsigned}
  530. C_CS,{F_B lt unsigned}
  531. C_LS);{F_BE le unsigned}
  532. begin
  533. flags_to_cond := flags2cond[f];
  534. end;
  535. procedure convert_register_to_enum(var r:Tregister);
  536. begin
  537. if r.enum = R_INTREGISTER then
  538. case r.number of
  539. NR_NO: r.enum:= R_NO;
  540. NR_D0: r.enum:= R_D0;
  541. NR_D1: r.enum:= R_D1;
  542. NR_D2: r.enum:= R_D2;
  543. NR_D3: r.enum:= R_D3;
  544. NR_D4: r.enum:= R_D4;
  545. NR_D5: r.enum:= R_D5;
  546. NR_D6: r.enum:= R_D6;
  547. NR_D7: r.enum:= R_D7;
  548. NR_A0: r.enum:= R_A0;
  549. NR_A1: r.enum:= R_A1;
  550. NR_A2: r.enum:= R_A2;
  551. NR_A3: r.enum:= R_A3;
  552. NR_A4: r.enum:= R_A4;
  553. NR_A5: r.enum:= R_A5;
  554. NR_A6: r.enum:= R_A6;
  555. NR_A7: r.enum:= R_SP;
  556. else
  557. internalerror(200301082);
  558. end;
  559. end;
  560. function cgsize2subreg(s:Tcgsize):Tsubregister;
  561. begin
  562. case s of
  563. OS_8,OS_S8:
  564. cgsize2subreg:=R_SUBL;
  565. OS_16,OS_S16:
  566. cgsize2subreg:=R_SUBW;
  567. OS_32,OS_S32:
  568. cgsize2subreg:=R_SUBD;
  569. else
  570. internalerror(200301231);
  571. end;
  572. end;
  573. function supreg_name(r:Tsuperregister):string;
  574. var s:string[4];
  575. const supreg_names:array[0..last_supreg] of string[4]=
  576. ('INV',
  577. 'd0','d1','d2','d3','d4','d5','d6','d7',
  578. 'a0','a1','a2','a3','a4','a5','a6','sp');
  579. begin
  580. if r in [0..last_supreg] then
  581. supreg_name:=supreg_names[r]
  582. else
  583. begin
  584. str(r,s);
  585. supreg_name:='reg'+s;
  586. end;
  587. end;
  588. end.
  589. {
  590. $Log$
  591. Revision 1.21 2003-06-03 13:01:59 daniel
  592. * Register allocator finished
  593. Revision 1.20 2003/04/23 13:40:33 peter
  594. * fix m68k compile
  595. Revision 1.19 2003/04/23 12:35:35 florian
  596. * fixed several issues with powerpc
  597. + applied a patch from Jonas for nested function calls (PowerPC only)
  598. * ...
  599. Revision 1.18 2003/02/19 22:00:16 daniel
  600. * Code generator converted to new register notation
  601. - Horribily outdated todo.txt removed
  602. Revision 1.17 2003/02/02 19:25:54 carl
  603. * Several bugfixes for m68k target (register alloc., opcode emission)
  604. + VIS target
  605. + Generic add more complete (still not verified)
  606. Revision 1.16 2003/01/09 15:49:56 daniel
  607. * Added register conversion
  608. Revision 1.15 2003/01/08 18:43:57 daniel
  609. * Tregister changed into a record
  610. Revision 1.14 2002/11/30 23:33:03 carl
  611. * merges from Pierre's fixes in m68k fixes branch
  612. Revision 1.13 2002/11/17 18:26:16 mazen
  613. * fixed a compilation bug accmulator-->accumulator, in definition of return_result_reg
  614. Revision 1.12 2002/11/17 17:49:09 mazen
  615. + return_result_reg and function_result_reg are now used, in all plateforms, to pass functions result between called function and its caller. See the explanation of each one
  616. Revision 1.11 2002/10/14 16:32:36 carl
  617. + flag_2_cond implemented
  618. Revision 1.10 2002/08/18 09:02:12 florian
  619. * fixed compilation problems
  620. Revision 1.9 2002/08/15 08:13:54 carl
  621. - a_load_sym_ofs_reg removed
  622. * loadvmt now calls loadaddr_ref_reg instead
  623. Revision 1.8 2002/08/14 18:41:47 jonas
  624. - remove valuelow/valuehigh fields from tlocation, because they depend
  625. on the endianess of the host operating system -> difficult to get
  626. right. Use lo/hi(location.valueqword) instead (remember to use
  627. valueqword and not value!!)
  628. Revision 1.7 2002/08/13 21:40:58 florian
  629. * more fixes for ppc calling conventions
  630. Revision 1.6 2002/08/13 18:58:54 carl
  631. + m68k problems with cvs fixed?()!
  632. Revision 1.4 2002/08/12 15:08:44 carl
  633. + stab register indexes for powerpc (moved from gdb to cpubase)
  634. + tprocessor enumeration moved to cpuinfo
  635. + linker in target_info is now a class
  636. * many many updates for m68k (will soon start to compile)
  637. - removed some ifdef or correct them for correct cpu
  638. Revision 1.3 2002/07/29 17:51:32 carl
  639. + restart m68k support
  640. }