cg64f32.pas 14 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the code generation for 64 bit int
  6. arithmethics on 32 bit processors
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. unit cg64f32;
  21. {$i defines.inc}
  22. interface
  23. uses
  24. aasm, cgobj, cpubase,node,symtype;
  25. type
  26. tcg64f32 = class(tcg)
  27. procedure a_load64_reg_ref(list : taasmoutput;reglo, reghi : tregister;const ref : treference);
  28. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reglo,reghi : tregister);
  29. procedure a_load64_reg_reg(list : taasmoutput;reglosrc,reghisrc,reglodst,reghidst : tregister);
  30. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reglo,reghi : tregister);
  31. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  32. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  33. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  34. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  35. { override to catch 64bit rangechecks }
  36. procedure g_rangecheck(list: taasmoutput; const p: tnode;
  37. const todef: tdef); override;
  38. private
  39. { produces range check code for 32bit processors when one of the }
  40. { operands is 64 bit }
  41. procedure g_rangecheck64(list : taasmoutput; p : tnode;todef : tdef);
  42. end;
  43. implementation
  44. uses
  45. globtype,globals,systems,
  46. cgbase,
  47. verbose,
  48. symbase,symconst,symdef,types,
  49. cpuinfo;
  50. procedure tcg64f32.a_load64_reg_ref(list : taasmoutput;reglo, reghi : tregister;const ref : treference);
  51. var
  52. tmpreg: tregister;
  53. tmpref: treference;
  54. begin
  55. if target_info.endian = endian_big then
  56. begin
  57. tmpreg := reglo;
  58. reglo := reghi;
  59. reghi := tmpreg;
  60. end;
  61. a_load_reg_ref(list,OS_32,reglo,ref);
  62. tmpref := ref;
  63. inc(tmpref.offset,4);
  64. a_load_reg_ref(list,OS_32,reghi,tmpref);
  65. end;
  66. procedure tcg64f32.a_load64_ref_reg(list : taasmoutput;const ref : treference;reglo,reghi : tregister);
  67. var
  68. tmpreg: tregister;
  69. tmpref: treference;
  70. begin
  71. if target_info.endian = endian_big then
  72. begin
  73. tmpreg := reglo;
  74. reglo := reghi;
  75. reghi := tmpreg;
  76. end;
  77. a_load_ref_reg(list,OS_32,ref,reglo);
  78. tmpref := ref;
  79. inc(tmpref.offset,4);
  80. a_load_ref_reg(list,OS_32,tmpref,reghi);
  81. end;
  82. procedure tcg64f32.a_load64_reg_reg(list : taasmoutput;reglosrc,reghisrc,reglodst,reghidst : tregister);
  83. begin
  84. a_load_reg_reg(list,OS_32,reglosrc,reglodst);
  85. a_load_reg_reg(list,OS_32,reghisrc,reghidst);
  86. end;
  87. procedure tcg64f32.a_load64_loc_reg(list : taasmoutput;const l : tlocation;reglo,reghi : tregister);
  88. begin
  89. case l.loc of
  90. LOC_REFERENCE, LOC_MEM:
  91. a_load64_ref_reg(list,l.reference,reglo,reghi);
  92. LOC_REGISTER,LOC_CREGISTER:
  93. a_load64_reg_reg(list,l.registerlow,l.registerhigh,reglo,reghi);
  94. else
  95. internalerror(200112292);
  96. end;
  97. end;
  98. procedure tcg64f32.a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  99. var
  100. tmpref: treference;
  101. begin
  102. if target_info.endian = endian_big then
  103. a_load_reg_ref(list,OS_32,reg,ref)
  104. else
  105. begin
  106. tmpref := ref;
  107. inc(tmpref.offset,4);
  108. a_load_reg_ref(list,OS_32,reg,tmpref)
  109. end;
  110. end;
  111. procedure tcg64f32.a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);
  112. var
  113. tmpref: treference;
  114. begin
  115. if target_info.endian = endian_little then
  116. a_load_reg_ref(list,OS_32,reg,ref)
  117. else
  118. begin
  119. tmpref := ref;
  120. inc(tmpref.offset,4);
  121. a_load_reg_ref(list,OS_32,reg,tmpref)
  122. end;
  123. end;
  124. procedure tcg64f32.a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  125. var
  126. tmpref: treference;
  127. begin
  128. if target_info.endian = endian_big then
  129. a_load_ref_reg(list,OS_32,ref,reg)
  130. else
  131. begin
  132. tmpref := ref;
  133. inc(tmpref.offset,4);
  134. a_load_ref_reg(list,OS_32,tmpref,reg)
  135. end;
  136. end;
  137. procedure tcg64f32.a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);
  138. var
  139. tmpref: treference;
  140. begin
  141. if target_info.endian = endian_little then
  142. a_load_ref_reg(list,OS_32,ref,reg)
  143. else
  144. begin
  145. tmpref := ref;
  146. inc(tmpref.offset,4);
  147. a_load_ref_reg(list,OS_32,tmpref,reg)
  148. end;
  149. end;
  150. procedure tcg64f32.g_rangecheck(list: taasmoutput; const p: tnode;
  151. const todef: tdef);
  152. begin
  153. { range checking on and range checkable value? }
  154. if not(cs_check_range in aktlocalswitches) or
  155. not(todef.deftype in [orddef,enumdef,arraydef]) then
  156. exit;
  157. { special case for 64bit rangechecks }
  158. if is_64bitint(p.resulttype.def) or is_64bitint(todef) then
  159. g_rangecheck64(list,p,todef)
  160. else
  161. inherited g_rangecheck(list,p,todef);
  162. end;
  163. procedure tcg64f32.g_rangecheck64(list : taasmoutput; p : tnode;todef : tdef);
  164. var
  165. neglabel,
  166. poslabel,
  167. endlabel: tasmlabel;
  168. hreg : tregister;
  169. hdef : torddef;
  170. fromdef : tdef;
  171. opsize : tcgsize;
  172. oldregisterdef: boolean;
  173. from_signed,to_signed: boolean;
  174. got_scratch: boolean;
  175. begin
  176. fromdef:=p.resulttype.def;
  177. from_signed := is_signed(fromdef);
  178. to_signed := is_signed(todef);
  179. if not is_64bitint(todef) then
  180. begin
  181. oldregisterdef := registerdef;
  182. registerdef := false;
  183. { get the high dword in a register }
  184. if p.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  185. begin
  186. hreg := p.location.registerhigh;
  187. got_scratch := false
  188. end
  189. else
  190. begin
  191. hreg := get_scratch_reg(list);
  192. got_scratch := true;
  193. a_load64high_ref_reg(list,p.location.reference,hreg);
  194. end;
  195. getlabel(poslabel);
  196. { check high dword, must be 0 (for positive numbers) }
  197. a_cmp_const_reg_label(list,OS_32,OC_EQ,0,hreg,poslabel);
  198. { It can also be $ffffffff, but only for negative numbers }
  199. if from_signed and to_signed then
  200. begin
  201. getlabel(neglabel);
  202. a_cmp_const_reg_label(list,OS_32,OC_EQ,aword(-1),hreg,neglabel);
  203. end;
  204. { !!! freeing of register should happen directly after compare! (JM) }
  205. if got_scratch then
  206. free_scratch_reg(list,hreg);
  207. { For all other values we have a range check error }
  208. a_call_name(list,'FPC_RANGEERROR',0);
  209. { if the high dword = 0, the low dword can be considered a }
  210. { simple cardinal }
  211. a_label(list,poslabel);
  212. hdef:=torddef.create(u32bit,0,cardinal($ffffffff));
  213. { the real p.resulttype.def is already saved in fromdef }
  214. p.resulttype.def := hdef;
  215. { no use in calling just "g_rangecheck" since that one will }
  216. { simply call the inherited method too (JM) }
  217. inherited g_rangecheck(list,p,todef);
  218. hdef.free;
  219. { restore original resulttype.def }
  220. p.resulttype.def := todef;
  221. if from_signed and to_signed then
  222. begin
  223. getlabel(endlabel);
  224. a_jmp_cond(list,OC_NONE,endlabel);
  225. { if the high dword = $ffffffff, then the low dword (when }
  226. { considered as a longint) must be < 0 }
  227. a_label(list,neglabel);
  228. if p.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  229. begin
  230. hreg := p.location.registerlow;
  231. got_scratch := false
  232. end
  233. else
  234. begin
  235. hreg := get_scratch_reg(list);
  236. got_scratch := true;
  237. a_load64low_ref_reg(list,p.location.reference,hreg);
  238. end;
  239. { get a new neglabel (JM) }
  240. getlabel(neglabel);
  241. a_cmp_const_reg_label(list,OS_32,OC_LT,0,hreg,neglabel);
  242. { !!! freeing of register should happen directly after compare! (JM) }
  243. if got_scratch then
  244. free_scratch_reg(list,hreg);
  245. a_call_name(list,'FPC_RANGEERROR',0);
  246. { if we get here, the 64bit value lies between }
  247. { longint($80000000) and -1 (JM) }
  248. a_label(list,neglabel);
  249. hdef:=torddef.create(s32bit,longint($80000000),-1);
  250. p.resulttype.def := hdef;
  251. inherited g_rangecheck(list,p,todef);
  252. hdef.free;
  253. a_label(list,endlabel);
  254. end;
  255. registerdef := oldregisterdef;
  256. p.resulttype.def := fromdef;
  257. { restore p's resulttype.def }
  258. end
  259. else
  260. { todef = 64bit int }
  261. { no 64bit subranges supported, so only a small check is necessary }
  262. { if both are signed or both are unsigned, no problem! }
  263. if (from_signed xor to_signed) and
  264. { also not if the fromdef is unsigned and < 64bit, since that will }
  265. { always fit in a 64bit int (todef is 64bit) }
  266. (from_signed or
  267. (torddef(fromdef).typ = u64bit)) then
  268. begin
  269. { in all cases, there is only a problem if the higest bit is set }
  270. if p.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  271. begin
  272. if is_64bitint(fromdef) then
  273. begin
  274. hreg := p.location.registerhigh;
  275. opsize := OS_32;
  276. end
  277. else
  278. begin
  279. hreg := p.location.register;
  280. opsize := def_cgsize(p.resulttype.def);
  281. end;
  282. got_scratch := false;
  283. end
  284. else
  285. begin
  286. hreg := get_scratch_reg(list);
  287. got_scratch := true;
  288. opsize := def_cgsize(p.resulttype.def);
  289. if opsize in [OS_64,OS_S64] then
  290. a_load64high_ref_reg(list,p.location.reference,hreg)
  291. else
  292. a_load_ref_reg(list,opsize,p.location.reference,hreg);
  293. end;
  294. getlabel(poslabel);
  295. a_cmp_const_reg_label(list,opsize,OC_GTE,0,hreg,poslabel);
  296. { !!! freeing of register should happen directly after compare! (JM) }
  297. if got_scratch then
  298. free_scratch_reg(list,hreg);
  299. a_call_name(list,'FPC_RANGEERROR',0);
  300. a_label(list,poslabel);
  301. end;
  302. end;
  303. (*
  304. procedure int64f32_assignment_int64_reg(p : passignmentnode);
  305. begin
  306. end;
  307. begin
  308. p2_assignment:=@int64f32_assignement_int64;
  309. *)
  310. end.
  311. {
  312. $Log$
  313. Revision 1.4 2002-03-04 19:10:11 peter
  314. * removed compiler warnings
  315. Revision 1.3 2002/01/24 12:33:52 jonas
  316. * adapted ranges of native types to int64 (e.g. high cardinal is no
  317. longer longint($ffffffff), but just $fffffff in psystem)
  318. * small additional fix in 64bit rangecheck code generation for 32 bit
  319. processors
  320. * adaption of ranges required the matching talgorithm used for selecting
  321. which overloaded procedure to call to be adapted. It should now always
  322. select the closest match for ordinal parameters.
  323. + inttostr(qword) in sysstr.inc/sysstrh.inc
  324. + abs(int64), sqr(int64), sqr(qword) in systemh.inc/generic.inc (previous
  325. fixes were required to be able to add them)
  326. * is_in_limit() moved from ncal to types unit, should always be used
  327. instead of direct comparisons of low/high values of orddefs because
  328. qword is a special case
  329. Revision 1.2 2001/12/30 17:24:48 jonas
  330. * range checking is now processor independent (part in cgobj,
  331. part in cg64f32) and should work correctly again (it needed
  332. some changes after the changes of the low and high of
  333. tordef's to int64)
  334. * maketojumpbool() is now processor independent (in ncgutil)
  335. * getregister32 is now called getregisterint
  336. Revision 1.1 2001/12/29 15:29:58 jonas
  337. * powerpc/cgcpu.pas compiles :)
  338. * several powerpc-related fixes
  339. * cpuasm unit is now based on common tainst unit
  340. + nppcmat unit for powerpc (almost complete)
  341. Revision 1.1 2000/07/13 06:30:07 michael
  342. + Initial import
  343. Revision 1.1 2000/03/01 15:36:13 florian
  344. * some new stuff for the new cg
  345. }