cgcpu.pas 69 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  74. procedure a_adjust_sp(list: TAsmList; value: longint);
  75. function GetLoad(const ref : treference) : tasmop;
  76. function GetStore(const ref: treference): tasmop;
  77. protected
  78. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  79. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  80. end;
  81. tcg64favr = class(tcg64f32)
  82. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  83. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  84. end;
  85. procedure create_codegen;
  86. const
  87. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  88. A_NONE,A_MULS,A_MUL,A_NEG,A_COM,A_OR,
  89. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  90. implementation
  91. uses
  92. globals,verbose,systems,cutils,
  93. fmodule,
  94. symconst,symsym,symtable,
  95. tgobj,rgobj,
  96. procinfo,cpupi,
  97. paramgr;
  98. procedure tcgavr.init_register_allocators;
  99. begin
  100. inherited init_register_allocators;
  101. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  102. [RS_R18,RS_R19,RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  103. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  104. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17],first_int_imreg,[]);
  105. end;
  106. procedure tcgavr.done_register_allocators;
  107. begin
  108. rg[R_INTREGISTER].free;
  109. // rg[R_ADDRESSREGISTER].free;
  110. inherited done_register_allocators;
  111. end;
  112. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  113. var
  114. tmp1,tmp2,tmp3 : TRegister;
  115. begin
  116. case size of
  117. OS_8,OS_S8:
  118. Result:=inherited getintregister(list, size);
  119. OS_16,OS_S16:
  120. begin
  121. Result:=inherited getintregister(list, OS_8);
  122. { ensure that the high register can be retrieved by
  123. GetNextReg
  124. }
  125. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  126. internalerror(2011021331);
  127. end;
  128. OS_32,OS_S32:
  129. begin
  130. Result:=inherited getintregister(list, OS_8);
  131. tmp1:=inherited getintregister(list, OS_8);
  132. { ensure that the high register can be retrieved by
  133. GetNextReg
  134. }
  135. if tmp1<>GetNextReg(Result) then
  136. internalerror(2011021332);
  137. tmp2:=inherited getintregister(list, OS_8);
  138. { ensure that the upper register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp2<>GetNextReg(tmp1) then
  142. internalerror(2011021333);
  143. tmp3:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp3<>GetNextReg(tmp2) then
  148. internalerror(2011021334);
  149. end;
  150. else
  151. internalerror(2011021330);
  152. end;
  153. end;
  154. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  155. begin
  156. Result:=getintregister(list,OS_ADDR);
  157. end;
  158. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  159. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  160. var
  161. ref : treference;
  162. begin
  163. paramanager.allocparaloc(list,paraloc);
  164. case paraloc^.loc of
  165. LOC_REGISTER,LOC_CREGISTER:
  166. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  167. LOC_REFERENCE,LOC_CREFERENCE:
  168. begin
  169. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  170. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  171. end;
  172. else
  173. internalerror(2002071004);
  174. end;
  175. end;
  176. var
  177. i, i2 : longint;
  178. hp : PCGParaLocation;
  179. begin
  180. { if use_push(cgpara) then
  181. begin
  182. if tcgsize2size[cgpara.Size] > 2 then
  183. begin
  184. if tcgsize2size[cgpara.Size] <> 4 then
  185. internalerror(2013031101);
  186. if cgpara.location^.Next = nil then
  187. begin
  188. if tcgsize2size[cgpara.location^.size] <> 4 then
  189. internalerror(2013031101);
  190. end
  191. else
  192. begin
  193. if tcgsize2size[cgpara.location^.size] <> 2 then
  194. internalerror(2013031101);
  195. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  196. internalerror(2013031101);
  197. if cgpara.location^.Next^.Next <> nil then
  198. internalerror(2013031101);
  199. end;
  200. if tcgsize2size[cgpara.size]>cgpara.alignment then
  201. pushsize:=cgpara.size
  202. else
  203. pushsize:=int_cgsize(cgpara.alignment);
  204. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  205. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  206. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  207. end
  208. else
  209. begin
  210. cgpara.check_simple_location;
  211. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  212. pushsize:=cgpara.location^.size
  213. else
  214. pushsize:=int_cgsize(cgpara.alignment);
  215. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  216. end;
  217. end
  218. else }
  219. begin
  220. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  221. internalerror(2014011101);
  222. hp:=cgpara.location;
  223. i:=0;
  224. while i<tcgsize2size[cgpara.Size] do
  225. begin
  226. if not(assigned(hp)) then
  227. internalerror(2014011102);
  228. inc(i, tcgsize2size[hp^.Size]);
  229. if hp^.Loc=LOC_REGISTER then
  230. begin
  231. load_para_loc(r,hp);
  232. hp:=hp^.Next;
  233. r:=GetNextReg(r);
  234. end
  235. else
  236. begin
  237. load_para_loc(r,hp);
  238. for i2:=1 to tcgsize2size[hp^.Size] do
  239. r:=GetNextReg(r);
  240. hp:=hp^.Next;
  241. end;
  242. end;
  243. if assigned(hp) then
  244. internalerror(2014011103);
  245. end;
  246. end;
  247. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  248. var
  249. i : longint;
  250. hp : PCGParaLocation;
  251. begin
  252. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  253. internalerror(2014011101);
  254. hp:=paraloc.location;
  255. for i:=1 to tcgsize2size[paraloc.Size] do
  256. begin
  257. if not(assigned(hp)) then
  258. internalerror(2014011105);
  259. case hp^.loc of
  260. LOC_REGISTER,LOC_CREGISTER:
  261. begin
  262. if (tcgsize2size[hp^.size]<>1) or
  263. (hp^.shiftval<>0) then
  264. internalerror(2015041101);
  265. a_load_const_reg(list,hp^.size,(a shr (8*(i-1))) and $ff,hp^.register);
  266. hp:=hp^.Next;
  267. end;
  268. LOC_REFERENCE,LOC_CREFERENCE:
  269. list.concat(taicpu.op_const(A_PUSH,(a shr (8*(i-1))) and $ff));
  270. else
  271. internalerror(2002071004);
  272. end;
  273. end;
  274. end;
  275. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  276. var
  277. tmpref, ref: treference;
  278. location: pcgparalocation;
  279. sizeleft: tcgint;
  280. begin
  281. location := paraloc.location;
  282. tmpref := r;
  283. sizeleft := paraloc.intsize;
  284. while assigned(location) do
  285. begin
  286. paramanager.allocparaloc(list,location);
  287. case location^.loc of
  288. LOC_REGISTER,LOC_CREGISTER:
  289. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  290. LOC_REFERENCE:
  291. begin
  292. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  293. { doubles in softemu mode have a strange order of registers and references }
  294. if location^.size=OS_32 then
  295. g_concatcopy(list,tmpref,ref,4)
  296. else
  297. begin
  298. g_concatcopy(list,tmpref,ref,sizeleft);
  299. if assigned(location^.next) then
  300. internalerror(2005010710);
  301. end;
  302. end;
  303. LOC_VOID:
  304. begin
  305. // nothing to do
  306. end;
  307. else
  308. internalerror(2002081103);
  309. end;
  310. inc(tmpref.offset,tcgsize2size[location^.size]);
  311. dec(sizeleft,tcgsize2size[location^.size]);
  312. location := location^.next;
  313. end;
  314. end;
  315. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  316. var
  317. tmpreg: tregister;
  318. begin
  319. tmpreg:=getaddressregister(list);
  320. a_loadaddr_ref_reg(list,r,tmpreg);
  321. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  322. end;
  323. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  324. begin
  325. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  326. list.concat(taicpu.op_sym(A_CALL,current_asmdata.RefAsmSymbol(s)))
  327. else
  328. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  329. include(current_procinfo.flags,pi_do_call);
  330. end;
  331. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  332. begin
  333. a_reg_alloc(list,NR_ZLO);
  334. a_reg_alloc(list,NR_ZHI);
  335. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  336. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  337. list.concat(taicpu.op_none(A_ICALL));
  338. a_reg_dealloc(list,NR_ZLO);
  339. a_reg_dealloc(list,NR_ZHI);
  340. include(current_procinfo.flags,pi_do_call);
  341. end;
  342. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  343. begin
  344. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  345. internalerror(2012102403);
  346. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  347. end;
  348. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  349. begin
  350. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  351. internalerror(2012102401);
  352. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  353. end;
  354. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  355. var
  356. countreg,
  357. tmpreg: tregister;
  358. i : integer;
  359. instr : taicpu;
  360. paraloc1,paraloc2,paraloc3 : TCGPara;
  361. l1,l2 : tasmlabel;
  362. pd : tprocdef;
  363. procedure NextSrcDst;
  364. begin
  365. if i=5 then
  366. begin
  367. dst:=dsthi;
  368. src:=srchi;
  369. end
  370. else
  371. begin
  372. dst:=GetNextReg(dst);
  373. src:=GetNextReg(src);
  374. end;
  375. end;
  376. { iterates TmpReg through all registers of dst }
  377. procedure NextTmp;
  378. begin
  379. if i=5 then
  380. tmpreg:=dsthi
  381. else
  382. tmpreg:=GetNextReg(tmpreg);
  383. end;
  384. begin
  385. case op of
  386. OP_ADD:
  387. begin
  388. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  389. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  390. begin
  391. for i:=2 to tcgsize2size[size] do
  392. begin
  393. NextSrcDst;
  394. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  395. end;
  396. end;
  397. end;
  398. OP_SUB:
  399. begin
  400. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  401. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  402. begin
  403. for i:=2 to tcgsize2size[size] do
  404. begin
  405. NextSrcDst;
  406. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  407. end;
  408. end;
  409. end;
  410. OP_NEG:
  411. begin
  412. if src<>dst then
  413. begin
  414. if size in [OS_S64,OS_64] then
  415. begin
  416. a_load_reg_reg(list,OS_32,OS_32,src,dst);
  417. a_load_reg_reg(list,OS_32,OS_32,srchi,dsthi);
  418. end
  419. else
  420. a_load_reg_reg(list,size,size,src,dst);
  421. end;
  422. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  423. begin
  424. tmpreg:=GetNextReg(dst);
  425. for i:=2 to tcgsize2size[size] do
  426. begin
  427. list.concat(taicpu.op_reg(A_COM,tmpreg));
  428. NextTmp;
  429. end;
  430. list.concat(taicpu.op_reg(A_NEG,dst));
  431. tmpreg:=GetNextReg(dst);
  432. for i:=2 to tcgsize2size[size] do
  433. begin
  434. list.concat(taicpu.op_reg_const(A_SBCI,tmpreg,-1));
  435. NextTmp;
  436. end;
  437. end;
  438. end;
  439. OP_NOT:
  440. begin
  441. for i:=1 to tcgsize2size[size] do
  442. begin
  443. if src<>dst then
  444. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  445. list.concat(taicpu.op_reg(A_COM,dst));
  446. NextSrcDst;
  447. end;
  448. end;
  449. OP_MUL,OP_IMUL:
  450. begin
  451. if size in [OS_8,OS_S8] then
  452. begin
  453. cg.a_reg_alloc(list,NR_R0);
  454. cg.a_reg_alloc(list,NR_R1);
  455. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  456. list.concat(taicpu.op_reg(A_CLR,NR_R1));
  457. cg.a_reg_dealloc(list,NR_R1);
  458. list.concat(taicpu.op_reg_reg(A_MOV,dst,NR_R0));
  459. cg.a_reg_dealloc(list,NR_R0);
  460. end
  461. else if size=OS_16 then
  462. begin
  463. pd:=search_system_proc('fpc_mul_word');
  464. paraloc1.init;
  465. paraloc2.init;
  466. paraloc3.init;
  467. paramanager.getintparaloc(list,pd,1,paraloc1);
  468. paramanager.getintparaloc(list,pd,2,paraloc2);
  469. paramanager.getintparaloc(list,pd,3,paraloc3);
  470. a_load_const_cgpara(list,OS_8,0,paraloc3);
  471. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  472. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  473. paramanager.freecgpara(list,paraloc3);
  474. paramanager.freecgpara(list,paraloc2);
  475. paramanager.freecgpara(list,paraloc1);
  476. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  477. a_call_name(list,'FPC_MUL_WORD',false);
  478. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  479. cg.a_reg_alloc(list,NR_R24);
  480. cg.a_reg_alloc(list,NR_R25);
  481. cg.a_load_reg_reg(list,OS_8,OS_8,NR_R24,dst);
  482. cg.a_reg_dealloc(list,NR_R24);
  483. cg.a_load_reg_reg(list,OS_8,OS_8,NR_R25,GetNextReg(dst));
  484. cg.a_reg_dealloc(list,NR_R25);
  485. paraloc3.done;
  486. paraloc2.done;
  487. paraloc1.done;
  488. end
  489. else
  490. internalerror(2011022002);
  491. end;
  492. OP_DIV,OP_IDIV:
  493. { special stuff, needs separate handling inside code }
  494. { generator }
  495. internalerror(2011022001);
  496. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  497. begin
  498. current_asmdata.getjumplabel(l1);
  499. current_asmdata.getjumplabel(l2);
  500. countreg:=getintregister(list,OS_8);
  501. a_load_reg_reg(list,size,OS_8,src,countreg);
  502. list.concat(taicpu.op_reg(A_TST,countreg));
  503. a_jmp_flags(list,F_EQ,l2);
  504. cg.a_label(list,l1);
  505. case op of
  506. OP_SHR:
  507. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  508. OP_SHL:
  509. list.concat(taicpu.op_reg(A_LSL,dst));
  510. OP_SAR:
  511. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  512. OP_ROR:
  513. begin
  514. { load carry? }
  515. if not(size in [OS_8,OS_S8]) then
  516. begin
  517. list.concat(taicpu.op_none(A_CLC));
  518. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  519. list.concat(taicpu.op_none(A_SEC));
  520. end;
  521. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  522. end;
  523. OP_ROL:
  524. begin
  525. { load carry? }
  526. if not(size in [OS_8,OS_S8]) then
  527. begin
  528. list.concat(taicpu.op_none(A_CLC));
  529. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  530. list.concat(taicpu.op_none(A_SEC));
  531. end;
  532. list.concat(taicpu.op_reg(A_ROL,dst))
  533. end;
  534. else
  535. internalerror(2011030901);
  536. end;
  537. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  538. begin
  539. for i:=2 to tcgsize2size[size] do
  540. begin
  541. case op of
  542. OP_ROR,
  543. OP_SHR:
  544. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  545. OP_ROL,
  546. OP_SHL:
  547. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  548. OP_SAR:
  549. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  550. else
  551. internalerror(2011030902);
  552. end;
  553. end;
  554. end;
  555. list.concat(taicpu.op_reg(A_DEC,countreg));
  556. a_jmp_flags(list,F_NE,l1);
  557. // keep registers alive
  558. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  559. cg.a_label(list,l2);
  560. end;
  561. OP_AND,OP_OR,OP_XOR:
  562. begin
  563. for i:=1 to tcgsize2size[size] do
  564. begin
  565. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  566. NextSrcDst;
  567. end;
  568. end;
  569. else
  570. internalerror(2011022004);
  571. end;
  572. end;
  573. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  574. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  575. var
  576. mask : qword;
  577. shift : byte;
  578. i : byte;
  579. tmpreg : tregister;
  580. tmpreg64 : tregister64;
  581. procedure NextReg;
  582. begin
  583. if i=5 then
  584. reg:=reghi
  585. else
  586. reg:=GetNextReg(reg);
  587. end;
  588. var
  589. curvalue : byte;
  590. begin
  591. mask:=$ff;
  592. shift:=0;
  593. case op of
  594. OP_OR:
  595. begin
  596. for i:=1 to tcgsize2size[size] do
  597. begin
  598. list.concat(taicpu.op_reg_const(A_ORI,reg,(qword(a) and mask) shr shift));
  599. NextReg;
  600. mask:=mask shl 8;
  601. inc(shift,8);
  602. end;
  603. end;
  604. OP_AND:
  605. begin
  606. for i:=1 to tcgsize2size[size] do
  607. begin
  608. list.concat(taicpu.op_reg_const(A_ANDI,reg,(qword(a) and mask) shr shift));
  609. NextReg;
  610. mask:=mask shl 8;
  611. inc(shift,8);
  612. end;
  613. end;
  614. OP_SUB:
  615. begin
  616. list.concat(taicpu.op_reg_const(A_SUBI,reg,a and mask));
  617. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  618. begin
  619. for i:=2 to tcgsize2size[size] do
  620. begin
  621. NextReg;
  622. mask:=mask shl 8;
  623. inc(shift,8);
  624. curvalue:=(qword(a) and mask) shr shift;
  625. { decrease pressure on upper half of registers by using SBC ...,R1 instead
  626. of SBCI ...,0 }
  627. if curvalue=0 then
  628. list.concat(taicpu.op_reg_reg(A_SBC,reg,NR_R1))
  629. else
  630. list.concat(taicpu.op_reg_const(A_SBCI,reg,curvalue));
  631. end;
  632. end;
  633. end;
  634. OP_ADD:
  635. begin
  636. curvalue:=a and mask;
  637. if curvalue=0 then
  638. list.concat(taicpu.op_reg_reg(A_ADD,reg,NR_R1))
  639. else
  640. begin
  641. tmpreg:=getintregister(list,OS_8);
  642. a_load_const_reg(list,OS_8,curvalue,tmpreg);
  643. list.concat(taicpu.op_reg_reg(A_ADD,reg,tmpreg));
  644. end;
  645. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  646. begin
  647. for i:=2 to tcgsize2size[size] do
  648. begin
  649. NextReg;
  650. mask:=mask shl 8;
  651. inc(shift,8);
  652. curvalue:=(qword(a) and mask) shr shift;
  653. { decrease pressure on upper half of registers by using ADC ...,R1 instead
  654. of ADD ...,0 }
  655. if curvalue=0 then
  656. list.concat(taicpu.op_reg_reg(A_ADC,reg,NR_R1))
  657. else
  658. begin
  659. tmpreg:=getintregister(list,OS_8);
  660. a_load_const_reg(list,OS_8,curvalue,tmpreg);
  661. list.concat(taicpu.op_reg_reg(A_ADC,reg,tmpreg));
  662. end;
  663. end;
  664. end;
  665. end;
  666. else
  667. begin
  668. if size in [OS_64,OS_S64] then
  669. begin
  670. tmpreg64.reglo:=getintregister(list,OS_32);
  671. tmpreg64.reghi:=getintregister(list,OS_32);
  672. cg64.a_load64_const_reg(list,a,tmpreg64);
  673. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  674. end
  675. else
  676. begin
  677. {$if 0}
  678. { code not working yet }
  679. if (op=OP_SAR) and (a=31) and (size in [OS_32,OS_S32]) then
  680. begin
  681. tmpreg:=reg;
  682. for i:=1 to 4 do
  683. begin
  684. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,NR_R1));
  685. tmpreg:=GetNextReg(tmpreg);
  686. end;
  687. end
  688. else
  689. {$endif}
  690. begin
  691. tmpreg:=getintregister(list,size);
  692. a_load_const_reg(list,size,a,tmpreg);
  693. a_op_reg_reg(list,op,size,tmpreg,reg);
  694. end;
  695. end;
  696. end;
  697. end;
  698. end;
  699. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  700. var
  701. mask : qword;
  702. shift : byte;
  703. i : byte;
  704. begin
  705. mask:=$ff;
  706. shift:=0;
  707. for i:=1 to tcgsize2size[size] do
  708. begin
  709. if ((qword(a) and mask) shr shift)=0 then
  710. emit_mov(list,reg,NR_R1)
  711. else
  712. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  713. mask:=mask shl 8;
  714. inc(shift,8);
  715. reg:=GetNextReg(reg);
  716. end;
  717. end;
  718. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  719. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  720. begin
  721. { allocate the register only, if a cpu register is passed }
  722. if getsupreg(reg)<first_int_imreg then
  723. getcpuregister(list,reg);
  724. end;
  725. var
  726. tmpref : treference;
  727. l : tasmlabel;
  728. begin
  729. Result:=ref;
  730. if ref.addressmode<>AM_UNCHANGED then
  731. internalerror(2011021701);
  732. { Be sure to have a base register }
  733. if (ref.base=NR_NO) then
  734. begin
  735. { only symbol+offset? }
  736. if ref.index=NR_NO then
  737. exit;
  738. ref.base:=ref.index;
  739. ref.index:=NR_NO;
  740. end;
  741. if assigned(ref.symbol) or (ref.offset<>0) then
  742. begin
  743. reference_reset(tmpref,0);
  744. tmpref.symbol:=ref.symbol;
  745. tmpref.offset:=ref.offset;
  746. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  747. tmpref.refaddr:=addr_lo8_gs
  748. else
  749. tmpref.refaddr:=addr_lo8;
  750. maybegetcpuregister(list,tmpreg);
  751. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  752. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  753. tmpref.refaddr:=addr_hi8_gs
  754. else
  755. tmpref.refaddr:=addr_hi8;
  756. maybegetcpuregister(list,GetNextReg(tmpreg));
  757. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  758. if (ref.base<>NR_NO) then
  759. begin
  760. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  761. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  762. end;
  763. if (ref.index<>NR_NO) then
  764. begin
  765. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  766. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  767. end;
  768. ref.symbol:=nil;
  769. ref.offset:=0;
  770. ref.base:=tmpreg;
  771. ref.index:=NR_NO;
  772. end
  773. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  774. begin
  775. maybegetcpuregister(list,tmpreg);
  776. emit_mov(list,tmpreg,ref.base);
  777. maybegetcpuregister(list,GetNextReg(tmpreg));
  778. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  779. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  780. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  781. ref.base:=tmpreg;
  782. ref.index:=NR_NO;
  783. end
  784. else if (ref.base<>NR_NO) then
  785. begin
  786. maybegetcpuregister(list,tmpreg);
  787. emit_mov(list,tmpreg,ref.base);
  788. maybegetcpuregister(list,GetNextReg(tmpreg));
  789. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  790. ref.base:=tmpreg;
  791. ref.index:=NR_NO;
  792. end
  793. else if (ref.index<>NR_NO) then
  794. begin
  795. maybegetcpuregister(list,tmpreg);
  796. emit_mov(list,tmpreg,ref.index);
  797. maybegetcpuregister(list,GetNextReg(tmpreg));
  798. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  799. ref.base:=tmpreg;
  800. ref.index:=NR_NO;
  801. end;
  802. Result:=ref;
  803. end;
  804. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  805. var
  806. href : treference;
  807. conv_done: boolean;
  808. tmpreg : tregister;
  809. i : integer;
  810. QuickRef : Boolean;
  811. begin
  812. QuickRef:=false;
  813. if not((Ref.addressmode=AM_UNCHANGED) and
  814. (Ref.symbol=nil) and
  815. ((Ref.base=NR_R28) or
  816. (Ref.base=NR_R29)) and
  817. (Ref.Index=NR_No) and
  818. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  819. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  820. href:=normalize_ref(list,Ref,NR_R30)
  821. else
  822. begin
  823. QuickRef:=true;
  824. href:=Ref;
  825. end;
  826. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  827. internalerror(2011021307);
  828. conv_done:=false;
  829. if tosize<>fromsize then
  830. begin
  831. conv_done:=true;
  832. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  833. fromsize:=tosize;
  834. case fromsize of
  835. OS_8:
  836. begin
  837. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  838. href.addressmode:=AM_POSTINCREMENT;
  839. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  840. for i:=2 to tcgsize2size[tosize] do
  841. begin
  842. if QuickRef then
  843. inc(href.offset);
  844. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  845. href.addressmode:=AM_POSTINCREMENT
  846. else
  847. href.addressmode:=AM_UNCHANGED;
  848. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  849. end;
  850. end;
  851. OS_S8:
  852. begin
  853. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  854. href.addressmode:=AM_POSTINCREMENT;
  855. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  856. if tcgsize2size[tosize]>1 then
  857. begin
  858. tmpreg:=getintregister(list,OS_8);
  859. emit_mov(list,tmpreg,NR_R1);
  860. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  861. list.concat(taicpu.op_reg(A_COM,tmpreg));
  862. for i:=2 to tcgsize2size[tosize] do
  863. begin
  864. if QuickRef then
  865. inc(href.offset);
  866. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  867. href.addressmode:=AM_POSTINCREMENT
  868. else
  869. href.addressmode:=AM_UNCHANGED;
  870. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  871. end;
  872. end;
  873. end;
  874. OS_16:
  875. begin
  876. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  877. href.addressmode:=AM_POSTINCREMENT;
  878. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  879. if QuickRef then
  880. inc(href.offset)
  881. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  882. href.addressmode:=AM_POSTINCREMENT
  883. else
  884. href.addressmode:=AM_UNCHANGED;
  885. reg:=GetNextReg(reg);
  886. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  887. for i:=3 to tcgsize2size[tosize] do
  888. begin
  889. if QuickRef then
  890. inc(href.offset);
  891. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  892. href.addressmode:=AM_POSTINCREMENT
  893. else
  894. href.addressmode:=AM_UNCHANGED;
  895. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  896. end;
  897. end;
  898. OS_S16:
  899. begin
  900. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  901. href.addressmode:=AM_POSTINCREMENT;
  902. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  903. if QuickRef then
  904. inc(href.offset)
  905. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  906. href.addressmode:=AM_POSTINCREMENT
  907. else
  908. href.addressmode:=AM_UNCHANGED;
  909. reg:=GetNextReg(reg);
  910. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  911. if tcgsize2size[tosize]>2 then
  912. begin
  913. tmpreg:=getintregister(list,OS_8);
  914. emit_mov(list,tmpreg,NR_R1);
  915. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  916. list.concat(taicpu.op_reg(A_COM,tmpreg));
  917. for i:=3 to tcgsize2size[tosize] do
  918. begin
  919. if QuickRef then
  920. inc(href.offset);
  921. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  922. href.addressmode:=AM_POSTINCREMENT
  923. else
  924. href.addressmode:=AM_UNCHANGED;
  925. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  926. end;
  927. end;
  928. end;
  929. else
  930. conv_done:=false;
  931. end;
  932. end;
  933. if not conv_done then
  934. begin
  935. for i:=1 to tcgsize2size[fromsize] do
  936. begin
  937. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  938. href.addressmode:=AM_POSTINCREMENT
  939. else
  940. href.addressmode:=AM_UNCHANGED;
  941. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  942. if QuickRef then
  943. inc(href.offset);
  944. reg:=GetNextReg(reg);
  945. end;
  946. end;
  947. if not(QuickRef) then
  948. begin
  949. ungetcpuregister(list,href.base);
  950. ungetcpuregister(list,GetNextReg(href.base));
  951. end;
  952. end;
  953. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  954. const Ref : treference;reg : tregister);
  955. var
  956. href : treference;
  957. conv_done: boolean;
  958. tmpreg : tregister;
  959. i : integer;
  960. QuickRef : boolean;
  961. begin
  962. QuickRef:=false;
  963. if not((Ref.addressmode=AM_UNCHANGED) and
  964. (Ref.symbol=nil) and
  965. ((Ref.base=NR_R28) or
  966. (Ref.base=NR_R29)) and
  967. (Ref.Index=NR_No) and
  968. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  969. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  970. href:=normalize_ref(list,Ref,NR_R30)
  971. else
  972. begin
  973. QuickRef:=true;
  974. href:=Ref;
  975. end;
  976. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  977. internalerror(2011021307);
  978. conv_done:=false;
  979. if tosize<>fromsize then
  980. begin
  981. conv_done:=true;
  982. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  983. fromsize:=tosize;
  984. case fromsize of
  985. OS_8:
  986. begin
  987. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  988. for i:=2 to tcgsize2size[tosize] do
  989. begin
  990. reg:=GetNextReg(reg);
  991. emit_mov(list,reg,NR_R1);
  992. end;
  993. end;
  994. OS_S8:
  995. begin
  996. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  997. tmpreg:=reg;
  998. if tcgsize2size[tosize]>1 then
  999. begin
  1000. reg:=GetNextReg(reg);
  1001. emit_mov(list,reg,NR_R1);
  1002. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  1003. list.concat(taicpu.op_reg(A_COM,reg));
  1004. tmpreg:=reg;
  1005. for i:=3 to tcgsize2size[tosize] do
  1006. begin
  1007. reg:=GetNextReg(reg);
  1008. emit_mov(list,reg,tmpreg);
  1009. end;
  1010. end;
  1011. end;
  1012. OS_16:
  1013. begin
  1014. if not(QuickRef) then
  1015. href.addressmode:=AM_POSTINCREMENT;
  1016. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1017. if QuickRef then
  1018. inc(href.offset);
  1019. href.addressmode:=AM_UNCHANGED;
  1020. reg:=GetNextReg(reg);
  1021. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1022. for i:=3 to tcgsize2size[tosize] do
  1023. begin
  1024. reg:=GetNextReg(reg);
  1025. emit_mov(list,reg,NR_R1);
  1026. end;
  1027. end;
  1028. OS_S16:
  1029. begin
  1030. if not(QuickRef) then
  1031. href.addressmode:=AM_POSTINCREMENT;
  1032. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1033. if QuickRef then
  1034. inc(href.offset);
  1035. href.addressmode:=AM_UNCHANGED;
  1036. reg:=GetNextReg(reg);
  1037. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1038. tmpreg:=reg;
  1039. reg:=GetNextReg(reg);
  1040. emit_mov(list,reg,NR_R1);
  1041. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  1042. list.concat(taicpu.op_reg(A_COM,reg));
  1043. tmpreg:=reg;
  1044. for i:=4 to tcgsize2size[tosize] do
  1045. begin
  1046. reg:=GetNextReg(reg);
  1047. emit_mov(list,reg,tmpreg);
  1048. end;
  1049. end;
  1050. else
  1051. conv_done:=false;
  1052. end;
  1053. end;
  1054. if not conv_done then
  1055. begin
  1056. for i:=1 to tcgsize2size[fromsize] do
  1057. begin
  1058. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  1059. href.addressmode:=AM_POSTINCREMENT
  1060. else
  1061. href.addressmode:=AM_UNCHANGED;
  1062. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1063. if QuickRef then
  1064. inc(href.offset);
  1065. reg:=GetNextReg(reg);
  1066. end;
  1067. end;
  1068. if not(QuickRef) then
  1069. begin
  1070. ungetcpuregister(list,href.base);
  1071. ungetcpuregister(list,GetNextReg(href.base));
  1072. end;
  1073. end;
  1074. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1075. var
  1076. conv_done: boolean;
  1077. tmpreg : tregister;
  1078. i : integer;
  1079. begin
  1080. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1081. internalerror(2011021310);
  1082. conv_done:=false;
  1083. if tosize<>fromsize then
  1084. begin
  1085. conv_done:=true;
  1086. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1087. fromsize:=tosize;
  1088. case fromsize of
  1089. OS_8:
  1090. begin
  1091. emit_mov(list,reg2,reg1);
  1092. for i:=2 to tcgsize2size[tosize] do
  1093. begin
  1094. reg2:=GetNextReg(reg2);
  1095. emit_mov(list,reg2,NR_R1);
  1096. end;
  1097. end;
  1098. OS_S8:
  1099. begin
  1100. emit_mov(list,reg2,reg1);
  1101. if tcgsize2size[tosize]>1 then
  1102. begin
  1103. reg2:=GetNextReg(reg2);
  1104. emit_mov(list,reg2,NR_R1);
  1105. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1106. list.concat(taicpu.op_reg(A_COM,reg2));
  1107. tmpreg:=reg2;
  1108. for i:=3 to tcgsize2size[tosize] do
  1109. begin
  1110. reg2:=GetNextReg(reg2);
  1111. emit_mov(list,reg2,tmpreg);
  1112. end;
  1113. end;
  1114. end;
  1115. OS_16:
  1116. begin
  1117. emit_mov(list,reg2,reg1);
  1118. reg1:=GetNextReg(reg1);
  1119. reg2:=GetNextReg(reg2);
  1120. emit_mov(list,reg2,reg1);
  1121. for i:=3 to tcgsize2size[tosize] do
  1122. begin
  1123. reg2:=GetNextReg(reg2);
  1124. emit_mov(list,reg2,NR_R1);
  1125. end;
  1126. end;
  1127. OS_S16:
  1128. begin
  1129. emit_mov(list,reg2,reg1);
  1130. reg1:=GetNextReg(reg1);
  1131. reg2:=GetNextReg(reg2);
  1132. emit_mov(list,reg2,reg1);
  1133. if tcgsize2size[tosize]>2 then
  1134. begin
  1135. reg2:=GetNextReg(reg2);
  1136. emit_mov(list,reg2,NR_R1);
  1137. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1138. list.concat(taicpu.op_reg(A_COM,reg2));
  1139. tmpreg:=reg2;
  1140. for i:=4 to tcgsize2size[tosize] do
  1141. begin
  1142. reg2:=GetNextReg(reg2);
  1143. emit_mov(list,reg2,tmpreg);
  1144. end;
  1145. end;
  1146. end;
  1147. else
  1148. conv_done:=false;
  1149. end;
  1150. end;
  1151. if not conv_done and (reg1<>reg2) then
  1152. begin
  1153. for i:=1 to tcgsize2size[fromsize] do
  1154. begin
  1155. emit_mov(list,reg2,reg1);
  1156. reg1:=GetNextReg(reg1);
  1157. reg2:=GetNextReg(reg2);
  1158. end;
  1159. end;
  1160. end;
  1161. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1162. begin
  1163. internalerror(2012010702);
  1164. end;
  1165. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1166. begin
  1167. internalerror(2012010703);
  1168. end;
  1169. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1170. begin
  1171. internalerror(2012010704);
  1172. end;
  1173. { comparison operations }
  1174. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1175. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1176. var
  1177. swapped : boolean;
  1178. tmpreg : tregister;
  1179. i : byte;
  1180. begin
  1181. if a=0 then
  1182. begin
  1183. swapped:=false;
  1184. { swap parameters? }
  1185. case cmp_op of
  1186. OC_GT:
  1187. begin
  1188. swapped:=true;
  1189. cmp_op:=OC_LT;
  1190. end;
  1191. OC_LTE:
  1192. begin
  1193. swapped:=true;
  1194. cmp_op:=OC_GTE;
  1195. end;
  1196. OC_BE:
  1197. begin
  1198. swapped:=true;
  1199. cmp_op:=OC_AE;
  1200. end;
  1201. OC_A:
  1202. begin
  1203. swapped:=true;
  1204. cmp_op:=OC_B;
  1205. end;
  1206. end;
  1207. if swapped then
  1208. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1209. else
  1210. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1211. for i:=2 to tcgsize2size[size] do
  1212. begin
  1213. reg:=GetNextReg(reg);
  1214. if swapped then
  1215. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1216. else
  1217. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1218. end;
  1219. a_jmp_cond(list,cmp_op,l);
  1220. end
  1221. else
  1222. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1223. end;
  1224. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1225. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1226. var
  1227. swapped : boolean;
  1228. tmpreg : tregister;
  1229. i : byte;
  1230. begin
  1231. swapped:=false;
  1232. { swap parameters? }
  1233. case cmp_op of
  1234. OC_GT:
  1235. begin
  1236. swapped:=true;
  1237. cmp_op:=OC_LT;
  1238. end;
  1239. OC_LTE:
  1240. begin
  1241. swapped:=true;
  1242. cmp_op:=OC_GTE;
  1243. end;
  1244. OC_BE:
  1245. begin
  1246. swapped:=true;
  1247. cmp_op:=OC_AE;
  1248. end;
  1249. OC_A:
  1250. begin
  1251. swapped:=true;
  1252. cmp_op:=OC_B;
  1253. end;
  1254. end;
  1255. if swapped then
  1256. begin
  1257. tmpreg:=reg1;
  1258. reg1:=reg2;
  1259. reg2:=tmpreg;
  1260. end;
  1261. list.concat(taicpu.op_reg_reg(A_CP,reg2,reg1));
  1262. for i:=2 to tcgsize2size[size] do
  1263. begin
  1264. reg1:=GetNextReg(reg1);
  1265. reg2:=GetNextReg(reg2);
  1266. list.concat(taicpu.op_reg_reg(A_CPC,reg2,reg1));
  1267. end;
  1268. a_jmp_cond(list,cmp_op,l);
  1269. end;
  1270. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1271. var
  1272. ai : taicpu;
  1273. begin
  1274. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1275. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s))
  1276. else
  1277. ai:=taicpu.op_sym(A_RJMP,current_asmdata.RefAsmSymbol(s));
  1278. ai.is_jmp:=true;
  1279. list.concat(ai);
  1280. end;
  1281. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1282. var
  1283. ai : taicpu;
  1284. begin
  1285. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1286. ai:=taicpu.op_sym(A_JMP,l)
  1287. else
  1288. ai:=taicpu.op_sym(A_RJMP,l);
  1289. ai.is_jmp:=true;
  1290. list.concat(ai);
  1291. end;
  1292. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1293. var
  1294. ai : taicpu;
  1295. begin
  1296. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1297. ai.is_jmp:=true;
  1298. list.concat(ai);
  1299. end;
  1300. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1301. var
  1302. l : TAsmLabel;
  1303. tmpflags : TResFlags;
  1304. begin
  1305. current_asmdata.getjumplabel(l);
  1306. {
  1307. if flags_to_cond(f) then
  1308. begin
  1309. tmpflags:=f;
  1310. inverse_flags(tmpflags);
  1311. emit_mov(reg,NR_R1);
  1312. a_jmp_flags(list,tmpflags,l);
  1313. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1314. end
  1315. else
  1316. }
  1317. begin
  1318. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1319. a_jmp_flags(list,f,l);
  1320. emit_mov(list,reg,NR_R1);
  1321. end;
  1322. cg.a_label(list,l);
  1323. end;
  1324. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1325. var
  1326. i : integer;
  1327. begin
  1328. case value of
  1329. 0:
  1330. ;
  1331. {-14..-1:
  1332. begin
  1333. if ((-value) mod 2)<>0 then
  1334. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1335. for i:=1 to (-value) div 2 do
  1336. list.concat(taicpu.op_const(A_RCALL,0));
  1337. end;
  1338. 1..7:
  1339. begin
  1340. for i:=1 to value do
  1341. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1342. end;}
  1343. else
  1344. begin
  1345. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1346. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1347. // get SREG
  1348. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1349. // block interrupts
  1350. list.concat(taicpu.op_none(A_CLI));
  1351. // write high SP
  1352. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1353. // release interrupts
  1354. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1355. // write low SP
  1356. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1357. end;
  1358. end;
  1359. end;
  1360. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1361. begin
  1362. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1363. result:=A_LDS
  1364. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1365. result:=A_LDD
  1366. else
  1367. result:=A_LD;
  1368. end;
  1369. function tcgavr.GetStore(const ref: treference) : tasmop;
  1370. begin
  1371. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1372. result:=A_STS
  1373. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1374. result:=A_STD
  1375. else
  1376. result:=A_ST;
  1377. end;
  1378. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1379. var
  1380. regs : tcpuregisterset;
  1381. reg : tsuperregister;
  1382. begin
  1383. if not(nostackframe) then
  1384. begin
  1385. { save int registers }
  1386. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1387. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1388. regs:=regs+[RS_R28,RS_R29];
  1389. for reg:=RS_R31 downto RS_R0 do
  1390. if reg in regs then
  1391. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1392. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1393. begin
  1394. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1395. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1396. end
  1397. else
  1398. { the framepointer cannot be omitted on avr because sp
  1399. is not a register but part of the i/o map
  1400. }
  1401. internalerror(2011021901);
  1402. a_adjust_sp(list,-localsize);
  1403. end;
  1404. end;
  1405. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1406. var
  1407. regs : tcpuregisterset;
  1408. reg : TSuperRegister;
  1409. LocalSize : longint;
  1410. begin
  1411. if not(nostackframe) then
  1412. begin
  1413. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1414. begin
  1415. LocalSize:=current_procinfo.calc_stackframe_size;
  1416. a_adjust_sp(list,LocalSize);
  1417. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1418. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1419. regs:=regs+[RS_R28,RS_R29];
  1420. for reg:=RS_R0 to RS_R31 do
  1421. if reg in regs then
  1422. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1423. end
  1424. else
  1425. { the framepointer cannot be omitted on avr because sp
  1426. is not a register but part of the i/o map
  1427. }
  1428. internalerror(2011021902);
  1429. end;
  1430. list.concat(taicpu.op_none(A_RET));
  1431. end;
  1432. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1433. var
  1434. tmpref : treference;
  1435. begin
  1436. if ref.addressmode<>AM_UNCHANGED then
  1437. internalerror(2011021701);
  1438. if assigned(ref.symbol) or (ref.offset<>0) then
  1439. begin
  1440. reference_reset(tmpref,0);
  1441. tmpref.symbol:=ref.symbol;
  1442. tmpref.offset:=ref.offset;
  1443. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  1444. tmpref.refaddr:=addr_lo8_gs
  1445. else
  1446. tmpref.refaddr:=addr_lo8;
  1447. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1448. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  1449. tmpref.refaddr:=addr_hi8_gs
  1450. else
  1451. tmpref.refaddr:=addr_hi8;
  1452. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1453. if (ref.base<>NR_NO) then
  1454. begin
  1455. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1456. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1457. end;
  1458. if (ref.index<>NR_NO) then
  1459. begin
  1460. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1461. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1462. end;
  1463. end
  1464. else if (ref.base<>NR_NO)then
  1465. begin
  1466. emit_mov(list,r,ref.base);
  1467. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1468. if (ref.index<>NR_NO) then
  1469. begin
  1470. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1471. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1472. end;
  1473. end
  1474. else if (ref.index<>NR_NO) then
  1475. begin
  1476. emit_mov(list,r,ref.index);
  1477. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1478. end;
  1479. end;
  1480. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1481. begin
  1482. internalerror(2011021320);
  1483. end;
  1484. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1485. var
  1486. paraloc1,paraloc2,paraloc3 : TCGPara;
  1487. pd : tprocdef;
  1488. begin
  1489. pd:=search_system_proc('MOVE');
  1490. paraloc1.init;
  1491. paraloc2.init;
  1492. paraloc3.init;
  1493. paramanager.getintparaloc(list,pd,1,paraloc1);
  1494. paramanager.getintparaloc(list,pd,2,paraloc2);
  1495. paramanager.getintparaloc(list,pd,3,paraloc3);
  1496. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1497. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1498. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1499. paramanager.freecgpara(list,paraloc3);
  1500. paramanager.freecgpara(list,paraloc2);
  1501. paramanager.freecgpara(list,paraloc1);
  1502. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1503. a_call_name_static(list,'FPC_MOVE');
  1504. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1505. paraloc3.done;
  1506. paraloc2.done;
  1507. paraloc1.done;
  1508. end;
  1509. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1510. var
  1511. countreg,tmpreg : tregister;
  1512. srcref,dstref : treference;
  1513. copysize,countregsize : tcgsize;
  1514. l : TAsmLabel;
  1515. i : longint;
  1516. SrcQuickRef, DestQuickRef : Boolean;
  1517. begin
  1518. if len>16 then
  1519. begin
  1520. current_asmdata.getjumplabel(l);
  1521. reference_reset(srcref,0);
  1522. reference_reset(dstref,0);
  1523. srcref.base:=NR_R30;
  1524. srcref.addressmode:=AM_POSTINCREMENT;
  1525. dstref.base:=NR_R26;
  1526. dstref.addressmode:=AM_POSTINCREMENT;
  1527. copysize:=OS_8;
  1528. if len<256 then
  1529. countregsize:=OS_8
  1530. else if len<65536 then
  1531. countregsize:=OS_16
  1532. else
  1533. internalerror(2011022007);
  1534. countreg:=getintregister(list,countregsize);
  1535. a_load_const_reg(list,countregsize,len,countreg);
  1536. a_loadaddr_ref_reg(list,source,NR_R30);
  1537. tmpreg:=getaddressregister(list);
  1538. a_loadaddr_ref_reg(list,dest,tmpreg);
  1539. { X is used for spilling code so we can load it
  1540. only by a push/pop sequence, this can be
  1541. optimized later on by the peephole optimizer
  1542. }
  1543. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1544. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1545. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1546. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1547. cg.a_label(list,l);
  1548. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1549. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1550. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1551. a_jmp_flags(list,F_NE,l);
  1552. // keep registers alive
  1553. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1554. end
  1555. else
  1556. begin
  1557. SrcQuickRef:=false;
  1558. DestQuickRef:=false;
  1559. if not((source.addressmode=AM_UNCHANGED) and
  1560. (source.symbol=nil) and
  1561. ((source.base=NR_R28) or
  1562. (source.base=NR_R29)) and
  1563. (source.Index=NR_NO) and
  1564. (source.Offset in [0..64-len])) and
  1565. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1566. srcref:=normalize_ref(list,source,NR_R30)
  1567. else
  1568. begin
  1569. SrcQuickRef:=true;
  1570. srcref:=source;
  1571. end;
  1572. if not((dest.addressmode=AM_UNCHANGED) and
  1573. (dest.symbol=nil) and
  1574. ((dest.base=NR_R28) or
  1575. (dest.base=NR_R29)) and
  1576. (dest.Index=NR_No) and
  1577. (dest.Offset in [0..64-len])) and
  1578. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1579. begin
  1580. if not(SrcQuickRef) then
  1581. begin
  1582. tmpreg:=getaddressregister(list);
  1583. dstref:=normalize_ref(list,dest,tmpreg);
  1584. { X is used for spilling code so we can load it
  1585. only by a push/pop sequence, this can be
  1586. optimized later on by the peephole optimizer
  1587. }
  1588. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1589. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1590. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1591. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1592. dstref.base:=NR_R26;
  1593. end
  1594. else
  1595. dstref:=normalize_ref(list,dest,NR_R30);
  1596. end
  1597. else
  1598. begin
  1599. DestQuickRef:=true;
  1600. dstref:=dest;
  1601. end;
  1602. for i:=1 to len do
  1603. begin
  1604. if not(SrcQuickRef) and (i<len) then
  1605. srcref.addressmode:=AM_POSTINCREMENT
  1606. else
  1607. srcref.addressmode:=AM_UNCHANGED;
  1608. if not(DestQuickRef) and (i<len) then
  1609. dstref.addressmode:=AM_POSTINCREMENT
  1610. else
  1611. dstref.addressmode:=AM_UNCHANGED;
  1612. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1613. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1614. if SrcQuickRef then
  1615. inc(srcref.offset);
  1616. if DestQuickRef then
  1617. inc(dstref.offset);
  1618. end;
  1619. if not(SrcQuickRef) then
  1620. begin
  1621. ungetcpuregister(list,srcref.base);
  1622. ungetcpuregister(list,GetNextReg(srcref.base));
  1623. end;
  1624. end;
  1625. end;
  1626. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1627. var
  1628. hl : tasmlabel;
  1629. ai : taicpu;
  1630. cond : TAsmCond;
  1631. begin
  1632. if not(cs_check_overflow in current_settings.localswitches) then
  1633. exit;
  1634. current_asmdata.getjumplabel(hl);
  1635. if not ((def.typ=pointerdef) or
  1636. ((def.typ=orddef) and
  1637. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1638. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1639. cond:=C_VC
  1640. else
  1641. cond:=C_CC;
  1642. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1643. ai.SetCondition(cond);
  1644. ai.is_jmp:=true;
  1645. list.concat(ai);
  1646. a_call_name(list,'FPC_OVERFLOW',false);
  1647. a_label(list,hl);
  1648. end;
  1649. procedure tcgavr.g_save_registers(list: TAsmList);
  1650. begin
  1651. { this is done by the entry code }
  1652. end;
  1653. procedure tcgavr.g_restore_registers(list: TAsmList);
  1654. begin
  1655. { this is done by the exit code }
  1656. end;
  1657. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1658. var
  1659. ai1,ai2 : taicpu;
  1660. hl : TAsmLabel;
  1661. begin
  1662. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1663. ai1.is_jmp:=true;
  1664. hl:=nil;
  1665. case cond of
  1666. OC_EQ:
  1667. ai1.SetCondition(C_EQ);
  1668. OC_GT:
  1669. begin
  1670. { emulate GT }
  1671. current_asmdata.getjumplabel(hl);
  1672. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1673. ai2.SetCondition(C_EQ);
  1674. ai2.is_jmp:=true;
  1675. list.concat(ai2);
  1676. ai1.SetCondition(C_GE);
  1677. end;
  1678. OC_LT:
  1679. ai1.SetCondition(C_LT);
  1680. OC_GTE:
  1681. ai1.SetCondition(C_GE);
  1682. OC_LTE:
  1683. begin
  1684. { emulate LTE }
  1685. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1686. ai2.SetCondition(C_EQ);
  1687. ai2.is_jmp:=true;
  1688. list.concat(ai2);
  1689. ai1.SetCondition(C_LT);
  1690. end;
  1691. OC_NE:
  1692. ai1.SetCondition(C_NE);
  1693. OC_BE:
  1694. begin
  1695. { emulate BE }
  1696. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1697. ai2.SetCondition(C_EQ);
  1698. ai2.is_jmp:=true;
  1699. list.concat(ai2);
  1700. ai1.SetCondition(C_LO);
  1701. end;
  1702. OC_B:
  1703. ai1.SetCondition(C_LO);
  1704. OC_AE:
  1705. ai1.SetCondition(C_SH);
  1706. OC_A:
  1707. begin
  1708. { emulate A (unsigned GT) }
  1709. current_asmdata.getjumplabel(hl);
  1710. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1711. ai2.SetCondition(C_EQ);
  1712. ai2.is_jmp:=true;
  1713. list.concat(ai2);
  1714. ai1.SetCondition(C_SH);
  1715. end;
  1716. else
  1717. internalerror(2011082501);
  1718. end;
  1719. list.concat(ai1);
  1720. if assigned(hl) then
  1721. a_label(list,hl);
  1722. end;
  1723. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1724. var
  1725. instr: taicpu;
  1726. begin
  1727. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1728. list.Concat(instr);
  1729. { Notify the register allocator that we have written a move instruction so
  1730. it can try to eliminate it. }
  1731. add_move_instruction(instr);
  1732. end;
  1733. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1734. begin
  1735. if not(size in [OS_S64,OS_64]) then
  1736. internalerror(2012102402);
  1737. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1738. end;
  1739. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1740. begin
  1741. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1742. end;
  1743. procedure create_codegen;
  1744. begin
  1745. cg:=tcgavr.create;
  1746. cg64:=tcg64favr.create;
  1747. end;
  1748. end.