arm.inc 8.5 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2003 by the Free Pascal development team.
  4. Processor dependent implementation for the system unit for
  5. ARM
  6. See the file COPYING.FPC, included in this distribution,
  7. for details about the copyright.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. **********************************************************************}
  12. {$asmmode gas}
  13. const
  14. cpu_has_edsp : boolean = false;
  15. in_edsp_test : boolean = false;
  16. procedure fpc_cpuinit;
  17. begin
  18. {$if not(defined(wince)) and not(defined(gba)) and not(defined(nds)) and not(defined(FPUSOFT)) and not(defined(FPULIBGCC))}
  19. asm
  20. rfs r0
  21. and r0,r0,#0xffe0ffff
  22. orr r0,r0,#0x00020000
  23. wfs r0
  24. end;
  25. {$endif}
  26. end;
  27. {$ifdef wince}
  28. function _controlfp(new: DWORD; mask: DWORD): DWORD; cdecl; external 'coredll';
  29. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  30. Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  31. begin
  32. softfloat_exception_flags:=0;
  33. softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
  34. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  35. { FPU precision 64 bit, rounding to nearest, affine infinity }
  36. _controlfp($000C0003, $030F031F);
  37. end;
  38. {$endif wince}
  39. {****************************************************************************
  40. stack frame related stuff
  41. ****************************************************************************}
  42. {$IFNDEF INTERNAL_BACKTRACE}
  43. {$define FPC_SYSTEM_HAS_GET_FRAME}
  44. function get_frame:pointer;assembler;nostackframe;{$ifdef SYSTEMINLINE}inline;{$endif}
  45. asm
  46. mov r0,r11
  47. end ['R0'];
  48. {$ENDIF not INTERNAL_BACKTRACE}
  49. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  50. function get_caller_addr(framebp:pointer):pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
  51. asm
  52. movs r0,r0
  53. beq .Lg_a_null
  54. ldr r0,[r0,#-4]
  55. .Lg_a_null:
  56. end ['R0'];
  57. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  58. function get_caller_frame(framebp:pointer):pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
  59. asm
  60. movs r0,r0
  61. beq .Lgnf_null
  62. ldr r0,[r0,#-12]
  63. .Lgnf_null:
  64. end ['R0'];
  65. {$define FPC_SYSTEM_HAS_SPTR}
  66. Function Sptr : pointer;assembler;{$ifdef SYSTEMINLINE}inline;{$endif}
  67. asm
  68. mov r0,sp
  69. end ['R0'];
  70. {$define FPC_SYSTEM_HAS_FILLCHAR}
  71. Procedure FillChar(var x;count:longint;value:byte);assembler;nostackframe;
  72. asm
  73. // less than 0?
  74. cmp r1,#0
  75. movlt pc,lr
  76. mov r3,r0
  77. cmp r1,#8 // at least 8 bytes to do?
  78. blt .LFillchar2
  79. orr r2,r2,r2,lsl #8
  80. orr r2,r2,r2,lsl #16
  81. .LFillchar0:
  82. tst r3,#3 // aligned yet?
  83. strneb r2,[r3],#1
  84. subne r1,r1,#1
  85. bne .LFillchar0
  86. mov ip,r2
  87. .LFillchar1:
  88. cmp r1,#8 // 8 bytes still to do?
  89. blt .LFillchar2
  90. stmia r3!,{r2,ip}
  91. sub r1,r1,#8
  92. cmp r1,#8 // 8 bytes still to do?
  93. blt .LFillchar2
  94. stmia r3!,{r2,ip}
  95. sub r1,r1,#8
  96. cmp r1,#8 // 8 bytes still to do?
  97. blt .LFillchar2
  98. stmia r3!,{r2,ip}
  99. sub r1,r1,#8
  100. cmp r1,#8 // 8 bytes still to do?
  101. stmgeia r3!,{r2,ip}
  102. subge r1,r1,#8
  103. bge .LFillchar1
  104. .LFillchar2:
  105. movs r1,r1 // anything left?
  106. moveq pc,lr
  107. rsb r1,r1,#7
  108. add pc,pc,r1,lsl #2
  109. mov r0,r0
  110. strb r2,[r3],#1
  111. strb r2,[r3],#1
  112. strb r2,[r3],#1
  113. strb r2,[r3],#1
  114. strb r2,[r3],#1
  115. strb r2,[r3],#1
  116. strb r2,[r3],#1
  117. mov pc,lr
  118. end;
  119. {$ifndef FPC_SYSTEM_HAS_MOVE}
  120. {$define FPC_SYSTEM_HAS_MOVE}
  121. {$define FPC_SYSTEM_FPC_MOVE}
  122. procedure Move_pld(const source;var dest;count:longint);assembler;nostackframe;
  123. asm
  124. pld [r0]
  125. pld [r1]
  126. // count <=0 ?
  127. cmp r2,#0
  128. movle pc,lr
  129. // overlap?
  130. cmp r1,r0
  131. bls .Lnooverlap
  132. add r3,r0,r2
  133. cmp r3,r1
  134. bls .Lnooverlap
  135. // overlap, copy backward
  136. .Loverlapped:
  137. subs r2,r2,#1
  138. ldrb r3,[r0,r2]
  139. strb r3,[r1,r2]
  140. bne .Loverlapped
  141. mov pc,lr
  142. .Lnooverlap:
  143. // less then 16 bytes to copy?
  144. cmp r2,#8
  145. // yes, the forget about the whole optimizations
  146. // and do a bytewise copy
  147. blt .Lbyteloop
  148. // both aligned?
  149. orr r3,r0,r1
  150. tst r3,#3
  151. bne .Lbyteloop
  152. (*
  153. // yes, then align
  154. // alignment to 4 byte boundries is enough
  155. ldrb ip,[r0],#1
  156. sub r2,r2,#1
  157. stb ip,[r1],#1
  158. tst r3,#2
  159. bne .Ldifferentaligned
  160. ldrh ip,[r0],#2
  161. sub r2,r2,#2
  162. sth ip,[r1],#2
  163. .Ldifferentaligned
  164. // qword aligned?
  165. orrs r3,r0,r1
  166. tst r3,#7
  167. bne .Ldwordloop
  168. *)
  169. pld [r0,#32]
  170. pld [r1,#32]
  171. .Ldwordloop:
  172. sub r2,r2,#4
  173. ldr r3,[r0],#4
  174. // preload
  175. pld [r0,#64]
  176. pld [r1,#64]
  177. cmp r2,#4
  178. str r3,[r1],#4
  179. bcs .Ldwordloop
  180. cmp r2,#0
  181. moveq pc,lr
  182. .Lbyteloop:
  183. subs r2,r2,#1
  184. ldrb r3,[r0],#1
  185. strb r3,[r1],#1
  186. bne .Lbyteloop
  187. mov pc,lr
  188. end;
  189. procedure Move_blended(const source;var dest;count:longint);assembler;nostackframe;
  190. asm
  191. // count <=0 ?
  192. cmp r2,#0
  193. movle pc,lr
  194. // overlap?
  195. cmp r1,r0
  196. bls .Lnooverlap
  197. add r3,r0,r2
  198. cmp r3,r1
  199. bls .Lnooverlap
  200. // overlap, copy backward
  201. .Loverlapped:
  202. subs r2,r2,#1
  203. ldrb r3,[r0,r2]
  204. strb r3,[r1,r2]
  205. bne .Loverlapped
  206. mov pc,lr
  207. .Lnooverlap:
  208. // less then 16 bytes to copy?
  209. cmp r2,#8
  210. // yes, the forget about the whole optimizations
  211. // and do a bytewise copy
  212. blt .Lbyteloop
  213. // both aligned?
  214. orr r3,r0,r1
  215. tst r3,#3
  216. bne .Lbyteloop
  217. (*
  218. // yes, then align
  219. // alignment to 4 byte boundries is enough
  220. ldrb ip,[r0],#1
  221. sub r2,r2,#1
  222. stb ip,[r1],#1
  223. tst r3,#2
  224. bne .Ldifferentaligned
  225. ldrh ip,[r0],#2
  226. sub r2,r2,#2
  227. sth ip,[r1],#2
  228. .Ldifferentaligned
  229. // qword aligned?
  230. orrs r3,r0,r1
  231. tst r3,#7
  232. bne .Ldwordloop
  233. *)
  234. .Ldwordloop:
  235. sub r2,r2,#4
  236. ldr r3,[r0],#4
  237. cmp r2,#4
  238. str r3,[r1],#4
  239. bcs .Ldwordloop
  240. cmp r2,#0
  241. moveq pc,lr
  242. .Lbyteloop:
  243. subs r2,r2,#1
  244. ldrb r3,[r0],#1
  245. strb r3,[r1],#1
  246. bne .Lbyteloop
  247. mov pc,lr
  248. end;
  249. const
  250. moveproc : pointer = @move_blended;
  251. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler;nostackframe;
  252. asm
  253. ldr ip,.Lmoveproc
  254. ldr pc,[ip]
  255. .Lmoveproc:
  256. .long moveproc
  257. end;
  258. {$endif FPC_SYSTEM_HAS_MOVE}
  259. var
  260. fpc_system_lock: longint; export name 'fpc_system_lock';
  261. function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
  262. asm
  263. // lock
  264. ldr r3, .Lfpc_system_lock
  265. mov r1, #1
  266. .Lloop:
  267. swp r2, r1, [r3]
  268. cmp r2, #0
  269. bne .Lloop
  270. // do the job
  271. ldr r1, [r0]
  272. sub r1, r1, #1
  273. str r1, [r0]
  274. mov r0, r1
  275. // unlock and return
  276. str r2, [r3]
  277. mov pc, lr
  278. .Lfpc_system_lock:
  279. .long fpc_system_lock
  280. end;
  281. function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
  282. asm
  283. // lock
  284. ldr r3, .Lfpc_system_lock
  285. mov r1, #1
  286. .Lloop:
  287. swp r2, r1, [r3]
  288. cmp r2, #0
  289. bne .Lloop
  290. // do the job
  291. ldr r1, [r0]
  292. add r1, r1, #1
  293. str r1, [r0]
  294. mov r0, r1
  295. // unlock and return
  296. str r2, [r3]
  297. mov pc, lr
  298. .Lfpc_system_lock:
  299. .long fpc_system_lock
  300. end;
  301. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  302. asm
  303. swp r1, r1, [r0]
  304. mov r0,r1
  305. end;
  306. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  307. asm
  308. // lock
  309. ldr r3, .Lfpc_system_lock
  310. mov r2, #1
  311. .Lloop:
  312. swp r2, r2, [r3]
  313. cmp r2, #0
  314. bne .Lloop
  315. // do the job
  316. ldr r2, [r0]
  317. add r1, r1, r2
  318. str r1, [r0]
  319. mov r0, r2
  320. // unlock and return
  321. mov r2, #0
  322. str r2, [r3]
  323. mov pc, lr
  324. .Lfpc_system_lock:
  325. .long fpc_system_lock
  326. end;
  327. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
  328. asm
  329. // lock
  330. ldr r12, .Lfpc_system_lock
  331. mov r3, #1
  332. .Lloop:
  333. swp r3, r3, [r12]
  334. cmp r3, #0
  335. bne .Lloop
  336. // do the job
  337. ldr r3, [r0]
  338. cmp r3, r2
  339. streq r1, [r0]
  340. mov r0, r3
  341. // unlock and return
  342. mov r3, #0
  343. str r3, [r12]
  344. mov pc, lr
  345. .Lfpc_system_lock:
  346. .long fpc_system_lock
  347. end;
  348. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  349. function declocked(var l: longint) : boolean; inline;
  350. begin
  351. Result:=InterLockedDecrement(l) = 0;
  352. end;
  353. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  354. procedure inclocked(var l: longint); inline;
  355. begin
  356. InterLockedIncrement(l);
  357. end;
  358. procedure fpc_cpucodeinit;
  359. begin
  360. cpu_has_edsp:=true;
  361. in_edsp_test:=true;
  362. asm
  363. pld [r0]
  364. end;
  365. in_edsp_test:=false;
  366. {$ifdef FPC_SYSTEM_FPC_MOVE}
  367. if cpu_has_edsp then
  368. moveproc:=@move_pld
  369. else
  370. moveproc:=@move_blended;
  371. {$endif FPC_SYSTEM_FPC_MOVE}
  372. end;