ncgset.pas 60 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. end;
  41. tcgcasenode = class(tcasenode)
  42. {
  43. Emits the case node statement. Contrary to the intel
  44. 80x86 version, this version does not emit jump tables,
  45. because of portability problems.
  46. }
  47. procedure pass_generate_code;override;
  48. protected
  49. with_sign : boolean;
  50. opsize : tdef;
  51. jmp_gt,jmp_lt,jmp_le : topcmp;
  52. { register with case expression }
  53. hregister,hregister2 : tregister;
  54. endlabel,elselabel : tasmlabel;
  55. { true, if we can omit the range check of the jump table }
  56. jumptable_no_range : boolean;
  57. { has the implementation jumptable support }
  58. min_label : tconstexprint;
  59. function blocklabel(id:longint):tasmlabel;
  60. procedure optimizevalues(var max_linear_list:aint;var max_dist:aword);virtual;
  61. function has_jumptable : boolean;virtual;
  62. procedure genjumptable(hp : pcaselabel;min_,max_ : aint); virtual;
  63. procedure genlinearlist(hp : pcaselabel); virtual;
  64. procedure genlinearcmplist(hp : pcaselabel); virtual;
  65. procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
  66. procedure genjmptree(root : pcaselabel); virtual;
  67. end;
  68. implementation
  69. uses
  70. systems,
  71. verbose,
  72. symconst,symdef,defutil,
  73. paramgr,
  74. procinfo,pass_2,tgobj,
  75. nbas,ncon,nflw,
  76. ncgutil,hlcgobj;
  77. {*****************************************************************************
  78. TCGSETELEMENTNODE
  79. *****************************************************************************}
  80. procedure tcgsetelementnode.pass_generate_code;
  81. begin
  82. { load the set element's value }
  83. secondpass(left);
  84. { also a second value ? }
  85. if assigned(right) then
  86. internalerror(2015111106);
  87. { we don't modify the left side, we only check the location type; our
  88. parent node (an add-node) will use the resulting location to perform
  89. the set operation without creating an intermediate set }
  90. location_copy(location,left.location);
  91. end;
  92. {*****************************************************************************
  93. *****************************************************************************}
  94. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  95. var
  96. compares,maxcompares:word;
  97. i:byte;
  98. begin
  99. analizeset:=false;
  100. fillchar(setparts,sizeof(setparts),0);
  101. numparts:=0;
  102. compares:=0;
  103. { Lots of comparisions take a lot of time, so do not allow
  104. too much comparisions. 8 comparisions are, however, still
  105. smalller than emitting the set }
  106. if cs_opt_size in current_settings.optimizerswitches then
  107. maxcompares:=8
  108. else
  109. maxcompares:=5;
  110. { when smallset is possible allow only 3 compares the smallset
  111. code is for littlesize also smaller when more compares are used }
  112. if is_small then
  113. maxcompares:=3;
  114. for i:=0 to 255 do
  115. if i in Aset then
  116. begin
  117. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  118. begin
  119. {Set element is a separate element.}
  120. inc(compares);
  121. if compares>maxcompares then
  122. exit;
  123. inc(numparts);
  124. setparts[numparts].range:=false;
  125. setparts[numparts].stop:=i;
  126. end
  127. else
  128. {Set element is part of a range.}
  129. if not setparts[numparts].range then
  130. begin
  131. {Transform an element into a range.}
  132. setparts[numparts].range:=true;
  133. setparts[numparts].start:=setparts[numparts].stop;
  134. setparts[numparts].stop:=i;
  135. { there's only one compare per range anymore. Only a }
  136. { sub is added, but that's much faster than a }
  137. { cmp/jcc combo so neglect its effect }
  138. { inc(compares);
  139. if compares>maxcompares then
  140. exit; }
  141. end
  142. else
  143. begin
  144. {Extend a range.}
  145. setparts[numparts].stop:=i;
  146. end;
  147. end;
  148. analizeset:=true;
  149. end;
  150. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  151. begin
  152. { location is always LOC_REGISTER }
  153. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  154. { allocate a register for the result }
  155. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  156. {**************************** SMALL SET **********************}
  157. if left.location.loc=LOC_CONSTANT then
  158. begin
  159. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  160. right.resultdef, resultdef,
  161. left.location.value-setbase, right.location,
  162. location.register);
  163. end
  164. else
  165. begin
  166. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  167. left.resultdef, opdef, true);
  168. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  169. setbase);
  170. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  171. right.resultdef, resultdef, left.location.register, right.location,
  172. location.register);
  173. end;
  174. end;
  175. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  176. begin
  177. { check if we can use smallset operation using btl which is limited
  178. to 32 bits, the left side may also not contain higher values !! }
  179. use_small:=is_smallset(right.resultdef) and
  180. not is_signed(left.resultdef) and
  181. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  182. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  183. { Can we generate jumps? Possible for all types of sets }
  184. checkgenjumps:=(right.nodetype=setconstn) and
  185. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  186. end;
  187. function tcginnode.pass_1: tnode;
  188. var
  189. setparts: Tsetparts;
  190. numparts: byte;
  191. use_small: boolean;
  192. begin
  193. result := inherited pass_1;
  194. if not(assigned(result)) and
  195. checkgenjumps(setparts,numparts,use_small) then
  196. expectloc := LOC_JUMP;
  197. end;
  198. procedure tcginnode.pass_generate_code;
  199. var
  200. adjustment,
  201. setbase : aint;
  202. l, l2 : tasmlabel;
  203. hr,
  204. pleftreg : tregister;
  205. setparts : Tsetparts;
  206. opsize : tcgsize;
  207. opdef : tdef;
  208. uopsize : tcgsize;
  209. uopdef : tdef;
  210. orgopsize : tcgsize;
  211. genjumps,
  212. use_small : boolean;
  213. i,numparts : byte;
  214. needslabel : Boolean;
  215. begin
  216. l2:=nil;
  217. { We check first if we can generate jumps, this can be done
  218. because the resultdef is already set in firstpass }
  219. genjumps := checkgenjumps(setparts,numparts,use_small);
  220. orgopsize := def_cgsize(left.resultdef);
  221. uopsize := OS_32;
  222. uopdef := u32inttype;
  223. if is_signed(left.resultdef) then
  224. begin
  225. opsize := OS_S32;
  226. opdef := s32inttype;
  227. end
  228. else
  229. begin
  230. opsize := uopsize;
  231. opdef := uopdef;
  232. end;
  233. needslabel := false;
  234. if not genjumps then
  235. { calculate both operators }
  236. { the complex one first }
  237. { not in case of genjumps, because then we don't secondpass }
  238. { right at all (so we have to make sure that "right" really is }
  239. { "right" and not "swapped left" in that case) }
  240. firstcomplex(self);
  241. secondpass(left);
  242. if (left.expectloc=LOC_JUMP)<>
  243. (left.location.loc=LOC_JUMP) then
  244. internalerror(2007070101);
  245. { Only process the right if we are not generating jumps }
  246. if not genjumps then
  247. secondpass(right);
  248. if codegenerror then
  249. exit;
  250. { ofcourse not commutative }
  251. if nf_swapped in flags then
  252. swapleftright;
  253. setbase:=tsetdef(right.resultdef).setbase;
  254. if genjumps then
  255. begin
  256. { location is always LOC_JUMP }
  257. current_asmdata.getjumplabel(l);
  258. current_asmdata.getjumplabel(l2);
  259. location_reset_jump(location,l,l2);
  260. { If register is used, use only lower 8 bits }
  261. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  262. pleftreg := left.location.register;
  263. { how much have we already substracted from the x in the }
  264. { "x in [y..z]" expression }
  265. adjustment := 0;
  266. hr:=NR_NO;
  267. for i:=1 to numparts do
  268. if setparts[i].range then
  269. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  270. begin
  271. { is the range different from all legal values? }
  272. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  273. begin
  274. { yes, is the lower bound <> 0? }
  275. if (setparts[i].start <> 0) then
  276. { we're going to substract from the left register, }
  277. { so in case of a LOC_CREGISTER first move the value }
  278. { to edi (not done before because now we can do the }
  279. { move and substract in one instruction with LEA) }
  280. if (left.location.loc = LOC_CREGISTER) and
  281. (hr<>pleftreg) then
  282. begin
  283. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  284. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  285. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  286. pleftreg:=hr;
  287. end
  288. else
  289. begin
  290. { otherwise, the value is already in a register }
  291. { that can be modified }
  292. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  293. setparts[i].start-adjustment,pleftreg)
  294. end;
  295. { new total value substracted from x: }
  296. { adjustment + (setparts[i].start - adjustment) }
  297. adjustment := setparts[i].start;
  298. { check if result < b-a+1 (not "result <= b-a", since }
  299. { we need a carry in case the element is in the range }
  300. { (this will never overflow since we check at the }
  301. { beginning whether stop-start <> 255) }
  302. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  303. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  304. end
  305. else
  306. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  307. { it's always true since "in" is only allowed for bytes }
  308. begin
  309. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  310. end;
  311. end
  312. else
  313. begin
  314. { Emit code to check if left is an element }
  315. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  316. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  317. end;
  318. { To compensate for not doing a second pass }
  319. right.location.reference.symbol:=nil;
  320. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  321. end
  322. else
  323. {*****************************************************************}
  324. { NO JUMP TABLE GENERATION }
  325. {*****************************************************************}
  326. begin
  327. { We will now generated code to check the set itself, no jmps,
  328. handle smallsets separate, because it allows faster checks }
  329. if use_small then
  330. begin
  331. in_smallset(opdef, setbase);
  332. end
  333. else
  334. {************************** NOT SMALL SET ********************}
  335. begin
  336. { location is always LOC_REGISTER }
  337. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  338. { allocate a register for the result }
  339. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  340. if right.location.loc=LOC_CONSTANT then
  341. begin
  342. { can it actually occur currently? CEC }
  343. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  344. { note: this code assumes that left in [0..255], which is a valid }
  345. { assumption (other cases will be caught by range checking) (JM) }
  346. { load left in register }
  347. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  348. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  349. { emit bit test operation -- warning: do not use
  350. location_force_reg() to force a set into a register, except
  351. to a register of the same size as the set. The reason is
  352. that on big endian systems, this would require moving the
  353. set to the most significant part of the new register,
  354. and location_force_register can't do that (it does not
  355. know the type).
  356. a_bit_test_reg_loc_reg() properly takes into account the
  357. size of the set to adjust the register index to test }
  358. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  359. uopdef,right.resultdef,uopdef,
  360. left.location.register,right.location,location.register);
  361. { now zero the result if left > nr_of_bits_in_right_register }
  362. hr := hlcg.getintregister(current_asmdata.CurrAsmList,uopdef);
  363. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  364. { (left.location.size = location.size at this point) }
  365. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef, tcgsize2size[opsize]*8, left.location.register, hr);
  366. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size[opsize]*8)-1, hr);
  367. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  368. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr, location.register);
  369. end { of right.location.loc=LOC_CONSTANT }
  370. { do search in a normal set which could have >32 elements
  371. but also used if the left side contains higher values > 32 }
  372. else if (left.location.loc=LOC_CONSTANT) then
  373. begin
  374. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  375. {should be caught earlier }
  376. internalerror(2007020402);
  377. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  378. right.location,location.register);
  379. end
  380. else
  381. begin
  382. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  383. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  384. pleftreg := left.location.register;
  385. if (opsize >= OS_S8) or { = if signed }
  386. ((left.resultdef.typ=orddef) and
  387. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  388. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  389. ((left.resultdef.typ=enumdef) and
  390. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  391. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  392. begin
  393. current_asmdata.getjumplabel(l);
  394. current_asmdata.getjumplabel(l2);
  395. needslabel := True;
  396. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  397. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  398. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  399. hlcg.a_label(current_asmdata.CurrAsmList, l);
  400. end;
  401. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  402. pleftreg,right.location,location.register);
  403. if needslabel then
  404. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  405. end;
  406. {$ifndef cpuhighleveltarget}
  407. location.size := def_cgsize(resultdef);
  408. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  409. {$else not cpuhighleveltarget}
  410. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  411. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  412. location.register:=hr;
  413. location.size := def_cgsize(resultdef);
  414. {$endif not cpuhighleveltarget}
  415. end;
  416. end;
  417. location_freetemp(current_asmdata.CurrAsmList, right.location);
  418. end;
  419. {*****************************************************************************
  420. TCGCASENODE
  421. *****************************************************************************}
  422. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  423. begin
  424. if not assigned(blocks[id]) then
  425. internalerror(200411301);
  426. result:=pcaseblock(blocks[id])^.blocklabel;
  427. end;
  428. procedure tcgcasenode.optimizevalues(var max_linear_list:aint;var max_dist:aword);
  429. begin
  430. { no changes by default }
  431. end;
  432. function tcgcasenode.has_jumptable : boolean;
  433. begin
  434. { No jumptable support in the default implementation }
  435. has_jumptable:=false;
  436. end;
  437. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : aint);
  438. begin
  439. internalerror(200209161);
  440. end;
  441. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  442. var
  443. first : boolean;
  444. last : TConstExprInt;
  445. scratch_reg: tregister;
  446. newsize: tcgsize;
  447. newdef: tdef;
  448. procedure genitem(t : pcaselabel);
  449. procedure gensub(value:tcgint);
  450. begin
  451. { here, since the sub and cmp are separate we need
  452. to move the result before subtract to help
  453. the register allocator
  454. }
  455. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  456. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  457. end;
  458. begin
  459. if assigned(t^.less) then
  460. genitem(t^.less);
  461. { do we need to test the first value? }
  462. if first and (t^._low>get_min_value(left.resultdef)) then
  463. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  464. if t^._low=t^._high then
  465. begin
  466. if t^._low-last=0 then
  467. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  468. else
  469. begin
  470. gensub(tcgint(t^._low.svalue-last.svalue));
  471. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  472. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  473. end;
  474. last:=t^._low;
  475. end
  476. else
  477. begin
  478. { it begins with the smallest label, if the value }
  479. { is even smaller then jump immediately to the }
  480. { ELSE-label }
  481. if first then
  482. begin
  483. { have we to ajust the first value ? }
  484. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  485. gensub(tcgint(t^._low.svalue));
  486. end
  487. else
  488. begin
  489. { if there is no unused label between the last and the }
  490. { present label then the lower limit can be checked }
  491. { immediately. else check the range in between: }
  492. gensub(tcgint(t^._low.svalue-last.svalue));
  493. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  494. end;
  495. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  496. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  497. last:=t^._high;
  498. end;
  499. first:=false;
  500. if assigned(t^.greater) then
  501. genitem(t^.greater);
  502. end;
  503. begin
  504. { do we need to generate cmps? }
  505. if (with_sign and (min_label<0)) then
  506. genlinearcmplist(hp)
  507. else
  508. begin
  509. { sign/zero extend the value to a full register before starting to
  510. subtract values, so that on platforms that don't have
  511. subregisters of the same size as the value we don't generate
  512. sign/zero-extensions after every subtraction
  513. make newsize always signed, since we only do this if the size in
  514. bytes of the register is larger than the original opsize, so
  515. the value can always be represented by a larger signed type }
  516. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  517. if tcgsize2size[newsize]>opsize.size then
  518. begin
  519. newdef:=cgsize_orddef(newsize);
  520. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  521. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  522. hregister:=scratch_reg;
  523. opsize:=newdef;
  524. end;
  525. last:=0;
  526. first:=true;
  527. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  528. genitem(hp);
  529. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  530. end;
  531. end;
  532. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  533. var
  534. last : TConstExprInt;
  535. lastwasrange: boolean;
  536. procedure genitem(t : pcaselabel);
  537. {$ifndef cpu64bitalu}
  538. var
  539. l1 : tasmlabel;
  540. {$endif not cpu64bitalu}
  541. begin
  542. if assigned(t^.less) then
  543. genitem(t^.less);
  544. if t^._low=t^._high then
  545. begin
  546. {$if defined(cpu32bitalu)}
  547. if def_cgsize(opsize) in [OS_S64,OS_64] then
  548. begin
  549. current_asmdata.getjumplabel(l1);
  550. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  551. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  552. cg.a_label(current_asmdata.CurrAsmList,l1);
  553. end
  554. else
  555. {$elseif defined(cpu16bitalu)}
  556. if def_cgsize(opsize) in [OS_S64,OS_64] then
  557. begin
  558. current_asmdata.getjumplabel(l1);
  559. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),GetNextReg(hregister2),l1);
  560. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  561. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),GetNextReg(hregister),l1);
  562. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  563. cg.a_label(current_asmdata.CurrAsmList,l1);
  564. end
  565. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  566. begin
  567. current_asmdata.getjumplabel(l1);
  568. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),GetNextReg(hregister),l1);
  569. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  570. cg.a_label(current_asmdata.CurrAsmList,l1);
  571. end
  572. else
  573. {$elseif defined(cpu8bitalu)}
  574. if def_cgsize(opsize) in [OS_S64,OS_64] then
  575. begin
  576. current_asmdata.getjumplabel(l1);
  577. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  578. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  579. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  580. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  581. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  582. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  583. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  584. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  585. cg.a_label(current_asmdata.CurrAsmList,l1);
  586. end
  587. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  588. begin
  589. current_asmdata.getjumplabel(l1);
  590. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  591. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  592. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  593. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  594. cg.a_label(current_asmdata.CurrAsmList,l1);
  595. end
  596. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  597. begin
  598. current_asmdata.getjumplabel(l1);
  599. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  600. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  601. cg.a_label(current_asmdata.CurrAsmList,l1);
  602. end
  603. else
  604. {$endif}
  605. begin
  606. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, aint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  607. end;
  608. { Reset last here, because we've only checked for one value and need to compare
  609. for the next range both the lower and upper bound }
  610. lastwasrange := false;
  611. end
  612. else
  613. begin
  614. { it begins with the smallest label, if the value }
  615. { is even smaller then jump immediately to the }
  616. { ELSE-label }
  617. if not lastwasrange or (t^._low-last>1) then
  618. begin
  619. {$if defined(cpu32bitalu)}
  620. if def_cgsize(opsize) in [OS_64,OS_S64] then
  621. begin
  622. current_asmdata.getjumplabel(l1);
  623. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  624. hregister2, elselabel);
  625. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  626. hregister2, l1);
  627. { the comparisation of the low dword must be always unsigned! }
  628. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  629. cg.a_label(current_asmdata.CurrAsmList,l1);
  630. end
  631. else
  632. {$elseif defined(cpu16bitalu)}
  633. if def_cgsize(opsize) in [OS_64,OS_S64] then
  634. begin
  635. current_asmdata.getjumplabel(l1);
  636. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  637. GetNextReg(hregister2), elselabel);
  638. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  639. GetNextReg(hregister2), l1);
  640. { the comparison of the low words must be always unsigned! }
  641. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  642. hregister2, elselabel);
  643. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  644. hregister2, l1);
  645. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  646. GetNextReg(hregister), elselabel);
  647. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  648. GetNextReg(hregister), l1);
  649. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  650. cg.a_label(current_asmdata.CurrAsmList,l1);
  651. end
  652. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  653. begin
  654. current_asmdata.getjumplabel(l1);
  655. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  656. GetNextReg(hregister), elselabel);
  657. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  658. GetNextReg(hregister), l1);
  659. { the comparisation of the low dword must be always unsigned! }
  660. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  661. cg.a_label(current_asmdata.CurrAsmList,l1);
  662. end
  663. else
  664. {$elseif defined(cpu8bitalu)}
  665. if def_cgsize(opsize) in [OS_64,OS_S64] then
  666. begin
  667. current_asmdata.getjumplabel(l1);
  668. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),elselabel);
  669. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  670. { the comparison of the low words must be always unsigned! }
  671. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),elselabel);
  672. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  673. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),elselabel);
  674. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),GetNextReg(hregister2),l1);
  675. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  676. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  677. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  678. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  679. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),elselabel);
  680. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  681. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),elselabel);
  682. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),GetNextReg(hregister),l1);
  683. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  684. cg.a_label(current_asmdata.CurrAsmList,l1);
  685. end
  686. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  687. begin
  688. current_asmdata.getjumplabel(l1);
  689. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),elselabel);
  690. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  691. { the comparison of the low words must be always unsigned! }
  692. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),elselabel);
  693. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  694. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),elselabel);
  695. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),GetNextReg(hregister),l1);
  696. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  697. cg.a_label(current_asmdata.CurrAsmList,l1);
  698. end
  699. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  700. begin
  701. current_asmdata.getjumplabel(l1);
  702. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),elselabel);
  703. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),GetNextReg(hregister),l1);
  704. { the comparisation of the low dword must be always unsigned! }
  705. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  706. cg.a_label(current_asmdata.CurrAsmList,l1);
  707. end
  708. else
  709. {$endif}
  710. begin
  711. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, aint(t^._low.svalue), hregister,
  712. elselabel);
  713. end;
  714. end;
  715. {$if defined(cpu32bitalu)}
  716. if def_cgsize(opsize) in [OS_S64,OS_64] then
  717. begin
  718. current_asmdata.getjumplabel(l1);
  719. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  720. blocklabel(t^.blockid));
  721. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  722. l1);
  723. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  724. cg.a_label(current_asmdata.CurrAsmList,l1);
  725. end
  726. else
  727. {$elseif defined(cpu16bitalu)}
  728. if def_cgsize(opsize) in [OS_S64,OS_64] then
  729. begin
  730. current_asmdata.getjumplabel(l1);
  731. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  732. blocklabel(t^.blockid));
  733. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
  734. l1);
  735. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  736. blocklabel(t^.blockid));
  737. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  738. l1);
  739. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  740. blocklabel(t^.blockid));
  741. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
  742. l1);
  743. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  744. cg.a_label(current_asmdata.CurrAsmList,l1);
  745. end
  746. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  747. begin
  748. current_asmdata.getjumplabel(l1);
  749. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  750. blocklabel(t^.blockid));
  751. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
  752. l1);
  753. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  754. cg.a_label(current_asmdata.CurrAsmList,l1);
  755. end
  756. else
  757. {$elseif defined(cpu8bitalu)}
  758. if def_cgsize(opsize) in [OS_S64,OS_64] then
  759. begin
  760. current_asmdata.getjumplabel(l1);
  761. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),blocklabel(t^.blockid));
  762. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister2))),l1);
  763. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),blocklabel(t^.blockid));
  764. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister2)),l1);
  765. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),blocklabel(t^.blockid));
  766. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),GetNextReg(hregister2),l1);
  767. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  768. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  769. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  770. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  771. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  772. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),GetNextReg(GetNextReg(hregister)),l1);
  773. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),blocklabel(t^.blockid));
  774. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),GetNextReg(hregister),l1);
  775. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  776. cg.a_label(current_asmdata.CurrAsmList,l1);
  777. end
  778. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  779. begin
  780. current_asmdata.getjumplabel(l1);
  781. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),blocklabel(t^.blockid));
  782. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(GetNextReg(hregister))),l1);
  783. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),blocklabel(t^.blockid));
  784. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),GetNextReg(GetNextReg(hregister)),l1);
  785. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),blocklabel(t^.blockid));
  786. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),GetNextReg(hregister),l1);
  787. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  788. cg.a_label(current_asmdata.CurrAsmList,l1);
  789. end
  790. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  791. begin
  792. current_asmdata.getjumplabel(l1);
  793. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),blocklabel(t^.blockid));
  794. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),GetNextReg(hregister),l1);
  795. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  796. cg.a_label(current_asmdata.CurrAsmList,l1);
  797. end
  798. else
  799. {$endif}
  800. begin
  801. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, aint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  802. end;
  803. last:=t^._high;
  804. lastwasrange := true;
  805. end;
  806. if assigned(t^.greater) then
  807. genitem(t^.greater);
  808. end;
  809. begin
  810. last:=0;
  811. lastwasrange:=false;
  812. genitem(hp);
  813. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  814. end;
  815. procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
  816. var
  817. lesslabel,greaterlabel : tasmlabel;
  818. less,greater : pcaselabel;
  819. begin
  820. current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
  821. cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
  822. { calculate labels for left and right }
  823. if p^.less=nil then
  824. lesslabel:=elselabel
  825. else
  826. lesslabel:=p^.less^.labellabel;
  827. if p^.greater=nil then
  828. greaterlabel:=elselabel
  829. else
  830. greaterlabel:=p^.greater^.labellabel;
  831. { calculate labels for left and right }
  832. { no range label: }
  833. if p^._low=p^._high then
  834. begin
  835. if greaterlabel=lesslabel then
  836. begin
  837. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel);
  838. end
  839. else
  840. begin
  841. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
  842. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
  843. end;
  844. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  845. end
  846. else
  847. begin
  848. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
  849. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
  850. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  851. end;
  852. if assigned(p^.less) then
  853. genjmptreeentry(p^.less,p^._low);
  854. if assigned(p^.greater) then
  855. genjmptreeentry(p^.greater,p^._high);
  856. end;
  857. procedure tcgcasenode.genjmptree(root : pcaselabel);
  858. type
  859. tlabelarrayentry = record
  860. caselabel : pcaselabel;
  861. asmlabel : TAsmLabel;
  862. end;
  863. tlabelarray = array of tlabelarrayentry;
  864. var
  865. labelarray : tlabelarray;
  866. var
  867. nextarrayentry : int64;
  868. i : longint;
  869. procedure addarrayentry(entry : pcaselabel);
  870. begin
  871. if assigned(entry^.less) then
  872. addarrayentry(entry^.less);
  873. with labelarray[nextarrayentry] do
  874. begin
  875. caselabel:=entry;
  876. current_asmdata.getjumplabel(asmlabel);
  877. end;
  878. inc(nextarrayentry);
  879. if assigned(entry^.greater) then
  880. addarrayentry(entry^.greater);
  881. end;
  882. { rebuild the label tree balanced }
  883. procedure rebuild(first,last : int64;var p : pcaselabel);
  884. var
  885. current : int64;
  886. begin
  887. current:=(first+last) div 2;
  888. p:=labelarray[current].caselabel;
  889. if first<current then
  890. rebuild(first,current-1,p^.less)
  891. else
  892. p^.less:=nil;
  893. if last>current then
  894. rebuild(current+1,last,p^.greater)
  895. else
  896. p^.greater:=nil;
  897. end;
  898. begin
  899. SetLength(labelarray,case_count_labels(root));
  900. nextarrayentry:=0;
  901. addarrayentry(root);
  902. rebuild(0,high(labelarray),root);
  903. for i:=0 to high(labelarray) do
  904. current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
  905. genjmptreeentry(root,root^._high+10);
  906. end;
  907. procedure tcgcasenode.pass_generate_code;
  908. var
  909. oldflowcontrol: tflowcontrol;
  910. i : longint;
  911. distv,
  912. lv,hv,
  913. max_label: tconstexprint;
  914. labelcnt : tcgint;
  915. max_linear_list : aint;
  916. max_dist,
  917. dist : aword;
  918. oldexecutionweight : longint;
  919. begin
  920. location_reset(location,LOC_VOID,OS_NO);
  921. oldflowcontrol := flowcontrol;
  922. include(flowcontrol,fc_inflowcontrol);
  923. { Allocate labels }
  924. current_asmdata.getjumplabel(endlabel);
  925. current_asmdata.getjumplabel(elselabel);
  926. for i:=0 to blocks.count-1 do
  927. current_asmdata.getjumplabel(pcaseblock(blocks[i])^.blocklabel);
  928. with_sign:=is_signed(left.resultdef);
  929. if with_sign then
  930. begin
  931. jmp_gt:=OC_GT;
  932. jmp_lt:=OC_LT;
  933. jmp_le:=OC_LTE;
  934. end
  935. else
  936. begin
  937. jmp_gt:=OC_A;
  938. jmp_lt:=OC_B;
  939. jmp_le:=OC_BE;
  940. end;
  941. secondpass(left);
  942. if (left.expectloc=LOC_JUMP)<>
  943. (left.location.loc=LOC_JUMP) then
  944. internalerror(2006050501);
  945. { determines the size of the operand }
  946. opsize:=left.resultdef;
  947. { copy the case expression to a register }
  948. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  949. {$ifndef cpu64bitalu}
  950. if def_cgsize(opsize) in [OS_S64,OS_64] then
  951. begin
  952. hregister:=left.location.register64.reglo;
  953. hregister2:=left.location.register64.reghi;
  954. end
  955. else
  956. {$endif not cpu64bitalu}
  957. hregister:=left.location.register;
  958. { we need the min_label always to choose between }
  959. { cmps and subs/decs }
  960. min_label:=case_get_min(labels);
  961. { Generate the jumps }
  962. {$ifdef OLDREGVARS}
  963. load_all_regvars(current_asmdata.CurrAsmList);
  964. {$endif OLDREGVARS}
  965. {$ifndef cpu64bitalu}
  966. if def_cgsize(opsize) in [OS_64,OS_S64] then
  967. genlinearcmplist(labels)
  968. else
  969. {$endif not cpu64bitalu}
  970. begin
  971. if cs_opt_level1 in current_settings.optimizerswitches then
  972. begin
  973. { procedures are empirically passed on }
  974. { consumption can also be calculated }
  975. { but does it pay on the different }
  976. { processors? }
  977. { moreover can the size only be appro- }
  978. { ximated as it is not known if rel8, }
  979. { rel16 or rel32 jumps are used }
  980. max_label:=case_get_max(labels);
  981. labelcnt:=case_count_labels(labels);
  982. { can we omit the range check of the jump table ? }
  983. getrange(left.resultdef,lv,hv);
  984. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  985. { hack a little bit, because the range can be greater }
  986. { than the positive range of a aint }
  987. if (min_label<0) and (max_label>0) then
  988. distv:=max_label+min_label
  989. else
  990. distv:=max_label-min_label;
  991. if (distv>=0) then
  992. dist:=distv.uvalue
  993. else
  994. dist:=-distv.svalue;
  995. { optimize for size ? }
  996. if cs_opt_size in current_settings.optimizerswitches then
  997. begin
  998. if has_jumptable and
  999. (min_label>=int64(low(aint))) and
  1000. (max_label<=high(aint)) and
  1001. not((labelcnt<=2) or
  1002. ((max_label-min_label)<0) or
  1003. ((max_label-min_label)>3*labelcnt)) then
  1004. begin
  1005. { if the labels less or more a continuum then }
  1006. genjumptable(labels,min_label.svalue,max_label.svalue);
  1007. end
  1008. else
  1009. begin
  1010. { a linear list is always smaller than a jump tree }
  1011. genlinearlist(labels);
  1012. end;
  1013. end
  1014. else
  1015. begin
  1016. max_dist:=4*labelcnt;
  1017. if jumptable_no_range then
  1018. max_linear_list:=4
  1019. else
  1020. max_linear_list:=2;
  1021. { allow processor specific values }
  1022. optimizevalues(max_linear_list,max_dist);
  1023. if (labelcnt<=max_linear_list) then
  1024. genlinearlist(labels)
  1025. else
  1026. begin
  1027. if (has_jumptable) and
  1028. (dist<max_dist) and
  1029. (min_label>=int64(low(aint))) and
  1030. (max_label<=high(aint)) then
  1031. genjumptable(labels,min_label.svalue,max_label.svalue)
  1032. { value has been determined on an i7-4770 using a random case with random values
  1033. if more values are known, this can be handled depending on the target CPU
  1034. Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
  1035. a good value }
  1036. else if labelcnt>=64 then
  1037. genjmptree(labels)
  1038. else
  1039. genlinearlist(labels);
  1040. end;
  1041. end;
  1042. end
  1043. else
  1044. { it's always not bad }
  1045. genlinearlist(labels);
  1046. end;
  1047. { estimates the repeat of each instruction }
  1048. oldexecutionweight:=cg.executionweight;
  1049. cg.executionweight:=cg.executionweight div case_count_labels(labels);
  1050. if cg.executionweight<1 then
  1051. cg.executionweight:=1;
  1052. { generate the instruction blocks }
  1053. for i:=0 to blocks.count-1 do
  1054. begin
  1055. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1056. cg.a_label(current_asmdata.CurrAsmList,pcaseblock(blocks[i])^.blocklabel);
  1057. secondpass(pcaseblock(blocks[i])^.statement);
  1058. { don't come back to case line }
  1059. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  1060. {$ifdef OLDREGVARS}
  1061. load_all_regvars(current_asmdata.CurrAsmList);
  1062. {$endif OLDREGVARS}
  1063. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  1064. end;
  1065. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1066. { ...and the else block }
  1067. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  1068. if assigned(elseblock) then
  1069. begin
  1070. secondpass(elseblock);
  1071. {$ifdef OLDREGVARS}
  1072. load_all_regvars(current_asmdata.CurrAsmList);
  1073. {$endif OLDREGVARS}
  1074. end;
  1075. cg.executionweight:=oldexecutionweight;
  1076. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1077. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  1078. { Reset labels }
  1079. for i:=0 to blocks.count-1 do
  1080. pcaseblock(blocks[i])^.blocklabel:=nil;
  1081. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  1082. end;
  1083. begin
  1084. csetelementnode:=tcgsetelementnode;
  1085. cinnode:=tcginnode;
  1086. ccasenode:=tcgcasenode;
  1087. end.