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aopt386.pas
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85d63d9fa9
* settings refactored
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19 years ago |
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cgcpu.pas
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a0723ccfd5
* also check if ECX is nonvolatile in is_ecx_used. Not strictly necessary for the current set of i386 calling conventions, but good as an extra safety precaution in case new calling conventions are added or the code is adapted and used on other platforms.
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12 years ago |
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cpubase.inc
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c48d572996
Implement support for saving and restoring address registers.
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12 years ago |
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cpuelf.pas
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c2fed960c9
* Add android to supported targets for assemblers. It fixes assembling for i386-android.
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12 years ago |
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cpuinfo.pas
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e81d2d1f3b
* basic avx support for floating point operations (use -Cfavx to activate)
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12 years ago |
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cpunode.pas
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6165536b5e
+ added {$modeswitch objectivec1}/-Mobjectivec1 mode switch to enable
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16 years ago |
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cpupara.pas
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7f2750f188
* missing part of r24776, using a build server also has pitfalls :/
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12 years ago |
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cpupi.pas
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b1dc518ac4
* removed systems_need_16_byte_stack_alignment and use target_info.stackalign instead
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13 years ago |
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cputarg.pas
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d26f0552a0
* Sync with trunk r23404.
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12 years ago |
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csopt386.pas
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6f1f21c432
* optbase empty skeleton removed with two dependancies. Duplicate unit name caused problems.
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16 years ago |
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daopt386.pas
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283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
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13 years ago |
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hlcgcpu.pas
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12ad6704f6
- Removed a number of unused variables, reduces noise at compilation.
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13 years ago |
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i386att.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 years ago |
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i386atts.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 years ago |
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i386int.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 years ago |
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i386nop.inc
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0f69362edd
- rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction,
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12 years ago |
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i386op.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 years ago |
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i386prop.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 years ago |
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i386tab.inc
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0f69362edd
- rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction,
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12 years ago |
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n386add.pas
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e10a95bf16
- removed unneeded firstcomplex calls, pass_left_right calls already firstcomplex
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13 years ago |
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n386cal.pas
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e13e2e1697
* Turn off special handling of interrupt calling convention for i386-android.
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12 years ago |
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n386inl.pas
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790a4fe2d3
* log and id tags removed
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20 years ago |
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n386mat.pas
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edd42aa42a
* moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for
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13 years ago |
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n386mem.pas
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b0f7786782
+ added support for special versions of near data pointers associated with a x86 segment register. They are supported on all x86 platforms: i8086, i386 and x86_64
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12 years ago |
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n386set.pas
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d0db391d7c
* cleanup of unused units
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12 years ago |
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popt386.pas
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507edb16de
* use add/sub instead of inc/dec on modern CPUs when optimizing for speed
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12 years ago |
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r386ari.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386att.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386con.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386dwrf.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386int.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386iri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386nasm.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386nor.inc
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283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
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13 years ago |
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r386nri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386num.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386ot.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386rni.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386sri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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r386stab.inc
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283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
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13 years ago |
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r386std.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
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ra386att.pas
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757ed4e8d3
* standard assembler reader for i386
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20 years ago |
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ra386int.pas
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6c6bf452ca
* Fixed level 2 comment warnings.
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17 years ago |
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rgcpu.pas
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b7fe6797bf
Merged revisions 2921-2922,2925 via svnmerge from
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19 years ago |
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rropt386.pas
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7d459cf12a
* the compiler now explicitly keeps track of the minimally guaranteed
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16 years ago |
nickysn
a0723ccfd5
* also check if ECX is nonvolatile in is_ecx_used. Not strictly necessary for the current set of i386 calling conventions, but good as an extra safety precaution in case new calling conventions are added or the code is adapted and used on other platforms.