Jonas Maebe 61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 10 rokov pred
..
aasmcpu.pas 4e2fb9d28b * MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake). 11 rokov pred
aoptcpu.pas a709a9b637 * MIPS peephole: check that operand is present before accessing its fields, also check that it's not a branch target. Mantis #27608. 10 rokov pred
aoptcpub.pas 93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes 13 rokov pred
aoptcpud.pas 0c8546f94c * more MIPS code of David Zhang integrated 16 rokov pred
cgcpu.pas 61e4a1b811 + added tasmlist parameter to getintparaloc() (needed for llvm) 10 rokov pred
cpubase.pas c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
cpuelf.pas 901275b4a1 Switch back to emitting BLX instructions and fix calculation of constant offsets(should rarely/never happen). 10 rokov pred
cpugas.pas b46ce6b70e * Fixed condition to output div/divu having R0 as first operand as non-macros. 10 rokov pred
cpuinfo.pas 5c67fcc43f + change always floating point divisions into multiplications if they are a power of two, 10 rokov pred
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 rokov pred
cpupara.pas 99de108c68 * renamed all paramanagers to tcpuparamanager so the llvm paramanager can 11 rokov pred
cpupi.pas 96dd464bf2 * Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter. 11 rokov pred
cputarg.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: 11 rokov pred
hlcgcpu.pas b745dcc64c * moved g_external_wrapper() to the hlcg, and also g_intf_wrapper() because 11 rokov pred
itcpugas.pas 3d2a27c66c * fix fpu register type 13 rokov pred
mipsreg.dat e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
ncpuadd.pas 57094d495b + MIPS: implement inline full 64-bit multiplication, for cases when overflow checking is off and CPU is set to mips32r2. 10 rokov pred
ncpucall.pas 87684e1cf1 * MIPS: clean up 11 rokov pred
ncpucnv.pas 687bb15299 * renamed getdatalabel() to getglobaldatalabel 10 rokov pred
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 rokov pred
ncpuld.pas 4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels. 12 rokov pred
ncpumat.pas 7949bebb8d * synchronised with r28168 of trunk 11 rokov pred
ncpuset.pas e163a2c813 * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). 11 rokov pred
opcode.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 rokov pred
racpugas.pas e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
rgcpu.pas 67b8aceaee * synchronized with privatetrunk till r30095 10 rokov pred
rmipscon.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
rmipsdwf.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsgas.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsgri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsgss.inc f58fcdf401 + basic mips stuff 20 rokov pred
rmipsnor.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsnum.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsrni.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipssri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipssta.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipsstd.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). 11 rokov pred
rmipssup.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. 11 rokov pred
strinst.inc 4e7c908b0d + MIPS: added movn and movz instructions. 11 rokov pred
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 rokov pred