nx86cnv.pas 20 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate for x86-64 and i386 assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86cnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncgcnv,defutil;
  22. type
  23. tx86typeconvnode = class(tcgtypeconvnode)
  24. protected
  25. function first_real_to_real : tnode;override;
  26. { procedure second_int_to_int;override; }
  27. { procedure second_string_to_string;override; }
  28. { procedure second_cstring_to_pchar;override; }
  29. { procedure second_string_to_chararray;override; }
  30. { procedure second_array_to_pointer;override; }
  31. { procedure second_pointer_to_array;override; }
  32. { procedure second_chararray_to_string;override; }
  33. { procedure second_char_to_string;override; }
  34. function first_int_to_real: tnode; override;
  35. procedure second_int_to_real;override;
  36. { procedure second_real_to_real;override; }
  37. { procedure second_cord_to_pointer;override; }
  38. { procedure second_proc_to_procvar;override; }
  39. { procedure second_bool_to_int;override; }
  40. procedure second_int_to_bool;override;
  41. { procedure second_set_to_set;override; }
  42. { procedure second_ansistring_to_pchar;override; }
  43. { procedure second_pchar_to_string;override; }
  44. { procedure second_class_to_intf;override; }
  45. { procedure second_char_to_char;override; }
  46. end;
  47. implementation
  48. uses
  49. verbose,globals,globtype,
  50. aasmbase,aasmtai,aasmdata,aasmcpu,
  51. symconst,symdef,
  52. cgbase,cga,pass_1,pass_2,
  53. cpuinfo,
  54. ncnv,
  55. cpubase,
  56. cgutils,cgobj,hlcgobj,cgx86,
  57. tgobj;
  58. function tx86typeconvnode.first_real_to_real : tnode;
  59. begin
  60. first_real_to_real:=nil;
  61. { comp isn't a floating type }
  62. if (tfloatdef(resultdef).floattype=s64comp) and
  63. (tfloatdef(left.resultdef).floattype<>s64comp) and
  64. not (nf_explicit in flags) then
  65. CGMessage(type_w_convert_real_2_comp);
  66. if use_vectorfpu(resultdef) then
  67. expectloc:=LOC_MMREGISTER
  68. else
  69. expectloc:=LOC_FPUREGISTER;
  70. end;
  71. procedure tx86typeconvnode.second_int_to_bool;
  72. var
  73. {$ifndef cpu64bitalu}
  74. hreg2,
  75. hregister : tregister;
  76. href : treference;
  77. i : integer;
  78. {$endif not cpu64bitalu}
  79. resflags : tresflags;
  80. hlabel : tasmlabel;
  81. newsize : tcgsize;
  82. begin
  83. secondpass(left);
  84. if codegenerror then
  85. exit;
  86. { Explicit typecasts from any ordinal type to a boolean type }
  87. { must not change the ordinal value }
  88. if (nf_explicit in flags) and
  89. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  90. begin
  91. location_copy(location,left.location);
  92. newsize:=def_cgsize(resultdef);
  93. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  94. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  95. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  96. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  97. else
  98. location.size:=newsize;
  99. exit;
  100. end;
  101. { Load left node into flag F_NE/F_E }
  102. resflags:=F_NE;
  103. if (left.location.loc in [LOC_SUBSETREG,LOC_CSUBSETREG,LOC_SUBSETREF,LOC_CSUBSETREF]) then
  104. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  105. case left.location.loc of
  106. LOC_CREFERENCE,
  107. LOC_REFERENCE :
  108. begin
  109. {$ifndef cpu64bitalu}
  110. if left.location.size in [OS_64,OS_S64{$ifdef cpu16bitalu},OS_32,OS_S32{$endif}] then
  111. begin
  112. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  113. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hregister);
  114. href:=left.location.reference;
  115. for i:=2 to tcgsize2size[left.location.size] div tcgsize2size[OS_INT] do
  116. begin
  117. inc(href.offset,tcgsize2size[OS_INT]);
  118. cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,href,hregister);
  119. end;
  120. end
  121. else
  122. {$endif not cpu64bitalu}
  123. begin
  124. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  125. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  126. end;
  127. end;
  128. LOC_FLAGS :
  129. begin
  130. resflags:=left.location.resflags;
  131. end;
  132. LOC_REGISTER,LOC_CREGISTER :
  133. begin
  134. {$if defined(cpu32bitalu)}
  135. if left.location.size in [OS_64,OS_S64] then
  136. begin
  137. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  138. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
  139. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
  140. end
  141. else
  142. {$elseif defined(cpu16bitalu)}
  143. if left.location.size in [OS_64,OS_S64] then
  144. begin
  145. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
  146. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,left.location.register64.reglo,hregister);
  147. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reglo),hregister);
  148. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register64.reghi,hregister);
  149. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,cg.GetNextReg(left.location.register64.reghi),hregister);
  150. end
  151. else
  152. if left.location.size in [OS_32,OS_S32] then
  153. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_16,left.location.register,cg.GetNextReg(left.location.register))
  154. else
  155. {$endif}
  156. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  157. end;
  158. LOC_JUMP :
  159. begin
  160. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  161. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  162. current_asmdata.getjumplabel(hlabel);
  163. cg.a_label(current_asmdata.CurrAsmList,left.location.truelabel);
  164. if not(is_cbool(resultdef)) then
  165. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,1,location.register)
  166. else
  167. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,-1,location.register);
  168. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  169. cg.a_label(current_asmdata.CurrAsmList,left.location.falselabel);
  170. cg.a_load_const_reg(current_asmdata.CurrAsmList,location.size,0,location.register);
  171. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  172. end;
  173. else
  174. internalerror(10062);
  175. end;
  176. if (left.location.loc<>LOC_JUMP) then
  177. begin
  178. { load flags to register }
  179. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  180. {$ifndef cpu64bitalu}
  181. if (location.size in [OS_64,OS_S64]) then
  182. begin
  183. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  184. cg.g_flags2reg(current_asmdata.CurrAsmList,OS_32,resflags,hreg2);
  185. if (is_cbool(resultdef)) then
  186. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_32,hreg2,hreg2);
  187. location.register64.reglo:=hreg2;
  188. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  189. if (is_cbool(resultdef)) then
  190. { reglo is either 0 or -1 -> reghi has to become the same }
  191. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  192. else
  193. { unsigned }
  194. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  195. end
  196. else
  197. {$endif not cpu64bitalu}
  198. begin
  199. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  200. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,location.register);
  201. if (is_cbool(resultdef)) then
  202. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,location.register,location.register);
  203. end
  204. end;
  205. end;
  206. function tx86typeconvnode.first_int_to_real : tnode;
  207. begin
  208. first_int_to_real:=nil;
  209. if (left.resultdef.size<4) then
  210. begin
  211. inserttypeconv(left,s32inttype);
  212. firstpass(left)
  213. end;
  214. if use_vectorfpu(resultdef) and
  215. (torddef(left.resultdef).ordtype = s32bit) then
  216. expectloc:=LOC_MMREGISTER
  217. else
  218. expectloc:=LOC_FPUREGISTER;
  219. end;
  220. procedure tx86typeconvnode.second_int_to_real;
  221. var
  222. leftref,
  223. href : treference;
  224. l1,l2 : tasmlabel;
  225. op: tasmop;
  226. opsize: topsize;
  227. signtested : boolean;
  228. use_bt: boolean; { true = use BT (386+), false = use TEST (286-) }
  229. begin
  230. {$ifdef i8086}
  231. use_bt:=current_settings.cputype>=cpu_386;
  232. {$else i8086}
  233. use_bt:=true;
  234. {$endif i8086}
  235. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  236. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  237. if use_vectorfpu(resultdef) and
  238. {$ifdef cpu64bitalu}
  239. ((torddef(left.resultdef).ordtype in [s32bit,s64bit]) or
  240. ((torddef(left.resultdef).ordtype in [u32bit,u64bit]) and
  241. (FPUX86_HAS_AVX512F in fpu_capabilities[current_settings.fputype]))
  242. ) then
  243. {$else cpu64bitalu}
  244. (torddef(left.resultdef).ordtype=s32bit) then
  245. {$endif cpu64bitalu}
  246. begin
  247. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  248. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  249. if UseAVX then
  250. case location.size of
  251. OS_F32:
  252. if is_signed(left.resultdef) then
  253. op:=A_VCVTSI2SS
  254. else
  255. op:=A_VCVTUSI2SS;
  256. OS_F64:
  257. if is_signed(left.resultdef) then
  258. op:=A_VCVTSI2SD
  259. else
  260. op:=A_VCVTUSI2SD;
  261. else
  262. internalerror(2007120902);
  263. end
  264. else
  265. begin
  266. { do not use is_signed here as it checks the boundaries instead
  267. of the ordtype }
  268. if not(torddef(left.resultdef).ordtype in [s32bit,s64bit]) then
  269. Internalerror(2020101001);
  270. case location.size of
  271. OS_F32:
  272. op:=A_CVTSI2SS;
  273. OS_F64:
  274. op:=A_CVTSI2SD;
  275. else
  276. internalerror(2007120904);
  277. end;
  278. end;
  279. { don't use left.location.size, because that one may be OS_32/OS_64
  280. if the lower bound of the orddef >= 0
  281. }
  282. case torddef(left.resultdef).ordtype of
  283. s32bit,u32bit:
  284. opsize:=S_L;
  285. s64bit,u64bit:
  286. opsize:=S_Q;
  287. else
  288. internalerror(2007120903);
  289. end;
  290. case left.location.loc of
  291. LOC_REFERENCE,
  292. LOC_CREFERENCE:
  293. begin
  294. href:=left.location.reference;
  295. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  296. if UseAVX then
  297. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  298. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(op,opsize,href,location.register,location.register))
  299. else
  300. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(op,opsize,href,location.register));
  301. end;
  302. LOC_REGISTER,
  303. LOC_CREGISTER:
  304. if UseAVX then
  305. { VCVTSI2.. requires a second source operand to copy bits 64..127 }
  306. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,opsize,left.location.register,location.register,location.register))
  307. else
  308. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,opsize,left.location.register,location.register));
  309. else
  310. internalerror(2019050708);
  311. end;
  312. end
  313. else
  314. begin
  315. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  316. if (left.location.loc=LOC_REGISTER) and (torddef(left.resultdef).ordtype=u64bit) then
  317. begin
  318. if use_bt then
  319. begin
  320. {$if defined(cpu64bitalu)}
  321. emit_const_reg(A_BT,S_Q,63,left.location.register);
  322. {$elseif defined(cpu32bitalu)}
  323. emit_const_reg(A_BT,S_L,31,left.location.register64.reghi);
  324. {$elseif defined(cpu16bitalu)}
  325. emit_const_reg(A_BT,S_W,15,cg.GetNextReg(left.location.register64.reghi));
  326. {$endif}
  327. end
  328. else
  329. begin
  330. {$ifdef i8086}
  331. emit_const_reg(A_TEST,S_W,aint($8000),cg.GetNextReg(left.location.register64.reghi));
  332. {$else i8086}
  333. internalerror(2013052510);
  334. {$endif i8086}
  335. end;
  336. signtested:=true;
  337. end
  338. else
  339. signtested:=false;
  340. { We need to load from a reference }
  341. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  342. { don't change left.location.reference, because if it's a temp we
  343. need the original location at the end so we can free it }
  344. leftref:=left.location.reference;
  345. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,leftref);
  346. { For u32bit we need to load it as comp and need to
  347. make it 64bits }
  348. if (torddef(left.resultdef).ordtype=u32bit) then
  349. begin
  350. tg.GetTemp(current_asmdata.CurrAsmList,8,8,tt_normal,href);
  351. location_freetemp(current_asmdata.CurrAsmList,left.location);
  352. cg.a_load_ref_ref(current_asmdata.CurrAsmList,left.location.size,OS_32,leftref,href);
  353. inc(href.offset,4);
  354. cg.a_load_const_ref(current_asmdata.CurrAsmList,OS_32,0,href);
  355. dec(href.offset,4);
  356. { could be a temp with an offset > 32 bit on x86_64 }
  357. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  358. leftref:=href;
  359. end;
  360. { Load from reference to fpu reg }
  361. case torddef(left.resultdef).ordtype of
  362. u32bit,
  363. scurrency,
  364. s64bit:
  365. begin
  366. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  367. end;
  368. u64bit:
  369. begin
  370. { unsigned 64 bit ints are harder to handle:
  371. we load bits 0..62 and then check bit 63:
  372. if it is 1 then we add 2**64 as float.
  373. Since 2**64 can be represented exactly, use a single-precision
  374. constant to save space. }
  375. current_asmdata.getglobaldatalabel(l1);
  376. current_asmdata.getjumplabel(l2);
  377. if not(signtested) then
  378. begin
  379. if use_bt then
  380. begin
  381. {$if defined(cpu64bitalu) or defined(cpu32bitalu)}
  382. inc(leftref.offset,4);
  383. emit_const_ref(A_BT,S_L,31,leftref);
  384. dec(leftref.offset,4);
  385. {$elseif defined(cpu16bitalu)}
  386. inc(leftref.offset,6);
  387. emit_const_ref(A_BT,S_W,15,leftref);
  388. dec(leftref.offset,6);
  389. {$endif}
  390. end
  391. else
  392. begin
  393. {$ifdef i8086}
  394. { reading a byte, instead of word is faster on a true }
  395. { 8088, because of the 8-bit data bus }
  396. inc(leftref.offset,7);
  397. emit_const_ref(A_TEST,S_B,aint($80),leftref);
  398. dec(leftref.offset,7);
  399. {$else i8086}
  400. internalerror(2013052511);
  401. {$endif i8086}
  402. end;
  403. end;
  404. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IQ,leftref));
  405. if use_bt then
  406. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NC,l2)
  407. else
  408. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l2);
  409. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(sizeof(pint)));
  410. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  411. { I got this constant from a test program (FK) }
  412. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($5f800000));
  413. reference_reset_symbol(href,l1,0,4,[]);
  414. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,href);
  415. current_asmdata.CurrAsmList.concat(Taicpu.Op_ref(A_FADD,S_FS,href));
  416. cg.a_label(current_asmdata.CurrAsmList,l2);
  417. end
  418. else
  419. begin
  420. if left.resultdef.size<4 then
  421. internalerror(2007120901);
  422. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_FILD,S_IL,leftref));
  423. end;
  424. end;
  425. tcgx86(cg).inc_fpu_stack;
  426. location.register:=NR_ST;
  427. end;
  428. location_freetemp(current_asmdata.CurrAsmList,left.location);
  429. end;
  430. begin
  431. ctypeconvnode:=tx86typeconvnode
  432. end.