cgobj.pas 174 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. should be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. This must be overriden for each CPU target.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overriden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. @param(size size of the operand in constant)
  113. @param(a value of constant to send)
  114. @param(cgpara where the parameter will be stored)
  115. }
  116. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  117. {# Pass the value of a parameter, which is located in memory, to a routine.
  118. A generic version is provided. This routine should
  119. be overriden for optimization purposes if the cpu
  120. permits directly sending this type of parameter.
  121. @param(size size of the operand in constant)
  122. @param(r Memory reference of value to send)
  123. @param(cgpara where the parameter will be stored)
  124. }
  125. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  126. {# Pass the value of a parameter, which can be located either in a register or memory location,
  127. to a routine.
  128. A generic version is provided.
  129. @param(l location of the operand to send)
  130. @param(nr parameter number (starting from one) of routine (from left to right))
  131. @param(cgpara where the parameter will be stored)
  132. }
  133. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  134. {# Pass the address of a reference to a routine. This routine
  135. will calculate the address of the reference, and pass this
  136. calculated address as a parameter.
  137. A generic version is provided. This routine should
  138. be overriden for optimization purposes if the cpu
  139. permits directly sending this type of parameter.
  140. @param(r reference to get address from)
  141. @param(nr parameter number (starting from one) of routine (from left to right))
  142. }
  143. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. {# Emits instruction to call the method specified by symbol name.
  161. This routine must be overriden for each new target cpu.
  162. There is no a_call_ref because loading the reference will use
  163. a temp register on most cpu's resulting in conflicts with the
  164. registers used for the parameters (PFV)
  165. }
  166. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  167. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  168. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  169. { same as a_call_name, might be overriden on certain architectures to emit
  170. static calls without usage of a got trampoline }
  171. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  172. { move instructions }
  173. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  176. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  178. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  179. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  180. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  181. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  182. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  183. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  184. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  185. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  186. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  187. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  188. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  189. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  192. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  193. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  194. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  195. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  196. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  197. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  199. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  200. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  201. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  202. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  203. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  204. { bit test instructions }
  205. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  206. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  207. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  208. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  210. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  211. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  212. { bit set/clear instructions }
  213. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  214. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  215. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  216. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  217. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  218. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  219. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  220. { fpu move instructions }
  221. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  222. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  223. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  224. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  225. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  226. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  227. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  228. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  229. { vector register move instructions }
  230. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  231. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  232. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  233. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  234. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  235. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  237. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  238. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  239. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  240. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  241. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  242. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  243. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  244. { basic arithmetic operations }
  245. { note: for operators which require only one argument (not, neg), use }
  246. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  247. { that in this case the *second* operand is used as both source and }
  248. { destination (JM) }
  249. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  250. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  251. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  252. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  253. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  254. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  255. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  256. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  257. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  258. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  259. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  260. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  261. { trinary operations for processors that support them, 'emulated' }
  262. { on others. None with "ref" arguments since I don't think there }
  263. { are any processors that support it (JM) }
  264. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  265. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  266. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  267. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  268. { comparison operations }
  269. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  270. l : tasmlabel);virtual; abstract;
  271. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  272. l : tasmlabel); virtual;
  273. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  274. l : tasmlabel);
  275. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  276. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  277. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  278. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  279. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  280. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  281. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  282. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  283. l : tasmlabel);
  284. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  285. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  286. {$ifdef cpuflags}
  287. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  288. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  289. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  290. }
  291. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  292. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  293. {$endif cpuflags}
  294. {
  295. This routine tries to optimize the op_const_reg/ref opcode, and should be
  296. called at the start of a_op_const_reg/ref. It returns the actual opcode
  297. to emit, and the constant value to emit. This function can opcode OP_NONE to
  298. remove the opcode and OP_MOVE to replace it with a simple load
  299. @param(op The opcode to emit, returns the opcode which must be emitted)
  300. @param(a The constant which should be emitted, returns the constant which must
  301. be emitted)
  302. }
  303. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  304. {#
  305. This routine is used in exception management nodes. It should
  306. save the exception reason currently in the FUNCTION_RETURN_REG. The
  307. save should be done either to a temp (pointed to by href).
  308. or on the stack (pushing the value on the stack).
  309. The size of the value to save is OS_S32. The default version
  310. saves the exception reason to a temp. memory area.
  311. }
  312. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  313. {#
  314. This routine is used in exception management nodes. It should
  315. save the exception reason constant. The
  316. save should be done either to a temp (pointed to by href).
  317. or on the stack (pushing the value on the stack).
  318. The size of the value to save is OS_S32. The default version
  319. saves the exception reason to a temp. memory area.
  320. }
  321. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  322. {#
  323. This routine is used in exception management nodes. It should
  324. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  325. should either be in the temp. area (pointed to by href , href should
  326. *NOT* be freed) or on the stack (the value should be popped).
  327. The size of the value to save is OS_S32. The default version
  328. saves the exception reason to a temp. memory area.
  329. }
  330. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  331. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  332. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  333. {# This should emit the opcode to copy len bytes from the source
  334. to destination.
  335. It must be overriden for each new target processor.
  336. @param(source Source reference of copy)
  337. @param(dest Destination reference of copy)
  338. }
  339. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  340. {# This should emit the opcode to copy len bytes from the an unaligned source
  341. to destination.
  342. It must be overriden for each new target processor.
  343. @param(source Source reference of copy)
  344. @param(dest Destination reference of copy)
  345. }
  346. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  347. {# This should emit the opcode to a shortrstring from the source
  348. to destination.
  349. @param(source Source reference of copy)
  350. @param(dest Destination reference of copy)
  351. }
  352. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  353. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  354. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  355. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  356. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  357. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  358. {# Generates range checking code. It is to note
  359. that this routine does not need to be overriden,
  360. as it takes care of everything.
  361. @param(p Node which contains the value to check)
  362. @param(todef Type definition of node to range check)
  363. }
  364. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  365. {# Generates overflow checking code for a node }
  366. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  367. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  368. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  369. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  370. {# Emits instructions when compilation is done in profile
  371. mode (this is set as a command line option). The default
  372. behavior does nothing, should be overriden as required.
  373. }
  374. procedure g_profilecode(list : TAsmList);virtual;
  375. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  376. @param(size Number of bytes to allocate)
  377. }
  378. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  379. {# Emits instruction for allocating the locals in entry
  380. code of a routine. This is one of the first
  381. routine called in @var(genentrycode).
  382. @param(localsize Number of bytes to allocate as locals)
  383. }
  384. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  385. {# Emits instructions for returning from a subroutine.
  386. Should also restore the framepointer and stack.
  387. @param(parasize Number of bytes of parameters to deallocate from stack)
  388. }
  389. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  390. {# This routine is called when generating the code for the entry point
  391. of a routine. It should save all registers which are not used in this
  392. routine, and which should be declared as saved in the std_saved_registers
  393. set.
  394. This routine is mainly used when linking to code which is generated
  395. by ABI-compliant compilers (like GCC), to make sure that the reserved
  396. registers of that ABI are not clobbered.
  397. @param(usedinproc Registers which are used in the code of this routine)
  398. }
  399. procedure g_save_registers(list:TAsmList);virtual;
  400. {# This routine is called when generating the code for the exit point
  401. of a routine. It should restore all registers which were previously
  402. saved in @var(g_save_standard_registers).
  403. @param(usedinproc Registers which are used in the code of this routine)
  404. }
  405. procedure g_restore_registers(list:TAsmList);virtual;
  406. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  407. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  408. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  409. { generate a stub which only purpose is to pass control the given external method,
  410. setting up any additional environment before doing so (if required).
  411. The default implementation issues a jump instruction to the external name. }
  412. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  413. { initialize the pic/got register }
  414. procedure g_maybe_got_init(list: TAsmList); virtual;
  415. protected
  416. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  417. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  418. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  419. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  420. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  421. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  422. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  423. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  424. end;
  425. {$ifndef cpu64bitalu}
  426. {# @abstract(Abstract code generator for 64 Bit operations)
  427. This class implements an abstract code generator class
  428. for 64 Bit operations.
  429. }
  430. tcg64 = class
  431. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  432. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  433. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  434. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  435. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  436. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  437. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  438. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  439. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  440. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  441. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  442. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  443. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  444. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  445. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  446. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  447. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  448. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  449. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  450. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  451. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  452. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  453. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  454. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  455. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  456. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  457. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  458. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  459. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  460. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  461. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  462. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  463. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  464. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  465. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  466. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  467. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  468. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  469. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  470. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  471. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  472. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  473. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  474. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  475. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  476. {
  477. This routine tries to optimize the const_reg opcode, and should be
  478. called at the start of a_op64_const_reg. It returns the actual opcode
  479. to emit, and the constant value to emit. If this routine returns
  480. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  481. @param(op The opcode to emit, returns the opcode which must be emitted)
  482. @param(a The constant which should be emitted, returns the constant which must
  483. be emitted)
  484. @param(reg The register to emit the opcode with, returns the register with
  485. which the opcode will be emitted)
  486. }
  487. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  488. { override to catch 64bit rangechecks }
  489. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  490. end;
  491. {$endif cpu64bitalu}
  492. var
  493. {# Main code generator class }
  494. cg : tcg;
  495. {$ifndef cpu64bitalu}
  496. {# Code generator class for all operations working with 64-Bit operands }
  497. cg64 : tcg64;
  498. {$endif cpu64bitalu}
  499. procedure destroy_codegen;
  500. implementation
  501. uses
  502. globals,options,systems,
  503. verbose,defutil,paramgr,symsym,
  504. tgobj,cutils,procinfo,
  505. ncgrtti;
  506. {*****************************************************************************
  507. basic functionallity
  508. ******************************************************************************}
  509. constructor tcg.create;
  510. begin
  511. end;
  512. {*****************************************************************************
  513. register allocation
  514. ******************************************************************************}
  515. procedure tcg.init_register_allocators;
  516. begin
  517. fillchar(rg,sizeof(rg),0);
  518. add_reg_instruction_hook:=@add_reg_instruction;
  519. executionweight:=1;
  520. end;
  521. procedure tcg.done_register_allocators;
  522. begin
  523. { Safety }
  524. fillchar(rg,sizeof(rg),0);
  525. add_reg_instruction_hook:=nil;
  526. end;
  527. {$ifdef flowgraph}
  528. procedure Tcg.init_flowgraph;
  529. begin
  530. aktflownode:=0;
  531. end;
  532. procedure Tcg.done_flowgraph;
  533. begin
  534. end;
  535. {$endif}
  536. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  537. begin
  538. if not assigned(rg[R_INTREGISTER]) then
  539. internalerror(200312122);
  540. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  541. end;
  542. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  543. begin
  544. if not assigned(rg[R_FPUREGISTER]) then
  545. internalerror(200312123);
  546. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  547. end;
  548. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  549. begin
  550. if not assigned(rg[R_MMREGISTER]) then
  551. internalerror(2003121214);
  552. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  553. end;
  554. function tcg.getaddressregister(list:TAsmList):Tregister;
  555. begin
  556. if assigned(rg[R_ADDRESSREGISTER]) then
  557. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  558. else
  559. begin
  560. if not assigned(rg[R_INTREGISTER]) then
  561. internalerror(200312121);
  562. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  563. end;
  564. end;
  565. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  566. var
  567. subreg:Tsubregister;
  568. begin
  569. subreg:=cgsize2subreg(getregtype(reg),size);
  570. result:=reg;
  571. setsubreg(result,subreg);
  572. { notify RA }
  573. if result<>reg then
  574. list.concat(tai_regalloc.resize(result));
  575. end;
  576. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  577. begin
  578. if not assigned(rg[getregtype(r)]) then
  579. internalerror(200312125);
  580. rg[getregtype(r)].getcpuregister(list,r);
  581. end;
  582. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  583. begin
  584. if not assigned(rg[getregtype(r)]) then
  585. internalerror(200312126);
  586. rg[getregtype(r)].ungetcpuregister(list,r);
  587. end;
  588. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  589. begin
  590. if assigned(rg[rt]) then
  591. rg[rt].alloccpuregisters(list,r)
  592. else
  593. internalerror(200310092);
  594. end;
  595. procedure tcg.allocallcpuregisters(list:TAsmList);
  596. begin
  597. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  598. {$ifndef i386}
  599. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  600. {$ifdef cpumm}
  601. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  602. {$endif cpumm}
  603. {$endif i386}
  604. end;
  605. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  606. begin
  607. if assigned(rg[rt]) then
  608. rg[rt].dealloccpuregisters(list,r)
  609. else
  610. internalerror(200310093);
  611. end;
  612. procedure tcg.deallocallcpuregisters(list:TAsmList);
  613. begin
  614. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  615. {$ifndef i386}
  616. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  617. {$ifdef cpumm}
  618. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  619. {$endif cpumm}
  620. {$endif i386}
  621. end;
  622. function tcg.uses_registers(rt:Tregistertype):boolean;
  623. begin
  624. if assigned(rg[rt]) then
  625. result:=rg[rt].uses_registers
  626. else
  627. result:=false;
  628. end;
  629. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  630. var
  631. rt : tregistertype;
  632. begin
  633. rt:=getregtype(r);
  634. { Only add it when a register allocator is configured.
  635. No IE can be generated, because the VMT is written
  636. without a valid rg[] }
  637. if assigned(rg[rt]) then
  638. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  639. end;
  640. procedure tcg.add_move_instruction(instr:Taicpu);
  641. var
  642. rt : tregistertype;
  643. begin
  644. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  645. if assigned(rg[rt]) then
  646. rg[rt].add_move_instruction(instr)
  647. else
  648. internalerror(200310095);
  649. end;
  650. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  651. var
  652. rt : tregistertype;
  653. begin
  654. for rt:=low(rg) to high(rg) do
  655. begin
  656. if assigned(rg[rt]) then
  657. rg[rt].live_range_direction:=dir;
  658. end;
  659. end;
  660. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  661. var
  662. rt : tregistertype;
  663. begin
  664. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  665. begin
  666. if assigned(rg[rt]) then
  667. rg[rt].do_register_allocation(list,headertai);
  668. end;
  669. { running the other register allocator passes could require addition int/addr. registers
  670. when spilling so run int/addr register allocation at the end }
  671. if assigned(rg[R_INTREGISTER]) then
  672. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  673. if assigned(rg[R_ADDRESSREGISTER]) then
  674. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  675. end;
  676. procedure tcg.translate_register(var reg : tregister);
  677. begin
  678. rg[getregtype(reg)].translate_register(reg);
  679. end;
  680. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  681. begin
  682. list.concat(tai_regalloc.alloc(r,nil));
  683. end;
  684. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  685. begin
  686. list.concat(tai_regalloc.dealloc(r,nil));
  687. end;
  688. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  689. var
  690. instr : tai;
  691. begin
  692. instr:=tai_regalloc.sync(r);
  693. list.concat(instr);
  694. add_reg_instruction(instr,r);
  695. end;
  696. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  697. begin
  698. list.concat(tai_label.create(l));
  699. end;
  700. {*****************************************************************************
  701. for better code generation these methods should be overridden
  702. ******************************************************************************}
  703. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  704. var
  705. ref : treference;
  706. begin
  707. cgpara.check_simple_location;
  708. case cgpara.location^.loc of
  709. LOC_REGISTER,LOC_CREGISTER:
  710. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  711. LOC_REFERENCE,LOC_CREFERENCE:
  712. begin
  713. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  714. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  715. end
  716. else
  717. internalerror(2002071004);
  718. end;
  719. end;
  720. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  721. var
  722. ref : treference;
  723. begin
  724. cgpara.check_simple_location;
  725. case cgpara.location^.loc of
  726. LOC_REGISTER,LOC_CREGISTER:
  727. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  728. LOC_REFERENCE,LOC_CREFERENCE:
  729. begin
  730. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  731. a_load_const_ref(list,cgpara.location^.size,a,ref);
  732. end
  733. else
  734. internalerror(2002071004);
  735. end;
  736. end;
  737. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  738. var
  739. ref : treference;
  740. begin
  741. cgpara.check_simple_location;
  742. case cgpara.location^.loc of
  743. LOC_REGISTER,LOC_CREGISTER:
  744. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  745. LOC_REFERENCE,LOC_CREFERENCE:
  746. begin
  747. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  748. if (size <> OS_NO) and
  749. (tcgsize2size[size] < sizeof(aint)) then
  750. begin
  751. if (cgpara.size = OS_NO) or
  752. assigned(cgpara.location^.next) then
  753. internalerror(2006052401);
  754. a_load_ref_ref(list,size,cgpara.size,r,ref);
  755. end
  756. else
  757. { use concatcopy, because the parameter can be larger than }
  758. { what the OS_* constants can handle }
  759. g_concatcopy(list,r,ref,cgpara.intsize);
  760. end
  761. else
  762. internalerror(2002071004);
  763. end;
  764. end;
  765. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  766. begin
  767. case l.loc of
  768. LOC_REGISTER,
  769. LOC_CREGISTER :
  770. a_param_reg(list,l.size,l.register,cgpara);
  771. LOC_CONSTANT :
  772. a_param_const(list,l.size,l.value,cgpara);
  773. LOC_CREFERENCE,
  774. LOC_REFERENCE :
  775. a_param_ref(list,l.size,l.reference,cgpara);
  776. else
  777. internalerror(2002032211);
  778. end;
  779. end;
  780. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  781. var
  782. hr : tregister;
  783. begin
  784. cgpara.check_simple_location;
  785. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  786. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  787. else
  788. begin
  789. hr:=getaddressregister(list);
  790. a_loadaddr_ref_reg(list,r,hr);
  791. a_param_reg(list,OS_ADDR,hr,cgpara);
  792. end;
  793. end;
  794. {****************************************************************************
  795. some generic implementations
  796. ****************************************************************************}
  797. {$ifopt r+}
  798. {$define rangeon}
  799. {$r-}
  800. {$endif}
  801. {$ifopt q+}
  802. {$define overflowon}
  803. {$q-}
  804. {$endif}
  805. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  806. var
  807. bitmask: aword;
  808. tmpreg: tregister;
  809. stopbit: byte;
  810. begin
  811. tmpreg:=getintregister(list,sreg.subsetregsize);
  812. if (subsetsize in [OS_S8..OS_S128]) then
  813. begin
  814. { sign extend in case the value has a bitsize mod 8 <> 0 }
  815. { both instructions will be optimized away if not }
  816. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  817. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  818. end
  819. else
  820. begin
  821. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  822. stopbit := sreg.startbit + sreg.bitlen;
  823. // on x86(64), 1 shl 32(64) = 1 instead of 0
  824. // use aword to prevent overflow with 1 shl 31
  825. if (stopbit - sreg.startbit <> AIntBits) then
  826. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  827. else
  828. bitmask := high(aword);
  829. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  830. end;
  831. tmpreg := makeregsize(list,tmpreg,subsetsize);
  832. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  833. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  834. end;
  835. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  836. begin
  837. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  838. end;
  839. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  840. var
  841. bitmask: aword;
  842. tmpreg: tregister;
  843. stopbit: byte;
  844. begin
  845. stopbit := sreg.startbit + sreg.bitlen;
  846. // on x86(64), 1 shl 32(64) = 1 instead of 0
  847. if (stopbit <> AIntBits) then
  848. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  849. else
  850. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  851. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  852. begin
  853. tmpreg:=getintregister(list,sreg.subsetregsize);
  854. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  855. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  856. if (slopt <> SL_REGNOSRCMASK) then
  857. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  858. end;
  859. if (slopt <> SL_SETMAX) then
  860. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  861. case slopt of
  862. SL_SETZERO : ;
  863. SL_SETMAX :
  864. if (sreg.bitlen <> AIntBits) then
  865. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  866. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  867. sreg.subsetreg)
  868. else
  869. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  870. else
  871. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  872. end;
  873. end;
  874. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  875. var
  876. tmpreg: tregister;
  877. bitmask: aword;
  878. stopbit: byte;
  879. begin
  880. if (fromsreg.bitlen >= tosreg.bitlen) then
  881. begin
  882. tmpreg := getintregister(list,tosreg.subsetregsize);
  883. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  884. if (fromsreg.startbit <= tosreg.startbit) then
  885. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  886. else
  887. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  888. stopbit := tosreg.startbit + tosreg.bitlen;
  889. // on x86(64), 1 shl 32(64) = 1 instead of 0
  890. if (stopbit <> AIntBits) then
  891. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  892. else
  893. bitmask := (aword(1) shl tosreg.startbit) - 1;
  894. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  895. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  896. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  897. end
  898. else
  899. begin
  900. tmpreg := getintregister(list,tosubsetsize);
  901. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  902. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  903. end;
  904. end;
  905. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  906. var
  907. tmpreg: tregister;
  908. begin
  909. tmpreg := getintregister(list,tosize);
  910. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  911. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  912. end;
  913. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  914. var
  915. tmpreg: tregister;
  916. begin
  917. tmpreg := getintregister(list,subsetsize);
  918. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  919. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  920. end;
  921. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  922. var
  923. bitmask: aword;
  924. stopbit: byte;
  925. begin
  926. stopbit := sreg.startbit + sreg.bitlen;
  927. // on x86(64), 1 shl 32(64) = 1 instead of 0
  928. if (stopbit <> AIntBits) then
  929. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  930. else
  931. bitmask := (aword(1) shl sreg.startbit) - 1;
  932. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  933. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  934. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  935. end;
  936. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  937. begin
  938. case loc.loc of
  939. LOC_REFERENCE,LOC_CREFERENCE:
  940. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  941. LOC_REGISTER,LOC_CREGISTER:
  942. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  943. LOC_CONSTANT:
  944. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  945. LOC_SUBSETREG,LOC_CSUBSETREG:
  946. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  947. LOC_SUBSETREF,LOC_CSUBSETREF:
  948. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  949. else
  950. internalerror(200608053);
  951. end;
  952. end;
  953. (*
  954. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  955. in memory. They are like a regular reference, but contain an extra bit
  956. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  957. and a bit length (always constant).
  958. Bit packed values are stored differently in memory depending on whether we
  959. are on a big or a little endian system (compatible with at least GPC). The
  960. size of the basic working unit is always the smallest power-of-2 byte size
  961. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  962. bytes, 17..32 bits -> 4 bytes etc).
  963. On a big endian, 5-bit: values are stored like this:
  964. 11111222 22333334 44445555 56666677 77788888
  965. The leftmost bit of each 5-bit value corresponds to the most significant
  966. bit.
  967. On little endian, it goes like this:
  968. 22211111 43333322 55554444 77666665 88888777
  969. In this case, per byte the left-most bit is more significant than those on
  970. the right, but the bits in the next byte are all more significant than
  971. those in the previous byte (e.g., the 222 in the first byte are the low
  972. three bits of that value, while the 22 in the second byte are the upper
  973. two bits.
  974. Big endian, 9 bit values:
  975. 11111111 12222222 22333333 33344444 ...
  976. Little endian, 9 bit values:
  977. 11111111 22222221 33333322 44444333 ...
  978. This is memory representation and the 16 bit values are byteswapped.
  979. Similarly as in the previous case, the 2222222 string contains the lower
  980. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  981. registers (two 16 bit registers in the current implementation, although a
  982. single 32 bit register would be possible too, in particular if 32 bit
  983. alignment can be guaranteed), this becomes:
  984. 22222221 11111111 44444333 33333322 ...
  985. (l)ow u l l u l u
  986. The startbit/bitindex in a subsetreference always refers to
  987. a) on big endian: the most significant bit of the value
  988. (bits counted from left to right, both memory an registers)
  989. b) on little endian: the least significant bit when the value
  990. is loaded in a register (bit counted from right to left)
  991. Although a) results in more complex code for big endian systems, it's
  992. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  993. Apple's universal interfaces which depend on these layout differences).
  994. Note: when changing the loadsize calculated in get_subsetref_load_info,
  995. make sure the appropriate alignment is guaranteed, at least in case of
  996. {$defined cpurequiresproperalignment}.
  997. *)
  998. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  999. var
  1000. intloadsize: aint;
  1001. begin
  1002. intloadsize := packedbitsloadsize(sref.bitlen);
  1003. if (intloadsize = 0) then
  1004. internalerror(2006081310);
  1005. if (intloadsize > sizeof(aint)) then
  1006. intloadsize := sizeof(aint);
  1007. loadsize := int_cgsize(intloadsize);
  1008. if (loadsize = OS_NO) then
  1009. internalerror(2006081311);
  1010. if (sref.bitlen > sizeof(aint)*8) then
  1011. internalerror(2006081312);
  1012. extra_load :=
  1013. (sref.bitlen <> 1) and
  1014. ((sref.bitindexreg <> NR_NO) or
  1015. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1016. end;
  1017. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1018. var
  1019. restbits: byte;
  1020. begin
  1021. if (target_info.endian = endian_big) then
  1022. begin
  1023. { valuereg contains the upper bits, extra_value_reg the lower }
  1024. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1025. if (subsetsize in [OS_S8..OS_S128]) then
  1026. begin
  1027. { sign extend }
  1028. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1029. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1030. end
  1031. else
  1032. begin
  1033. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1034. { mask other bits }
  1035. if (sref.bitlen <> AIntBits) then
  1036. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1037. end;
  1038. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1039. end
  1040. else
  1041. begin
  1042. { valuereg contains the lower bits, extra_value_reg the upper }
  1043. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1044. if (subsetsize in [OS_S8..OS_S128]) then
  1045. begin
  1046. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1047. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1048. end
  1049. else
  1050. begin
  1051. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1052. { mask other bits }
  1053. if (sref.bitlen <> AIntBits) then
  1054. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1055. end;
  1056. end;
  1057. { merge }
  1058. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1059. end;
  1060. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1061. var
  1062. hl: tasmlabel;
  1063. tmpref: treference;
  1064. extra_value_reg,
  1065. tmpreg: tregister;
  1066. begin
  1067. tmpreg := getintregister(list,OS_INT);
  1068. tmpref := sref.ref;
  1069. inc(tmpref.offset,loadbitsize div 8);
  1070. extra_value_reg := getintregister(list,OS_INT);
  1071. if (target_info.endian = endian_big) then
  1072. begin
  1073. { since this is a dynamic index, it's possible that the value }
  1074. { is entirely in valuereg. }
  1075. { get the data in valuereg in the right place }
  1076. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1077. if (subsetsize in [OS_S8..OS_S128]) then
  1078. begin
  1079. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1080. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1081. end
  1082. else
  1083. begin
  1084. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1085. if (loadbitsize <> AIntBits) then
  1086. { mask left over bits }
  1087. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1088. end;
  1089. tmpreg := getintregister(list,OS_INT);
  1090. { ensure we don't load anything past the end of the array }
  1091. current_asmdata.getjumplabel(hl);
  1092. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1093. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1094. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1095. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1096. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1097. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1098. { load next "loadbitsize" bits of the array }
  1099. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1100. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1101. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1102. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1103. { => extra_value_reg is now 0 }
  1104. { merge }
  1105. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1106. { no need to mask, necessary masking happened earlier on }
  1107. a_label(list,hl);
  1108. end
  1109. else
  1110. begin
  1111. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1112. { ensure we don't load anything past the end of the array }
  1113. current_asmdata.getjumplabel(hl);
  1114. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1115. { Y-x = -(Y-x) }
  1116. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1117. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1118. { load next "loadbitsize" bits of the array }
  1119. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1120. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1121. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1122. { merge }
  1123. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1124. a_label(list,hl);
  1125. { sign extend or mask other bits }
  1126. if (subsetsize in [OS_S8..OS_S128]) then
  1127. begin
  1128. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1129. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1130. end
  1131. else
  1132. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1133. end;
  1134. end;
  1135. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1136. var
  1137. tmpref: treference;
  1138. valuereg,extra_value_reg: tregister;
  1139. tosreg: tsubsetregister;
  1140. loadsize: tcgsize;
  1141. loadbitsize: byte;
  1142. extra_load: boolean;
  1143. begin
  1144. get_subsetref_load_info(sref,loadsize,extra_load);
  1145. loadbitsize := tcgsize2size[loadsize]*8;
  1146. { load the (first part) of the bit sequence }
  1147. valuereg := getintregister(list,OS_INT);
  1148. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1149. if not extra_load then
  1150. begin
  1151. { everything is guaranteed to be in a single register of loadsize }
  1152. if (sref.bitindexreg = NR_NO) then
  1153. begin
  1154. { use subsetreg routine, it may have been overridden with an optimized version }
  1155. tosreg.subsetreg := valuereg;
  1156. tosreg.subsetregsize := OS_INT;
  1157. { subsetregs always count bits from right to left }
  1158. if (target_info.endian = endian_big) then
  1159. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1160. else
  1161. tosreg.startbit := sref.startbit;
  1162. tosreg.bitlen := sref.bitlen;
  1163. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1164. exit;
  1165. end
  1166. else
  1167. begin
  1168. if (sref.startbit <> 0) then
  1169. internalerror(2006081510);
  1170. if (target_info.endian = endian_big) then
  1171. begin
  1172. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1173. if (subsetsize in [OS_S8..OS_S128]) then
  1174. begin
  1175. { sign extend to entire register }
  1176. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1177. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1178. end
  1179. else
  1180. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1181. end
  1182. else
  1183. begin
  1184. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1185. if (subsetsize in [OS_S8..OS_S128]) then
  1186. begin
  1187. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1188. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1189. end
  1190. end;
  1191. { mask other bits/sign extend }
  1192. if not(subsetsize in [OS_S8..OS_S128]) then
  1193. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1194. end
  1195. end
  1196. else
  1197. begin
  1198. { load next value as well }
  1199. extra_value_reg := getintregister(list,OS_INT);
  1200. if (sref.bitindexreg = NR_NO) then
  1201. begin
  1202. tmpref := sref.ref;
  1203. inc(tmpref.offset,loadbitsize div 8);
  1204. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1205. { can be overridden to optimize }
  1206. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1207. end
  1208. else
  1209. begin
  1210. if (sref.startbit <> 0) then
  1211. internalerror(2006080610);
  1212. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1213. end;
  1214. end;
  1215. { store in destination }
  1216. { avoid unnecessary sign extension and zeroing }
  1217. valuereg := makeregsize(list,valuereg,OS_INT);
  1218. destreg := makeregsize(list,destreg,OS_INT);
  1219. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1220. destreg := makeregsize(list,destreg,tosize);
  1221. end;
  1222. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1223. begin
  1224. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1225. end;
  1226. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1227. var
  1228. hl: tasmlabel;
  1229. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1230. tosreg, fromsreg: tsubsetregister;
  1231. tmpref: treference;
  1232. bitmask: aword;
  1233. loadsize: tcgsize;
  1234. loadbitsize: byte;
  1235. extra_load: boolean;
  1236. begin
  1237. { the register must be able to contain the requested value }
  1238. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1239. internalerror(2006081613);
  1240. get_subsetref_load_info(sref,loadsize,extra_load);
  1241. loadbitsize := tcgsize2size[loadsize]*8;
  1242. { load the (first part) of the bit sequence }
  1243. valuereg := getintregister(list,OS_INT);
  1244. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1245. { constant offset of bit sequence? }
  1246. if not extra_load then
  1247. begin
  1248. if (sref.bitindexreg = NR_NO) then
  1249. begin
  1250. { use subsetreg routine, it may have been overridden with an optimized version }
  1251. tosreg.subsetreg := valuereg;
  1252. tosreg.subsetregsize := OS_INT;
  1253. { subsetregs always count bits from right to left }
  1254. if (target_info.endian = endian_big) then
  1255. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1256. else
  1257. tosreg.startbit := sref.startbit;
  1258. tosreg.bitlen := sref.bitlen;
  1259. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1260. end
  1261. else
  1262. begin
  1263. if (sref.startbit <> 0) then
  1264. internalerror(2006081710);
  1265. { should be handled by normal code and will give wrong result }
  1266. { on x86 for the '1 shl bitlen' below }
  1267. if (sref.bitlen = AIntBits) then
  1268. internalerror(2006081711);
  1269. { zero the bits we have to insert }
  1270. if (slopt <> SL_SETMAX) then
  1271. begin
  1272. maskreg := getintregister(list,OS_INT);
  1273. if (target_info.endian = endian_big) then
  1274. begin
  1275. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1276. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1277. end
  1278. else
  1279. begin
  1280. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1281. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1282. end;
  1283. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1284. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1285. end;
  1286. { insert the value }
  1287. if (slopt <> SL_SETZERO) then
  1288. begin
  1289. tmpreg := getintregister(list,OS_INT);
  1290. if (slopt <> SL_SETMAX) then
  1291. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1292. else if (sref.bitlen <> AIntBits) then
  1293. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1294. else
  1295. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1296. if (target_info.endian = endian_big) then
  1297. begin
  1298. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1299. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1300. begin
  1301. if (loadbitsize <> AIntBits) then
  1302. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1303. else
  1304. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1305. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1306. end;
  1307. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1308. end
  1309. else
  1310. begin
  1311. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1312. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1313. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1314. end;
  1315. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1316. end;
  1317. end;
  1318. { store back to memory }
  1319. valuereg := makeregsize(list,valuereg,loadsize);
  1320. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1321. exit;
  1322. end
  1323. else
  1324. begin
  1325. { load next value }
  1326. extra_value_reg := getintregister(list,OS_INT);
  1327. tmpref := sref.ref;
  1328. inc(tmpref.offset,loadbitsize div 8);
  1329. { should maybe be taken out too, can be done more efficiently }
  1330. { on e.g. i386 with shld/shrd }
  1331. if (sref.bitindexreg = NR_NO) then
  1332. begin
  1333. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1334. fromsreg.subsetreg := fromreg;
  1335. fromsreg.subsetregsize := fromsize;
  1336. tosreg.subsetreg := valuereg;
  1337. tosreg.subsetregsize := OS_INT;
  1338. { transfer first part }
  1339. fromsreg.bitlen := loadbitsize-sref.startbit;
  1340. tosreg.bitlen := fromsreg.bitlen;
  1341. if (target_info.endian = endian_big) then
  1342. begin
  1343. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1344. { upper bits of the value ... }
  1345. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1346. { ... to bit 0 }
  1347. tosreg.startbit := 0
  1348. end
  1349. else
  1350. begin
  1351. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1352. { lower bits of the value ... }
  1353. fromsreg.startbit := 0;
  1354. { ... to startbit }
  1355. tosreg.startbit := sref.startbit;
  1356. end;
  1357. case slopt of
  1358. SL_SETZERO,
  1359. SL_SETMAX:
  1360. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1361. else
  1362. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1363. end;
  1364. valuereg := makeregsize(list,valuereg,loadsize);
  1365. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1366. { transfer second part }
  1367. if (target_info.endian = endian_big) then
  1368. begin
  1369. { extra_value_reg must contain the lower bits of the value at bits }
  1370. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1371. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1372. { - bitlen - startbit }
  1373. fromsreg.startbit := 0;
  1374. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1375. end
  1376. else
  1377. begin
  1378. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1379. fromsreg.startbit := fromsreg.bitlen;
  1380. tosreg.startbit := 0;
  1381. end;
  1382. tosreg.subsetreg := extra_value_reg;
  1383. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1384. tosreg.bitlen := fromsreg.bitlen;
  1385. case slopt of
  1386. SL_SETZERO,
  1387. SL_SETMAX:
  1388. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1389. else
  1390. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1391. end;
  1392. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1393. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1394. exit;
  1395. end
  1396. else
  1397. begin
  1398. if (sref.startbit <> 0) then
  1399. internalerror(2006081812);
  1400. { should be handled by normal code and will give wrong result }
  1401. { on x86 for the '1 shl bitlen' below }
  1402. if (sref.bitlen = AIntBits) then
  1403. internalerror(2006081713);
  1404. { generate mask to zero the bits we have to insert }
  1405. if (slopt <> SL_SETMAX) then
  1406. begin
  1407. maskreg := getintregister(list,OS_INT);
  1408. if (target_info.endian = endian_big) then
  1409. begin
  1410. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1411. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1412. end
  1413. else
  1414. begin
  1415. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1416. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1417. end;
  1418. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1419. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1420. end;
  1421. { insert the value }
  1422. if (slopt <> SL_SETZERO) then
  1423. begin
  1424. tmpreg := getintregister(list,OS_INT);
  1425. if (slopt <> SL_SETMAX) then
  1426. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1427. else if (sref.bitlen <> AIntBits) then
  1428. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1429. else
  1430. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1431. if (target_info.endian = endian_big) then
  1432. begin
  1433. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1434. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1435. { mask left over bits }
  1436. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1437. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1438. end
  1439. else
  1440. begin
  1441. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1442. { mask left over bits }
  1443. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1444. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1445. end;
  1446. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1447. end;
  1448. valuereg := makeregsize(list,valuereg,loadsize);
  1449. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1450. { make sure we do not read/write past the end of the array }
  1451. current_asmdata.getjumplabel(hl);
  1452. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1453. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1454. tmpindexreg := getintregister(list,OS_INT);
  1455. { load current array value }
  1456. if (slopt <> SL_SETZERO) then
  1457. begin
  1458. tmpreg := getintregister(list,OS_INT);
  1459. if (slopt <> SL_SETMAX) then
  1460. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1461. else if (sref.bitlen <> AIntBits) then
  1462. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1463. else
  1464. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1465. end;
  1466. { generate mask to zero the bits we have to insert }
  1467. if (slopt <> SL_SETMAX) then
  1468. begin
  1469. maskreg := getintregister(list,OS_INT);
  1470. if (target_info.endian = endian_big) then
  1471. begin
  1472. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1473. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1474. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1475. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1476. end
  1477. else
  1478. begin
  1479. { Y-x = -(Y-x) }
  1480. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1481. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1482. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1483. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1484. end;
  1485. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1486. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1487. end;
  1488. if (slopt <> SL_SETZERO) then
  1489. begin
  1490. if (target_info.endian = endian_big) then
  1491. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1492. else
  1493. begin
  1494. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1495. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1496. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1497. end;
  1498. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1499. end;
  1500. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1501. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1502. a_label(list,hl);
  1503. end;
  1504. end;
  1505. end;
  1506. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1507. var
  1508. tmpreg: tregister;
  1509. begin
  1510. tmpreg := getintregister(list,tosubsetsize);
  1511. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1512. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1513. end;
  1514. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1515. var
  1516. tmpreg: tregister;
  1517. begin
  1518. tmpreg := getintregister(list,tosize);
  1519. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1520. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1521. end;
  1522. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1523. var
  1524. tmpreg: tregister;
  1525. begin
  1526. tmpreg := getintregister(list,subsetsize);
  1527. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1528. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1529. end;
  1530. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1531. var
  1532. tmpreg: tregister;
  1533. slopt: tsubsetloadopt;
  1534. begin
  1535. { perform masking of the source value in advance }
  1536. slopt := SL_REGNOSRCMASK;
  1537. if (sref.bitlen <> AIntBits) then
  1538. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1539. if (
  1540. { broken x86 "x shl regbitsize = x" }
  1541. ((sref.bitlen <> AIntBits) and
  1542. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1543. ((sref.bitlen = AIntBits) and
  1544. (a = -1))
  1545. ) then
  1546. slopt := SL_SETMAX
  1547. else if (a = 0) then
  1548. slopt := SL_SETZERO;
  1549. tmpreg := getintregister(list,subsetsize);
  1550. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1551. a_load_const_reg(list,subsetsize,a,tmpreg);
  1552. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1553. end;
  1554. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1555. begin
  1556. case loc.loc of
  1557. LOC_REFERENCE,LOC_CREFERENCE:
  1558. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1559. LOC_REGISTER,LOC_CREGISTER:
  1560. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1561. LOC_SUBSETREG,LOC_CSUBSETREG:
  1562. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1563. LOC_SUBSETREF,LOC_CSUBSETREF:
  1564. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1565. else
  1566. internalerror(200608054);
  1567. end;
  1568. end;
  1569. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1570. var
  1571. tmpreg: tregister;
  1572. begin
  1573. tmpreg := getintregister(list,tosubsetsize);
  1574. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1575. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1576. end;
  1577. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1578. var
  1579. tmpreg: tregister;
  1580. begin
  1581. tmpreg := getintregister(list,tosubsetsize);
  1582. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1583. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1584. end;
  1585. {$ifdef rangeon}
  1586. {$r+}
  1587. {$undef rangeon}
  1588. {$endif}
  1589. {$ifdef overflowon}
  1590. {$q+}
  1591. {$undef overflowon}
  1592. {$endif}
  1593. { generic bit address calculation routines }
  1594. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1595. begin
  1596. result.ref:=ref;
  1597. inc(result.ref.offset,bitnumber div 8);
  1598. result.bitindexreg:=NR_NO;
  1599. result.startbit:=bitnumber mod 8;
  1600. result.bitlen:=1;
  1601. end;
  1602. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1603. begin
  1604. result.subsetreg:=setreg;
  1605. result.subsetregsize:=setregsize;
  1606. { subsetregs always count from the least significant to the most significant bit }
  1607. if (target_info.endian=endian_big) then
  1608. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1609. else
  1610. result.startbit:=bitnumber;
  1611. result.bitlen:=1;
  1612. end;
  1613. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1614. var
  1615. tmpreg,
  1616. tmpaddrreg: tregister;
  1617. begin
  1618. result.ref:=ref;
  1619. result.startbit:=0;
  1620. result.bitlen:=1;
  1621. tmpreg:=getintregister(list,bitnumbersize);
  1622. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1623. tmpaddrreg:=getaddressregister(list);
  1624. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1625. if (result.ref.base=NR_NO) then
  1626. result.ref.base:=tmpaddrreg
  1627. else if (result.ref.index=NR_NO) then
  1628. result.ref.index:=tmpaddrreg
  1629. else
  1630. begin
  1631. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1632. result.ref.index:=tmpaddrreg;
  1633. end;
  1634. tmpreg:=getintregister(list,OS_INT);
  1635. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1636. result.bitindexreg:=tmpreg;
  1637. end;
  1638. { bit testing routines }
  1639. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1640. var
  1641. tmpvalue: tregister;
  1642. begin
  1643. tmpvalue:=getintregister(list,valuesize);
  1644. if (target_info.endian=endian_little) then
  1645. begin
  1646. { rotate value register "bitnumber" bits to the right }
  1647. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1648. { extract the bit we want }
  1649. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1650. end
  1651. else
  1652. begin
  1653. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1654. { bit in uppermost position, then move it to the lowest position }
  1655. { "and" is not necessary since combination of shl/shr will clear }
  1656. { all other bits }
  1657. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1658. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1659. end;
  1660. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1661. end;
  1662. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1663. begin
  1664. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1665. end;
  1666. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1667. begin
  1668. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1669. end;
  1670. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1671. var
  1672. tmpsreg: tsubsetregister;
  1673. begin
  1674. { the first parameter is used to calculate the bit offset in }
  1675. { case of big endian, and therefore must be the size of the }
  1676. { set and not of the whole subsetreg }
  1677. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1678. { now fix the size of the subsetreg }
  1679. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1680. { correct offset of the set in the subsetreg }
  1681. inc(tmpsreg.startbit,setreg.startbit);
  1682. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1683. end;
  1684. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1685. begin
  1686. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1687. end;
  1688. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1689. var
  1690. tmpreg: tregister;
  1691. begin
  1692. case loc.loc of
  1693. LOC_REFERENCE,LOC_CREFERENCE:
  1694. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1695. LOC_REGISTER,LOC_CREGISTER,
  1696. LOC_SUBSETREG,LOC_CSUBSETREG,
  1697. LOC_CONSTANT:
  1698. begin
  1699. case loc.loc of
  1700. LOC_REGISTER,LOC_CREGISTER:
  1701. tmpreg:=loc.register;
  1702. LOC_SUBSETREG,LOC_CSUBSETREG:
  1703. begin
  1704. tmpreg:=getintregister(list,loc.size);
  1705. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1706. end;
  1707. LOC_CONSTANT:
  1708. begin
  1709. tmpreg:=getintregister(list,loc.size);
  1710. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1711. end;
  1712. end;
  1713. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1714. end;
  1715. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1716. else
  1717. internalerror(2007051701);
  1718. end;
  1719. end;
  1720. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1721. begin
  1722. case loc.loc of
  1723. LOC_REFERENCE,LOC_CREFERENCE:
  1724. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1725. LOC_REGISTER,LOC_CREGISTER:
  1726. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1727. LOC_SUBSETREG,LOC_CSUBSETREG:
  1728. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1729. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1730. else
  1731. internalerror(2007051702);
  1732. end;
  1733. end;
  1734. { bit setting/clearing routines }
  1735. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1736. var
  1737. tmpvalue: tregister;
  1738. begin
  1739. tmpvalue:=getintregister(list,destsize);
  1740. if (target_info.endian=endian_little) then
  1741. begin
  1742. a_load_const_reg(list,destsize,1,tmpvalue);
  1743. { rotate bit "bitnumber" bits to the left }
  1744. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1745. end
  1746. else
  1747. begin
  1748. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1749. { shr bitnumber" results in correct mask }
  1750. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1751. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1752. end;
  1753. { set/clear the bit we want }
  1754. if (doset) then
  1755. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1756. else
  1757. begin
  1758. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1759. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1760. end;
  1761. end;
  1762. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1763. begin
  1764. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1765. end;
  1766. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1767. begin
  1768. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1769. end;
  1770. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1771. var
  1772. tmpsreg: tsubsetregister;
  1773. begin
  1774. { the first parameter is used to calculate the bit offset in }
  1775. { case of big endian, and therefore must be the size of the }
  1776. { set and not of the whole subsetreg }
  1777. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1778. { now fix the size of the subsetreg }
  1779. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1780. { correct offset of the set in the subsetreg }
  1781. inc(tmpsreg.startbit,destreg.startbit);
  1782. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1783. end;
  1784. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1785. begin
  1786. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1787. end;
  1788. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1789. var
  1790. tmpreg: tregister;
  1791. begin
  1792. case loc.loc of
  1793. LOC_REFERENCE:
  1794. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1795. LOC_CREGISTER:
  1796. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1797. { e.g. a 2-byte set in a record regvar }
  1798. LOC_CSUBSETREG:
  1799. begin
  1800. { hard to do in-place in a generic way, so operate on a copy }
  1801. tmpreg:=getintregister(list,loc.size);
  1802. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1803. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1804. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1805. end;
  1806. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1807. else
  1808. internalerror(2007051703)
  1809. end;
  1810. end;
  1811. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1812. begin
  1813. case loc.loc of
  1814. LOC_REFERENCE:
  1815. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1816. LOC_CREGISTER:
  1817. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1818. LOC_CSUBSETREG:
  1819. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1820. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1821. else
  1822. internalerror(2007051704)
  1823. end;
  1824. end;
  1825. { memory/register loading }
  1826. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1827. var
  1828. tmpref : treference;
  1829. tmpreg : tregister;
  1830. i : longint;
  1831. begin
  1832. if ref.alignment<tcgsize2size[fromsize] then
  1833. begin
  1834. tmpref:=ref;
  1835. { we take care of the alignment now }
  1836. tmpref.alignment:=0;
  1837. case FromSize of
  1838. OS_16,OS_S16:
  1839. begin
  1840. tmpreg:=getintregister(list,OS_16);
  1841. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1842. if target_info.endian=endian_big then
  1843. inc(tmpref.offset);
  1844. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1845. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1846. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1847. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1848. if target_info.endian=endian_big then
  1849. dec(tmpref.offset)
  1850. else
  1851. inc(tmpref.offset);
  1852. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1853. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1854. end;
  1855. OS_32,OS_S32:
  1856. begin
  1857. { could add an optimised case for ref.alignment=2 }
  1858. tmpreg:=getintregister(list,OS_32);
  1859. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1860. if target_info.endian=endian_big then
  1861. inc(tmpref.offset,3);
  1862. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1863. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1864. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1865. for i:=1 to 3 do
  1866. begin
  1867. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1868. if target_info.endian=endian_big then
  1869. dec(tmpref.offset)
  1870. else
  1871. inc(tmpref.offset);
  1872. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1873. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1874. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1875. end;
  1876. end
  1877. else
  1878. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1879. end;
  1880. end
  1881. else
  1882. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1883. end;
  1884. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1885. var
  1886. tmpref : treference;
  1887. tmpreg,
  1888. tmpreg2 : tregister;
  1889. i : longint;
  1890. begin
  1891. if ref.alignment in [1,2] then
  1892. begin
  1893. tmpref:=ref;
  1894. { we take care of the alignment now }
  1895. tmpref.alignment:=0;
  1896. case FromSize of
  1897. OS_16,OS_S16:
  1898. if ref.alignment=2 then
  1899. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1900. else
  1901. begin
  1902. { first load in tmpreg, because the target register }
  1903. { may be used in ref as well }
  1904. if target_info.endian=endian_little then
  1905. inc(tmpref.offset);
  1906. tmpreg:=getintregister(list,OS_8);
  1907. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1908. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1909. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1910. if target_info.endian=endian_little then
  1911. dec(tmpref.offset)
  1912. else
  1913. inc(tmpref.offset);
  1914. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1915. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1916. end;
  1917. OS_32,OS_S32:
  1918. if ref.alignment=2 then
  1919. begin
  1920. if target_info.endian=endian_little then
  1921. inc(tmpref.offset,2);
  1922. tmpreg:=getintregister(list,OS_32);
  1923. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1924. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1925. if target_info.endian=endian_little then
  1926. dec(tmpref.offset,2)
  1927. else
  1928. inc(tmpref.offset,2);
  1929. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1930. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1931. end
  1932. else
  1933. begin
  1934. if target_info.endian=endian_little then
  1935. inc(tmpref.offset,3);
  1936. tmpreg:=getintregister(list,OS_32);
  1937. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1938. tmpreg2:=getintregister(list,OS_32);
  1939. for i:=1 to 3 do
  1940. begin
  1941. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1942. if target_info.endian=endian_little then
  1943. dec(tmpref.offset)
  1944. else
  1945. inc(tmpref.offset);
  1946. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1947. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1948. end;
  1949. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1950. end
  1951. else
  1952. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1953. end;
  1954. end
  1955. else
  1956. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1957. end;
  1958. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1959. var
  1960. tmpreg: tregister;
  1961. begin
  1962. { verify if we have the same reference }
  1963. if references_equal(sref,dref) then
  1964. exit;
  1965. tmpreg:=getintregister(list,tosize);
  1966. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1967. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1968. end;
  1969. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1970. var
  1971. tmpreg: tregister;
  1972. begin
  1973. tmpreg:=getintregister(list,size);
  1974. a_load_const_reg(list,size,a,tmpreg);
  1975. a_load_reg_ref(list,size,size,tmpreg,ref);
  1976. end;
  1977. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1978. begin
  1979. case loc.loc of
  1980. LOC_REFERENCE,LOC_CREFERENCE:
  1981. a_load_const_ref(list,loc.size,a,loc.reference);
  1982. LOC_REGISTER,LOC_CREGISTER:
  1983. a_load_const_reg(list,loc.size,a,loc.register);
  1984. LOC_SUBSETREG,LOC_CSUBSETREG:
  1985. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1986. LOC_SUBSETREF,LOC_CSUBSETREF:
  1987. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1988. else
  1989. internalerror(200203272);
  1990. end;
  1991. end;
  1992. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1993. begin
  1994. case loc.loc of
  1995. LOC_REFERENCE,LOC_CREFERENCE:
  1996. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1997. LOC_REGISTER,LOC_CREGISTER:
  1998. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1999. LOC_SUBSETREG,LOC_CSUBSETREG:
  2000. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2001. LOC_SUBSETREF,LOC_CSUBSETREF:
  2002. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2003. LOC_MMREGISTER,LOC_CMMREGISTER:
  2004. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  2005. else
  2006. internalerror(200203271);
  2007. end;
  2008. end;
  2009. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2010. begin
  2011. case loc.loc of
  2012. LOC_REFERENCE,LOC_CREFERENCE:
  2013. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2014. LOC_REGISTER,LOC_CREGISTER:
  2015. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2016. LOC_CONSTANT:
  2017. a_load_const_reg(list,tosize,loc.value,reg);
  2018. LOC_SUBSETREG,LOC_CSUBSETREG:
  2019. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2020. LOC_SUBSETREF,LOC_CSUBSETREF:
  2021. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2022. else
  2023. internalerror(200109092);
  2024. end;
  2025. end;
  2026. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2027. begin
  2028. case loc.loc of
  2029. LOC_REFERENCE,LOC_CREFERENCE:
  2030. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2031. LOC_REGISTER,LOC_CREGISTER:
  2032. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2033. LOC_CONSTANT:
  2034. a_load_const_ref(list,tosize,loc.value,ref);
  2035. LOC_SUBSETREG,LOC_CSUBSETREG:
  2036. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2037. LOC_SUBSETREF,LOC_CSUBSETREF:
  2038. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2039. else
  2040. internalerror(200109302);
  2041. end;
  2042. end;
  2043. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2044. begin
  2045. case loc.loc of
  2046. LOC_REFERENCE,LOC_CREFERENCE:
  2047. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2048. LOC_REGISTER,LOC_CREGISTER:
  2049. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2050. LOC_CONSTANT:
  2051. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2052. LOC_SUBSETREG,LOC_CSUBSETREG:
  2053. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2054. LOC_SUBSETREF,LOC_CSUBSETREF:
  2055. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2056. else
  2057. internalerror(2006052310);
  2058. end;
  2059. end;
  2060. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2061. begin
  2062. case loc.loc of
  2063. LOC_REFERENCE,LOC_CREFERENCE:
  2064. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2065. LOC_REGISTER,LOC_CREGISTER:
  2066. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2067. LOC_SUBSETREG,LOC_CSUBSETREG:
  2068. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2069. LOC_SUBSETREF,LOC_CSUBSETREF:
  2070. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2071. else
  2072. internalerror(2006051510);
  2073. end;
  2074. end;
  2075. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2076. var
  2077. powerval : longint;
  2078. begin
  2079. case op of
  2080. OP_OR :
  2081. begin
  2082. { or with zero returns same result }
  2083. if a = 0 then
  2084. op:=OP_NONE
  2085. else
  2086. { or with max returns max }
  2087. if a = -1 then
  2088. op:=OP_MOVE;
  2089. end;
  2090. OP_AND :
  2091. begin
  2092. { and with max returns same result }
  2093. if (a = -1) then
  2094. op:=OP_NONE
  2095. else
  2096. { and with 0 returns 0 }
  2097. if a=0 then
  2098. op:=OP_MOVE;
  2099. end;
  2100. OP_DIV :
  2101. begin
  2102. { division by 1 returns result }
  2103. if a = 1 then
  2104. op:=OP_NONE
  2105. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2106. begin
  2107. a := powerval;
  2108. op:= OP_SHR;
  2109. end;
  2110. end;
  2111. OP_IDIV:
  2112. begin
  2113. if a = 1 then
  2114. op:=OP_NONE;
  2115. end;
  2116. OP_MUL,OP_IMUL:
  2117. begin
  2118. if a = 1 then
  2119. op:=OP_NONE
  2120. else
  2121. if a=0 then
  2122. op:=OP_MOVE
  2123. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2124. begin
  2125. a := powerval;
  2126. op:= OP_SHL;
  2127. end;
  2128. end;
  2129. OP_ADD,OP_SUB:
  2130. begin
  2131. if a = 0 then
  2132. op:=OP_NONE;
  2133. end;
  2134. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2135. begin
  2136. if a = 0 then
  2137. op:=OP_NONE;
  2138. end;
  2139. end;
  2140. end;
  2141. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2142. begin
  2143. case loc.loc of
  2144. LOC_REFERENCE, LOC_CREFERENCE:
  2145. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2146. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2147. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2148. else
  2149. internalerror(200203301);
  2150. end;
  2151. end;
  2152. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2153. begin
  2154. case loc.loc of
  2155. LOC_REFERENCE, LOC_CREFERENCE:
  2156. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2157. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2158. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2159. else
  2160. internalerror(48991);
  2161. end;
  2162. end;
  2163. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2164. var
  2165. reg: tregister;
  2166. regsize: tcgsize;
  2167. begin
  2168. if (fromsize>=tosize) then
  2169. regsize:=fromsize
  2170. else
  2171. regsize:=tosize;
  2172. reg:=getfpuregister(list,regsize);
  2173. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2174. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2175. end;
  2176. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2177. var
  2178. ref : treference;
  2179. begin
  2180. case cgpara.location^.loc of
  2181. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2182. begin
  2183. cgpara.check_simple_location;
  2184. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2185. end;
  2186. LOC_REFERENCE,LOC_CREFERENCE:
  2187. begin
  2188. cgpara.check_simple_location;
  2189. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2190. a_loadfpu_reg_ref(list,size,size,r,ref);
  2191. end;
  2192. LOC_REGISTER,LOC_CREGISTER:
  2193. begin
  2194. { paramfpu_ref does the check_simpe_location check here if necessary }
  2195. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2196. a_loadfpu_reg_ref(list,size,size,r,ref);
  2197. a_paramfpu_ref(list,size,ref,cgpara);
  2198. tg.Ungettemp(list,ref);
  2199. end;
  2200. else
  2201. internalerror(2002071004);
  2202. end;
  2203. end;
  2204. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2205. var
  2206. href : treference;
  2207. begin
  2208. cgpara.check_simple_location;
  2209. case cgpara.location^.loc of
  2210. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2211. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2212. LOC_REFERENCE,LOC_CREFERENCE:
  2213. begin
  2214. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2215. { concatcopy should choose the best way to copy the data }
  2216. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2217. end;
  2218. else
  2219. internalerror(200402201);
  2220. end;
  2221. end;
  2222. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2223. var
  2224. tmpreg : tregister;
  2225. begin
  2226. tmpreg:=getintregister(list,size);
  2227. a_load_ref_reg(list,size,size,ref,tmpreg);
  2228. a_op_const_reg(list,op,size,a,tmpreg);
  2229. a_load_reg_ref(list,size,size,tmpreg,ref);
  2230. end;
  2231. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2232. var
  2233. tmpreg: tregister;
  2234. begin
  2235. tmpreg := getintregister(list, size);
  2236. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2237. a_op_const_reg(list,op,size,a,tmpreg);
  2238. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2239. end;
  2240. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2241. var
  2242. tmpreg: tregister;
  2243. begin
  2244. tmpreg := getintregister(list, size);
  2245. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2246. a_op_const_reg(list,op,size,a,tmpreg);
  2247. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2248. end;
  2249. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2250. begin
  2251. case loc.loc of
  2252. LOC_REGISTER, LOC_CREGISTER:
  2253. a_op_const_reg(list,op,loc.size,a,loc.register);
  2254. LOC_REFERENCE, LOC_CREFERENCE:
  2255. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2256. LOC_SUBSETREG, LOC_CSUBSETREG:
  2257. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2258. LOC_SUBSETREF, LOC_CSUBSETREF:
  2259. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2260. else
  2261. internalerror(200109061);
  2262. end;
  2263. end;
  2264. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2265. var
  2266. tmpreg : tregister;
  2267. begin
  2268. tmpreg:=getintregister(list,size);
  2269. a_load_ref_reg(list,size,size,ref,tmpreg);
  2270. a_op_reg_reg(list,op,size,reg,tmpreg);
  2271. a_load_reg_ref(list,size,size,tmpreg,ref);
  2272. end;
  2273. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2274. var
  2275. tmpreg: tregister;
  2276. begin
  2277. case op of
  2278. OP_NOT,OP_NEG:
  2279. { handle it as "load ref,reg; op reg" }
  2280. begin
  2281. a_load_ref_reg(list,size,size,ref,reg);
  2282. a_op_reg_reg(list,op,size,reg,reg);
  2283. end;
  2284. else
  2285. begin
  2286. tmpreg:=getintregister(list,size);
  2287. a_load_ref_reg(list,size,size,ref,tmpreg);
  2288. a_op_reg_reg(list,op,size,tmpreg,reg);
  2289. end;
  2290. end;
  2291. end;
  2292. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2293. var
  2294. tmpreg: tregister;
  2295. begin
  2296. tmpreg := getintregister(list, opsize);
  2297. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2298. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2299. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2300. end;
  2301. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2302. var
  2303. tmpreg: tregister;
  2304. begin
  2305. tmpreg := getintregister(list, opsize);
  2306. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2307. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2308. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2309. end;
  2310. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2311. begin
  2312. case loc.loc of
  2313. LOC_REGISTER, LOC_CREGISTER:
  2314. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2315. LOC_REFERENCE, LOC_CREFERENCE:
  2316. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2317. LOC_SUBSETREG, LOC_CSUBSETREG:
  2318. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2319. LOC_SUBSETREF, LOC_CSUBSETREF:
  2320. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2321. else
  2322. internalerror(200109061);
  2323. end;
  2324. end;
  2325. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2326. var
  2327. tmpreg: tregister;
  2328. begin
  2329. case loc.loc of
  2330. LOC_REGISTER,LOC_CREGISTER:
  2331. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2332. LOC_REFERENCE,LOC_CREFERENCE:
  2333. begin
  2334. tmpreg:=getintregister(list,loc.size);
  2335. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2336. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2337. end;
  2338. LOC_SUBSETREG, LOC_CSUBSETREG:
  2339. begin
  2340. tmpreg:=getintregister(list,loc.size);
  2341. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2342. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2343. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2344. end;
  2345. LOC_SUBSETREF, LOC_CSUBSETREF:
  2346. begin
  2347. tmpreg:=getintregister(list,loc.size);
  2348. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2349. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2350. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2351. end;
  2352. else
  2353. internalerror(200109061);
  2354. end;
  2355. end;
  2356. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2357. a:aint;src,dst:Tregister);
  2358. begin
  2359. a_load_reg_reg(list,size,size,src,dst);
  2360. a_op_const_reg(list,op,size,a,dst);
  2361. end;
  2362. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2363. size: tcgsize; src1, src2, dst: tregister);
  2364. var
  2365. tmpreg: tregister;
  2366. begin
  2367. if (dst<>src1) then
  2368. begin
  2369. a_load_reg_reg(list,size,size,src2,dst);
  2370. a_op_reg_reg(list,op,size,src1,dst);
  2371. end
  2372. else
  2373. begin
  2374. { can we do a direct operation on the target register ? }
  2375. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2376. a_op_reg_reg(list,op,size,src2,dst)
  2377. else
  2378. begin
  2379. tmpreg:=getintregister(list,size);
  2380. a_load_reg_reg(list,size,size,src2,tmpreg);
  2381. a_op_reg_reg(list,op,size,src1,tmpreg);
  2382. a_load_reg_reg(list,size,size,tmpreg,dst);
  2383. end;
  2384. end;
  2385. end;
  2386. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2387. begin
  2388. a_op_const_reg_reg(list,op,size,a,src,dst);
  2389. ovloc.loc:=LOC_VOID;
  2390. end;
  2391. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2392. begin
  2393. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2394. ovloc.loc:=LOC_VOID;
  2395. end;
  2396. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2397. l : tasmlabel);
  2398. var
  2399. tmpreg: tregister;
  2400. begin
  2401. tmpreg:=getintregister(list,size);
  2402. a_load_ref_reg(list,size,size,ref,tmpreg);
  2403. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2404. end;
  2405. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2406. l : tasmlabel);
  2407. var
  2408. tmpreg : tregister;
  2409. begin
  2410. case loc.loc of
  2411. LOC_REGISTER,LOC_CREGISTER:
  2412. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2413. LOC_REFERENCE,LOC_CREFERENCE:
  2414. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2415. LOC_SUBSETREG, LOC_CSUBSETREG:
  2416. begin
  2417. tmpreg:=getintregister(list,size);
  2418. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2419. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2420. end;
  2421. LOC_SUBSETREF, LOC_CSUBSETREF:
  2422. begin
  2423. tmpreg:=getintregister(list,size);
  2424. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2425. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2426. end;
  2427. else
  2428. internalerror(200109061);
  2429. end;
  2430. end;
  2431. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2432. var
  2433. tmpreg: tregister;
  2434. begin
  2435. tmpreg:=getintregister(list,size);
  2436. a_load_ref_reg(list,size,size,ref,tmpreg);
  2437. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2438. end;
  2439. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2440. var
  2441. tmpreg: tregister;
  2442. begin
  2443. tmpreg:=getintregister(list,size);
  2444. a_load_ref_reg(list,size,size,ref,tmpreg);
  2445. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2446. end;
  2447. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2448. begin
  2449. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2450. end;
  2451. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2452. begin
  2453. case loc.loc of
  2454. LOC_REGISTER,
  2455. LOC_CREGISTER:
  2456. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2457. LOC_REFERENCE,
  2458. LOC_CREFERENCE :
  2459. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2460. LOC_CONSTANT:
  2461. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2462. LOC_SUBSETREG,
  2463. LOC_CSUBSETREG:
  2464. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2465. LOC_SUBSETREF,
  2466. LOC_CSUBSETREF:
  2467. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2468. else
  2469. internalerror(200203231);
  2470. end;
  2471. end;
  2472. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2473. var
  2474. tmpreg: tregister;
  2475. begin
  2476. tmpreg:=getintregister(list, cmpsize);
  2477. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2478. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2479. end;
  2480. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2481. var
  2482. tmpreg: tregister;
  2483. begin
  2484. tmpreg:=getintregister(list, cmpsize);
  2485. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2486. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2487. end;
  2488. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2489. l : tasmlabel);
  2490. var
  2491. tmpreg: tregister;
  2492. begin
  2493. case loc.loc of
  2494. LOC_REGISTER,LOC_CREGISTER:
  2495. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2496. LOC_REFERENCE,LOC_CREFERENCE:
  2497. begin
  2498. tmpreg:=getintregister(list,size);
  2499. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2500. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2501. end;
  2502. LOC_SUBSETREG, LOC_CSUBSETREG:
  2503. begin
  2504. tmpreg:=getintregister(list, size);
  2505. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2506. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2507. end;
  2508. LOC_SUBSETREF, LOC_CSUBSETREF:
  2509. begin
  2510. tmpreg:=getintregister(list, size);
  2511. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2512. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2513. end;
  2514. else
  2515. internalerror(200109061);
  2516. end;
  2517. end;
  2518. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2519. begin
  2520. case loc.loc of
  2521. LOC_MMREGISTER,LOC_CMMREGISTER:
  2522. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2523. LOC_REFERENCE,LOC_CREFERENCE:
  2524. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2525. LOC_REGISTER,LOC_CREGISTER:
  2526. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2527. else
  2528. internalerror(200310121);
  2529. end;
  2530. end;
  2531. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2532. begin
  2533. case loc.loc of
  2534. LOC_MMREGISTER,LOC_CMMREGISTER:
  2535. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2536. LOC_REFERENCE,LOC_CREFERENCE:
  2537. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2538. else
  2539. internalerror(200310122);
  2540. end;
  2541. end;
  2542. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2543. var
  2544. href : treference;
  2545. {$ifndef cpu64bitalu}
  2546. tmpreg : tregister;
  2547. reg64 : tregister64;
  2548. {$endif not cpu64bitalu}
  2549. begin
  2550. {$ifndef cpu64bitalu}
  2551. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  2552. (size<>OS_F64) then
  2553. {$endif not cpu64bitalu}
  2554. cgpara.check_simple_location;
  2555. case cgpara.location^.loc of
  2556. LOC_MMREGISTER,LOC_CMMREGISTER:
  2557. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2558. LOC_REFERENCE,LOC_CREFERENCE:
  2559. begin
  2560. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2561. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2562. end;
  2563. LOC_REGISTER,LOC_CREGISTER:
  2564. begin
  2565. if assigned(shuffle) and
  2566. not shufflescalar(shuffle) then
  2567. internalerror(2009112510);
  2568. {$ifndef cpu64bitalu}
  2569. if (size=OS_F64) then
  2570. begin
  2571. if not assigned(cgpara.location^.next) or
  2572. assigned(cgpara.location^.next^.next) then
  2573. internalerror(2009112512);
  2574. case cgpara.location^.next^.loc of
  2575. LOC_REGISTER,LOC_CREGISTER:
  2576. tmpreg:=cgpara.location^.next^.register;
  2577. LOC_REFERENCE,LOC_CREFERENCE:
  2578. tmpreg:=getintregister(list,OS_32);
  2579. else
  2580. internalerror(2009112910);
  2581. end;
  2582. if (target_info.endian=ENDIAN_BIG) then
  2583. begin
  2584. { paraloc^ -> high
  2585. paraloc^.next -> low }
  2586. reg64.reghi:=cgpara.location^.register;
  2587. reg64.reglo:=tmpreg;
  2588. end
  2589. else
  2590. begin
  2591. { paraloc^ -> low
  2592. paraloc^.next -> high }
  2593. reg64.reglo:=cgpara.location^.register;
  2594. reg64.reghi:=tmpreg;
  2595. end;
  2596. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  2597. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  2598. begin
  2599. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  2600. internalerror(2009112911);
  2601. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  2602. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  2603. end;
  2604. end
  2605. else
  2606. {$endif not cpu64bitalu}
  2607. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  2608. end
  2609. else
  2610. internalerror(200310123);
  2611. end;
  2612. end;
  2613. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2614. var
  2615. hr : tregister;
  2616. hs : tmmshuffle;
  2617. begin
  2618. cgpara.check_simple_location;
  2619. hr:=getmmregister(list,cgpara.location^.size);
  2620. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2621. if realshuffle(shuffle) then
  2622. begin
  2623. hs:=shuffle^;
  2624. removeshuffles(hs);
  2625. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2626. end
  2627. else
  2628. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2629. end;
  2630. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2631. begin
  2632. case loc.loc of
  2633. LOC_MMREGISTER,LOC_CMMREGISTER:
  2634. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2635. LOC_REFERENCE,LOC_CREFERENCE:
  2636. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2637. else
  2638. internalerror(200310123);
  2639. end;
  2640. end;
  2641. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2642. var
  2643. hr : tregister;
  2644. hs : tmmshuffle;
  2645. begin
  2646. hr:=getmmregister(list,size);
  2647. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2648. if realshuffle(shuffle) then
  2649. begin
  2650. hs:=shuffle^;
  2651. removeshuffles(hs);
  2652. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2653. end
  2654. else
  2655. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2656. end;
  2657. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2658. var
  2659. hr : tregister;
  2660. hs : tmmshuffle;
  2661. begin
  2662. hr:=getmmregister(list,size);
  2663. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2664. if realshuffle(shuffle) then
  2665. begin
  2666. hs:=shuffle^;
  2667. removeshuffles(hs);
  2668. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2669. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2670. end
  2671. else
  2672. begin
  2673. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2674. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2675. end;
  2676. end;
  2677. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  2678. var
  2679. tmpref: treference;
  2680. begin
  2681. if (tcgsize2size[fromsize]<>4) or
  2682. (tcgsize2size[tosize]<>4) then
  2683. internalerror(2009112503);
  2684. tg.gettemp(list,4,4,tt_normal,tmpref);
  2685. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  2686. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  2687. tg.ungettemp(list,tmpref);
  2688. end;
  2689. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  2690. var
  2691. tmpref: treference;
  2692. begin
  2693. if (tcgsize2size[fromsize]<>4) or
  2694. (tcgsize2size[tosize]<>4) then
  2695. internalerror(2009112504);
  2696. tg.gettemp(list,8,8,tt_normal,tmpref);
  2697. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  2698. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  2699. tg.ungettemp(list,tmpref);
  2700. end;
  2701. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2702. begin
  2703. case loc.loc of
  2704. LOC_CMMREGISTER,LOC_MMREGISTER:
  2705. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2706. LOC_CREFERENCE,LOC_REFERENCE:
  2707. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2708. else
  2709. internalerror(200312232);
  2710. end;
  2711. end;
  2712. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2713. begin
  2714. g_concatcopy(list,source,dest,len);
  2715. end;
  2716. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2717. var
  2718. cgpara1,cgpara2,cgpara3 : TCGPara;
  2719. begin
  2720. cgpara1.init;
  2721. cgpara2.init;
  2722. cgpara3.init;
  2723. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2724. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2725. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2726. paramanager.allocparaloc(list,cgpara3);
  2727. a_paramaddr_ref(list,dest,cgpara3);
  2728. paramanager.allocparaloc(list,cgpara2);
  2729. a_paramaddr_ref(list,source,cgpara2);
  2730. paramanager.allocparaloc(list,cgpara1);
  2731. a_param_const(list,OS_INT,len,cgpara1);
  2732. paramanager.freeparaloc(list,cgpara3);
  2733. paramanager.freeparaloc(list,cgpara2);
  2734. paramanager.freeparaloc(list,cgpara1);
  2735. allocallcpuregisters(list);
  2736. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  2737. deallocallcpuregisters(list);
  2738. cgpara3.done;
  2739. cgpara2.done;
  2740. cgpara1.done;
  2741. end;
  2742. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2743. var
  2744. cgpara1,cgpara2 : TCGPara;
  2745. begin
  2746. cgpara1.init;
  2747. cgpara2.init;
  2748. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2749. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2750. paramanager.allocparaloc(list,cgpara2);
  2751. a_paramaddr_ref(list,dest,cgpara2);
  2752. paramanager.allocparaloc(list,cgpara1);
  2753. a_paramaddr_ref(list,source,cgpara1);
  2754. paramanager.freeparaloc(list,cgpara2);
  2755. paramanager.freeparaloc(list,cgpara1);
  2756. allocallcpuregisters(list);
  2757. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  2758. deallocallcpuregisters(list);
  2759. cgpara2.done;
  2760. cgpara1.done;
  2761. end;
  2762. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2763. var
  2764. href : treference;
  2765. incrfunc : string;
  2766. cgpara1,cgpara2 : TCGPara;
  2767. begin
  2768. cgpara1.init;
  2769. cgpara2.init;
  2770. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2771. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2772. if is_interfacecom(t) then
  2773. incrfunc:='FPC_INTF_INCR_REF'
  2774. else if is_ansistring(t) then
  2775. incrfunc:='FPC_ANSISTR_INCR_REF'
  2776. else if is_widestring(t) then
  2777. incrfunc:='FPC_WIDESTR_INCR_REF'
  2778. else if is_unicodestring(t) then
  2779. incrfunc:='FPC_UNICODESTR_INCR_REF'
  2780. else if is_dynamic_array(t) then
  2781. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2782. else
  2783. incrfunc:='';
  2784. { call the special incr function or the generic addref }
  2785. if incrfunc<>'' then
  2786. begin
  2787. paramanager.allocparaloc(list,cgpara1);
  2788. { widestrings aren't ref. counted on all platforms so we need the address
  2789. to create a real copy }
  2790. if is_widestring(t) then
  2791. a_paramaddr_ref(list,ref,cgpara1)
  2792. else
  2793. { these functions get the pointer by value }
  2794. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2795. paramanager.freeparaloc(list,cgpara1);
  2796. allocallcpuregisters(list);
  2797. a_call_name(list,incrfunc,false);
  2798. deallocallcpuregisters(list);
  2799. end
  2800. else
  2801. begin
  2802. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2803. paramanager.allocparaloc(list,cgpara2);
  2804. a_paramaddr_ref(list,href,cgpara2);
  2805. paramanager.allocparaloc(list,cgpara1);
  2806. a_paramaddr_ref(list,ref,cgpara1);
  2807. paramanager.freeparaloc(list,cgpara1);
  2808. paramanager.freeparaloc(list,cgpara2);
  2809. allocallcpuregisters(list);
  2810. a_call_name(list,'FPC_ADDREF',false);
  2811. deallocallcpuregisters(list);
  2812. end;
  2813. cgpara2.done;
  2814. cgpara1.done;
  2815. end;
  2816. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2817. var
  2818. href : treference;
  2819. decrfunc : string;
  2820. needrtti : boolean;
  2821. cgpara1,cgpara2 : TCGPara;
  2822. tempreg1,tempreg2 : TRegister;
  2823. begin
  2824. cgpara1.init;
  2825. cgpara2.init;
  2826. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2827. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2828. needrtti:=false;
  2829. if is_interfacecom(t) then
  2830. decrfunc:='FPC_INTF_DECR_REF'
  2831. else if is_ansistring(t) then
  2832. decrfunc:='FPC_ANSISTR_DECR_REF'
  2833. else if is_widestring(t) then
  2834. decrfunc:='FPC_WIDESTR_DECR_REF'
  2835. else if is_unicodestring(t) then
  2836. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2837. else if is_dynamic_array(t) then
  2838. begin
  2839. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2840. needrtti:=true;
  2841. end
  2842. else
  2843. decrfunc:='';
  2844. { call the special decr function or the generic decref }
  2845. if decrfunc<>'' then
  2846. begin
  2847. if needrtti then
  2848. begin
  2849. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2850. tempreg2:=getaddressregister(list);
  2851. a_loadaddr_ref_reg(list,href,tempreg2);
  2852. end;
  2853. tempreg1:=getaddressregister(list);
  2854. a_loadaddr_ref_reg(list,ref,tempreg1);
  2855. if needrtti then
  2856. begin
  2857. paramanager.allocparaloc(list,cgpara2);
  2858. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2859. paramanager.freeparaloc(list,cgpara2);
  2860. end;
  2861. paramanager.allocparaloc(list,cgpara1);
  2862. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2863. paramanager.freeparaloc(list,cgpara1);
  2864. allocallcpuregisters(list);
  2865. a_call_name(list,decrfunc,false);
  2866. deallocallcpuregisters(list);
  2867. end
  2868. else
  2869. begin
  2870. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2871. paramanager.allocparaloc(list,cgpara2);
  2872. a_paramaddr_ref(list,href,cgpara2);
  2873. paramanager.allocparaloc(list,cgpara1);
  2874. a_paramaddr_ref(list,ref,cgpara1);
  2875. paramanager.freeparaloc(list,cgpara1);
  2876. paramanager.freeparaloc(list,cgpara2);
  2877. allocallcpuregisters(list);
  2878. a_call_name(list,'FPC_DECREF',false);
  2879. deallocallcpuregisters(list);
  2880. end;
  2881. cgpara2.done;
  2882. cgpara1.done;
  2883. end;
  2884. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2885. var
  2886. href : treference;
  2887. cgpara1,cgpara2 : TCGPara;
  2888. begin
  2889. cgpara1.init;
  2890. cgpara2.init;
  2891. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2892. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2893. if is_ansistring(t) or
  2894. is_widestring(t) or
  2895. is_unicodestring(t) or
  2896. is_interfacecom(t) or
  2897. is_dynamic_array(t) then
  2898. a_load_const_ref(list,OS_ADDR,0,ref)
  2899. else
  2900. begin
  2901. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2902. paramanager.allocparaloc(list,cgpara2);
  2903. a_paramaddr_ref(list,href,cgpara2);
  2904. paramanager.allocparaloc(list,cgpara1);
  2905. a_paramaddr_ref(list,ref,cgpara1);
  2906. paramanager.freeparaloc(list,cgpara1);
  2907. paramanager.freeparaloc(list,cgpara2);
  2908. allocallcpuregisters(list);
  2909. a_call_name(list,'FPC_INITIALIZE',false);
  2910. deallocallcpuregisters(list);
  2911. end;
  2912. cgpara1.done;
  2913. cgpara2.done;
  2914. end;
  2915. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2916. var
  2917. href : treference;
  2918. cgpara1,cgpara2 : TCGPara;
  2919. begin
  2920. cgpara1.init;
  2921. cgpara2.init;
  2922. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2923. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2924. if is_ansistring(t) or
  2925. is_widestring(t) or
  2926. is_unicodestring(t) or
  2927. is_interfacecom(t) then
  2928. begin
  2929. g_decrrefcount(list,t,ref);
  2930. a_load_const_ref(list,OS_ADDR,0,ref);
  2931. end
  2932. else
  2933. begin
  2934. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2935. paramanager.allocparaloc(list,cgpara2);
  2936. a_paramaddr_ref(list,href,cgpara2);
  2937. paramanager.allocparaloc(list,cgpara1);
  2938. a_paramaddr_ref(list,ref,cgpara1);
  2939. paramanager.freeparaloc(list,cgpara1);
  2940. paramanager.freeparaloc(list,cgpara2);
  2941. allocallcpuregisters(list);
  2942. a_call_name(list,'FPC_FINALIZE',false);
  2943. deallocallcpuregisters(list);
  2944. end;
  2945. cgpara1.done;
  2946. cgpara2.done;
  2947. end;
  2948. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2949. { generate range checking code for the value at location p. The type }
  2950. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2951. { is the original type used at that location. When both defs are equal }
  2952. { the check is also insert (needed for succ,pref,inc,dec) }
  2953. const
  2954. aintmax=high(aint);
  2955. var
  2956. neglabel : tasmlabel;
  2957. hreg : tregister;
  2958. lto,hto,
  2959. lfrom,hfrom : TConstExprInt;
  2960. fromsize, tosize: cardinal;
  2961. from_signed, to_signed: boolean;
  2962. begin
  2963. { range checking on and range checkable value? }
  2964. if not(cs_check_range in current_settings.localswitches) or
  2965. not(fromdef.typ in [orddef,enumdef]) or
  2966. { C-style booleans can't really fail range checks, }
  2967. { all values are always valid }
  2968. is_cbool(todef) then
  2969. exit;
  2970. {$ifndef cpu64bitalu}
  2971. { handle 64bit rangechecks separate for 32bit processors }
  2972. if is_64bit(fromdef) or is_64bit(todef) then
  2973. begin
  2974. cg64.g_rangecheck64(list,l,fromdef,todef);
  2975. exit;
  2976. end;
  2977. {$endif cpu64bitalu}
  2978. { only check when assigning to scalar, subranges are different, }
  2979. { when todef=fromdef then the check is always generated }
  2980. getrange(fromdef,lfrom,hfrom);
  2981. getrange(todef,lto,hto);
  2982. from_signed := is_signed(fromdef);
  2983. to_signed := is_signed(todef);
  2984. { check the rangedef of the array, not the array itself }
  2985. { (only change now, since getrange needs the arraydef) }
  2986. if (todef.typ = arraydef) then
  2987. todef := tarraydef(todef).rangedef;
  2988. { no range check if from and to are equal and are both longint/dword }
  2989. { (if we have a 32bit processor) or int64/qword, since such }
  2990. { operations can at most cause overflows (JM) }
  2991. { Note that these checks are mostly processor independent, they only }
  2992. { have to be changed once we introduce 64bit subrange types }
  2993. {$ifdef cpu64bitalu}
  2994. if (fromdef = todef) and
  2995. (fromdef.typ=orddef) and
  2996. (((((torddef(fromdef).ordtype = s64bit) and
  2997. (lfrom = low(int64)) and
  2998. (hfrom = high(int64))) or
  2999. ((torddef(fromdef).ordtype = u64bit) and
  3000. (lfrom = low(qword)) and
  3001. (hfrom = high(qword))) or
  3002. ((torddef(fromdef).ordtype = scurrency) and
  3003. (lfrom = low(int64)) and
  3004. (hfrom = high(int64)))))) then
  3005. exit;
  3006. {$else cpu64bitalu}
  3007. if (fromdef = todef) and
  3008. (fromdef.typ=orddef) and
  3009. (((((torddef(fromdef).ordtype = s32bit) and
  3010. (lfrom = int64(low(longint))) and
  3011. (hfrom = int64(high(longint)))) or
  3012. ((torddef(fromdef).ordtype = u32bit) and
  3013. (lfrom = low(cardinal)) and
  3014. (hfrom = high(cardinal)))))) then
  3015. exit;
  3016. {$endif cpu64bitalu}
  3017. { optimize some range checks away in safe cases }
  3018. fromsize := fromdef.size;
  3019. tosize := todef.size;
  3020. if ((from_signed = to_signed) or
  3021. (not from_signed)) and
  3022. (lto<=lfrom) and (hto>=hfrom) and
  3023. (fromsize <= tosize) then
  3024. begin
  3025. { if fromsize < tosize, and both have the same signed-ness or }
  3026. { fromdef is unsigned, then all bit patterns from fromdef are }
  3027. { valid for todef as well }
  3028. if (fromsize < tosize) then
  3029. exit;
  3030. if (fromsize = tosize) and
  3031. (from_signed = to_signed) then
  3032. { only optimize away if all bit patterns which fit in fromsize }
  3033. { are valid for the todef }
  3034. begin
  3035. {$ifopt Q+}
  3036. {$define overflowon}
  3037. {$Q-}
  3038. {$endif}
  3039. {$ifopt R+}
  3040. {$define rangeon}
  3041. {$R-}
  3042. {$endif}
  3043. if to_signed then
  3044. begin
  3045. { calculation of the low/high ranges must not overflow 64 bit
  3046. otherwise we end up comparing with zero for 64 bit data types on
  3047. 64 bit processors }
  3048. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  3049. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  3050. exit
  3051. end
  3052. else
  3053. begin
  3054. { calculation of the low/high ranges must not overflow 64 bit
  3055. otherwise we end up having all zeros for 64 bit data types on
  3056. 64 bit processors }
  3057. if (lto = 0) and
  3058. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  3059. exit
  3060. end;
  3061. {$ifdef overflowon}
  3062. {$Q+}
  3063. {$undef overflowon}
  3064. {$endif}
  3065. {$ifdef rangeon}
  3066. {$R+}
  3067. {$undef rangeon}
  3068. {$endif}
  3069. end
  3070. end;
  3071. { generate the rangecheck code for the def where we are going to }
  3072. { store the result }
  3073. { use the trick that }
  3074. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  3075. { To be able to do that, we have to make sure however that either }
  3076. { fromdef and todef are both signed or unsigned, or that we leave }
  3077. { the parts < 0 and > maxlongint out }
  3078. if from_signed xor to_signed then
  3079. begin
  3080. if from_signed then
  3081. { from is signed, to is unsigned }
  3082. begin
  3083. { if high(from) < 0 -> always range error }
  3084. if (hfrom < 0) or
  3085. { if low(to) > maxlongint also range error }
  3086. (lto > aintmax) then
  3087. begin
  3088. a_call_name(list,'FPC_RANGEERROR',false);
  3089. exit
  3090. end;
  3091. { from is signed and to is unsigned -> when looking at to }
  3092. { as an signed value, it must be < maxaint (otherwise }
  3093. { it will become negative, which is invalid since "to" is unsigned) }
  3094. if hto > aintmax then
  3095. hto := aintmax;
  3096. end
  3097. else
  3098. { from is unsigned, to is signed }
  3099. begin
  3100. if (lfrom > aintmax) or
  3101. (hto < 0) then
  3102. begin
  3103. a_call_name(list,'FPC_RANGEERROR',false);
  3104. exit
  3105. end;
  3106. { from is unsigned and to is signed -> when looking at to }
  3107. { as an unsigned value, it must be >= 0 (since negative }
  3108. { values are the same as values > maxlongint) }
  3109. if lto < 0 then
  3110. lto := 0;
  3111. end;
  3112. end;
  3113. hreg:=getintregister(list,OS_INT);
  3114. a_load_loc_reg(list,OS_INT,l,hreg);
  3115. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3116. current_asmdata.getjumplabel(neglabel);
  3117. {
  3118. if from_signed then
  3119. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3120. else
  3121. }
  3122. {$ifdef cpu64bitalu}
  3123. if qword(hto-lto)>qword(aintmax) then
  3124. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3125. else
  3126. {$endif cpu64bitalu}
  3127. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3128. a_call_name(list,'FPC_RANGEERROR',false);
  3129. a_label(list,neglabel);
  3130. end;
  3131. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3132. begin
  3133. g_overflowCheck(list,loc,def);
  3134. end;
  3135. {$ifdef cpuflags}
  3136. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3137. var
  3138. tmpreg : tregister;
  3139. begin
  3140. tmpreg:=getintregister(list,size);
  3141. g_flags2reg(list,size,f,tmpreg);
  3142. a_load_reg_ref(list,size,size,tmpreg,ref);
  3143. end;
  3144. {$endif cpuflags}
  3145. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3146. var
  3147. OKLabel : tasmlabel;
  3148. cgpara1 : TCGPara;
  3149. begin
  3150. if (cs_check_object in current_settings.localswitches) or
  3151. (cs_check_range in current_settings.localswitches) then
  3152. begin
  3153. current_asmdata.getjumplabel(oklabel);
  3154. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3155. cgpara1.init;
  3156. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3157. paramanager.allocparaloc(list,cgpara1);
  3158. a_param_const(list,OS_INT,210,cgpara1);
  3159. paramanager.freeparaloc(list,cgpara1);
  3160. a_call_name(list,'FPC_HANDLEERROR',false);
  3161. a_label(list,oklabel);
  3162. cgpara1.done;
  3163. end;
  3164. end;
  3165. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3166. var
  3167. hrefvmt : treference;
  3168. cgpara1,cgpara2 : TCGPara;
  3169. begin
  3170. cgpara1.init;
  3171. cgpara2.init;
  3172. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3173. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3174. if (cs_check_object in current_settings.localswitches) then
  3175. begin
  3176. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3177. paramanager.allocparaloc(list,cgpara2);
  3178. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3179. paramanager.allocparaloc(list,cgpara1);
  3180. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3181. paramanager.freeparaloc(list,cgpara1);
  3182. paramanager.freeparaloc(list,cgpara2);
  3183. allocallcpuregisters(list);
  3184. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3185. deallocallcpuregisters(list);
  3186. end
  3187. else
  3188. if (cs_check_range in current_settings.localswitches) then
  3189. begin
  3190. paramanager.allocparaloc(list,cgpara1);
  3191. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3192. paramanager.freeparaloc(list,cgpara1);
  3193. allocallcpuregisters(list);
  3194. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3195. deallocallcpuregisters(list);
  3196. end;
  3197. cgpara1.done;
  3198. cgpara2.done;
  3199. end;
  3200. {*****************************************************************************
  3201. Entry/Exit Code Functions
  3202. *****************************************************************************}
  3203. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3204. var
  3205. sizereg,sourcereg,lenreg : tregister;
  3206. cgpara1,cgpara2,cgpara3 : TCGPara;
  3207. begin
  3208. { because some abis don't support dynamic stack allocation properly
  3209. open array value parameters are copied onto the heap
  3210. }
  3211. { calculate necessary memory }
  3212. { read/write operations on one register make the life of the register allocator hard }
  3213. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3214. begin
  3215. lenreg:=getintregister(list,OS_INT);
  3216. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3217. end
  3218. else
  3219. lenreg:=lenloc.register;
  3220. sizereg:=getintregister(list,OS_INT);
  3221. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3222. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3223. { load source }
  3224. sourcereg:=getaddressregister(list);
  3225. a_loadaddr_ref_reg(list,ref,sourcereg);
  3226. { do getmem call }
  3227. cgpara1.init;
  3228. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3229. paramanager.allocparaloc(list,cgpara1);
  3230. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3231. paramanager.freeparaloc(list,cgpara1);
  3232. allocallcpuregisters(list);
  3233. a_call_name(list,'FPC_GETMEM',false);
  3234. deallocallcpuregisters(list);
  3235. cgpara1.done;
  3236. { return the new address }
  3237. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3238. { do move call }
  3239. cgpara1.init;
  3240. cgpara2.init;
  3241. cgpara3.init;
  3242. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3243. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3244. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3245. { load size }
  3246. paramanager.allocparaloc(list,cgpara3);
  3247. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3248. { load destination }
  3249. paramanager.allocparaloc(list,cgpara2);
  3250. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3251. { load source }
  3252. paramanager.allocparaloc(list,cgpara1);
  3253. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3254. paramanager.freeparaloc(list,cgpara3);
  3255. paramanager.freeparaloc(list,cgpara2);
  3256. paramanager.freeparaloc(list,cgpara1);
  3257. allocallcpuregisters(list);
  3258. a_call_name(list,'FPC_MOVE',false);
  3259. deallocallcpuregisters(list);
  3260. cgpara3.done;
  3261. cgpara2.done;
  3262. cgpara1.done;
  3263. end;
  3264. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3265. var
  3266. cgpara1 : TCGPara;
  3267. begin
  3268. { do move call }
  3269. cgpara1.init;
  3270. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3271. { load source }
  3272. paramanager.allocparaloc(list,cgpara1);
  3273. a_param_loc(list,l,cgpara1);
  3274. paramanager.freeparaloc(list,cgpara1);
  3275. allocallcpuregisters(list);
  3276. a_call_name(list,'FPC_FREEMEM',false);
  3277. deallocallcpuregisters(list);
  3278. cgpara1.done;
  3279. end;
  3280. procedure tcg.g_save_registers(list:TAsmList);
  3281. var
  3282. href : treference;
  3283. size : longint;
  3284. r : integer;
  3285. begin
  3286. { calculate temp. size }
  3287. size:=0;
  3288. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3289. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3290. inc(size,sizeof(aint));
  3291. { mm registers }
  3292. if uses_registers(R_MMREGISTER) then
  3293. begin
  3294. { Make sure we reserve enough space to do the alignment based on the offset
  3295. later on. We can't use the size for this, because the alignment of the start
  3296. of the temp is smaller than needed for an OS_VECTOR }
  3297. inc(size,tcgsize2size[OS_VECTOR]);
  3298. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3299. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3300. inc(size,tcgsize2size[OS_VECTOR]);
  3301. end;
  3302. if size>0 then
  3303. begin
  3304. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3305. include(current_procinfo.flags,pi_has_saved_regs);
  3306. { Copy registers to temp }
  3307. href:=current_procinfo.save_regs_ref;
  3308. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3309. begin
  3310. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3311. begin
  3312. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3313. inc(href.offset,sizeof(aint));
  3314. end;
  3315. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3316. end;
  3317. if uses_registers(R_MMREGISTER) then
  3318. begin
  3319. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3320. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3321. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3322. begin
  3323. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3324. begin
  3325. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3326. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3327. end;
  3328. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3329. end;
  3330. end;
  3331. end;
  3332. end;
  3333. procedure tcg.g_restore_registers(list:TAsmList);
  3334. var
  3335. href : treference;
  3336. r : integer;
  3337. hreg : tregister;
  3338. begin
  3339. if not(pi_has_saved_regs in current_procinfo.flags) then
  3340. exit;
  3341. { Copy registers from temp }
  3342. href:=current_procinfo.save_regs_ref;
  3343. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3344. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3345. begin
  3346. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3347. { Allocate register so the optimizer does not remove the load }
  3348. a_reg_alloc(list,hreg);
  3349. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3350. inc(href.offset,sizeof(aint));
  3351. end;
  3352. if uses_registers(R_MMREGISTER) then
  3353. begin
  3354. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3355. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3356. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3357. begin
  3358. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3359. begin
  3360. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3361. { Allocate register so the optimizer does not remove the load }
  3362. a_reg_alloc(list,hreg);
  3363. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3364. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3365. end;
  3366. end;
  3367. end;
  3368. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3369. end;
  3370. procedure tcg.g_profilecode(list : TAsmList);
  3371. begin
  3372. end;
  3373. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3374. begin
  3375. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3376. end;
  3377. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3378. begin
  3379. a_load_const_ref(list, OS_INT, a, href);
  3380. end;
  3381. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3382. begin
  3383. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3384. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3385. end;
  3386. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3387. var
  3388. hsym : tsym;
  3389. href : treference;
  3390. paraloc : Pcgparalocation;
  3391. begin
  3392. { calculate the parameter info for the procdef }
  3393. if not procdef.has_paraloc_info then
  3394. begin
  3395. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3396. procdef.has_paraloc_info:=true;
  3397. end;
  3398. hsym:=tsym(procdef.parast.Find('self'));
  3399. if not(assigned(hsym) and
  3400. (hsym.typ=paravarsym)) then
  3401. internalerror(200305251);
  3402. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3403. while paraloc<>nil do
  3404. with paraloc^ do
  3405. begin
  3406. case loc of
  3407. LOC_REGISTER:
  3408. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3409. LOC_REFERENCE:
  3410. begin
  3411. { offset in the wrapper needs to be adjusted for the stored
  3412. return address }
  3413. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3414. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3415. end
  3416. else
  3417. internalerror(200309189);
  3418. end;
  3419. paraloc:=next;
  3420. end;
  3421. end;
  3422. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3423. begin
  3424. a_jmp_name(list,externalname);
  3425. end;
  3426. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3427. begin
  3428. a_call_name(list,s,false);
  3429. end;
  3430. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3431. var
  3432. l: tasmsymbol;
  3433. ref: treference;
  3434. begin
  3435. result := NR_NO;
  3436. case target_info.system of
  3437. system_powerpc_darwin,
  3438. system_i386_darwin,
  3439. system_powerpc64_darwin,
  3440. system_arm_darwin:
  3441. begin
  3442. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3443. if not(assigned(l)) then
  3444. begin
  3445. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3446. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3447. if not(weak) then
  3448. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  3449. else
  3450. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  3451. {$ifdef cpu64bitaddr}
  3452. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3453. {$else cpu64bitaddr}
  3454. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3455. {$endif cpu64bitaddr}
  3456. end;
  3457. result := getaddressregister(list);
  3458. reference_reset_symbol(ref,l,0,sizeof(pint));
  3459. { a_load_ref_reg will turn this into a pic-load if needed }
  3460. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3461. end;
  3462. end;
  3463. end;
  3464. procedure tcg.g_maybe_got_init(list: TAsmList);
  3465. begin
  3466. end;
  3467. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3468. begin
  3469. internalerror(200807231);
  3470. end;
  3471. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3472. begin
  3473. internalerror(200807232);
  3474. end;
  3475. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3476. begin
  3477. internalerror(200807233);
  3478. end;
  3479. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3480. begin
  3481. internalerror(200807234);
  3482. end;
  3483. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3484. begin
  3485. Result:=TRegister(0);
  3486. internalerror(200807238);
  3487. end;
  3488. {*****************************************************************************
  3489. TCG64
  3490. *****************************************************************************}
  3491. {$ifndef cpu64bitalu}
  3492. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3493. begin
  3494. a_load64_reg_reg(list,regsrc,regdst);
  3495. a_op64_const_reg(list,op,size,value,regdst);
  3496. end;
  3497. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3498. var
  3499. tmpreg64 : tregister64;
  3500. begin
  3501. { when src1=dst then we need to first create a temp to prevent
  3502. overwriting src1 with src2 }
  3503. if (regsrc1.reghi=regdst.reghi) or
  3504. (regsrc1.reglo=regdst.reghi) or
  3505. (regsrc1.reghi=regdst.reglo) or
  3506. (regsrc1.reglo=regdst.reglo) then
  3507. begin
  3508. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3509. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3510. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3511. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3512. a_load64_reg_reg(list,tmpreg64,regdst);
  3513. end
  3514. else
  3515. begin
  3516. a_load64_reg_reg(list,regsrc2,regdst);
  3517. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3518. end;
  3519. end;
  3520. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3521. var
  3522. tmpreg64 : tregister64;
  3523. begin
  3524. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3525. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3526. a_load64_subsetref_reg(list,sref,tmpreg64);
  3527. a_op64_const_reg(list,op,size,a,tmpreg64);
  3528. a_load64_reg_subsetref(list,tmpreg64,sref);
  3529. end;
  3530. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3531. var
  3532. tmpreg64 : tregister64;
  3533. begin
  3534. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3535. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3536. a_load64_subsetref_reg(list,sref,tmpreg64);
  3537. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3538. a_load64_reg_subsetref(list,tmpreg64,sref);
  3539. end;
  3540. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3541. var
  3542. tmpreg64 : tregister64;
  3543. begin
  3544. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3545. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3546. a_load64_subsetref_reg(list,sref,tmpreg64);
  3547. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3548. a_load64_reg_subsetref(list,tmpreg64,sref);
  3549. end;
  3550. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3551. var
  3552. tmpreg64 : tregister64;
  3553. begin
  3554. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3555. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3556. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3557. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3558. end;
  3559. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3560. begin
  3561. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3562. ovloc.loc:=LOC_VOID;
  3563. end;
  3564. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3565. begin
  3566. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3567. ovloc.loc:=LOC_VOID;
  3568. end;
  3569. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3570. begin
  3571. case l.loc of
  3572. LOC_REFERENCE, LOC_CREFERENCE:
  3573. a_load64_ref_subsetref(list,l.reference,sref);
  3574. LOC_REGISTER,LOC_CREGISTER:
  3575. a_load64_reg_subsetref(list,l.register64,sref);
  3576. LOC_CONSTANT :
  3577. a_load64_const_subsetref(list,l.value64,sref);
  3578. LOC_SUBSETREF,LOC_CSUBSETREF:
  3579. a_load64_subsetref_subsetref(list,l.sref,sref);
  3580. else
  3581. internalerror(2006082210);
  3582. end;
  3583. end;
  3584. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3585. begin
  3586. case l.loc of
  3587. LOC_REFERENCE, LOC_CREFERENCE:
  3588. a_load64_subsetref_ref(list,sref,l.reference);
  3589. LOC_REGISTER,LOC_CREGISTER:
  3590. a_load64_subsetref_reg(list,sref,l.register64);
  3591. LOC_SUBSETREF,LOC_CSUBSETREF:
  3592. a_load64_subsetref_subsetref(list,sref,l.sref);
  3593. else
  3594. internalerror(2006082211);
  3595. end;
  3596. end;
  3597. {$endif cpu64bitalu}
  3598. procedure destroy_codegen;
  3599. begin
  3600. cg.free;
  3601. cg:=nil;
  3602. {$ifndef cpu64bitalu}
  3603. cg64.free;
  3604. cg64:=nil;
  3605. {$endif cpu64bitalu}
  3606. end;
  3607. end.