cgbase.pas 28 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. trefaddr = (
  56. addr_no,
  57. addr_full,
  58. addr_pic,
  59. addr_pic_no_got
  60. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS) or defined(SPARC64)}
  61. ,
  62. { since we have only 16bit offsets, we need to be able to specify the high
  63. and lower 16 bits of the address of a symbol of up to 64 bit }
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS or SPARC64}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$if defined(RISCV32) or defined(RISCV64)}
  86. ,
  87. addr_hi20,
  88. addr_lo12,
  89. addr_pcrel_hi20,
  90. addr_pcrel_lo12,
  91. addr_pcrel
  92. {$endif RISCV}
  93. {$IFDEF AVR}
  94. ,addr_lo8
  95. ,addr_lo8_gs
  96. ,addr_hi8
  97. ,addr_hi8_gs
  98. {$ENDIF}
  99. {$IFDEF Z80}
  100. ,addr_lo8
  101. ,addr_hi8
  102. {$ENDIF}
  103. {$IFDEF i8086}
  104. ,addr_dgroup // the data segment group
  105. ,addr_fardataseg // the far data segment of the current pascal module (unit or program)
  106. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  107. {$ENDIF}
  108. {$IFDEF AARCH64}
  109. ,addr_page
  110. ,addr_pageoffset
  111. ,addr_gotpage
  112. ,addr_gotpageoffset
  113. {$ENDIF AARCH64}
  114. {$ifdef SPARC64}
  115. ,addr_gdop_hix22
  116. ,addr_gdop_lox22
  117. {$endif SPARC64}
  118. {$IFDEF ARM}
  119. ,addr_gottpoff
  120. ,addr_tpoff
  121. ,addr_tlsgd
  122. ,addr_tlsdesc
  123. ,addr_tlscall
  124. {$ENDIF}
  125. {$IFDEF i386}
  126. ,addr_ntpoff
  127. ,addr_tlsgd
  128. {$ENDIF}
  129. {$ifdef x86_64}
  130. ,addr_tpoff
  131. ,addr_tlsgd
  132. {$endif x86_64}
  133. );
  134. {# Generic opcodes, which must be supported by all processors
  135. }
  136. topcg =
  137. (
  138. OP_NONE,
  139. OP_MOVE, { replaced operation with direct load }
  140. OP_ADD, { simple addition }
  141. OP_AND, { simple logical and }
  142. OP_DIV, { simple unsigned division }
  143. OP_IDIV, { simple signed division }
  144. OP_IMUL, { simple signed multiply }
  145. OP_MUL, { simple unsigned multiply }
  146. OP_NEG, { simple negate }
  147. OP_NOT, { simple logical not }
  148. OP_OR, { simple logical or }
  149. OP_SAR, { arithmetic shift-right }
  150. OP_SHL, { logical shift left }
  151. OP_SHR, { logical shift right }
  152. OP_SUB, { simple subtraction }
  153. OP_XOR, { simple exclusive or }
  154. OP_ROL, { rotate left }
  155. OP_ROR { rotate right }
  156. );
  157. {# Generic flag values - used for jump locations }
  158. TOpCmp =
  159. (
  160. OC_NONE,
  161. OC_EQ, { equality comparison }
  162. OC_GT, { greater than (signed) }
  163. OC_LT, { less than (signed) }
  164. OC_GTE, { greater or equal than (signed) }
  165. OC_LTE, { less or equal than (signed) }
  166. OC_NE, { not equal }
  167. OC_BE, { less or equal than (unsigned) }
  168. OC_B, { less than (unsigned) }
  169. OC_AE, { greater or equal than (unsigned) }
  170. OC_A { greater than (unsigned) }
  171. );
  172. { indirect symbol flags }
  173. tindsymflag = (is_data,is_weak);
  174. tindsymflags = set of tindsymflag;
  175. { OS_NO is also used memory references with large data that can
  176. not be loaded in a register directly }
  177. TCgSize = (OS_NO,
  178. OS_8, OS_16, OS_32, OS_64, OS_128,
  179. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  180. { single, double, extended, comp, float128 }
  181. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  182. { multi-media sizes, describes only the register size but not how it is split,
  183. this information must be passed separately }
  184. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
  185. { Register types }
  186. TRegisterType = (
  187. R_INVALIDREGISTER, { = 0 }
  188. R_INTREGISTER, { = 1 }
  189. R_FPUREGISTER, { = 2 }
  190. { used by Intel only }
  191. R_MMXREGISTER, { = 3 }
  192. R_MMREGISTER, { = 4 }
  193. R_SPECIALREGISTER, { = 5 }
  194. R_ADDRESSREGISTER, { = 6 }
  195. { used on llvm, every temp gets its own "base register" }
  196. R_TEMPREGISTER, { = 7 }
  197. { used on llvm for tracking metadata (every unique metadata has its own base register) }
  198. R_METADATAREGISTER,{ = 8 }
  199. { optional MAC16 (16 bit multiply-accumulate) registers on Xtensa }
  200. R_MAC16REGISTER { = 9 }
  201. { do not add more than 16 elements (ifdef by cpu type if needed)
  202. so we can store this in one nibble and pack TRegister
  203. if the supreg width should be extended }
  204. );
  205. { Sub registers }
  206. TSubRegister = (
  207. R_SUBNONE, { = 0; no sub register possible }
  208. R_SUBL, { = 1; 8 bits, Like AL }
  209. R_SUBH, { = 2; 8 bits, Like AH }
  210. R_SUBW, { = 3; 16 bits, Like AX }
  211. R_SUBD, { = 4; 32 bits, Like EAX }
  212. R_SUBQ, { = 5; 64 bits, Like RAX }
  213. { For Sparc floats that use F0:F1 to store doubles }
  214. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  215. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  216. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  217. R_SUBMMS, { = 9; single scalar in multi media register }
  218. R_SUBMMD, { = 10; double scalar in multi media register }
  219. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  220. { For Intel X86 AVX-Register }
  221. R_SUBMMX, { = 12; 128 BITS }
  222. R_SUBMMY, { = 13; 256 BITS }
  223. R_SUBMMZ, { = 14; 512 BITS }
  224. {$ifdef Z80}
  225. { Subregisters for the flags register (Z80) }
  226. R_SUBFLAGCARRY, { = 15; Carry flag }
  227. R_SUBFLAGADDSUBTRACT, { = 16; Add/Subtract flag }
  228. R_SUBFLAGPARITYOVERFLOW, { = 17; Parity/Overflow flag }
  229. R_SUBFLAGUNUSEDBIT3, { = 18; Unused flag (bit 3) }
  230. R_SUBFLAGHALFCARRY, { = 19; Half Carry flag }
  231. R_SUBFLAGUNUSEDBIT5, { = 20; Unused flag (bit 5) }
  232. R_SUBFLAGZERO, { = 21; Zero flag }
  233. R_SUBFLAGSIGN, { = 22; Sign flag }
  234. {$else Z80}
  235. { Subregisters for the flags register (x86) }
  236. R_SUBFLAGCARRY, { = 15; Carry flag }
  237. R_SUBFLAGPARITY, { = 16; Parity flag }
  238. R_SUBFLAGAUXILIARY, { = 17; Auxiliary flag }
  239. R_SUBFLAGZERO, { = 18; Zero flag }
  240. R_SUBFLAGSIGN, { = 19; Sign flag }
  241. R_SUBFLAGOVERFLOW, { = 20; Overflow flag }
  242. R_SUBFLAGINTERRUPT, { = 21; Interrupt enable flag }
  243. R_SUBFLAGDIRECTION, { = 22; Direction flag }
  244. {$endif Z80}
  245. R_SUBMM8B, { = 23; for part of v regs on aarch64 }
  246. R_SUBMM16B, { = 24; for part of v regs on aarch64 }
  247. { subregisters for the metadata register (llvm) }
  248. R_SUBMETASTRING { = 25 }
  249. );
  250. TSubRegisterSet = set of TSubRegister;
  251. TSuperRegister = type word;
  252. {
  253. The new register coding:
  254. SuperRegister (bits 0..15)
  255. Subregister (bits 16..23)
  256. Register type (bits 24..31)
  257. TRegister is defined as an enum to make it incompatible
  258. with TSuperRegister to avoid mixing them
  259. }
  260. TRegister = (
  261. TRegisterLowEnum := Low(longint),
  262. TRegisterHighEnum := High(longint)
  263. );
  264. TRegisterRec=packed record
  265. {$ifdef FPC_BIG_ENDIAN}
  266. regtype : Tregistertype;
  267. subreg : Tsubregister;
  268. supreg : Tsuperregister;
  269. {$else FPC_BIG_ENDIAN}
  270. supreg : Tsuperregister;
  271. subreg : Tsubregister;
  272. regtype : Tregistertype;
  273. {$endif FPC_BIG_ENDIAN}
  274. end;
  275. { A type to store register locations for 64 Bit values. }
  276. {$ifdef cpu64bitalu}
  277. tregister64 = tregister;
  278. tregister128 = record
  279. reglo,reghi : tregister;
  280. end;
  281. {$else cpu64bitalu}
  282. tregister64 = record
  283. reglo,reghi : tregister;
  284. end;
  285. {$endif cpu64bitalu}
  286. Tregistermmxset = record
  287. reg0,reg1,reg2,reg3:Tregister
  288. end;
  289. { Set type definition for registers }
  290. tsuperregisterset = array[byte] of set of byte;
  291. pmmshuffle = ^tmmshuffle;
  292. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  293. passed to an mm operation is nil, it means that the whole location is moved }
  294. tmmshuffle = record
  295. { describes how many shuffles are actually described, if len=0 then
  296. moving the scalar with index 0 to the scalar with index 0 is meant,
  297. if len=-1, then a variable/unknown length is assumed }
  298. len : Shortint;
  299. { lower byte of each entry of this array describes index of the source data index while
  300. the upper byte describes the destination index }
  301. shuffles : array[1..1] of word;
  302. end;
  303. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  304. Psuperregisterarray=^Tsuperregisterarray;
  305. Tsuperregisterworklist=object
  306. buflength,
  307. buflengthinc,
  308. length:word;
  309. buf:Psuperregisterarray;
  310. constructor init;
  311. constructor copyfrom(const x:Tsuperregisterworklist);
  312. destructor done;
  313. procedure clear;
  314. procedure add(s:tsuperregister);
  315. function addnodup(s:tsuperregister): boolean;
  316. { returns the last element and removes it from the list }
  317. function get:tsuperregister;
  318. function readidx(i:word):tsuperregister;
  319. procedure deleteidx(i:word);
  320. function delete(s:tsuperregister):boolean;
  321. end;
  322. psuperregisterworklist=^tsuperregisterworklist;
  323. const
  324. { alias for easier understanding }
  325. R_SSEREGISTER = R_MMREGISTER;
  326. { Invalid register number }
  327. RS_INVALID = high(tsuperregister);
  328. NR_INVALID = tregister($ffffffff);
  329. tcgsize2size : Array[tcgsize] of integer =
  330. (0,
  331. { integer values }
  332. 1, 2, 4, 8, 16,
  333. 1, 2, 4, 8, 16,
  334. { floating point values }
  335. 4, 8, 10, 8, 16,
  336. { multimedia values }
  337. 1, 2, 4, 8, 16, 32, 64);
  338. tfloat2tcgsize: array[tfloattype] of tcgsize =
  339. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  340. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  341. (s32real,s64real,s80real,s64comp);
  342. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  343. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  344. {$if defined(cpu64bitalu)}
  345. { operand size describing an unsigned value in a pair of int registers }
  346. OS_PAIR = OS_128;
  347. { operand size describing an signed value in a pair of int registers }
  348. OS_SPAIR = OS_S128;
  349. {$elseif defined(cpu32bitalu)}
  350. { operand size describing an unsigned value in a pair of int registers }
  351. OS_PAIR = OS_64;
  352. { operand size describing an signed value in a pair of int registers }
  353. OS_SPAIR = OS_S64;
  354. {$elseif defined(cpu16bitalu)}
  355. { operand size describing an unsigned value in a pair of int registers }
  356. OS_PAIR = OS_32;
  357. { operand size describing an signed value in a pair of int registers }
  358. OS_SPAIR = OS_S32;
  359. {$elseif defined(cpu8bitalu)}
  360. { operand size describing an unsigned value in a pair of int registers }
  361. OS_PAIR = OS_16;
  362. { operand size describing an signed value in a pair of int registers }
  363. OS_SPAIR = OS_S16;
  364. {$endif}
  365. { Table to convert tcgsize variables to the correspondending
  366. unsigned types }
  367. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  368. OS_8, OS_16, OS_32, OS_64, OS_128,
  369. OS_8, OS_16, OS_32, OS_64, OS_128,
  370. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  371. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256, OS_M512);
  372. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  373. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  374. OS_S8, OS_S16, OS_S32, OS_S64, OS_S128,
  375. OS_F32, OS_F64, OS_F80, OS_C64, OS_F128,
  376. OS_M8, OS_M16, OS_M32, OS_M64, OS_M128, OS_M256,OS_M512);
  377. tcgloc2str : array[TCGLoc] of string[12] = (
  378. 'LOC_INVALID',
  379. 'LOC_VOID',
  380. 'LOC_CONST',
  381. 'LOC_JUMP',
  382. 'LOC_FLAGS',
  383. 'LOC_REG',
  384. 'LOC_CREG',
  385. 'LOC_FPUREG',
  386. 'LOC_CFPUREG',
  387. 'LOC_MMXREG',
  388. 'LOC_CMMXREG',
  389. 'LOC_MMREG',
  390. 'LOC_CMMREG',
  391. 'LOC_SSETREG',
  392. 'LOC_CSSETREG',
  393. 'LOC_SSETREF',
  394. 'LOC_CSSETREF',
  395. 'LOC_CREF',
  396. 'LOC_REF'
  397. );
  398. var
  399. mms_movescalar,
  400. mms_variable,
  401. mms_2,
  402. mms_4,
  403. mms_8,
  404. mms_16,
  405. mms_32 : pmmshuffle;
  406. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  407. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  408. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  409. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  410. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  411. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  412. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  413. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  414. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  415. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  416. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  417. function generic_regname(r:tregister):string;
  418. {# From a constant numeric value, return the abstract code generator
  419. size.
  420. }
  421. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  422. function int_float_cgsize(const a: tcgint): tcgsize;
  423. function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  424. function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  425. function tcgsize2str(cgsize: tcgsize):string;
  426. { return the inverse condition of opcmp }
  427. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  428. { return the opcmp needed when swapping the operands }
  429. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  430. { return whether op is commutative }
  431. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  432. { returns true, if shuffle describes a real shuffle operation and not only a move }
  433. function realshuffle(shuffle : pmmshuffle) : boolean;
  434. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  435. function shufflescalar(shuffle : pmmshuffle) : boolean;
  436. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  437. the source }
  438. procedure removeshuffles(var shuffle : tmmshuffle);
  439. function is_float_cgsize(size: tcgsize): boolean;{$ifdef USEINLINE}inline;{$endif}
  440. implementation
  441. uses
  442. verbose,
  443. cutils;
  444. {******************************************************************************
  445. tsuperregisterworklist
  446. ******************************************************************************}
  447. constructor tsuperregisterworklist.init;
  448. begin
  449. length:=0;
  450. buflength:=0;
  451. buflengthinc:=16;
  452. buf:=nil;
  453. end;
  454. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  455. begin
  456. self:=x;
  457. if x.buf<>nil then
  458. begin
  459. getmem(buf,buflength*sizeof(Tsuperregister));
  460. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  461. end;
  462. end;
  463. destructor tsuperregisterworklist.done;
  464. begin
  465. if assigned(buf) then
  466. freemem(buf);
  467. end;
  468. procedure tsuperregisterworklist.add(s:tsuperregister);
  469. begin
  470. inc(length);
  471. { Need to increase buffer length? }
  472. if length>=buflength then
  473. begin
  474. inc(buflength,buflengthinc);
  475. buflengthinc:=buflengthinc*2;
  476. if buflengthinc>256 then
  477. buflengthinc:=256;
  478. reallocmem(buf,buflength*sizeof(Tsuperregister));
  479. end;
  480. buf^[length-1]:=s;
  481. end;
  482. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  483. begin
  484. addnodup := false;
  485. if indexword(buf^,length,s) = -1 then
  486. begin
  487. add(s);
  488. addnodup := true;
  489. end;
  490. end;
  491. procedure tsuperregisterworklist.clear;
  492. begin
  493. length:=0;
  494. end;
  495. procedure tsuperregisterworklist.deleteidx(i:word);
  496. begin
  497. if i>=length then
  498. internalerror(200310144);
  499. buf^[i]:=buf^[length-1];
  500. dec(length);
  501. end;
  502. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  503. begin
  504. if (i >= length) then
  505. internalerror(2005010601);
  506. result := buf^[i];
  507. end;
  508. function tsuperregisterworklist.get:tsuperregister;
  509. begin
  510. if length=0 then
  511. internalerror(200310142);
  512. dec(length);
  513. get:=buf^[length];
  514. end;
  515. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  516. var
  517. i:longint;
  518. begin
  519. delete:=false;
  520. { indexword in 1.0.x and 1.9.4 is broken }
  521. i:=indexword(buf^,length,s);
  522. if i<>-1 then
  523. begin
  524. deleteidx(i);
  525. delete := true;
  526. end;
  527. end;
  528. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  529. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  530. begin
  531. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  532. end;
  533. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  534. begin
  535. include(regs[s shr 8],(s and $ff));
  536. end;
  537. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  538. begin
  539. exclude(regs[s shr 8],(s and $ff));
  540. end;
  541. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  542. begin
  543. result:=(s and $ff) in regs[s shr 8];
  544. end;
  545. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  546. begin
  547. tregisterrec(result).regtype:=rt;
  548. tregisterrec(result).supreg:=sr;
  549. tregisterrec(result).subreg:=sb;
  550. end;
  551. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  552. begin
  553. result:=tregisterrec(r).subreg;
  554. end;
  555. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  556. begin
  557. result:=tregisterrec(r).supreg;
  558. end;
  559. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  560. begin
  561. result:=tregisterrec(r).regtype;
  562. end;
  563. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  564. begin
  565. tregisterrec(r).subreg:=sr;
  566. end;
  567. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  568. begin
  569. tregisterrec(r).supreg:=sr;
  570. end;
  571. function generic_regname(r:tregister):string;
  572. var
  573. nr : string[12];
  574. begin
  575. str(getsupreg(r),nr);
  576. case getregtype(r) of
  577. R_INTREGISTER:
  578. result:='ireg'+nr;
  579. R_FPUREGISTER:
  580. result:='freg'+nr;
  581. R_MMREGISTER:
  582. result:='mreg'+nr;
  583. R_MMXREGISTER:
  584. result:='xreg'+nr;
  585. R_ADDRESSREGISTER:
  586. result:='areg'+nr;
  587. R_SPECIALREGISTER:
  588. result:='sreg'+nr;
  589. else
  590. begin
  591. result:='INVALID';
  592. exit;
  593. end;
  594. end;
  595. case getsubreg(r) of
  596. R_SUBNONE:
  597. ;
  598. R_SUBL:
  599. result:=result+'l';
  600. R_SUBH:
  601. result:=result+'h';
  602. R_SUBW:
  603. result:=result+'w';
  604. R_SUBD:
  605. result:=result+'d';
  606. R_SUBQ:
  607. result:=result+'q';
  608. R_SUBFS:
  609. result:=result+'fs';
  610. R_SUBFD:
  611. result:=result+'fd';
  612. R_SUBMMD:
  613. result:=result+'md';
  614. R_SUBMMS:
  615. result:=result+'ms';
  616. R_SUBMMWHOLE:
  617. result:=result+'ma';
  618. R_SUBMMX:
  619. result:=result+'mx';
  620. R_SUBMMY:
  621. result:=result+'my';
  622. R_SUBMMZ:
  623. result:=result+'mz';
  624. R_SUBMM8B:
  625. result:=result+'m8b';
  626. else
  627. internalerror(200308252);
  628. end;
  629. end;
  630. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  631. const
  632. size2cgsize : array[0..8] of tcgsize = (
  633. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  634. );
  635. begin
  636. {$ifdef cpu64bitalu}
  637. if a=16 then
  638. result:=OS_128
  639. else
  640. {$endif cpu64bitalu}
  641. if a>8 then
  642. result:=OS_NO
  643. else
  644. result:=size2cgsize[a];
  645. end;
  646. function int_float_cgsize(const a: tcgint): tcgsize;
  647. begin
  648. case a of
  649. 4 :
  650. result:=OS_F32;
  651. 8 :
  652. result:=OS_F64;
  653. 10 :
  654. result:=OS_F80;
  655. 16 :
  656. result:=OS_F128;
  657. else
  658. internalerror(200603211);
  659. end;
  660. end;
  661. function float_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  662. begin
  663. case a of
  664. 4:
  665. result := OS_M32;
  666. 16:
  667. result := OS_M128;
  668. 32:
  669. result := OS_M256;
  670. 64:
  671. result := OS_M512;
  672. else
  673. result := int_cgsize(a);
  674. end;
  675. end;
  676. function double_array_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  677. begin
  678. case a of
  679. 8:
  680. result := OS_M64;
  681. 16:
  682. result := OS_M128;
  683. 32:
  684. result := OS_M256;
  685. 64:
  686. result := OS_M512;
  687. else
  688. result := int_cgsize(a);
  689. end;
  690. end;
  691. function tcgsize2str(cgsize: tcgsize):string;
  692. begin
  693. Str(cgsize, Result);
  694. end;
  695. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  696. const
  697. list: array[TOpCmp] of TOpCmp =
  698. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  699. OC_B,OC_BE);
  700. begin
  701. inverse_opcmp := list[opcmp];
  702. end;
  703. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  704. const
  705. list: array[TOpCmp] of TOpCmp =
  706. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  707. OC_BE,OC_B);
  708. begin
  709. swap_opcmp := list[opcmp];
  710. end;
  711. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  712. const
  713. list: array[topcg] of boolean =
  714. (true,false,true,true,false,false,true,true,false,false,
  715. true,false,false,false,false,true,false,false);
  716. begin
  717. commutativeop := list[op];
  718. end;
  719. function realshuffle(shuffle : pmmshuffle) : boolean;
  720. var
  721. i : longint;
  722. begin
  723. realshuffle:=true;
  724. if (shuffle=nil) or (shuffle^.len<1) then
  725. realshuffle:=false
  726. else
  727. begin
  728. for i:=1 to shuffle^.len do
  729. begin
  730. if (shuffle^.shuffles[i] and $ff)<>((shuffle^.shuffles[i] and $ff00) shr 8) then
  731. exit;
  732. end;
  733. realshuffle:=false;
  734. end;
  735. end;
  736. function shufflescalar(shuffle : pmmshuffle) : boolean;
  737. begin
  738. result:=shuffle^.len=0;
  739. end;
  740. procedure removeshuffles(var shuffle : tmmshuffle);
  741. var
  742. i : longint;
  743. begin
  744. if shuffle.len=0 then
  745. exit;
  746. for i:=1 to shuffle.len do
  747. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  748. end;
  749. function is_float_cgsize(size: tcgsize): boolean;{$ifdef USEINLINE}inline;{$endif}
  750. begin
  751. result:=size in [OS_F32..OS_F128];
  752. end;
  753. procedure Initmms(var p : pmmshuffle;len : ShortInt);
  754. var
  755. i : Integer;
  756. begin
  757. Getmem(p,sizeof(tmmshuffle)+(max(len,0)-1)*2);
  758. p^.len:=len;
  759. for i:=1 to len do
  760. {$push}
  761. {$R-}
  762. p^.shuffles[i]:=i;
  763. {$pop}
  764. end;
  765. initialization
  766. Initmms(mms_movescalar,0);
  767. Initmms(mms_variable,-1);
  768. Initmms(mms_2,2);
  769. Initmms(mms_4,4);
  770. Initmms(mms_8,8);
  771. Initmms(mms_16,16);
  772. Initmms(mms_32,32);
  773. finalization
  774. Freemem(mms_movescalar);
  775. Freemem(mms_variable);
  776. Freemem(mms_2);
  777. Freemem(mms_4);
  778. Freemem(mms_8);
  779. Freemem(mms_16);
  780. Freemem(mms_32);
  781. end.