cgobj.pas 89 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the basic code generator object
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {# @abstract(Abstract code generator unit)
  20. Abstreact code generator unit. This contains the base class
  21. to implement for all new supported processors.
  22. WARNING: None of the routines implemented in these modules,
  23. or their descendants, should use the temp. allocator, as
  24. these routines may be called inside genentrycode, and the
  25. stack frame is already setup!
  26. }
  27. unit cgobj;
  28. {$i fpcdefs.inc}
  29. interface
  30. uses
  31. {$ifdef delphi}
  32. dmisc,
  33. {$endif}
  34. cclasses,globtype,
  35. cpubase,cpuinfo,cgbase,
  36. aasmbase,aasmtai,aasmcpu,
  37. symconst,symbase,symtype,symdef,symtable,rgobj
  38. ;
  39. type
  40. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  41. {# @abstract(Abstract code generator)
  42. This class implements an abstract instruction generator. Some of
  43. the methods of this class are generic, while others must
  44. be overriden for all new processors which will be supported
  45. by Free Pascal. For 32-bit processors, the base class
  46. sould be @link(tcg64f32) and not @var(tcg).
  47. }
  48. tcg = class
  49. public
  50. alignment : talignment;
  51. rg : array[tregistertype] of trgobj;
  52. t_times:cardinal;
  53. {$ifdef flowgraph}
  54. aktflownode:word;
  55. {$endif}
  56. {************************************************}
  57. { basic routines }
  58. constructor create;
  59. {# Initialize the register allocators needed for the codegenerator.}
  60. procedure init_register_allocators;virtual;
  61. {# Clean up the register allocators needed for the codegenerator.}
  62. procedure done_register_allocators;virtual;
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  71. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure ungetregister(list:Taasmoutput;r:Tregister);virtual;
  77. procedure ungetreference(list:Taasmoutput;const r:Treference);virtual;
  78. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  79. procedure add_move_instruction(instr:Taicpu);virtual;
  80. function uses_registers(rt:Tregistertype):boolean;virtual;
  81. {# Get a specific register.}
  82. procedure getexplicitregister(list:Taasmoutput;r:Tregister);virtual;
  83. {# Get multiple registers specified.}
  84. procedure allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  85. {# Free multiple registers specified.}
  86. procedure deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  87. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  88. function makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  89. {# Emit a label to the instruction stream. }
  90. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  91. {# Allocates register r by inserting a pai_realloc record }
  92. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  93. {# Deallocates register r by inserting a pa_regdealloc record}
  94. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  95. {# Pass a parameter, which is located in a register, to a routine.
  96. This routine should push/send the parameter to the routine, as
  97. required by the specific processor ABI and routine modifiers.
  98. This must be overriden for each CPU target.
  99. @param(size size of the operand in the register)
  100. @param(r register source of the operand)
  101. @param(locpara where the parameter will be stored)
  102. }
  103. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const locpara : tparalocation);virtual;
  104. {# Pass a parameter, which is a constant, to a routine.
  105. A generic version is provided. This routine should
  106. be overriden for optimization purposes if the cpu
  107. permits directly sending this type of parameter.
  108. @param(size size of the operand in constant)
  109. @param(a value of constant to send)
  110. @param(locpara where the parameter will be stored)
  111. }
  112. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aint;const locpara : tparalocation);virtual;
  113. {# Pass the value of a parameter, which is located in memory, to a routine.
  114. A generic version is provided. This routine should
  115. be overriden for optimization purposes if the cpu
  116. permits directly sending this type of parameter.
  117. @param(size size of the operand in constant)
  118. @param(r Memory reference of value to send)
  119. @param(locpara where the parameter will be stored)
  120. }
  121. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);virtual;
  122. {# Pass the value of a parameter, which can be located either in a register or memory location,
  123. to a routine.
  124. A generic version is provided.
  125. @param(l location of the operand to send)
  126. @param(nr parameter number (starting from one) of routine (from left to right))
  127. @param(locpara where the parameter will be stored)
  128. }
  129. procedure a_param_loc(list : taasmoutput;const l : tlocation;const locpara : tparalocation);
  130. {# Pass the address of a reference to a routine. This routine
  131. will calculate the address of the reference, and pass this
  132. calculated address as a parameter.
  133. A generic version is provided. This routine should
  134. be overriden for optimization purposes if the cpu
  135. permits directly sending this type of parameter.
  136. @param(r reference to get address from)
  137. @param(nr parameter number (starting from one) of routine (from left to right))
  138. }
  139. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);virtual;
  140. { Copies a whole memory block to the stack, the locpara must be a memory location }
  141. procedure a_param_copy_ref(list : taasmoutput;size : aint;const r : treference;const locpara : tparalocation);
  142. { Remarks:
  143. * If a method specifies a size you have only to take care
  144. of that number of bits, i.e. load_const_reg with OP_8 must
  145. only load the lower 8 bit of the specified register
  146. the rest of the register can be undefined
  147. if necessary the compiler will call a method
  148. to zero or sign extend the register
  149. * The a_load_XX_XX with OP_64 needn't to be
  150. implemented for 32 bit
  151. processors, the code generator takes care of that
  152. * the addr size is for work with the natural pointer
  153. size
  154. * the procedures without fpu/mm are only for integer usage
  155. * normally the first location is the source and the
  156. second the destination
  157. }
  158. { Copy a parameter to a (temporary) reference }
  159. procedure a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);virtual;
  160. { Copy a parameter to a register }
  161. procedure a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);virtual;
  162. {# Emits instruction to call the method specified by symbol name.
  163. This routine must be overriden for each new target cpu.
  164. There is no a_call_ref because loading the reference will use
  165. a temp register on most cpu's resulting in conflicts with the
  166. registers used for the parameters (PFV)
  167. }
  168. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  169. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  170. { move instructions }
  171. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  172. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);virtual;
  173. procedure a_load_const_loc(list : taasmoutput;a : aint;const loc : tlocation);
  174. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  175. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  176. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  177. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  178. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  179. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  180. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  181. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  182. { fpu move instructions }
  183. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  184. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  185. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  186. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  187. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  188. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);virtual;
  189. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);virtual;
  190. { vector register move instructions }
  191. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  192. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  193. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  194. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  195. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  196. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  197. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  198. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const locpara : tparalocation;shuffle : pmmshuffle); virtual;
  199. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  200. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  201. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  202. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  203. { basic arithmetic operations }
  204. { note: for operators which require only one argument (not, neg), use }
  205. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  206. { that in this case the *second* operand is used as both source and }
  207. { destination (JM) }
  208. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  209. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  210. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: Aint; const loc: tlocation);
  211. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  212. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  213. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  214. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  215. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  216. { trinary operations for processors that support them, 'emulated' }
  217. { on others. None with "ref" arguments since I don't think there }
  218. { are any processors that support it (JM) }
  219. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  220. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  221. { comparison operations }
  222. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  223. l : tasmlabel);virtual; abstract;
  224. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  225. l : tasmlabel); virtual;
  226. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  227. l : tasmlabel);
  228. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  229. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  230. procedure a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  231. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  232. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  233. l : tasmlabel);
  234. procedure a_jmp_name(list : taasmoutput;const s : string); virtual; abstract;
  235. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  236. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  237. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  238. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  239. }
  240. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  241. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  242. {
  243. This routine tries to optimize the const_reg opcode, and should be
  244. called at the start of a_op_const_reg. It returns the actual opcode
  245. to emit, and the constant value to emit. If this routine returns
  246. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  247. @param(op The opcode to emit, returns the opcode which must be emitted)
  248. @param(a The constant which should be emitted, returns the constant which must
  249. be emitted)
  250. @param(reg The register to emit the opcode with, returns the register with
  251. which the opcode will be emitted)
  252. }
  253. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg: tregister): boolean;virtual;
  254. {#
  255. This routine is used in exception management nodes. It should
  256. save the exception reason currently in the FUNCTION_RETURN_REG. The
  257. save should be done either to a temp (pointed to by href).
  258. or on the stack (pushing the value on the stack).
  259. The size of the value to save is OS_S32. The default version
  260. saves the exception reason to a temp. memory area.
  261. }
  262. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  263. {#
  264. This routine is used in exception management nodes. It should
  265. save the exception reason constant. The
  266. save should be done either to a temp (pointed to by href).
  267. or on the stack (pushing the value on the stack).
  268. The size of the value to save is OS_S32. The default version
  269. saves the exception reason to a temp. memory area.
  270. }
  271. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);virtual;
  272. {#
  273. This routine is used in exception management nodes. It should
  274. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  275. should either be in the temp. area (pointed to by href , href should
  276. *NOT* be freed) or on the stack (the value should be popped).
  277. The size of the value to save is OS_S32. The default version
  278. saves the exception reason to a temp. memory area.
  279. }
  280. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  281. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  282. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  283. {# This should emit the opcode to copy len bytes from the source
  284. to destination, if loadref is true, it assumes that it first must load
  285. the source address from the memory location where
  286. source points to.
  287. It must be overriden for each new target processor.
  288. @param(source Source reference of copy)
  289. @param(dest Destination reference of copy)
  290. @param(delsource Indicates if the source reference's resources should be freed)
  291. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  292. }
  293. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aint;delsource,loadref : boolean);virtual; abstract;
  294. {# This should emit the opcode to a shortrstring from the source
  295. to destination, if loadref is true, it assumes that it first must load
  296. the source address from the memory location where
  297. source points to.
  298. @param(source Source reference of copy)
  299. @param(dest Destination reference of copy)
  300. @param(delsource Indicates if the source reference's resources should be freed)
  301. @param(loadref Is the source reference a pointer to the actual source (TRUE), is it the actual source address (FALSE))
  302. }
  303. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;delsource,loadref : boolean);
  304. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  305. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  306. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  307. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  308. {# Generates range checking code. It is to note
  309. that this routine does not need to be overriden,
  310. as it takes care of everything.
  311. @param(p Node which contains the value to check)
  312. @param(todef Type definition of node to range check)
  313. }
  314. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  315. {# Generates overflow checking code for a node }
  316. procedure g_overflowcheck(list: taasmoutput; const l:tlocation; def:tdef); virtual; abstract;
  317. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aint);virtual;
  318. procedure g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);virtual;
  319. {# Emits instructions when compilation is done in profile
  320. mode (this is set as a command line option). The default
  321. behavior does nothing, should be overriden as required.
  322. }
  323. procedure g_profilecode(list : taasmoutput);virtual;
  324. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  325. @param(size Number of bytes to allocate)
  326. }
  327. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  328. {# Emits instruction for allocating the locals in entry
  329. code of a routine. This is one of the first
  330. routine called in @var(genentrycode).
  331. @param(localsize Number of bytes to allocate as locals)
  332. }
  333. procedure g_proc_entry(list : taasmoutput;localsize : longint;nostackframe:boolean);virtual; abstract;
  334. {# Emits instructions for returning from a subroutine.
  335. Should also restore the framepointer and stack.
  336. @param(parasize Number of bytes of parameters to deallocate from stack)
  337. }
  338. procedure g_proc_exit(list : taasmoutput;parasize:longint;nostackframe:boolean);virtual;abstract;
  339. {# This routine is called when generating the code for the entry point
  340. of a routine. It should save all registers which are not used in this
  341. routine, and which should be declared as saved in the std_saved_registers
  342. set.
  343. This routine is mainly used when linking to code which is generated
  344. by ABI-compliant compilers (like GCC), to make sure that the reserved
  345. registers of that ABI are not clobbered.
  346. @param(usedinproc Registers which are used in the code of this routine)
  347. }
  348. procedure g_save_standard_registers(list:Taasmoutput);virtual;abstract;
  349. {# This routine is called when generating the code for the exit point
  350. of a routine. It should restore all registers which were previously
  351. saved in @var(g_save_standard_registers).
  352. @param(usedinproc Registers which are used in the code of this routine)
  353. }
  354. procedure g_restore_standard_registers(list:Taasmoutput);virtual;abstract;
  355. procedure g_save_all_registers(list : taasmoutput);virtual;abstract;
  356. procedure g_restore_all_registers(list : taasmoutput;const funcretparaloc:tparalocation);virtual;abstract;
  357. end;
  358. {$ifndef cpu64bit}
  359. {# @abstract(Abstract code generator for 64 Bit operations)
  360. This class implements an abstract code generator class
  361. for 64 Bit operations.
  362. }
  363. tcg64 = class
  364. { Allocates 64 Bit register r by inserting a pai_realloc record }
  365. procedure a_reg_alloc(list : taasmoutput;r : tregister64);virtual;abstract;
  366. { Deallocates 64 Bit register r by inserting a pa_regdealloc record}
  367. procedure a_reg_dealloc(list : taasmoutput;r : tregister64);virtual;abstract;
  368. procedure a_load64_const_ref(list : taasmoutput;value : int64;const ref : treference);virtual;abstract;
  369. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  370. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  371. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  372. procedure a_load64_const_reg(list : taasmoutput;value : int64;reg : tregister64);virtual;abstract;
  373. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  374. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  375. procedure a_load64_const_loc(list : taasmoutput;value : int64;const l : tlocation);virtual;abstract;
  376. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  377. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  378. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  379. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  380. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  381. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  382. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  383. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;const ref : treference;reg : tregister64);virtual;abstract;
  384. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;regsrc,regdst : tregister64);virtual;abstract;
  385. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;regsrc : tregister64;const ref : treference);virtual;abstract;
  386. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;value : int64;regdst : tregister64);virtual;abstract;
  387. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;value : int64;const ref : treference);virtual;abstract;
  388. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;value : int64;const l: tlocation);virtual;abstract;
  389. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;reg : tregister64;const l : tlocation);virtual;abstract;
  390. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;const l : tlocation;reg64 : tregister64);virtual;abstract;
  391. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64;regsrc,regdst : tregister64);virtual;
  392. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);virtual;
  393. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : tparalocation);virtual;abstract;
  394. procedure a_param64_const(list : taasmoutput;value : int64;const loc : tparalocation);virtual;abstract;
  395. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : tparalocation);virtual;abstract;
  396. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : tparalocation);virtual;abstract;
  397. {
  398. This routine tries to optimize the const_reg opcode, and should be
  399. called at the start of a_op64_const_reg. It returns the actual opcode
  400. to emit, and the constant value to emit. If this routine returns
  401. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  402. @param(op The opcode to emit, returns the opcode which must be emitted)
  403. @param(a The constant which should be emitted, returns the constant which must
  404. be emitted)
  405. @param(reg The register to emit the opcode with, returns the register with
  406. which the opcode will be emitted)
  407. }
  408. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  409. { override to catch 64bit rangechecks }
  410. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  411. end;
  412. {$endif cpu64bit}
  413. procedure reference_release(list: taasmoutput; const ref : treference);
  414. { tlocation handling }
  415. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  416. procedure location_release(list: taasmoutput; const l : tlocation);
  417. procedure location_freetemp(list: taasmoutput; const l : tlocation);
  418. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  419. procedure location_swap(var destloc,sourceloc : tlocation);
  420. var
  421. {# Main code generator class }
  422. cg : tcg;
  423. {$ifndef cpu64bit}
  424. {# Code generator class for all operations working with 64-Bit operands }
  425. cg64 : tcg64;
  426. {$endif cpu64bit}
  427. implementation
  428. uses
  429. globals,options,systems,
  430. verbose,defutil,paramgr,
  431. tgobj,cutils,
  432. cgutils;
  433. const
  434. { Please leave this here, this module should NOT use
  435. exprasmlist, the lists are always passed as arguments.
  436. Declaring it as string here results in an error when compiling (PFV) }
  437. exprasmlist = 'error';
  438. {*****************************************************************************
  439. basic functionallity
  440. ******************************************************************************}
  441. constructor tcg.create;
  442. begin
  443. end;
  444. {*****************************************************************************
  445. register allocation
  446. ******************************************************************************}
  447. procedure tcg.init_register_allocators;
  448. begin
  449. fillchar(rg,sizeof(rg),0);
  450. add_reg_instruction_hook:={$ifdef FPCPROCVAR}@{$endif}add_reg_instruction;
  451. end;
  452. procedure tcg.done_register_allocators;
  453. begin
  454. { Safety }
  455. fillchar(rg,sizeof(rg),0);
  456. add_reg_instruction_hook:=nil;
  457. end;
  458. {$ifdef flowgraph}
  459. procedure Tcg.init_flowgraph;
  460. begin
  461. aktflownode:=0;
  462. end;
  463. procedure Tcg.done_flowgraph;
  464. begin
  465. end;
  466. {$endif}
  467. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  468. begin
  469. if not assigned(rg[R_INTREGISTER]) then
  470. internalerror(200312122);
  471. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  472. end;
  473. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  474. begin
  475. if not assigned(rg[R_FPUREGISTER]) then
  476. internalerror(200312123);
  477. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  478. end;
  479. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  480. begin
  481. if not assigned(rg[R_MMREGISTER]) then
  482. internalerror(200312124);
  483. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  484. end;
  485. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  486. begin
  487. if assigned(rg[R_ADDRESSREGISTER]) then
  488. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  489. else
  490. begin
  491. if not assigned(rg[R_INTREGISTER]) then
  492. internalerror(200312121);
  493. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  494. end;
  495. end;
  496. function Tcg.makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  497. var
  498. subreg:Tsubregister;
  499. begin
  500. subreg:=cgsize2subreg(size);
  501. result:=reg;
  502. setsubreg(result,subreg);
  503. { notify RA }
  504. if result<>reg then
  505. list.concat(tai_regalloc.resize(result));
  506. end;
  507. procedure tcg.getexplicitregister(list:Taasmoutput;r:Tregister);
  508. begin
  509. if not assigned(rg[getregtype(r)]) then
  510. internalerror(200312125);
  511. rg[getregtype(r)].getexplicitregister(list,r);
  512. end;
  513. procedure tcg.ungetregister(list:Taasmoutput;r:Tregister);
  514. begin
  515. if not assigned(rg[getregtype(r)]) then
  516. internalerror(200312126);
  517. rg[getregtype(r)].ungetregister(list,r);
  518. end;
  519. procedure tcg.ungetreference(list:Taasmoutput;const r:Treference);
  520. begin
  521. if r.base<>NR_NO then
  522. ungetregister(list,r.base);
  523. if r.index<>NR_NO then
  524. ungetregister(list,r.index);
  525. end;
  526. procedure tcg.allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  527. begin
  528. if assigned(rg[rt]) then
  529. rg[rt].allocexplicitregisters(list,r)
  530. else
  531. internalerror(200310092);
  532. end;
  533. procedure tcg.deallocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  534. begin
  535. if assigned(rg[rt]) then
  536. rg[rt].deallocexplicitregisters(list,r)
  537. else
  538. internalerror(200310093);
  539. end;
  540. function tcg.uses_registers(rt:Tregistertype):boolean;
  541. begin
  542. if assigned(rg[rt]) then
  543. result:=rg[rt].uses_registers
  544. else
  545. result:=false;
  546. end;
  547. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  548. var
  549. rt : tregistertype;
  550. begin
  551. rt:=getregtype(r);
  552. { Only add it when a register allocator is configured.
  553. No IE can be generated, because the VMT is written
  554. without a valid rg[] }
  555. if assigned(rg[rt]) then
  556. rg[rt].add_reg_instruction(instr,r);
  557. end;
  558. procedure tcg.add_move_instruction(instr:Taicpu);
  559. var
  560. rt : tregistertype;
  561. begin
  562. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  563. if assigned(rg[rt]) then
  564. rg[rt].add_move_instruction(instr)
  565. else
  566. internalerror(200310095);
  567. end;
  568. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  569. var
  570. rt : tregistertype;
  571. begin
  572. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  573. begin
  574. if assigned(rg[rt]) then
  575. rg[rt].do_register_allocation(list,headertai);
  576. end;
  577. { running the other register allocator passes could require addition int/addr. registers
  578. when spilling so run int/addr register allocation at the end }
  579. if assigned(rg[R_INTREGISTER]) then
  580. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  581. if assigned(rg[R_ADDRESSREGISTER]) then
  582. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  583. end;
  584. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  585. begin
  586. list.concat(tai_regalloc.alloc(r));
  587. end;
  588. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  589. begin
  590. list.concat(tai_regalloc.dealloc(r));
  591. end;
  592. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  593. begin
  594. list.concat(tai_label.create(l));
  595. end;
  596. {*****************************************************************************
  597. for better code generation these methods should be overridden
  598. ******************************************************************************}
  599. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const locpara : tparalocation);
  600. var
  601. ref : treference;
  602. begin
  603. case locpara.loc of
  604. LOC_REGISTER,LOC_CREGISTER:
  605. a_load_reg_reg(list,size,locpara.size,r,locpara.register);
  606. LOC_REFERENCE,LOC_CREFERENCE:
  607. begin
  608. reference_reset(ref);
  609. ref.base:=locpara.reference.index;
  610. ref.offset:=locpara.reference.offset;
  611. a_load_reg_ref(list,size,locpara.size,r,ref);
  612. end
  613. else
  614. internalerror(2002071004);
  615. end;
  616. end;
  617. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aint;const locpara : tparalocation);
  618. var
  619. ref : treference;
  620. begin
  621. case locpara.loc of
  622. LOC_REGISTER,LOC_CREGISTER:
  623. a_load_const_reg(list,locpara.size,a,locpara.register);
  624. LOC_REFERENCE,LOC_CREFERENCE:
  625. begin
  626. reference_reset(ref);
  627. ref.base:=locpara.reference.index;
  628. ref.offset:=locpara.reference.offset;
  629. a_load_const_ref(list,locpara.size,a,ref);
  630. end
  631. else
  632. internalerror(2002071004);
  633. end;
  634. end;
  635. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const locpara : tparalocation);
  636. var
  637. ref : treference;
  638. begin
  639. case locpara.loc of
  640. LOC_REGISTER,LOC_CREGISTER:
  641. a_load_ref_reg(list,size,locpara.size,r,locpara.register);
  642. LOC_REFERENCE,LOC_CREFERENCE:
  643. begin
  644. reference_reset(ref);
  645. ref.base:=locpara.reference.index;
  646. ref.offset:=locpara.reference.offset;
  647. { use concatcopy, because it can also be a float which fails when
  648. load_ref_ref is used }
  649. g_concatcopy(list,r,ref,tcgsize2size[size],false,false);
  650. end
  651. else
  652. internalerror(2002071004);
  653. end;
  654. end;
  655. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const locpara : tparalocation);
  656. begin
  657. case l.loc of
  658. LOC_REGISTER,
  659. LOC_CREGISTER :
  660. a_param_reg(list,l.size,l.register,locpara);
  661. LOC_CONSTANT :
  662. a_param_const(list,l.size,l.value,locpara);
  663. LOC_CREFERENCE,
  664. LOC_REFERENCE :
  665. a_param_ref(list,l.size,l.reference,locpara);
  666. else
  667. internalerror(2002032211);
  668. end;
  669. end;
  670. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const locpara : tparalocation);
  671. var
  672. hr : tregister;
  673. begin
  674. hr:=getaddressregister(list);
  675. a_loadaddr_ref_reg(list,r,hr);
  676. ungetregister(list,hr);
  677. a_param_reg(list,OS_ADDR,hr,locpara);
  678. end;
  679. procedure tcg.a_param_copy_ref(list : taasmoutput;size : aint;const r : treference;const locpara : tparalocation);
  680. var
  681. ref : treference;
  682. begin
  683. if not(locpara.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  684. internalerror(2003010901);
  685. reference_reset_base(ref,locpara.reference.index,locpara.reference.offset);
  686. g_concatcopy(list,r,ref,size,false,false);
  687. end;
  688. procedure tcg.a_loadany_param_ref(list : taasmoutput;const locpara : tparalocation;const ref:treference;shuffle : pmmshuffle);
  689. begin
  690. case locpara.loc of
  691. LOC_CREGISTER,
  692. LOC_REGISTER:
  693. begin
  694. {$ifndef cpu64bit}
  695. if (locpara.size in [OS_S64,OS_64]) then
  696. begin
  697. if getsupreg(locpara.registerlow)<first_int_imreg then
  698. begin
  699. getexplicitregister(list,locpara.registerlow);
  700. getexplicitregister(list,locpara.registerhigh);
  701. ungetregister(list,locpara.registerlow);
  702. ungetregister(list,locpara.registerhigh);
  703. end;
  704. cg64.a_load64_reg_ref(list,locpara.register64,ref)
  705. end
  706. else
  707. {$endif cpu64bit}
  708. begin
  709. if getsupreg(locpara.register)<first_int_imreg then
  710. begin
  711. getexplicitregister(list,locpara.register);
  712. ungetregister(list,locpara.register);
  713. end;
  714. a_load_reg_ref(list,locpara.size,locpara.size,locpara.register,ref);
  715. end;
  716. end;
  717. LOC_MMREGISTER,
  718. LOC_CMMREGISTER:
  719. begin
  720. if getsupreg(locpara.register)<first_mm_imreg then
  721. begin
  722. getexplicitregister(list,locpara.register);
  723. ungetregister(list,locpara.register);
  724. end;
  725. a_loadmm_reg_ref(list,locpara.size,locpara.size,locpara.register,ref,shuffle);
  726. end;
  727. LOC_FPUREGISTER,
  728. LOC_CFPUREGISTER:
  729. begin
  730. if getsupreg(locpara.register)<first_fpu_imreg then
  731. begin
  732. getexplicitregister(list,locpara.register);
  733. ungetregister(list,locpara.register);
  734. end;
  735. a_loadfpu_reg_ref(list,locpara.size,locpara.register,ref);
  736. end;
  737. else
  738. internalerror(2002081302);
  739. end;
  740. end;
  741. procedure tcg.a_loadany_param_reg(list : taasmoutput;const locpara : tparalocation;const reg:tregister;shuffle : pmmshuffle);
  742. var
  743. href : treference;
  744. begin
  745. case locpara.loc of
  746. LOC_CREGISTER,
  747. LOC_REGISTER:
  748. begin
  749. if not(locpara.size in [OS_S64,OS_64]) then
  750. begin
  751. if getsupreg(locpara.register)<first_int_imreg then
  752. begin
  753. getexplicitregister(list,locpara.register);
  754. ungetregister(list,locpara.register);
  755. end;
  756. {
  757. This is now a normal imaginary register, allocated the usual way (JM)
  758. getexplicitregister(list,reg);
  759. }
  760. a_load_reg_reg(list,locpara.size,locpara.size,locpara.register,reg)
  761. end
  762. else
  763. internalerror(2003053011);
  764. end;
  765. LOC_CFPUREGISTER,
  766. LOC_FPUREGISTER:
  767. begin
  768. if getsupreg(locpara.register)<first_fpu_imreg then
  769. begin
  770. getexplicitregister(list,locpara.register);
  771. ungetregister(list,locpara.register);
  772. end;
  773. {
  774. This is now a normal imaginary register, allocated the usual way (JM)
  775. getexplicitregister(list,reg);
  776. }
  777. a_loadfpu_reg_reg(list,locpara.size,locpara.register,reg);
  778. end;
  779. LOC_MMREGISTER,
  780. LOC_CMMREGISTER:
  781. begin
  782. if getsupreg(locpara.register)<first_mm_imreg then
  783. begin
  784. getexplicitregister(list,locpara.register);
  785. ungetregister(list,locpara.register);
  786. end;
  787. {
  788. This is now a normal imaginary register, allocated the usual way (JM)
  789. getexplicitregister(list,reg);
  790. }
  791. a_loadmm_reg_reg(list,locpara.size,locpara.size,locpara.register,reg,shuffle);
  792. end;
  793. LOC_REFERENCE,
  794. LOC_CREFERENCE:
  795. begin
  796. reference_reset_base(href,locpara.reference.index,locpara.reference.offset);
  797. {
  798. This is now a normal imaginary register, allocated the usual way (JM)
  799. getexplicitregister(list,reg);
  800. }
  801. a_load_ref_reg(list,locpara.size,locpara.size,href,reg);
  802. end;
  803. else
  804. internalerror(2003053010);
  805. end
  806. end;
  807. {****************************************************************************
  808. some generic implementations
  809. ****************************************************************************}
  810. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  811. var
  812. tmpreg: tregister;
  813. begin
  814. { verify if we have the same reference }
  815. if references_equal(sref,dref) then
  816. exit;
  817. tmpreg:=getintregister(list,tosize);
  818. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  819. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  820. ungetregister(list,tmpreg);
  821. end;
  822. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);
  823. var
  824. tmpreg: tregister;
  825. begin
  826. tmpreg:=getintregister(list,size);
  827. a_load_const_reg(list,size,a,tmpreg);
  828. a_load_reg_ref(list,size,size,tmpreg,ref);
  829. ungetregister(list,tmpreg);
  830. end;
  831. procedure tcg.a_load_const_loc(list : taasmoutput;a : aint;const loc: tlocation);
  832. begin
  833. case loc.loc of
  834. LOC_REFERENCE,LOC_CREFERENCE:
  835. a_load_const_ref(list,loc.size,a,loc.reference);
  836. LOC_REGISTER,LOC_CREGISTER:
  837. a_load_const_reg(list,loc.size,a,loc.register);
  838. else
  839. internalerror(200203272);
  840. end;
  841. end;
  842. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  843. begin
  844. case loc.loc of
  845. LOC_REFERENCE,LOC_CREFERENCE:
  846. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  847. LOC_REGISTER,LOC_CREGISTER:
  848. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  849. else
  850. internalerror(200203271);
  851. end;
  852. end;
  853. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  854. begin
  855. case loc.loc of
  856. LOC_REFERENCE,LOC_CREFERENCE:
  857. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  858. LOC_REGISTER,LOC_CREGISTER:
  859. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  860. LOC_CONSTANT:
  861. a_load_const_reg(list,tosize,loc.value,reg);
  862. else
  863. internalerror(200109092);
  864. end;
  865. end;
  866. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  867. begin
  868. case loc.loc of
  869. LOC_REFERENCE,LOC_CREFERENCE:
  870. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  871. LOC_REGISTER,LOC_CREGISTER:
  872. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  873. LOC_CONSTANT:
  874. a_load_const_ref(list,tosize,loc.value,ref);
  875. else
  876. internalerror(200109302);
  877. end;
  878. end;
  879. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg:tregister): boolean;
  880. var
  881. powerval : longint;
  882. begin
  883. optimize_op_const_reg := false;
  884. case op of
  885. { or with zero returns same result }
  886. OP_OR : if a = 0 then optimize_op_const_reg := true;
  887. { and with max returns same result }
  888. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  889. { division by 1 returns result }
  890. OP_DIV :
  891. begin
  892. if a = 1 then
  893. optimize_op_const_reg := true
  894. else if ispowerof2(int64(a), powerval) then
  895. begin
  896. a := powerval;
  897. op:= OP_SHR;
  898. end;
  899. exit;
  900. end;
  901. OP_IDIV:
  902. begin
  903. if a = 1 then
  904. optimize_op_const_reg := true
  905. else if ispowerof2(int64(a), powerval) then
  906. begin
  907. a := powerval;
  908. op:= OP_SAR;
  909. end;
  910. exit;
  911. end;
  912. OP_MUL,OP_IMUL:
  913. begin
  914. if a = 1 then
  915. optimize_op_const_reg := true
  916. else if ispowerof2(int64(a), powerval) then
  917. begin
  918. a := powerval;
  919. op:= OP_SHL;
  920. end;
  921. exit;
  922. end;
  923. OP_SAR,OP_SHL,OP_SHR:
  924. begin
  925. if a = 0 then
  926. optimize_op_const_reg := true;
  927. exit;
  928. end;
  929. end;
  930. end;
  931. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  932. begin
  933. case loc.loc of
  934. LOC_REFERENCE, LOC_CREFERENCE:
  935. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  936. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  937. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  938. else
  939. internalerror(200203301);
  940. end;
  941. end;
  942. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  943. begin
  944. case loc.loc of
  945. LOC_REFERENCE, LOC_CREFERENCE:
  946. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  947. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  948. a_loadfpu_reg_reg(list,size,reg,loc.register);
  949. else
  950. internalerror(48991);
  951. end;
  952. end;
  953. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const locpara : tparalocation);
  954. var
  955. ref : treference;
  956. begin
  957. case locpara.loc of
  958. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  959. a_loadfpu_reg_reg(list,size,r,locpara.register);
  960. LOC_REFERENCE,LOC_CREFERENCE:
  961. begin
  962. reference_reset(ref);
  963. ref.base:=locpara.reference.index;
  964. ref.offset:=locpara.reference.offset;
  965. a_loadfpu_reg_ref(list,size,r,ref);
  966. end
  967. else
  968. internalerror(2002071004);
  969. end;
  970. end;
  971. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const locpara : tparalocation);
  972. var
  973. href : treference;
  974. begin
  975. case locpara.loc of
  976. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  977. a_loadfpu_ref_reg(list,size,ref,locpara.register);
  978. LOC_REFERENCE,LOC_CREFERENCE:
  979. begin
  980. reference_reset(href);
  981. href.base:=locpara.reference.index;
  982. href.offset:=locpara.reference.offset;
  983. { concatcopy should choose the best way to copy the data }
  984. g_concatcopy(list,ref,href,tcgsize2size[size],false,false);
  985. end
  986. else
  987. internalerror(200402201);
  988. end;
  989. end;
  990. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  991. var
  992. tmpreg: tregister;
  993. begin
  994. tmpreg:=getintregister(list,size);
  995. a_load_ref_reg(list,size,size,ref,tmpreg);
  996. a_op_const_reg(list,op,size,a,tmpreg);
  997. a_load_reg_ref(list,size,size,tmpreg,ref);
  998. ungetregister(list,tmpreg);
  999. end;
  1000. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: aint; const loc: tlocation);
  1001. begin
  1002. case loc.loc of
  1003. LOC_REGISTER, LOC_CREGISTER:
  1004. a_op_const_reg(list,op,loc.size,a,loc.register);
  1005. LOC_REFERENCE, LOC_CREFERENCE:
  1006. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1007. else
  1008. internalerror(200109061);
  1009. end;
  1010. end;
  1011. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1012. var
  1013. tmpreg: tregister;
  1014. begin
  1015. tmpreg:=getintregister(list,size);
  1016. a_load_ref_reg(list,size,size,ref,tmpreg);
  1017. a_op_reg_reg(list,op,size,reg,tmpreg);
  1018. a_load_reg_ref(list,size,size,tmpreg,ref);
  1019. ungetregister(list,tmpreg);
  1020. end;
  1021. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1022. var
  1023. tmpreg: tregister;
  1024. begin
  1025. case op of
  1026. OP_NOT,OP_NEG:
  1027. { handle it as "load ref,reg; op reg" }
  1028. begin
  1029. a_load_ref_reg(list,size,size,ref,reg);
  1030. a_op_reg_reg(list,op,size,reg,reg);
  1031. end;
  1032. else
  1033. begin
  1034. tmpreg:=getintregister(list,size);
  1035. a_load_ref_reg(list,size,size,ref,tmpreg);
  1036. a_op_reg_reg(list,op,size,tmpreg,reg);
  1037. ungetregister(list,tmpreg);
  1038. end;
  1039. end;
  1040. end;
  1041. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  1042. begin
  1043. case loc.loc of
  1044. LOC_REGISTER, LOC_CREGISTER:
  1045. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1046. LOC_REFERENCE, LOC_CREFERENCE:
  1047. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1048. else
  1049. internalerror(200109061);
  1050. end;
  1051. end;
  1052. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1053. var
  1054. tmpreg: tregister;
  1055. begin
  1056. case loc.loc of
  1057. LOC_REGISTER,LOC_CREGISTER:
  1058. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1059. LOC_REFERENCE,LOC_CREFERENCE:
  1060. begin
  1061. tmpreg:=getintregister(list,loc.size);
  1062. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1063. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1064. ungetregister(list,tmpreg);
  1065. end;
  1066. else
  1067. internalerror(200109061);
  1068. end;
  1069. end;
  1070. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  1071. a:aint;src,dst:Tregister);
  1072. begin
  1073. a_load_reg_reg(list,size,size,src,dst);
  1074. a_op_const_reg(list,op,size,a,dst);
  1075. end;
  1076. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  1077. size: tcgsize; src1, src2, dst: tregister);
  1078. var
  1079. tmpreg: tregister;
  1080. begin
  1081. if (dst<>src1) then
  1082. begin
  1083. a_load_reg_reg(list,size,size,src2,dst);
  1084. a_op_reg_reg(list,op,size,src1,dst);
  1085. end
  1086. else
  1087. begin
  1088. tmpreg:=getintregister(list,size);
  1089. a_load_reg_reg(list,size,size,src2,tmpreg);
  1090. a_op_reg_reg(list,op,size,src1,tmpreg);
  1091. a_load_reg_reg(list,size,size,tmpreg,dst);
  1092. ungetregister(list,tmpreg);
  1093. end;
  1094. end;
  1095. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  1096. l : tasmlabel);
  1097. var
  1098. tmpreg: tregister;
  1099. begin
  1100. tmpreg:=getintregister(list,size);
  1101. a_load_ref_reg(list,size,size,ref,tmpreg);
  1102. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1103. ungetregister(list,tmpreg);
  1104. end;
  1105. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  1106. l : tasmlabel);
  1107. begin
  1108. case loc.loc of
  1109. LOC_REGISTER,LOC_CREGISTER:
  1110. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1111. LOC_REFERENCE,LOC_CREFERENCE:
  1112. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1113. else
  1114. internalerror(200109061);
  1115. end;
  1116. end;
  1117. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1118. var
  1119. tmpreg: tregister;
  1120. begin
  1121. tmpreg:=getintregister(list,size);
  1122. a_load_ref_reg(list,size,size,ref,tmpreg);
  1123. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1124. ungetregister(list,tmpreg);
  1125. end;
  1126. procedure tcg.a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1127. var
  1128. tmpreg: tregister;
  1129. begin
  1130. tmpreg:=getintregister(list,size);
  1131. a_load_ref_reg(list,size,size,ref,tmpreg);
  1132. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1133. ungetregister(list,tmpreg);
  1134. end;
  1135. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1136. begin
  1137. case loc.loc of
  1138. LOC_REGISTER,
  1139. LOC_CREGISTER:
  1140. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1141. LOC_REFERENCE,
  1142. LOC_CREFERENCE :
  1143. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1144. LOC_CONSTANT:
  1145. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1146. else
  1147. internalerror(200203231);
  1148. end;
  1149. end;
  1150. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1151. l : tasmlabel);
  1152. var
  1153. tmpreg: tregister;
  1154. begin
  1155. case loc.loc of
  1156. LOC_REGISTER,LOC_CREGISTER:
  1157. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1158. LOC_REFERENCE,LOC_CREFERENCE:
  1159. begin
  1160. tmpreg:=getintregister(list,size);
  1161. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1162. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1163. ungetregister(list,tmpreg);
  1164. end
  1165. else
  1166. internalerror(200109061);
  1167. end;
  1168. end;
  1169. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1170. begin
  1171. case loc.loc of
  1172. LOC_MMREGISTER,LOC_CMMREGISTER:
  1173. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1174. LOC_REFERENCE,LOC_CREFERENCE:
  1175. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1176. else
  1177. internalerror(200310121);
  1178. end;
  1179. end;
  1180. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1181. begin
  1182. case loc.loc of
  1183. LOC_MMREGISTER,LOC_CMMREGISTER:
  1184. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1185. LOC_REFERENCE,LOC_CREFERENCE:
  1186. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1187. else
  1188. internalerror(200310122);
  1189. end;
  1190. end;
  1191. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const locpara : tparalocation;shuffle : pmmshuffle);
  1192. var
  1193. ref : treference;
  1194. begin
  1195. case locpara.loc of
  1196. LOC_MMREGISTER,LOC_CMMREGISTER:
  1197. a_loadmm_reg_reg(list,size,locpara.size,reg,locpara.register,shuffle);
  1198. LOC_REFERENCE,LOC_CREFERENCE:
  1199. begin
  1200. reference_reset(ref);
  1201. ref.base:=locpara.reference.index;
  1202. ref.offset:=locpara.reference.offset;
  1203. a_loadmm_reg_ref(list,size,locpara.size,reg,ref,shuffle);
  1204. end
  1205. else
  1206. internalerror(200310123);
  1207. end;
  1208. end;
  1209. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const locpara : tparalocation;shuffle : pmmshuffle);
  1210. var
  1211. hr : tregister;
  1212. hs : tmmshuffle;
  1213. begin
  1214. hr:=getmmregister(list,locpara.size);
  1215. a_loadmm_ref_reg(list,size,locpara.size,ref,hr,shuffle);
  1216. if realshuffle(shuffle) then
  1217. begin
  1218. hs:=shuffle^;
  1219. removeshuffles(hs);
  1220. a_parammm_reg(list,locpara.size,hr,locpara,@hs);
  1221. end
  1222. else
  1223. a_parammm_reg(list,locpara.size,hr,locpara,shuffle);
  1224. ungetregister(list,hr);
  1225. end;
  1226. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const locpara : tparalocation;shuffle : pmmshuffle);
  1227. begin
  1228. case loc.loc of
  1229. LOC_MMREGISTER,LOC_CMMREGISTER:
  1230. a_parammm_reg(list,loc.size,loc.register,locpara,shuffle);
  1231. LOC_REFERENCE,LOC_CREFERENCE:
  1232. a_parammm_ref(list,loc.size,loc.reference,locpara,shuffle);
  1233. else
  1234. internalerror(200310123);
  1235. end;
  1236. end;
  1237. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1238. var
  1239. hr : tregister;
  1240. hs : tmmshuffle;
  1241. begin
  1242. hr:=getmmregister(list,size);
  1243. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1244. if realshuffle(shuffle) then
  1245. begin
  1246. hs:=shuffle^;
  1247. removeshuffles(hs);
  1248. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1249. end
  1250. else
  1251. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1252. ungetregister(list,hr);
  1253. end;
  1254. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1255. var
  1256. hr : tregister;
  1257. hs : tmmshuffle;
  1258. begin
  1259. hr:=getmmregister(list,size);
  1260. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1261. if realshuffle(shuffle) then
  1262. begin
  1263. hs:=shuffle^;
  1264. removeshuffles(hs);
  1265. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1266. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1267. end
  1268. else
  1269. begin
  1270. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1271. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1272. end;
  1273. ungetregister(list,hr);
  1274. end;
  1275. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1276. begin
  1277. case loc.loc of
  1278. LOC_CMMREGISTER,LOC_MMREGISTER:
  1279. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1280. LOC_CREFERENCE,LOC_REFERENCE:
  1281. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1282. else
  1283. internalerror(200312232);
  1284. end;
  1285. end;
  1286. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte;delsource,loadref : boolean);
  1287. var
  1288. paraloc1,paraloc2,paraloc3 : tparalocation;
  1289. begin
  1290. {$ifdef FPC}
  1291. {$warning FIX ME!}
  1292. {$endif}
  1293. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1294. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1295. paraloc3:=paramanager.getintparaloc(pocall_default,3);
  1296. paramanager.allocparaloc(list,paraloc3);
  1297. a_paramaddr_ref(list,dest,paraloc3);
  1298. paramanager.allocparaloc(list,paraloc2);
  1299. if loadref then
  1300. a_param_ref(list,OS_ADDR,source,paraloc2)
  1301. else
  1302. a_paramaddr_ref(list,source,paraloc2);
  1303. if delsource then
  1304. reference_release(list,source);
  1305. paramanager.allocparaloc(list,paraloc1);
  1306. a_param_const(list,OS_INT,len,paraloc1);
  1307. paramanager.freeparaloc(list,paraloc3);
  1308. paramanager.freeparaloc(list,paraloc2);
  1309. paramanager.freeparaloc(list,paraloc1);
  1310. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1311. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1312. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1313. end;
  1314. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference;loadref : boolean);
  1315. var
  1316. href : treference;
  1317. incrfunc : string;
  1318. paraloc1,paraloc2 : tparalocation;
  1319. begin
  1320. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1321. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1322. { These functions should not change the registers (they use
  1323. the saveregister proc directive }
  1324. if is_interfacecom(t) then
  1325. incrfunc:='FPC_INTF_INCR_REF'
  1326. else if is_ansistring(t) then
  1327. {$ifdef ansistring_bits}
  1328. begin
  1329. case Tstringdef(t).string_typ of
  1330. st_ansistring16:
  1331. incrfunc:='FPC_ANSISTR16_INCR_REF';
  1332. st_ansistring32:
  1333. incrfunc:='FPC_ANSISTR32_INCR_REF';
  1334. st_ansistring64:
  1335. incrfunc:='FPC_ANSISTR64_INCR_REF';
  1336. end;
  1337. end
  1338. {$else}
  1339. incrfunc:='FPC_ANSISTR_INCR_REF'
  1340. {$endif}
  1341. else if is_widestring(t) then
  1342. incrfunc:='FPC_WIDESTR_INCR_REF'
  1343. else if is_dynamic_array(t) then
  1344. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1345. else
  1346. incrfunc:='';
  1347. { call the special incr function or the generic addref }
  1348. if incrfunc<>'' then
  1349. begin
  1350. { these functions get the pointer by value }
  1351. paramanager.allocparaloc(list,paraloc1);
  1352. a_param_ref(list,OS_ADDR,ref,paraloc1);
  1353. paramanager.freeparaloc(list,paraloc1);
  1354. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1355. a_call_name(list,incrfunc);
  1356. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1357. end
  1358. else
  1359. begin
  1360. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1361. paramanager.allocparaloc(list,paraloc2);
  1362. a_paramaddr_ref(list,href,paraloc2);
  1363. paramanager.allocparaloc(list,paraloc1);
  1364. if loadref then
  1365. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1366. else
  1367. a_paramaddr_ref(list,ref,paraloc1);
  1368. paramanager.freeparaloc(list,paraloc1);
  1369. paramanager.freeparaloc(list,paraloc2);
  1370. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1371. a_call_name(list,'FPC_ADDREF');
  1372. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1373. end;
  1374. end;
  1375. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference; loadref:boolean);
  1376. var
  1377. hreg : tregister;
  1378. href : treference;
  1379. decrfunc : string;
  1380. needrtti : boolean;
  1381. paraloc1,paraloc2 : tparalocation;
  1382. begin
  1383. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1384. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1385. needrtti:=false;
  1386. if is_interfacecom(t) then
  1387. decrfunc:='FPC_INTF_DECR_REF'
  1388. else if is_ansistring(t) then
  1389. {$ifdef ansistring_bits}
  1390. begin
  1391. case Tstringdef(t).string_typ of
  1392. st_ansistring16:
  1393. decrfunc:='FPC_ANSISTR16_DECR_REF';
  1394. st_ansistring32:
  1395. decrfunc:='FPC_ANSISTR32_DECR_REF';
  1396. st_ansistring64:
  1397. decrfunc:='FPC_ANSISTR64_DECR_REF';
  1398. end;
  1399. end
  1400. {$else}
  1401. decrfunc:='FPC_ANSISTR_DECR_REF'
  1402. {$endif}
  1403. else if is_widestring(t) then
  1404. decrfunc:='FPC_WIDESTR_DECR_REF'
  1405. else if is_dynamic_array(t) then
  1406. begin
  1407. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1408. needrtti:=true;
  1409. end
  1410. else
  1411. decrfunc:='';
  1412. { call the special decr function or the generic decref }
  1413. if decrfunc<>'' then
  1414. begin
  1415. if needrtti then
  1416. begin
  1417. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1418. paramanager.allocparaloc(list,paraloc2);
  1419. a_paramaddr_ref(list,href,paraloc2);
  1420. end;
  1421. paramanager.allocparaloc(list,paraloc1);
  1422. if loadref then
  1423. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1424. else
  1425. a_paramaddr_ref(list,ref,paraloc1);
  1426. paramanager.freeparaloc(list,paraloc1);
  1427. if needrtti then
  1428. paramanager.freeparaloc(list,paraloc2);
  1429. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1430. a_call_name(list,decrfunc);
  1431. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1432. end
  1433. else
  1434. begin
  1435. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1436. paramanager.allocparaloc(list,paraloc2);
  1437. a_paramaddr_ref(list,href,paraloc2);
  1438. paramanager.allocparaloc(list,paraloc1);
  1439. if loadref then
  1440. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1441. else
  1442. a_paramaddr_ref(list,ref,paraloc1);
  1443. paramanager.freeparaloc(list,paraloc1);
  1444. paramanager.freeparaloc(list,paraloc2);
  1445. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1446. a_call_name(list,'FPC_DECREF');
  1447. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1448. end;
  1449. { Temp locations need always to be reset to 0 }
  1450. if tg.istemp(ref) then
  1451. begin
  1452. if loadref then
  1453. begin
  1454. hreg:=getaddressregister(list);
  1455. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1456. reference_reset_base(href,hreg,0);
  1457. a_load_const_ref(list,OS_ADDR,0,href);
  1458. ungetregister(list,hreg);
  1459. end
  1460. else
  1461. a_load_const_ref(list,OS_ADDR,0,ref);
  1462. end;
  1463. end;
  1464. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1465. var
  1466. href : treference;
  1467. paraloc1,paraloc2 : tparalocation;
  1468. begin
  1469. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1470. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1471. if is_ansistring(t) or
  1472. is_widestring(t) or
  1473. is_interfacecom(t) or
  1474. is_dynamic_array(t) then
  1475. a_load_const_ref(list,OS_ADDR,0,ref)
  1476. else
  1477. begin
  1478. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1479. paramanager.allocparaloc(list,paraloc2);
  1480. a_paramaddr_ref(list,href,paraloc2);
  1481. paramanager.allocparaloc(list,paraloc1);
  1482. if loadref then
  1483. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1484. else
  1485. a_paramaddr_ref(list,ref,paraloc1);
  1486. paramanager.freeparaloc(list,paraloc1);
  1487. paramanager.freeparaloc(list,paraloc2);
  1488. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1489. a_call_name(list,'FPC_INITIALIZE');
  1490. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1491. end;
  1492. end;
  1493. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference;loadref : boolean);
  1494. var
  1495. hreg : tregister;
  1496. href : treference;
  1497. paraloc1,paraloc2 : tparalocation;
  1498. begin
  1499. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1500. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1501. if is_ansistring(t) or
  1502. is_widestring(t) or
  1503. is_interfacecom(t) then
  1504. begin
  1505. g_decrrefcount(list,t,ref,loadref);
  1506. { Temp locations are already reset to 0 }
  1507. if not tg.istemp(ref) then
  1508. begin
  1509. if loadref then
  1510. begin
  1511. hreg:=getaddressregister(list);
  1512. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,hreg);
  1513. reference_reset_base(href,hreg,0);
  1514. a_load_const_ref(list,OS_ADDR,0,href);
  1515. ungetregister(list,hreg);
  1516. end
  1517. else
  1518. a_load_const_ref(list,OS_ADDR,0,ref);
  1519. end;
  1520. end
  1521. else
  1522. begin
  1523. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1524. paramanager.allocparaloc(list,paraloc2);
  1525. a_paramaddr_ref(list,href,paraloc2);
  1526. paramanager.allocparaloc(list,paraloc1);
  1527. if loadref then
  1528. a_param_ref(list,OS_ADDR,ref,paraloc1)
  1529. else
  1530. a_paramaddr_ref(list,ref,paraloc1);
  1531. paramanager.freeparaloc(list,paraloc1);
  1532. paramanager.freeparaloc(list,paraloc2);
  1533. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1534. a_call_name(list,'FPC_FINALIZE');
  1535. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1536. end;
  1537. end;
  1538. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1539. { generate range checking code for the value at location p. The type }
  1540. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1541. { is the original type used at that location. When both defs are equal }
  1542. { the check is also insert (needed for succ,pref,inc,dec) }
  1543. {$ifndef ver1_0}
  1544. const
  1545. aintmax=high(aint);
  1546. {$endif}
  1547. var
  1548. neglabel : tasmlabel;
  1549. hreg : tregister;
  1550. lto,hto,
  1551. lfrom,hfrom : TConstExprInt;
  1552. from_signed: boolean;
  1553. {$ifdef ver1_0}
  1554. aintmax : aint;
  1555. {$endif ver1_0}
  1556. begin
  1557. {$ifdef ver1_0}
  1558. {$ifdef cpu64bit}
  1559. { this is required to prevent incorrect code }
  1560. aintmax:=$7fffffff;
  1561. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1562. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1563. {$else cpu64bit}
  1564. aintmax:=high(aint);
  1565. {$endif cpu64bit}
  1566. {$endif}
  1567. { range checking on and range checkable value? }
  1568. if not(cs_check_range in aktlocalswitches) or
  1569. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1570. exit;
  1571. {$ifndef cpu64bit}
  1572. { handle 64bit rangechecks separate for 32bit processors }
  1573. if is_64bit(fromdef) or is_64bit(todef) then
  1574. begin
  1575. cg64.g_rangecheck64(list,l,fromdef,todef);
  1576. exit;
  1577. end;
  1578. {$endif cpu64bit}
  1579. { only check when assigning to scalar, subranges are different, }
  1580. { when todef=fromdef then the check is always generated }
  1581. getrange(fromdef,lfrom,hfrom);
  1582. getrange(todef,lto,hto);
  1583. from_signed := is_signed(fromdef);
  1584. { no range check if from and to are equal and are both longint/dword }
  1585. { (if we have a 32bit processor) or int64/qword, since such }
  1586. { operations can at most cause overflows (JM) }
  1587. { Note that these checks are mostly processor independent, they only }
  1588. { have to be changed once we introduce 64bit subrange types }
  1589. {$ifdef cpu64bit}
  1590. if (fromdef = todef) and
  1591. (fromdef.deftype=orddef) and
  1592. (((((torddef(fromdef).typ = s64bit) and
  1593. (lfrom = low(int64)) and
  1594. (hfrom = high(int64))) or
  1595. ((torddef(fromdef).typ = u64bit) and
  1596. (lfrom = low(qword)) and
  1597. (hfrom = high(qword)))))) then
  1598. exit;
  1599. {$else cpu64bit}
  1600. if (fromdef = todef) and
  1601. (fromdef.deftype=orddef) and
  1602. (((((torddef(fromdef).typ = s32bit) and
  1603. (lfrom = low(longint)) and
  1604. (hfrom = high(longint))) or
  1605. ((torddef(fromdef).typ = u32bit) and
  1606. (lfrom = low(cardinal)) and
  1607. (hfrom = high(cardinal)))))) then
  1608. exit;
  1609. {$endif cpu64bit}
  1610. { if the from-range falls completely in the to-range, no check }
  1611. { is necessary. Don't do this conversion for the largest unsigned type }
  1612. if (todef<>fromdef) and
  1613. (from_signed or (hfrom>=0)) and
  1614. (lto<=lfrom) and (hto>=hfrom) then
  1615. exit;
  1616. { generate the rangecheck code for the def where we are going to }
  1617. { store the result }
  1618. { use the trick that }
  1619. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1620. { To be able to do that, we have to make sure however that either }
  1621. { fromdef and todef are both signed or unsigned, or that we leave }
  1622. { the parts < 0 and > maxlongint out }
  1623. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1624. if from_signed xor is_signed(todef) then
  1625. begin
  1626. if from_signed then
  1627. { from is signed, to is unsigned }
  1628. begin
  1629. { if high(from) < 0 -> always range error }
  1630. if (hfrom < 0) or
  1631. { if low(to) > maxlongint also range error }
  1632. (lto > aintmax) then
  1633. begin
  1634. a_call_name(list,'FPC_RANGEERROR');
  1635. exit
  1636. end;
  1637. { from is signed and to is unsigned -> when looking at to }
  1638. { as an signed value, it must be < maxaint (otherwise }
  1639. { it will become negative, which is invalid since "to" is unsigned) }
  1640. if hto > aintmax then
  1641. hto := aintmax;
  1642. end
  1643. else
  1644. { from is unsigned, to is signed }
  1645. begin
  1646. if (lfrom > aintmax) or
  1647. (hto < 0) then
  1648. begin
  1649. a_call_name(list,'FPC_RANGEERROR');
  1650. exit
  1651. end;
  1652. { from is unsigned and to is signed -> when looking at to }
  1653. { as an unsigned value, it must be >= 0 (since negative }
  1654. { values are the same as values > maxlongint) }
  1655. if lto < 0 then
  1656. lto := 0;
  1657. end;
  1658. end;
  1659. hreg:=getintregister(list,OS_INT);
  1660. a_load_loc_reg(list,OS_INT,l,hreg);
  1661. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1662. objectlibrary.getlabel(neglabel);
  1663. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1664. { !!! should happen right after the compare (JM) }
  1665. ungetregister(list,hreg);
  1666. a_call_name(list,'FPC_RANGEERROR');
  1667. a_label(list,neglabel);
  1668. end;
  1669. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1670. var
  1671. tmpreg : tregister;
  1672. begin
  1673. tmpreg:=getintregister(list,size);
  1674. g_flags2reg(list,size,f,tmpreg);
  1675. a_load_reg_ref(list,size,size,tmpreg,ref);
  1676. ungetregister(list,tmpreg);
  1677. end;
  1678. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1679. var
  1680. OKLabel : tasmlabel;
  1681. paraloc1 : tparalocation;
  1682. begin
  1683. if (cs_check_object in aktlocalswitches) or
  1684. (cs_check_range in aktlocalswitches) then
  1685. begin
  1686. objectlibrary.getlabel(oklabel);
  1687. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1688. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1689. paramanager.allocparaloc(list,paraloc1);
  1690. a_param_const(list,OS_INT,210,paraloc1);
  1691. paramanager.freeparaloc(list,paraloc1);
  1692. a_call_name(list,'FPC_HANDLEERROR');
  1693. a_label(list,oklabel);
  1694. end;
  1695. end;
  1696. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1697. var
  1698. hrefvmt : treference;
  1699. paraloc1,paraloc2 : tparalocation;
  1700. begin
  1701. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1702. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1703. if (cs_check_object in aktlocalswitches) then
  1704. begin
  1705. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymbol(objdef.vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
  1706. paramanager.allocparaloc(list,paraloc2);
  1707. a_paramaddr_ref(list,hrefvmt,paraloc2);
  1708. paramanager.allocparaloc(list,paraloc1);
  1709. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1710. paramanager.freeparaloc(list,paraloc1);
  1711. paramanager.freeparaloc(list,paraloc2);
  1712. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1713. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1714. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1715. end
  1716. else
  1717. if (cs_check_range in aktlocalswitches) then
  1718. begin
  1719. paramanager.allocparaloc(list,paraloc1);
  1720. a_param_reg(list,OS_ADDR,reg,paraloc1);
  1721. paramanager.freeparaloc(list,paraloc1);
  1722. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1723. a_call_name(list,'FPC_CHECK_OBJECT');
  1724. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1725. end;
  1726. end;
  1727. {*****************************************************************************
  1728. Entry/Exit Code Functions
  1729. *****************************************************************************}
  1730. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref, lenref:treference;elesize:aint);
  1731. var
  1732. sizereg,sourcereg,destreg : tregister;
  1733. paraloc1,paraloc2,paraloc3 : tparalocation;
  1734. begin
  1735. { because ppc abi doesn't support dynamic stack allocation properly
  1736. open array value parameters are copied onto the heap
  1737. }
  1738. { allocate two registers for len and source }
  1739. sizereg:=getintregister(list,OS_INT);
  1740. sourcereg:=getintregister(list,OS_ADDR);
  1741. destreg:=getintregister(list,OS_ADDR);
  1742. { calculate necessary memory }
  1743. a_load_ref_reg(list,OS_INT,OS_INT,lenref,sizereg);
  1744. a_op_const_reg(list,OP_ADD,OS_INT,1,sizereg);
  1745. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1746. { load source }
  1747. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,sourcereg);
  1748. { do getmem call }
  1749. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1750. paramanager.allocparaloc(list,paraloc1);
  1751. a_param_reg(list,OS_INT,sizereg,paraloc1);
  1752. paramanager.freeparaloc(list,paraloc1);
  1753. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1754. a_call_name(list,'FPC_GETMEM');
  1755. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1756. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1757. a_load_reg_ref(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,ref);
  1758. { do move call }
  1759. paraloc1:=paramanager.getintparaloc(pocall_default,1);
  1760. paraloc2:=paramanager.getintparaloc(pocall_default,2);
  1761. paraloc3:=paramanager.getintparaloc(pocall_default,3);
  1762. { load size }
  1763. paramanager.allocparaloc(list,paraloc3);
  1764. a_param_reg(list,OS_INT,sizereg,paraloc3);
  1765. { load destination }
  1766. paramanager.allocparaloc(list,paraloc2);
  1767. a_param_reg(list,OS_ADDR,destreg,paraloc2);
  1768. { load source }
  1769. paramanager.allocparaloc(list,paraloc1);
  1770. a_param_reg(list,OS_ADDR,sourcereg,paraloc1);
  1771. paramanager.freeparaloc(list,paraloc3);
  1772. paramanager.freeparaloc(list,paraloc2);
  1773. paramanager.freeparaloc(list,paraloc1);
  1774. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1775. a_call_name(list,'FPC_MOVE');
  1776. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1777. { release used registers }
  1778. ungetregister(list,sizereg);
  1779. ungetregister(list,sourcereg);
  1780. ungetregister(list,destreg);
  1781. end;
  1782. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const ref:treference);
  1783. var
  1784. paraloc : tparalocation;
  1785. begin
  1786. { do move call }
  1787. paraloc:=paramanager.getintparaloc(pocall_default,1);
  1788. { load source }
  1789. paramanager.allocparaloc(list,paraloc);
  1790. a_param_ref(list,OS_ADDR,ref,paraloc);
  1791. paramanager.freeparaloc(list,paraloc);
  1792. allocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1793. a_call_name(list,'FPC_FREEMEM');
  1794. deallocexplicitregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1795. end;
  1796. procedure tcg.g_profilecode(list : taasmoutput);
  1797. begin
  1798. end;
  1799. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1800. begin
  1801. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1802. end;
  1803. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);
  1804. begin
  1805. a_load_const_ref(list, OS_INT, a, href);
  1806. end;
  1807. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1808. begin
  1809. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1810. end;
  1811. {*****************************************************************************
  1812. TCG64
  1813. *****************************************************************************}
  1814. {$ifndef cpu64bit}
  1815. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;value : int64; regsrc,regdst : tregister64);
  1816. begin
  1817. a_load64_reg_reg(list,regsrc,regdst);
  1818. a_op64_const_reg(list,op,value,regdst);
  1819. end;
  1820. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;regsrc1,regsrc2,regdst : tregister64);
  1821. var
  1822. tmpreg64 : tregister64;
  1823. begin
  1824. { when src1=dst then we need to first create a temp to prevent
  1825. overwriting src1 with src2 }
  1826. if (regsrc1.reghi=regdst.reghi) or
  1827. (regsrc1.reglo=regdst.reghi) or
  1828. (regsrc1.reghi=regdst.reglo) or
  1829. (regsrc1.reglo=regdst.reglo) then
  1830. begin
  1831. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  1832. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  1833. a_load64_reg_reg(list,regsrc2,tmpreg64);
  1834. a_op64_reg_reg(list,op,regsrc1,tmpreg64);
  1835. a_load64_reg_reg(list,tmpreg64,regdst);
  1836. end
  1837. else
  1838. begin
  1839. a_load64_reg_reg(list,regsrc2,regdst);
  1840. a_op64_reg_reg(list,op,regsrc1,regdst);
  1841. end;
  1842. end;
  1843. {$endif cpu64bit}
  1844. {****************************************************************************
  1845. TReference
  1846. ****************************************************************************}
  1847. procedure reference_release(list: taasmoutput; const ref : treference);
  1848. begin
  1849. cg.ungetreference(list,ref);
  1850. end;
  1851. {****************************************************************************
  1852. TLocation
  1853. ****************************************************************************}
  1854. procedure location_reset(var l : tlocation;lt:TCGLoc;lsize:TCGSize);
  1855. begin
  1856. FillChar(l,sizeof(tlocation),0);
  1857. l.loc:=lt;
  1858. l.size:=lsize;
  1859. {$ifdef arm}
  1860. if l.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  1861. l.reference.signindex:=1;
  1862. {$endif arm}
  1863. end;
  1864. procedure location_release(list: taasmoutput; const l : tlocation);
  1865. begin
  1866. case l.loc of
  1867. LOC_REGISTER,LOC_CREGISTER :
  1868. begin
  1869. cg.ungetregister(list,l.register);
  1870. {$ifndef cpu64bit}
  1871. if l.size in [OS_64,OS_S64] then
  1872. cg.ungetregister(list,l.registerhigh);
  1873. {$endif cpu64bit}
  1874. end;
  1875. LOC_FPUREGISTER,LOC_CFPUREGISTER :
  1876. cg.ungetregister(list,l.register);
  1877. LOC_CREFERENCE,LOC_REFERENCE :
  1878. cg.ungetreference(list, l.reference);
  1879. end;
  1880. end;
  1881. procedure location_freetemp(list:taasmoutput; const l : tlocation);
  1882. begin
  1883. if (l.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1884. tg.ungetiftemp(list,l.reference);
  1885. end;
  1886. procedure location_copy(var destloc:tlocation; const sourceloc : tlocation);
  1887. begin
  1888. destloc:=sourceloc;
  1889. end;
  1890. procedure location_swap(var destloc,sourceloc : tlocation);
  1891. var
  1892. swapl : tlocation;
  1893. begin
  1894. swapl := destloc;
  1895. destloc := sourceloc;
  1896. sourceloc := swapl;
  1897. end;
  1898. initialization
  1899. ;
  1900. finalization
  1901. cg.free;
  1902. {$ifndef cpu64bit}
  1903. cg64.free;
  1904. {$endif cpu64bit}
  1905. end.
  1906. {
  1907. $Log$
  1908. Revision 1.168 2004-07-09 23:41:04 jonas
  1909. * support register parameters for inlined procedures + some inline
  1910. cleanups
  1911. Revision 1.167 2004/07/03 11:47:04 peter
  1912. * fix rangecheck error when assigning u32bit=s32bit
  1913. Revision 1.166 2004/06/20 08:55:28 florian
  1914. * logs truncated
  1915. Revision 1.165 2004/06/16 20:07:07 florian
  1916. * dwarf branch merged
  1917. Revision 1.164 2004/05/22 23:34:27 peter
  1918. tai_regalloc.allocation changed to ratype to notify rgobj of register size changes
  1919. Revision 1.163 2004/04/29 19:56:36 daniel
  1920. * Prepare compiler infrastructure for multiple ansistring types
  1921. Revision 1.162 2004/04/18 07:52:43 florian
  1922. * fixed web bug 3048: comparision of dyn. arrays
  1923. Revision 1.161.2.17 2004/06/13 10:51:16 florian
  1924. * fixed several register allocator problems (sparc/arm)
  1925. }