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aasmcpu.pas
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20dbda751a
* fixed sparc compilation after addr_lo/hi changes
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%!s(int64=18) %!d(string=hai) anos |
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aoptcpu.pas
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790a4fe2d3
* log and id tags removed
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%!s(int64=20) %!d(string=hai) anos |
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aoptcpub.pas
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2f5ce095ce
* RefsHaveIndexReg -> cpurefshaveindexreg
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%!s(int64=13) %!d(string=hai) anos |
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aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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%!s(int64=20) %!d(string=hai) anos |
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cgcpu.pas
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44f8bb35b7
Override abstract method to abvoid warning at compilation time
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%!s(int64=13) %!d(string=hai) anos |
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cpubase.pas
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ff5f311b34
- removed no more used constants
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%!s(int64=14) %!d(string=hai) anos |
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cpugas.pas
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b1c3f76ff9
* changed the supported targets for assembler writers to a set, and
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%!s(int64=16) %!d(string=hai) anos |
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cpuinfo.pas
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5acf377e31
* enable node cse for all cpus as level 2 optimization
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%!s(int64=15) %!d(string=hai) anos |
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cpunode.pas
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b270a1922b
* reverts r18960, should solve sparc trouble
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%!s(int64=14) %!d(string=hai) anos |
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cpupara.pas
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4d148382dc
* patch from Ludo Brands: remove po_inline artefact from ancient inlining code in sparc parameter handling, resolves #20397
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%!s(int64=14) %!d(string=hai) anos |
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cpupi.pas
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85d63d9fa9
* settings refactored
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%!s(int64=19) %!d(string=hai) anos |
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cputarg.pas
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fdc4925fcd
* basic framework for debuginfo class added
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%!s(int64=20) %!d(string=hai) anos |
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itcpugas.pas
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790a4fe2d3
* log and id tags removed
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%!s(int64=20) %!d(string=hai) anos |
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ncpuadd.pas
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1d96dcc50d
* renamed nf_swaped to nf_swapped
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%!s(int64=18) %!d(string=hai) anos |
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ncpucall.pas
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b270a1922b
* reverts r18960, should solve sparc trouble
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%!s(int64=14) %!d(string=hai) anos |
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ncpucnv.pas
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b17a9385e5
* use generic first_int_to_real 64 bit values on sparc
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%!s(int64=14) %!d(string=hai) anos |
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ncpuinln.pas
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6b8aed593f
* remove registers{int/mmx/fpu} from firstpass
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%!s(int64=18) %!d(string=hai) anos |
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ncpumat.pas
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9adb202a92
* Rework the constexprint to allow operations from low(int64) to high(qword).
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%!s(int64=18) %!d(string=hai) anos |
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ncpuset.pas
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7d459cf12a
* the compiler now explicitly keeps track of the minimally guaranteed
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%!s(int64=16) %!d(string=hai) anos |
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opcode.inc
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d95b9082bb
* add memory barrier prototypes + implementation for i386 and sparc + use lwsync for powerpc64
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%!s(int64=18) %!d(string=hai) anos |
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racpu.pas
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18eb495d0f
* give a regular error message instead of an internal error on x86
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%!s(int64=17) %!d(string=hai) anos |
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racpugas.pas
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32d919f543
Use ptruint type in typecast to avoid warning
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%!s(int64=14) %!d(string=hai) anos |
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rgcpu.pas
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f302fcdc98
+ TSubRegisterSet definition forgotten to commit in r15952
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%!s(int64=15) %!d(string=hai) anos |
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rspcon.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspdwrf.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspnor.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspnum.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rsprni.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspsri.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspstab.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspstd.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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rspsup.inc
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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spreg.dat
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c3da1aa542
Reenabled D0-D30 registers
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%!s(int64=13) %!d(string=hai) anos |
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strinst.inc
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d95b9082bb
* add memory barrier prototypes + implementation for i386 and sparc + use lwsync for powerpc64
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%!s(int64=18) %!d(string=hai) anos |
pierre
c3da1aa542
Reenabled D0-D30 registers