| .. |
|
aasmcpu.pas
|
71e492db1b
made arm-linux system unit compilable on anything but Thumb2 after r26161
|
11 anni fa |
|
agarmgas.pas
|
b158ad6a9c
Handle asmextraopt in arm assembler
|
11 anni fa |
|
aoptcpu.pas
|
d24cbbf9f5
Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4.
|
11 anni fa |
|
aoptcpub.pas
|
7e5b8584cf
* set MaxOps to 4 for the optimizer because fpc generates now mla instructions
|
13 anni fa |
|
aoptcpuc.pas
|
790a4fe2d3
* log and id tags removed
|
20 anni fa |
|
aoptcpud.pas
|
790a4fe2d3
* log and id tags removed
|
20 anni fa |
|
armatt.inc
|
b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
|
11 anni fa |
|
armatts.inc
|
b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
|
11 anni fa |
|
armins.dat
|
b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
|
11 anni fa |
|
armnop.inc
|
666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
13 anni fa |
|
armop.inc
|
b67e4fb8b3
added the ADR ARM pseudo instruction to instruction list
|
11 anni fa |
|
armreg.dat
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
armtab.inc
|
666332385d
Added coprocessor registers, and support for 6 operands(MCR/MRC instructions, etc)
|
13 anni fa |
|
cgcpu.pas
|
0736bf4ded
Try to change typical constant AND-masking operations into shifts for ARM
|
11 anni fa |
|
cpubase.pas
|
fb52392e20
Reformat and comment is_thumb32_imm
|
11 anni fa |
|
cpuelf.pas
|
97a706c672
+ Add definitions for ELF header flags.
|
11 anni fa |
|
cpuinfo.pas
|
e5b3d89a5d
Add CPUARM_HAS_UMULL flag
|
11 anni fa |
|
cpunode.pas
|
638d0d49c0
+ take advantage of the mla instruction when calculating array offsets
|
13 anni fa |
|
cpupara.pas
|
de3a116a28
* handle records with size 0 as function results correctly
|
11 anni fa |
|
cpupi.pas
|
123742647c
Fixed problem in estimation of stack size for thumb targets. Types passed by value were not handled properly.
|
11 anni fa |
|
cputarg.pas
|
d26f0552a0
* Sync with trunk r23404.
|
12 anni fa |
|
hlcgcpu.pas
|
72e9cfee24
* create/destroy also the high level code generator for all architectures,
|
14 anni fa |
|
itcpugas.pas
|
47d43750e4
* remove unused units from uses statements
|
12 anni fa |
|
narmadd.pas
|
a3efd9e1df
+ Added method taddnode.use_generic_mul64bit, allowing it to inline full 64-bit multiplications, and fixed ARM to comply (it was not checking for possible 32x32 to 64 optimization after detecting a 64-bit operand, so recently added code for 32x32 to 64 bit optimization was inactive).
|
11 anni fa |
|
narmcal.pas
|
8b8a786823
* moved ARM/x86 ifdef'ed code from ncgcal to virtual methods
|
12 anni fa |
|
narmcnv.pas
|
5051453806
+ support for LOC_(C)MMREGISTER in hlcg
|
12 anni fa |
|
narmcon.pas
|
47d43750e4
* remove unused units from uses statements
|
12 anni fa |
|
narminl.pas
|
2c49af3191
added missing closing parentheses
|
12 anni fa |
|
narmmat.pas
|
d24cbbf9f5
Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4.
|
11 anni fa |
|
narmmem.pas
|
d4968e054b
+ arm: tsettings.instructionset
|
12 anni fa |
|
narmset.pas
|
24d88edf37
* fixes arm building after 26004
|
11 anni fa |
|
pp.lpi.template
|
1f032375c3
* improved template with help from Mattias Gaertner
|
19 anni fa |
|
raarm.pas
|
780e75bfac
o patch by Jeppe Johansen to fix mantis #17472:
|
14 anni fa |
|
raarmgas.pas
|
628149d923
support label offsets for ARM like GAS, allows things like ADR r4, .label + 256
|
11 anni fa |
|
rarmcon.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmdwa.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmnor.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmnum.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmrni.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmsri.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmsta.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmstd.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rarmsup.inc
|
7150832ec9
+ Cortex-M3 special registers, resolves #23185
|
13 anni fa |
|
rgcpu.pas
|
d4968e054b
+ arm: tsettings.instructionset
|
12 anni fa |
masta
0736bf4ded
Try to change typical constant AND-masking operations into shifts for ARM