cpubase.pas 15 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
  3. Contains the base types for the i8086, i386 and x86-64 architecture
  4. * This code was inspired by the NASM sources
  5. The Netwide Assembler is Copyright (c) 1996 Simon Tatham and
  6. Julian Hall. All rights reserved.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. ****************************************************************************
  19. }
  20. {# Base unit for processor information. This unit contains
  21. enumerations of registers, opcodes, sizes, and other
  22. such things which are processor specific.
  23. }
  24. unit cpubase;
  25. {$i fpcdefs.inc}
  26. interface
  27. uses
  28. cutils,cclasses,
  29. globtype,
  30. cgbase
  31. ;
  32. {*****************************************************************************
  33. Assembler Opcodes
  34. *****************************************************************************}
  35. type
  36. {$ifdef x86_64}
  37. TAsmOp={$i x8664op.inc}
  38. {$else x86_64}
  39. TAsmOp={$i i386op.inc}
  40. {$endif x86_64}
  41. { This should define the array of instructions as string }
  42. op2strtable=array[tasmop] of string[16];
  43. const
  44. { First value of opcode enumeration }
  45. firstop = low(tasmop);
  46. { Last value of opcode enumeration }
  47. lastop = high(tasmop);
  48. {*****************************************************************************
  49. Registers
  50. *****************************************************************************}
  51. const
  52. { Integer Super registers }
  53. RS_RAX = $00; {EAX}
  54. RS_RCX = $01; {ECX}
  55. RS_RDX = $02; {EDX}
  56. RS_RBX = $03; {EBX}
  57. RS_RSI = $04; {ESI}
  58. RS_RDI = $05; {EDI}
  59. RS_RBP = $06; {EBP}
  60. RS_RSP = $07; {ESP}
  61. RS_R8 = $08; {R8}
  62. RS_R9 = $09; {R9}
  63. RS_R10 = $0a; {R10}
  64. RS_R11 = $0b; {R11}
  65. RS_R12 = $0c; {R12}
  66. RS_R13 = $0d; {R13}
  67. RS_R14 = $0e; {R14}
  68. RS_R15 = $0f; {R15}
  69. { create aliases to allow code sharing between x86-64 and i386 }
  70. RS_EAX = RS_RAX;
  71. RS_EBX = RS_RBX;
  72. RS_ECX = RS_RCX;
  73. RS_EDX = RS_RDX;
  74. RS_ESI = RS_RSI;
  75. RS_EDI = RS_RDI;
  76. RS_EBP = RS_RBP;
  77. RS_ESP = RS_RSP;
  78. { create aliases to allow code sharing between i386 and i8086 }
  79. RS_AX = RS_RAX;
  80. RS_BX = RS_RBX;
  81. RS_CX = RS_RCX;
  82. RS_DX = RS_RDX;
  83. RS_SI = RS_RSI;
  84. RS_DI = RS_RDI;
  85. RS_BP = RS_RBP;
  86. RS_SP = RS_RSP;
  87. { Number of first imaginary register }
  88. first_int_imreg = $10;
  89. { Float Super registers }
  90. RS_ST0 = $00;
  91. RS_ST1 = $01;
  92. RS_ST2 = $02;
  93. RS_ST3 = $03;
  94. RS_ST4 = $04;
  95. RS_ST5 = $05;
  96. RS_ST6 = $06;
  97. RS_ST7 = $07;
  98. { Number of first imaginary register }
  99. first_fpu_imreg = $08;
  100. { MM Super registers }
  101. RS_XMM0 = $00;
  102. RS_XMM1 = $01;
  103. RS_XMM2 = $02;
  104. RS_XMM3 = $03;
  105. RS_XMM4 = $04;
  106. RS_XMM5 = $05;
  107. RS_XMM6 = $06;
  108. RS_XMM7 = $07;
  109. RS_XMM8 = $08;
  110. RS_XMM9 = $09;
  111. RS_XMM10 = $0a;
  112. RS_XMM11 = $0b;
  113. RS_XMM12 = $0c;
  114. RS_XMM13 = $0d;
  115. RS_XMM14 = $0e;
  116. RS_XMM15 = $0f;
  117. RS_FLAGS = $07;
  118. { Number of first imaginary register }
  119. {$ifdef x86_64}
  120. first_mm_imreg = $10;
  121. {$else x86_64}
  122. first_mm_imreg = $08;
  123. {$endif x86_64}
  124. { The subregister that specifies the entire register and an address }
  125. {$if defined(x86_64)}
  126. { Hammer }
  127. R_SUBWHOLE = R_SUBQ;
  128. R_SUBADDR = R_SUBQ;
  129. {$elseif defined(i386)}
  130. { i386 }
  131. R_SUBWHOLE = R_SUBD;
  132. R_SUBADDR = R_SUBD;
  133. {$elseif defined(i8086)}
  134. { i8086 }
  135. R_SUBWHOLE = R_SUBW;
  136. R_SUBADDR = R_SUBW;
  137. {$endif}
  138. { Available Registers }
  139. {$ifdef x86_64}
  140. {$i r8664con.inc}
  141. {$else x86_64}
  142. {$i r386con.inc}
  143. {$endif x86_64}
  144. type
  145. { Number of registers used for indexing in tables }
  146. {$ifdef x86_64}
  147. tregisterindex=0..{$i r8664nor.inc}-1;
  148. {$else x86_64}
  149. tregisterindex=0..{$i r386nor.inc}-1;
  150. {$endif x86_64}
  151. const
  152. { TODO: Calculate bsstart}
  153. regnumber_count_bsstart = 64;
  154. regnumber_table : array[tregisterindex] of tregister = (
  155. {$ifdef x86_64}
  156. {$i r8664num.inc}
  157. {$else x86_64}
  158. {$i r386num.inc}
  159. {$endif x86_64}
  160. );
  161. regstabs_table : array[tregisterindex] of shortint = (
  162. {$ifdef x86_64}
  163. {$i r8664stab.inc}
  164. {$else x86_64}
  165. {$i r386stab.inc}
  166. {$endif x86_64}
  167. );
  168. regdwarf_table : array[tregisterindex] of shortint = (
  169. {$ifdef x86_64}
  170. {$i r8664dwrf.inc}
  171. {$else x86_64}
  172. {$i r386dwrf.inc}
  173. {$endif x86_64}
  174. );
  175. RS_DEFAULTFLAGS = RS_FLAGS;
  176. NR_DEFAULTFLAGS = NR_FLAGS;
  177. type
  178. totherregisterset = set of tregisterindex;
  179. {*****************************************************************************
  180. Conditions
  181. *****************************************************************************}
  182. type
  183. TAsmCond=(C_None,
  184. C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
  185. C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,
  186. C_NS,C_NZ,C_O,C_P,C_PE,C_PO,C_S,C_Z
  187. );
  188. const
  189. cond2str:array[TAsmCond] of string[3]=('',
  190. 'a','ae','b','be','c','e','g','ge','l','le','na','nae',
  191. 'nb','nbe','nc','ne','ng','nge','nl','nle','no','np',
  192. 'ns','nz','o','p','pe','po','s','z'
  193. );
  194. {*****************************************************************************
  195. Flags
  196. *****************************************************************************}
  197. type
  198. TResFlags = (F_E,F_NE,F_G,F_L,F_GE,F_LE,F_C,F_NC,
  199. F_A,F_AE,F_B,F_BE,
  200. F_S,F_NS,F_O,F_NO);
  201. {*****************************************************************************
  202. Constants
  203. *****************************************************************************}
  204. const
  205. { declare aliases }
  206. LOC_SSEREGISTER = LOC_MMREGISTER;
  207. LOC_CSSEREGISTER = LOC_CMMREGISTER;
  208. max_operands = 4;
  209. maxfpuregs = 8;
  210. {*****************************************************************************
  211. CPU Dependent Constants
  212. *****************************************************************************}
  213. {$i cpubase.inc}
  214. {*****************************************************************************
  215. Helpers
  216. *****************************************************************************}
  217. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  218. function reg2opsize(r:Tregister):topsize;
  219. function reg_cgsize(const reg: tregister): tcgsize;
  220. function is_calljmp(o:tasmop):boolean;
  221. procedure inverse_flags(var f: TResFlags);
  222. function flags_to_cond(const f: TResFlags) : TAsmCond;
  223. function is_segment_reg(r:tregister):boolean;
  224. function findreg_by_number(r:Tregister):tregisterindex;
  225. function std_regnum_search(const s:string):Tregister;
  226. function std_regname(r:Tregister):string;
  227. function dwarf_reg(r:tregister):shortint;
  228. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  229. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  230. {$ifdef i8086}
  231. { returns the next virtual register }
  232. function GetNextReg(const r : TRegister) : TRegister;
  233. {$endif i8086}
  234. implementation
  235. uses
  236. rgbase,verbose;
  237. const
  238. {$ifdef x86_64}
  239. std_regname_table : TRegNameTable = (
  240. {$i r8664std.inc}
  241. );
  242. regnumber_index : array[tregisterindex] of tregisterindex = (
  243. {$i r8664rni.inc}
  244. );
  245. std_regname_index : array[tregisterindex] of tregisterindex = (
  246. {$i r8664sri.inc}
  247. );
  248. {$else x86_64}
  249. std_regname_table : TRegNameTable = (
  250. {$i r386std.inc}
  251. );
  252. regnumber_index : array[tregisterindex] of tregisterindex = (
  253. {$i r386rni.inc}
  254. );
  255. std_regname_index : array[tregisterindex] of tregisterindex = (
  256. {$i r386sri.inc}
  257. );
  258. {$endif x86_64}
  259. {*****************************************************************************
  260. Helpers
  261. *****************************************************************************}
  262. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  263. begin
  264. case s of
  265. OS_8,OS_S8:
  266. cgsize2subreg:=R_SUBL;
  267. OS_16,OS_S16:
  268. cgsize2subreg:=R_SUBW;
  269. OS_32,OS_S32:
  270. cgsize2subreg:=R_SUBD;
  271. OS_64,OS_S64:
  272. cgsize2subreg:=R_SUBQ;
  273. OS_M64:
  274. cgsize2subreg:=R_SUBNONE;
  275. OS_F32,OS_F64,OS_C64:
  276. case regtype of
  277. R_FPUREGISTER:
  278. cgsize2subreg:=R_SUBWHOLE;
  279. R_MMREGISTER:
  280. case s of
  281. OS_F32:
  282. cgsize2subreg:=R_SUBMMS;
  283. OS_F64:
  284. cgsize2subreg:=R_SUBMMD;
  285. else
  286. internalerror(2009071901);
  287. end;
  288. else
  289. internalerror(2009071902);
  290. end;
  291. OS_M128,OS_MS128:
  292. cgsize2subreg:=R_SUBMMX;
  293. OS_M256,OS_MS256:
  294. cgsize2subreg:=R_SUBMMY;
  295. else
  296. internalerror(200301231);
  297. end;
  298. end;
  299. function reg_cgsize(const reg: tregister): tcgsize;
  300. const subreg2cgsize:array[Tsubregister] of Tcgsize =
  301. (OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO,OS_F32,OS_F64,OS_NO,OS_M128,OS_M256);
  302. begin
  303. case getregtype(reg) of
  304. R_INTREGISTER :
  305. reg_cgsize:=subreg2cgsize[getsubreg(reg)];
  306. R_FPUREGISTER :
  307. reg_cgsize:=OS_F80;
  308. R_MMXREGISTER:
  309. reg_cgsize:=OS_M64;
  310. R_MMREGISTER:
  311. reg_cgsize:=subreg2cgsize[getsubreg(reg)];
  312. R_SPECIALREGISTER :
  313. case reg of
  314. NR_CS,NR_DS,NR_ES,NR_SS,NR_FS,NR_GS:
  315. reg_cgsize:=OS_16;
  316. {$ifdef x86_64}
  317. NR_DR0..NR_TR7:
  318. reg_cgsize:=OS_64;
  319. {$endif x86_64}
  320. else
  321. reg_cgsize:=OS_32
  322. end
  323. else
  324. internalerror(2003031801);
  325. end;
  326. end;
  327. function reg2opsize(r:Tregister):topsize;
  328. const
  329. subreg2opsize : array[tsubregister] of topsize =
  330. (S_NO,S_B,S_B,S_W,S_L,S_Q,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO,S_NO);
  331. begin
  332. reg2opsize:=S_L;
  333. case getregtype(r) of
  334. R_INTREGISTER :
  335. reg2opsize:=subreg2opsize[getsubreg(r)];
  336. R_FPUREGISTER :
  337. reg2opsize:=S_FL;
  338. R_MMXREGISTER,
  339. R_MMREGISTER :
  340. reg2opsize:=S_MD;
  341. R_SPECIALREGISTER :
  342. begin
  343. case r of
  344. NR_CS,NR_DS,NR_ES,
  345. NR_SS,NR_FS,NR_GS :
  346. reg2opsize:=S_W;
  347. end;
  348. end;
  349. else
  350. internalerror(200303181);
  351. end;
  352. end;
  353. function is_calljmp(o:tasmop):boolean;
  354. begin
  355. case o of
  356. A_CALL,
  357. {$ifdef i386}
  358. A_JCXZ,
  359. {$endif i386}
  360. A_JECXZ,
  361. {$ifdef x86_64}
  362. A_JRCXZ,
  363. {$endif x86_64}
  364. A_JMP,
  365. A_LOOP,
  366. A_LOOPE,
  367. A_LOOPNE,
  368. A_LOOPNZ,
  369. A_LOOPZ,
  370. A_LCALL,
  371. A_LJMP,
  372. A_Jcc :
  373. is_calljmp:=true;
  374. else
  375. is_calljmp:=false;
  376. end;
  377. end;
  378. procedure inverse_flags(var f: TResFlags);
  379. const
  380. inv_flags: array[TResFlags] of TResFlags =
  381. (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
  382. F_BE,F_B,F_AE,F_A,
  383. F_NS,F_S,F_NO,F_O);
  384. begin
  385. f:=inv_flags[f];
  386. end;
  387. function flags_to_cond(const f: TResFlags) : TAsmCond;
  388. const
  389. flags_2_cond : array[TResFlags] of TAsmCond =
  390. (C_E,C_NE,C_G,C_L,C_GE,C_LE,C_C,C_NC,C_A,C_AE,C_B,C_BE,C_S,C_NS,C_O,C_NO);
  391. begin
  392. result := flags_2_cond[f];
  393. end;
  394. function is_segment_reg(r:tregister):boolean;
  395. begin
  396. result:=false;
  397. case r of
  398. NR_CS,NR_DS,NR_ES,
  399. NR_SS,NR_FS,NR_GS :
  400. result:=true;
  401. end;
  402. end;
  403. function findreg_by_number(r:Tregister):tregisterindex;
  404. var
  405. hr : tregister;
  406. begin
  407. { for the name the sub reg doesn't matter }
  408. hr:=r;
  409. if (getregtype(hr)=R_MMREGISTER) and
  410. (getsubreg(hr)<>R_SUBMMY) then
  411. setsubreg(hr,R_SUBMMX);
  412. result:=findreg_by_number_table(hr,regnumber_index);
  413. end;
  414. function std_regnum_search(const s:string):Tregister;
  415. begin
  416. result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
  417. end;
  418. function std_regname(r:Tregister):string;
  419. var
  420. p : tregisterindex;
  421. begin
  422. if getregtype(r) in [R_MMREGISTER,R_MMXREGISTER] then
  423. r:=newreg(getregtype(r),getsupreg(r),R_SUBNONE);
  424. p:=findreg_by_number(r);
  425. if p<>0 then
  426. result:=std_regname_table[p]
  427. else
  428. result:=generic_regname(r);
  429. end;
  430. function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  431. const
  432. inverse: array[TAsmCond] of TAsmCond=(C_None,
  433. C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
  434. C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_O,C_P,
  435. C_S,C_Z,C_NO,C_NP,C_NP,C_P,C_NS,C_NZ
  436. );
  437. begin
  438. result := inverse[c];
  439. end;
  440. function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  441. begin
  442. result := c1 = c2;
  443. end;
  444. function dwarf_reg(r:tregister):shortint;
  445. begin
  446. result:=regdwarf_table[findreg_by_number(r)];
  447. if result=-1 then
  448. internalerror(200603251);
  449. end;
  450. {$ifdef i8086}
  451. function GetNextReg(const r: TRegister): TRegister;
  452. begin
  453. result:=TRegister(longint(r)+1);
  454. end;
  455. {$endif i8086}
  456. end.