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aasmcpu.pas
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da55d9ded2
Also disable overflow where range check is disabled in aasmcpu unit
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10 years ago |
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agx86att.pas
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79a06b1514
+ iphonesim/x86_64 target (64 bit iOS simulator)
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10 years ago |
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agx86int.pas
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632f43c490
* fix assembling with masm according to #25858
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10 years ago |
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agx86nsm.pas
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7c1cf07484
+ support section smartlinking with nasm
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10 years ago |
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cga.pas
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d88d644925
+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
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11 years ago |
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cgx86.pas
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2ab7f5c35d
* moved x86-specific requirements from the generic bsr/bsf code to the
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10 years ago |
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cpubase.pas
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07e90aaa24
+ Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362.
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11 years ago |
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hlcgx86.pas
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71deda6f50
+ added interface to ncgutil.gen_load_loc_cgpara() to hlcgobj + generic
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14 years ago |
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itcpugas.pas
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926dd1b41e
* command line compilation of i8086 fixed
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12 years ago |
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itx86int.pas
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0e41df598e
* merge i8086 branch by Nikolay Nikolov
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12 years ago |
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ni86mem.pas
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4a79481c51
* isolated segment-related functionality of tabsolutevarsym into i386/i8086-
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11 years ago |
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nx86add.pas
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249a60b28b
x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run.
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11 years ago |
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nx86cal.pas
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9c1f917e3a
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
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11 years ago |
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nx86cnv.pas
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d613ab8578
* x86: improve x87 qword to float conversion, using single-precision constants saves space and removes need in separate load on FPU stack. No precision loss occurs because 2**64 is representable exactly even in single precision.
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11 years ago |
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nx86con.pas
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45f60bc4b5
* small changes (copyright, typo, readability)
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12 years ago |
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nx86inl.pas
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de17e9fa1c
+ cpu capability CPUX86_HAS_CMOV
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10 years ago |
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nx86mat.pas
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29d4037a9c
* make integer division instruction (div/idiv) on x86 dependent on the
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10 years ago |
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nx86mem.pas
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d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
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10 years ago |
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nx86set.pas
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5e8f8f4755
* Use GOT-relative constants for i386 PIC jump tables, they don't need runtime relocations. Now almost ABI-compliant on Linux/BSD (Darwin targets unchanged). Also clean up i8086-specific stuff: using tai_const.create_type_sym(aitconst_ptr,...) generates near pointers on i8086, which is the desired goal.
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11 years ago |
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rax86.pas
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42d251da1c
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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10 years ago |
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rax86att.pas
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42d251da1c
- x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability.
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10 years ago |
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rax86int.pas
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d6e4af8279
+ applied remaining patches of Torsten Grundke: adds gather instructions of avx2
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10 years ago |
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rgx86.pas
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e7cd5319f0
* Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode.
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11 years ago |
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symi86.pas
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fc71081b74
* i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to
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11 years ago |
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symx86.pas
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94bcb9878a
* reimplemented r28329 in a different way, as suggested by Jonas
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11 years ago |
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x86ins.dat
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99635658ec
* corrects change flags for VSQRTSD
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10 years ago |
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x86reg.dat
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 years ago |
florian
99635658ec
* corrects change flags for VSQRTSD