aoptcpu.pas 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628
  1. {
  2. Copyright (c) 1998-2014 by the Free Pascal development team
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$ifdef EXTDEBUG}
  21. {$define DEBUG_AOPTCPU}
  22. {$endif EXTDEBUG}
  23. Interface
  24. uses
  25. cpubase, aoptobj, aoptcpub, aopt, aasmtai,
  26. cgbase;
  27. Type
  28. TCpuAsmOptimizer = class(TAsmOptimizer)
  29. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  30. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  31. function TryToFoldDoubleAND(var p: tai): boolean;
  32. function TryToRemoveTST(var p: tai): boolean;
  33. function TryToOptimizeMove(var p: tai): boolean;
  34. function MaybeRealConstOperSimplify(var p: tai): boolean;
  35. function OptPass1LEA(var p: tai): Boolean;
  36. function OptPass1MOVEM(var p: tai): Boolean;
  37. function OptPass1Bitwise(var p: tai): Boolean;
  38. { outputs a debug message into the assembler file }
  39. procedure DebugMsg(const s: string; p: tai);
  40. End;
  41. Implementation
  42. uses
  43. cutils, aasmcpu, cgutils, globtype, globals, verbose, cpuinfo, itcpugas, procinfo, cpupi,
  44. aoptutils;
  45. { Range check must be disabled explicitly as conversions between signed and unsigned
  46. 32-bit values are done without explicit typecasts }
  47. {$R-}
  48. function opname(var p: tai): string;
  49. begin
  50. result:=upcase(gas_op2str[taicpu(p).opcode]);
  51. end;
  52. function RefsEqual(const r1, r2: treference): boolean;
  53. begin
  54. RefsEqual :=
  55. (r1.offset = r2.offset) and
  56. (r1.base = r2.base) and
  57. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  58. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  59. (r1.relsymbol = r2.relsymbol) and
  60. (r1.volatility=[]) and
  61. (r2.volatility=[]);
  62. end;
  63. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
  64. begin
  65. result := oper1.typ = oper2.typ;
  66. if result then
  67. case oper1.typ of
  68. top_const:
  69. Result:=oper1.val = oper2.val;
  70. top_reg:
  71. Result:=oper1.reg = oper2.reg;
  72. top_ref:
  73. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  74. else
  75. internalerror(2016112401);
  76. end
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp; const opsize: topsizes): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op) and
  83. ((opsize = []) or (taicpu(instr).opsize in opsize));
  84. end;
  85. function MatchInstruction(const instr : tai;const ops : array of TAsmOp;
  86. const opsize : topsizes) : boolean;
  87. var
  88. op : TAsmOp;
  89. begin
  90. result:=false;
  91. for op in ops do
  92. begin
  93. if (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode = op) and
  95. ((opsize = []) or (taicpu(instr).opsize in opsize)) then
  96. begin
  97. result:=true;
  98. exit;
  99. end;
  100. end;
  101. end;
  102. function TCpuAsmOptimizer.MaybeRealConstOperSimplify(var p: tai): boolean;
  103. var
  104. tmpint64: int64;
  105. tmpsingle: single;
  106. begin
  107. result:=false;
  108. if (taicpu(p).oper[0]^.typ = top_realconst) then
  109. begin
  110. { if we work with actual integers, turn the operand into one }
  111. if frac(taicpu(p).oper[0]^.val_real) = 0 then
  112. begin
  113. tmpint64:=trunc(taicpu(p).oper[0]^.val_real);
  114. if (high(shortint) >= tmpint64) and (low(shortint) <= tmpint64) then
  115. begin
  116. taicpu(p).opsize := S_B;
  117. taicpu(p).oper[0]^.typ:=top_const;
  118. end
  119. else
  120. if (high(smallint) >= tmpint64) and (low(smallint) <= tmpint64) then
  121. begin
  122. taicpu(p).opsize := S_W;
  123. taicpu(p).oper[0]^.typ:=top_const;
  124. end
  125. else
  126. if (high(longint) >= tmpint64) and (low(longint) <= tmpint64) then
  127. begin
  128. taicpu(p).opsize := S_L;
  129. taicpu(p).oper[0]^.typ:=top_const;
  130. end;
  131. if (taicpu(p).oper[0]^.typ) = top_const then
  132. begin
  133. DebugMsg('Optimizer: FPU real const to integer',p);
  134. taicpu(p).oper[0]^.val:=tmpint64;
  135. result:=true;
  136. end;
  137. end
  138. else
  139. begin
  140. tmpsingle:=taicpu(p).oper[0]^.val_real;
  141. if (taicpu(p).opsize = S_FD) and
  142. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  143. begin
  144. DebugMsg('Optimizer: FPU real const to lesser precision',p);
  145. taicpu(p).opsize:=S_FS;
  146. result:=true;
  147. end;
  148. end;
  149. end;
  150. end;
  151. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  152. var
  153. p: taicpu;
  154. begin
  155. if not assigned(hp) or
  156. (hp.typ <> ait_instruction) then
  157. begin
  158. Result := false;
  159. exit;
  160. end;
  161. p := taicpu(hp);
  162. Result :=
  163. (((p.opcode=A_MOVE) or (p.opcode=A_MOVEA) or (p.opcode=A_MVS) or
  164. (p.opcode=A_MVZ) or (p.opcode=A_MOVEQ) or (p.opcode=A_LEA)) and
  165. (p.oper[1]^.typ = top_reg) and
  166. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  167. ((p.oper[0]^.typ = top_const) or
  168. ((p.oper[0]^.typ = top_reg) and
  169. not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
  170. ((p.oper[0]^.typ = top_ref) and
  171. not RegInRef(reg,p.oper[0]^.ref^)))) or
  172. ((p.opcode = A_FMOVE) and
  173. (p.oper[1]^.typ = top_reg) and
  174. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  175. ((p.oper[0]^.typ = top_realconst) or
  176. ((p.oper[0]^.typ = top_reg) and
  177. not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
  178. ((p.opcode = A_MOVEM) and
  179. (p.oper[1]^.typ = top_regset) and
  180. ((getsupreg(reg) in p.oper[1]^.dataregset) or
  181. (getsupreg(reg) in p.oper[1]^.addrregset))) or
  182. ((p.opcode = A_FMOVEM) and
  183. (p.oper[1]^.typ = top_regset) and
  184. (getsupreg(reg) in p.oper[1]^.fpuregset));
  185. end;
  186. {$ifdef DEBUG_AOPTCPU}
  187. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
  188. begin
  189. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  190. end;
  191. {$else DEBUG_AOPTCPU}
  192. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
  193. begin
  194. end;
  195. {$endif DEBUG_AOPTCPU}
  196. function TCpuAsmOptimizer.TryToFoldDoubleAND(var p: tai): boolean;
  197. var
  198. next, next2: tai;
  199. opstr: string[15];
  200. begin
  201. result:=false;
  202. if ((taicpu(p).oper[0]^.typ=top_const) and (taicpu(p).oper[1]^.typ=top_reg)) and
  203. GetNextInstruction(p,next) and
  204. MatchInstruction(next,A_AND,[taicpu(p).opsize]) and
  205. (taicpu(next).oper[0]^.typ=top_const) and
  206. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[1]^) then
  207. begin
  208. DebugMsg('Optimizer: folding double AND',p);
  209. taicpu(p).oper[0]^.val:=taicpu(p).oper[0]^.val and taicpu(next).oper[0]^.val;
  210. RemoveInstruction(next);
  211. result:=true;
  212. end;
  213. end;
  214. function TCpuAsmOptimizer.TryToRemoveTST(var p: tai): boolean;
  215. var
  216. next, next2: tai;
  217. opstr: string[15];
  218. begin
  219. result:=false;
  220. if not((taicpu(p).oper[1]^.typ=top_reg) and isaddressregister(taicpu(p).oper[1]^.reg)) and
  221. GetNextInstruction(p,next) and
  222. MatchInstruction(next,A_TST,[taicpu(p).opsize]) and
  223. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) and
  224. GetNextInstruction(next,next2) and
  225. MatchInstruction(next2,[A_BXX,A_SXX],[S_NO,S_B]) and
  226. (taicpu(next2).condition in [C_NE,C_EQ,C_PL,C_MI]) then
  227. begin
  228. opstr:=opname(p);
  229. DebugMsg('Optimizer: '+opstr+', TST, Jxx/Sxx to '+opstr+', Jxx/Sxx',p);
  230. RemoveInstruction(next);
  231. result:=true;
  232. end;
  233. end;
  234. function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
  235. var
  236. next, next2: tai;
  237. opstr: string[15];
  238. begin
  239. result:=false;
  240. if (taicpu(p).opcode=A_MOVE) then
  241. begin
  242. result:=TryToRemoveTST(p);
  243. if result then
  244. exit;
  245. end;
  246. if GetNextInstruction(p,next) and
  247. (next.typ = ait_instruction) and
  248. (taicpu(next).opcode = taicpu(p).opcode) and
  249. (taicpu(p).opsize = taicpu(next).opsize) and
  250. (taicpu(p).oper[1]^.typ = top_reg) and
  251. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
  252. begin
  253. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
  254. RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
  255. begin
  256. opstr:=opname(p);
  257. case taicpu(p).oper[0]^.typ of
  258. top_reg:
  259. { do not optimize away FPU to INT to FPU reg moves. These are used for
  260. to-single-rounding on FPUs which have no FSMOVE/FDMOVE. (KB) }
  261. if not ((taicpu(p).opcode = A_FMOVE) and
  262. (getregtype(taicpu(p).oper[0]^.reg) <> getregtype(taicpu(p).oper[1]^.reg))) then
  263. begin
  264. { move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
  265. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  266. UpdateUsedRegs(p);
  267. RemoveInstruction(next);
  268. result:=true;
  269. { also remove leftover move %reg0, %reg0, which can occur as the result
  270. of the previous optimization, if %reg0 and %tmpreg was different types
  271. (addr vs. data), so these moves were left in by the cg }
  272. if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  273. begin
  274. DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
  275. RemoveCurrentP(p);
  276. end
  277. else
  278. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
  279. end;
  280. top_const:
  281. begin
  282. // DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
  283. end;
  284. top_ref:
  285. begin
  286. { move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
  287. { we only want to do this when <ea> is a reg or a simple reference }
  288. with taicpu(next).oper[1]^ do
  289. if (taicpu(next).opcode <> A_FMOVE) and
  290. ((typ = top_reg) or
  291. ((typ = top_ref) and
  292. ((ref^.index = NR_NO) or
  293. (ref^.base = NR_NO)) and
  294. (ref^.symbol = nil) and
  295. (ref^.offset = 0))) then
  296. begin
  297. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
  298. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  299. UpdateUsedRegs(p);
  300. RemoveInstruction(next);
  301. result:=true;
  302. end;
  303. end;
  304. else
  305. ;
  306. end;
  307. end;
  308. exit;
  309. end;
  310. if GetNextInstruction(p,next) and
  311. (next.typ = ait_instruction) and
  312. GetNextInstruction(next,next2) and
  313. (next2.typ = ait_instruction) and
  314. (taicpu(next).opcode <> taicpu(p).opcode) and
  315. (taicpu(next2).opcode = taicpu(p).opcode) and
  316. (taicpu(p).oper[0]^.typ = top_reg) and
  317. (taicpu(p).oper[1]^.typ = top_reg) and
  318. (getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
  319. MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
  320. MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
  321. (taicpu(p).opsize = taicpu(next2).opsize) and
  322. ((taicpu(p).opcode = A_FMOVE) or
  323. (taicpu(p).opsize = taicpu(next).opsize)) then
  324. begin
  325. opstr:=opname(p);
  326. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
  327. not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
  328. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
  329. begin
  330. { move %reg0, %tmpreg
  331. op ???, %tmpreg
  332. move %tmpreg, %reg0
  333. to:
  334. op ???, %reg0 }
  335. if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
  336. begin
  337. {
  338. Disabled, because it breaks some tests... :( (KB)
  339. DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
  340. taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
  341. asml.remove(p);
  342. asml.remove(next2);
  343. p.free;
  344. next2.free;
  345. result:=true;
  346. }
  347. end;
  348. end;
  349. end;
  350. end;
  351. function TCpuAsmOptimizer.OptPass1LEA(var p: tai): Boolean;
  352. var
  353. next: tai;
  354. begin
  355. Result:=false;
  356. { LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
  357. if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
  358. (((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
  359. (taicpu(p).oper[0]^.ref^.index = NR_NO)) or
  360. ((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
  361. (taicpu(p).oper[0]^.ref^.base = NR_NO))) and
  362. (taicpu(p).oper[0]^.ref^.offset = 0) then
  363. begin
  364. DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
  365. result:=RemoveCurrentP(p);
  366. if result then
  367. exit;
  368. end;
  369. if (taicpu(p).oper[1]^.reg=NR_A7) and
  370. (taicpu(p).oper[0]^.ref^.base=NR_A7) and
  371. (taicpu(p).oper[0]^.ref^.index=NR_NO) and
  372. (taicpu(p).oper[0]^.ref^.symbol=nil) and
  373. (taicpu(p).oper[0]^.ref^.direction=dir_none) and
  374. GetNextInstruction(p,next) and
  375. MatchInstruction(next,A_MOVEM,[S_L]) and
  376. MatchOpType(taicpu(next),top_regset,top_ref) and
  377. ((taicpu(p).oper[0]^.ref^.offset=-(PopCnt(Byte(taicpu(next).oper[0]^.dataregset))+PopCnt(Byte(taicpu(next).oper[0]^.addrregset)))*4)) and
  378. (taicpu(next).oper[1]^.ref^.base=NR_A7) and
  379. (taicpu(next).oper[1]^.ref^.index=NR_NO) and
  380. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  381. (taicpu(next).oper[1]^.ref^.direction=dir_none) and
  382. not (current_settings.cputype in cpu_coldfire) then
  383. begin
  384. DebugMsg('Optimizer: LEA, MOVE(M) to MOVE(M) predecremented',p);
  385. taicpu(next).oper[1]^.ref^.direction:=dir_dec;
  386. RemoveCurrentP(p,next);
  387. result:=true;
  388. exit;
  389. end;
  390. end;
  391. function TCpuAsmOptimizer.OptPass1MOVEM(var p: tai): Boolean;
  392. var
  393. next: tai;
  394. begin
  395. Result:=false;
  396. if MatchOpType(taicpu(p),top_ref,top_regset) and
  397. (taicpu(p).oper[0]^.ref^.base=NR_A7) and
  398. (taicpu(p).oper[0]^.ref^.index=NR_NO) and
  399. (taicpu(p).oper[0]^.ref^.symbol=nil) and
  400. (taicpu(p).oper[0]^.ref^.direction=dir_none) and
  401. GetNextInstruction(p,next) and
  402. MatchInstruction(next,A_LEA,[S_NO]) and
  403. (taicpu(next).oper[1]^.reg=NR_A7) and
  404. (taicpu(next).oper[0]^.ref^.base=NR_A7) and
  405. (taicpu(next).oper[0]^.ref^.index=NR_NO) and
  406. (taicpu(next).oper[0]^.ref^.symbol=nil) and
  407. (taicpu(next).oper[0]^.ref^.direction=dir_none) and
  408. ((taicpu(next).oper[0]^.ref^.offset=(PopCnt(Byte(taicpu(p).oper[1]^.dataregset))+PopCnt(Byte(taicpu(p).oper[1]^.addrregset)))*4)) and
  409. not (current_settings.cputype in cpu_coldfire) then
  410. begin
  411. DebugMsg('Optimizer: MOVE(M), LEA to MOVE(M) postincremented',p);
  412. taicpu(p).oper[0]^.ref^.direction:=dir_inc;
  413. RemoveInstruction(next);
  414. result:=true;
  415. exit;
  416. end;
  417. end;
  418. function TCpuAsmOptimizer.OptPass1Bitwise(var p: tai): Boolean;
  419. begin
  420. result:=false;
  421. case p.typ of
  422. ait_instruction:
  423. begin
  424. if taicpu(p).opcode = A_AND then
  425. result:=TryToFoldDoubleAND(p);
  426. if not result then
  427. result:=TryToRemoveTST(p);
  428. end;
  429. else
  430. ;
  431. end;
  432. end;
  433. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  434. var
  435. next: tai;
  436. tmpref: treference;
  437. begin
  438. result:=false;
  439. case p.typ of
  440. ait_instruction:
  441. begin
  442. //asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
  443. case taicpu(p).opcode of
  444. A_MOVE:
  445. result:=TryToOptimizeMove(p);
  446. A_MOVEM:
  447. result:=OptPass1MOVEM(p);
  448. A_LEA:
  449. result:=OptPass1LEA(p);
  450. { Bitwise operations }
  451. A_AND,A_OR,A_EOR:
  452. result:=OptPass1Bitwise(p);
  453. { Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
  454. SmallInt range, which is shorter to encode and faster to execute on most 68k }
  455. A_SUB,A_SUBA,A_ADD,A_ADDA:
  456. if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
  457. (taicpu(p).oper[0]^.typ = top_const) then
  458. begin
  459. if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
  460. begin
  461. DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
  462. taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
  463. if taicpu(p).opcode in [A_ADD,A_ADDA] then
  464. taicpu(p).opcode:=A_ADDQ
  465. else
  466. taicpu(p).opcode:=A_SUBQ;
  467. result:=true;
  468. end
  469. else
  470. if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
  471. begin
  472. DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
  473. if (taicpu(p).opcode=A_SUB) or (taicpu(p).opcode=A_SUBA) then
  474. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
  475. else
  476. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
  477. taicpu(p).opcode:=A_LEA;
  478. taicpu(p).opsize:=S_NO;
  479. taicpu(p).loadref(0,tmpref);
  480. result:=true;
  481. end;
  482. end
  483. else
  484. result:=TryToRemoveTST(p);
  485. A_SUBQ,A_ADDQ:
  486. result:=TryToRemoveTST(p);
  487. { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
  488. A_MOVEA:
  489. if (taicpu(p).oper[0]^.typ = top_const) and
  490. (taicpu(p).oper[0]^.val = 0) then
  491. begin
  492. DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
  493. taicpu(p).opcode:=A_SUBA;
  494. taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
  495. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  496. result:=true;
  497. end;
  498. { CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
  499. A_CLR:
  500. if (current_settings.cputype in [cpu_mc68000]) and
  501. (taicpu(p).oper[0]^.typ = top_reg) and
  502. (taicpu(p).opsize = S_L) and
  503. isintregister(taicpu(p).oper[0]^.reg) then
  504. begin
  505. //DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
  506. taicpu(p).opcode:=A_MOVEQ;
  507. taicpu(p).loadoper(1,taicpu(p).oper[0]^);
  508. taicpu(p).loadconst(0,0);
  509. taicpu(p).ops:=2;
  510. result:=true;
  511. end;
  512. A_JSR:
  513. begin
  514. if (cs_opt_level4 in current_settings.optimizerswitches) and
  515. GetNextInstruction(p,next) and
  516. MatchInstruction(next,A_RTS,[S_NO]) and
  517. { play safe: if any parameter is pushed on the stack, we cannot to this optimization
  518. as the bottom stack element might be a parameter and not the return address as it is expected
  519. after a call (which we simulate by a jmp)
  520. Actually, as in this case the stack pointer is no used as a frame pointer and
  521. there will be more instructions to restore the stack frame before jsr, so this
  522. is unlikedly to happen }
  523. (current_procinfo.maxpushedparasize=0) then
  524. begin
  525. DebugMsg('Optimizer: JSR, RTS to JMP',p);
  526. taicpu(p).opcode:=A_JMP;
  527. RemoveInstruction(next);
  528. result:=true;
  529. end;
  530. end;
  531. { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
  532. A_CMP,A_CMPI:
  533. if ((taicpu(p).oper[0]^.typ = top_const) and
  534. (taicpu(p).oper[0]^.val = 0)) and
  535. ((taicpu(p).oper[1]^.typ = top_ref) or
  536. ((taicpu(p).oper[1]^.typ = top_reg) and
  537. not (isaddressregister(taicpu(p).oper[1]^.reg) and
  538. not (CPUM68K_HAS_TSTAREG in cpu_capabilities[current_settings.cputype])))) then
  539. begin
  540. DebugMsg('Optimizer: CMP #0 to TST',p);
  541. taicpu(p).opcode:=A_TST;
  542. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  543. taicpu(p).clearop(1);
  544. taicpu(p).ops:=1;
  545. result:=true;
  546. end;
  547. A_FCMP:
  548. if (taicpu(p).oper[0]^.typ = top_realconst) then
  549. begin
  550. if (taicpu(p).oper[0]^.val_real = 0.0) then
  551. begin
  552. DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
  553. taicpu(p).opcode:=A_FTST;
  554. taicpu(p).opsize:=S_FX;
  555. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  556. taicpu(p).clearop(1);
  557. taicpu(p).ops:=1;
  558. result:=true;
  559. end
  560. else
  561. result:=result or MaybeRealConstOperSimplify(p);
  562. end;
  563. A_FMOVE,A_FSMOVE,A_FDMOVE,
  564. A_FADD,A_FSADD,A_FDADD,A_FSUB,A_FSSUB,A_FDSUB,
  565. A_FMUL,A_FSMUL,A_FDMUL,A_FDIV,A_FSDIV,A_FDDIV,
  566. A_FSGLMUL,A_FSGLDIV:
  567. begin
  568. if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
  569. begin
  570. result:=true;
  571. exit;
  572. end;
  573. result:=result or MaybeRealConstOperSimplify(p);
  574. end;
  575. else
  576. ;
  577. end;
  578. end;
  579. else
  580. ;
  581. end;
  582. end;
  583. begin
  584. casmoptimizer:=TCpuAsmOptimizer;
  585. end.