cgobj.pas 118 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. {# @abstract(Abstract code generator)
  38. This class implements an abstract instruction generator. Some of
  39. the methods of this class are generic, while others must
  40. be overridden for all new processors which will be supported
  41. by Free Pascal. For 32-bit processors, the base class
  42. should be @link(tcg64f32) and not @var(tcg).
  43. }
  44. tcg = class
  45. public
  46. { how many times is this current code executed }
  47. executionweight : longint;
  48. alignment : talignment;
  49. rg : array[tregistertype] of trgobj;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_live_range_direction(dir: TRADirection);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. It must generate register allocation information for the cgpara in
  102. case it consists of cpuregisters.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overridden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. It must generate register allocation information for the cgpara in
  113. case it consists of cpuregisters.
  114. @param(size size of the operand in constant)
  115. @param(a value of constant to send)
  116. @param(cgpara where the parameter will be stored)
  117. }
  118. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);virtual;
  119. {# Pass the value of a parameter, which is located in memory, to a routine.
  120. A generic version is provided. This routine should
  121. be overridden for optimization purposes if the cpu
  122. permits directly sending this type of parameter.
  123. It must generate register allocation information for the cgpara in
  124. case it consists of cpuregisters.
  125. @param(size size of the operand in constant)
  126. @param(r Memory reference of value to send)
  127. @param(cgpara where the parameter will be stored)
  128. }
  129. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  130. {# Pass the value of a parameter, which can be located either in a register or memory location,
  131. to a routine.
  132. A generic version is provided.
  133. @param(l location of the operand to send)
  134. @param(nr parameter number (starting from one) of routine (from left to right))
  135. @param(cgpara where the parameter will be stored)
  136. }
  137. procedure a_load_loc_cgpara(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  138. {# Pass the address of a reference to a routine. This routine
  139. will calculate the address of the reference, and pass this
  140. calculated address as a parameter.
  141. It must generate register allocation information for the cgpara in
  142. case it consists of cpuregisters.
  143. A generic version is provided. This routine should
  144. be overridden for optimization purposes if the cpu
  145. permits directly sending this type of parameter.
  146. @param(r reference to get address from)
  147. @param(nr parameter number (starting from one) of routine (from left to right))
  148. }
  149. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  150. {# Load a cgparaloc into a memory reference.
  151. It must generate register allocation information for the cgpara in
  152. case it consists of cpuregisters.
  153. @param(paraloc the source parameter sublocation)
  154. @param(ref the destination reference)
  155. @param(sizeleft indicates the total number of bytes left in all of
  156. the remaining sublocations of this parameter (the current
  157. sublocation and all of the sublocations coming after it).
  158. In case this location is also a reference, it is assumed
  159. to be the final part sublocation of the parameter and that it
  160. contains all of the "sizeleft" bytes).)
  161. @param(align the alignment of the paraloc in case it's a reference)
  162. }
  163. procedure a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  164. {# Load a cgparaloc into any kind of register (int, fp, mm).
  165. @param(regsize the size of the destination register)
  166. @param(paraloc the source parameter sublocation)
  167. @param(reg the destination register)
  168. @param(align the alignment of the paraloc in case it's a reference)
  169. }
  170. procedure a_load_cgparaloc_anyreg(list : TAsmList;regsize : tcgsize;const paraloc : TCGParaLocation;reg : tregister;align : longint);
  171. { Remarks:
  172. * If a method specifies a size you have only to take care
  173. of that number of bits, i.e. load_const_reg with OP_8 must
  174. only load the lower 8 bit of the specified register
  175. the rest of the register can be undefined
  176. if necessary the compiler will call a method
  177. to zero or sign extend the register
  178. * The a_load_XX_XX with OP_64 needn't to be
  179. implemented for 32 bit
  180. processors, the code generator takes care of that
  181. * the addr size is for work with the natural pointer
  182. size
  183. * the procedures without fpu/mm are only for integer usage
  184. * normally the first location is the source and the
  185. second the destination
  186. }
  187. {# Emits instruction to call the method specified by symbol name.
  188. This routine must be overridden for each new target cpu.
  189. }
  190. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  191. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  192. procedure a_call_ref(list : TAsmList;ref : treference);virtual;
  193. { same as a_call_name, might be overridden on certain architectures to emit
  194. static calls without usage of a got trampoline }
  195. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  196. { move instructions }
  197. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : tcgint;register : tregister);virtual; abstract;
  198. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);virtual;
  199. procedure a_load_const_loc(list : TAsmList;a : tcgint;const loc : tlocation);
  200. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  201. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  202. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  203. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  204. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  205. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  206. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  207. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  208. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  209. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  210. { bit scan instructions }
  211. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: tcgsize; src, dst: TRegister); virtual; abstract;
  212. { fpu move instructions }
  213. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  214. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  215. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  216. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  217. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  218. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  219. procedure a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  220. procedure a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  221. { vector register move instructions }
  222. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  223. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  224. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  225. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  226. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  227. procedure a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  228. procedure a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  229. procedure a_loadmm_loc_cgpara(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  230. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  231. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  232. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  233. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  234. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  235. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  236. { basic arithmetic operations }
  237. { note: for operators which require only one argument (not, neg), use }
  238. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  239. { that in this case the *second* operand is used as both source and }
  240. { destination (JM) }
  241. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); virtual; abstract;
  242. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference); virtual;
  243. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  244. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  245. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  246. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  247. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  248. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  249. { trinary operations for processors that support them, 'emulated' }
  250. { on others. None with "ref" arguments since I don't think there }
  251. { are any processors that support it (JM) }
  252. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister); virtual;
  253. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  254. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  255. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  256. { comparison operations }
  257. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  258. l : tasmlabel); virtual;
  259. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  260. l : tasmlabel); virtual;
  261. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: tcgint; const loc: tlocation;
  262. l : tasmlabel);
  263. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  264. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  265. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  266. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  267. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  268. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  269. l : tasmlabel);
  270. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  271. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  272. {$ifdef cpuflags}
  273. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  274. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  275. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  276. }
  277. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  278. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  279. {$endif cpuflags}
  280. {
  281. This routine tries to optimize the op_const_reg/ref opcode, and should be
  282. called at the start of a_op_const_reg/ref. It returns the actual opcode
  283. to emit, and the constant value to emit. This function can opcode OP_NONE to
  284. remove the opcode and OP_MOVE to replace it with a simple load
  285. @param(op The opcode to emit, returns the opcode which must be emitted)
  286. @param(a The constant which should be emitted, returns the constant which must
  287. be emitted)
  288. }
  289. procedure optimize_op_const(var op: topcg; var a : tcgint);virtual;
  290. {#
  291. This routine is used in exception management nodes. It should
  292. save the exception reason currently in the FUNCTION_RETURN_REG. The
  293. save should be done either to a temp (pointed to by href).
  294. or on the stack (pushing the value on the stack).
  295. The size of the value to save is OS_S32. The default version
  296. saves the exception reason to a temp. memory area.
  297. }
  298. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  299. {#
  300. This routine is used in exception management nodes. It should
  301. save the exception reason constant. The
  302. save should be done either to a temp (pointed to by href).
  303. or on the stack (pushing the value on the stack).
  304. The size of the value to save is OS_S32. The default version
  305. saves the exception reason to a temp. memory area.
  306. }
  307. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);virtual;
  308. {#
  309. This routine is used in exception management nodes. It should
  310. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  311. should either be in the temp. area (pointed to by href , href should
  312. *NOT* be freed) or on the stack (the value should be popped).
  313. The size of the value to save is OS_S32. The default version
  314. saves the exception reason to a temp. memory area.
  315. }
  316. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  317. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  318. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  319. {# This should emit the opcode to copy len bytes from the source
  320. to destination.
  321. It must be overridden for each new target processor.
  322. @param(source Source reference of copy)
  323. @param(dest Destination reference of copy)
  324. }
  325. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);virtual; abstract;
  326. {# This should emit the opcode to copy len bytes from the an unaligned source
  327. to destination.
  328. It must be overridden for each new target processor.
  329. @param(source Source reference of copy)
  330. @param(dest Destination reference of copy)
  331. }
  332. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);virtual;
  333. {# This should emit the opcode to a shortrstring from the source
  334. to destination.
  335. @param(source Source reference of copy)
  336. @param(dest Destination reference of copy)
  337. }
  338. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  339. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  340. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  341. procedure g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation;
  342. const name: string);
  343. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  344. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  345. {# Generates overflow checking code for a node }
  346. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  347. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  348. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);virtual;
  349. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  350. {# Emits instructions when compilation is done in profile
  351. mode (this is set as a command line option). The default
  352. behavior does nothing, should be overridden as required.
  353. }
  354. procedure g_profilecode(list : TAsmList);virtual;
  355. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  356. @param(size Number of bytes to allocate)
  357. }
  358. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  359. {# Emits instruction for allocating the locals in entry
  360. code of a routine. This is one of the first
  361. routine called in @var(genentrycode).
  362. @param(localsize Number of bytes to allocate as locals)
  363. }
  364. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  365. {# Emits instructions for returning from a subroutine.
  366. Should also restore the framepointer and stack.
  367. @param(parasize Number of bytes of parameters to deallocate from stack)
  368. }
  369. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  370. {# This routine is called when generating the code for the entry point
  371. of a routine. It should save all registers which are not used in this
  372. routine, and which should be declared as saved in the std_saved_registers
  373. set.
  374. This routine is mainly used when linking to code which is generated
  375. by ABI-compliant compilers (like GCC), to make sure that the reserved
  376. registers of that ABI are not clobbered.
  377. @param(usedinproc Registers which are used in the code of this routine)
  378. }
  379. procedure g_save_registers(list:TAsmList);virtual;
  380. {# This routine is called when generating the code for the exit point
  381. of a routine. It should restore all registers which were previously
  382. saved in @var(g_save_standard_registers).
  383. @param(usedinproc Registers which are used in the code of this routine)
  384. }
  385. procedure g_restore_registers(list:TAsmList);virtual;
  386. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  387. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);virtual;
  388. function g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;virtual;
  389. { generate a stub which only purpose is to pass control the given external method,
  390. setting up any additional environment before doing so (if required).
  391. The default implementation issues a jump instruction to the external name. }
  392. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  393. { initialize the pic/got register }
  394. procedure g_maybe_got_init(list: TAsmList); virtual;
  395. { allocallcpuregisters, a_call_name, deallocallcpuregisters sequence }
  396. procedure g_call(list: TAsmList; const s: string);
  397. { Generate code to exit an unwind-protected region. The default implementation
  398. produces a simple jump to destination label. }
  399. procedure g_local_unwind(list: TAsmList; l: TAsmLabel);virtual;
  400. end;
  401. {$ifndef cpu64bitalu}
  402. {# @abstract(Abstract code generator for 64 Bit operations)
  403. This class implements an abstract code generator class
  404. for 64 Bit operations.
  405. }
  406. tcg64 = class
  407. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  408. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  409. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  410. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  411. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  412. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  413. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  414. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  415. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  416. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  417. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  418. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  419. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  420. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  421. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  422. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  423. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  424. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  425. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  426. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  427. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  428. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  429. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  430. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  431. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  432. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  433. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  434. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  435. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  436. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  437. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  438. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  439. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  440. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  441. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  442. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  443. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  444. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  445. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  446. procedure a_load64_reg_cgpara(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  447. procedure a_load64_const_cgpara(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  448. procedure a_load64_ref_cgpara(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  449. procedure a_load64_loc_cgpara(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  450. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  451. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  452. {
  453. This routine tries to optimize the const_reg opcode, and should be
  454. called at the start of a_op64_const_reg. It returns the actual opcode
  455. to emit, and the constant value to emit. If this routine returns
  456. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  457. @param(op The opcode to emit, returns the opcode which must be emitted)
  458. @param(a The constant which should be emitted, returns the constant which must
  459. be emitted)
  460. @param(reg The register to emit the opcode with, returns the register with
  461. which the opcode will be emitted)
  462. }
  463. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  464. { override to catch 64bit rangechecks }
  465. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  466. end;
  467. {$endif cpu64bitalu}
  468. var
  469. {# Main code generator class }
  470. cg : tcg;
  471. {$ifndef cpu64bitalu}
  472. {# Code generator class for all operations working with 64-Bit operands }
  473. cg64 : tcg64;
  474. {$endif cpu64bitalu}
  475. function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
  476. procedure destroy_codegen;
  477. implementation
  478. uses
  479. globals,options,systems,
  480. verbose,defutil,paramgr,symsym,
  481. tgobj,cutils,procinfo,
  482. ncgrtti;
  483. {*****************************************************************************
  484. basic functionallity
  485. ******************************************************************************}
  486. constructor tcg.create;
  487. begin
  488. end;
  489. {*****************************************************************************
  490. register allocation
  491. ******************************************************************************}
  492. procedure tcg.init_register_allocators;
  493. begin
  494. fillchar(rg,sizeof(rg),0);
  495. add_reg_instruction_hook:=@add_reg_instruction;
  496. executionweight:=1;
  497. end;
  498. procedure tcg.done_register_allocators;
  499. begin
  500. { Safety }
  501. fillchar(rg,sizeof(rg),0);
  502. add_reg_instruction_hook:=nil;
  503. end;
  504. {$ifdef flowgraph}
  505. procedure Tcg.init_flowgraph;
  506. begin
  507. aktflownode:=0;
  508. end;
  509. procedure Tcg.done_flowgraph;
  510. begin
  511. end;
  512. {$endif}
  513. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  514. begin
  515. if not assigned(rg[R_INTREGISTER]) then
  516. internalerror(200312122);
  517. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  518. end;
  519. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  520. begin
  521. if not assigned(rg[R_FPUREGISTER]) then
  522. internalerror(200312123);
  523. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  524. end;
  525. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  526. begin
  527. if not assigned(rg[R_MMREGISTER]) then
  528. internalerror(2003121214);
  529. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  530. end;
  531. function tcg.getaddressregister(list:TAsmList):Tregister;
  532. begin
  533. if assigned(rg[R_ADDRESSREGISTER]) then
  534. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  535. else
  536. begin
  537. if not assigned(rg[R_INTREGISTER]) then
  538. internalerror(200312121);
  539. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  540. end;
  541. end;
  542. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  543. var
  544. subreg:Tsubregister;
  545. begin
  546. subreg:=cgsize2subreg(getregtype(reg),size);
  547. result:=reg;
  548. setsubreg(result,subreg);
  549. { notify RA }
  550. if result<>reg then
  551. list.concat(tai_regalloc.resize(result));
  552. end;
  553. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  554. begin
  555. if not assigned(rg[getregtype(r)]) then
  556. internalerror(200312125);
  557. rg[getregtype(r)].getcpuregister(list,r);
  558. end;
  559. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  560. begin
  561. if not assigned(rg[getregtype(r)]) then
  562. internalerror(200312126);
  563. rg[getregtype(r)].ungetcpuregister(list,r);
  564. end;
  565. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  566. begin
  567. if assigned(rg[rt]) then
  568. rg[rt].alloccpuregisters(list,r)
  569. else
  570. internalerror(200310092);
  571. end;
  572. procedure tcg.allocallcpuregisters(list:TAsmList);
  573. begin
  574. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  575. {$if not(defined(i386)) and not(defined(avr))}
  576. if uses_registers(R_FPUREGISTER) then
  577. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  578. {$ifdef cpumm}
  579. if uses_registers(R_MMREGISTER) then
  580. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  581. {$endif cpumm}
  582. {$endif not(defined(i386)) and not(defined(avr))}
  583. end;
  584. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  585. begin
  586. if assigned(rg[rt]) then
  587. rg[rt].dealloccpuregisters(list,r)
  588. else
  589. internalerror(200310093);
  590. end;
  591. procedure tcg.deallocallcpuregisters(list:TAsmList);
  592. begin
  593. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  594. {$if not(defined(i386)) and not(defined(avr))}
  595. if uses_registers(R_FPUREGISTER) then
  596. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  597. {$ifdef cpumm}
  598. if uses_registers(R_MMREGISTER) then
  599. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  600. {$endif cpumm}
  601. {$endif not(defined(i386)) and not(defined(avr))}
  602. end;
  603. function tcg.uses_registers(rt:Tregistertype):boolean;
  604. begin
  605. if assigned(rg[rt]) then
  606. result:=rg[rt].uses_registers
  607. else
  608. result:=false;
  609. end;
  610. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  611. var
  612. rt : tregistertype;
  613. begin
  614. rt:=getregtype(r);
  615. { Only add it when a register allocator is configured.
  616. No IE can be generated, because the VMT is written
  617. without a valid rg[] }
  618. if assigned(rg[rt]) then
  619. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  620. end;
  621. procedure tcg.add_move_instruction(instr:Taicpu);
  622. var
  623. rt : tregistertype;
  624. begin
  625. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  626. if assigned(rg[rt]) then
  627. rg[rt].add_move_instruction(instr)
  628. else
  629. internalerror(200310095);
  630. end;
  631. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  632. var
  633. rt : tregistertype;
  634. begin
  635. for rt:=low(rg) to high(rg) do
  636. begin
  637. if assigned(rg[rt]) then
  638. rg[rt].live_range_direction:=dir;
  639. end;
  640. end;
  641. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  642. var
  643. rt : tregistertype;
  644. begin
  645. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  646. begin
  647. if assigned(rg[rt]) then
  648. rg[rt].do_register_allocation(list,headertai);
  649. end;
  650. { running the other register allocator passes could require addition int/addr. registers
  651. when spilling so run int/addr register allocation at the end }
  652. if assigned(rg[R_INTREGISTER]) then
  653. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  654. if assigned(rg[R_ADDRESSREGISTER]) then
  655. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  656. end;
  657. procedure tcg.translate_register(var reg : tregister);
  658. begin
  659. rg[getregtype(reg)].translate_register(reg);
  660. end;
  661. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  662. begin
  663. list.concat(tai_regalloc.alloc(r,nil));
  664. end;
  665. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  666. begin
  667. list.concat(tai_regalloc.dealloc(r,nil));
  668. end;
  669. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  670. var
  671. instr : tai;
  672. begin
  673. instr:=tai_regalloc.sync(r);
  674. list.concat(instr);
  675. add_reg_instruction(instr,r);
  676. end;
  677. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  678. begin
  679. list.concat(tai_label.create(l));
  680. end;
  681. {*****************************************************************************
  682. for better code generation these methods should be overridden
  683. ******************************************************************************}
  684. procedure tcg.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  685. var
  686. ref : treference;
  687. tmpreg : tregister;
  688. begin
  689. cgpara.check_simple_location;
  690. paramanager.alloccgpara(list,cgpara);
  691. if cgpara.location^.shiftval<0 then
  692. begin
  693. tmpreg:=getintregister(list,cgpara.location^.size);
  694. a_op_const_reg_reg(list,OP_SHL,cgpara.location^.size,-cgpara.location^.shiftval,r,tmpreg);
  695. r:=tmpreg;
  696. end;
  697. case cgpara.location^.loc of
  698. LOC_REGISTER,LOC_CREGISTER:
  699. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  700. LOC_REFERENCE,LOC_CREFERENCE:
  701. begin
  702. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  703. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  704. end;
  705. LOC_MMREGISTER,LOC_CMMREGISTER:
  706. a_loadmm_intreg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register,mms_movescalar);
  707. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  708. begin
  709. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  710. a_load_reg_ref(list,size,size,r,ref);
  711. a_loadfpu_ref_cgpara(list,cgpara.location^.size,ref,cgpara);
  712. tg.Ungettemp(list,ref);
  713. end
  714. else
  715. internalerror(2002071004);
  716. end;
  717. end;
  718. procedure tcg.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);
  719. var
  720. ref : treference;
  721. begin
  722. cgpara.check_simple_location;
  723. paramanager.alloccgpara(list,cgpara);
  724. if cgpara.location^.shiftval<0 then
  725. a:=a shl -cgpara.location^.shiftval;
  726. case cgpara.location^.loc of
  727. LOC_REGISTER,LOC_CREGISTER:
  728. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  729. LOC_REFERENCE,LOC_CREFERENCE:
  730. begin
  731. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  732. a_load_const_ref(list,cgpara.location^.size,a,ref);
  733. end
  734. else
  735. internalerror(2010053109);
  736. end;
  737. end;
  738. procedure tcg.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  739. var
  740. tmpref, ref: treference;
  741. tmpreg: tregister;
  742. location: pcgparalocation;
  743. orgsizeleft,
  744. sizeleft: tcgint;
  745. reghasvalue: boolean;
  746. begin
  747. location:=cgpara.location;
  748. tmpref:=r;
  749. sizeleft:=cgpara.intsize;
  750. while assigned(location) do
  751. begin
  752. paramanager.allocparaloc(list,location);
  753. case location^.loc of
  754. LOC_REGISTER,LOC_CREGISTER:
  755. begin
  756. { Parameter locations are often allocated in multiples of
  757. entire registers. If a parameter only occupies a part of
  758. such a register (e.g. a 16 bit int on a 32 bit
  759. architecture), the size of this parameter can only be
  760. determined by looking at the "size" parameter of this
  761. method -> if the size parameter is <= sizeof(aint), then
  762. we check that there is only one parameter location and
  763. then use this "size" to load the value into the parameter
  764. location }
  765. if (size<>OS_NO) and
  766. (tcgsize2size[size]<=sizeof(aint)) then
  767. begin
  768. cgpara.check_simple_location;
  769. a_load_ref_reg(list,size,location^.size,tmpref,location^.register);
  770. if location^.shiftval<0 then
  771. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  772. end
  773. { there's a lot more data left, and the current paraloc's
  774. register is entirely filled with part of that data }
  775. else if (sizeleft>sizeof(aint)) then
  776. begin
  777. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  778. end
  779. { we're at the end of the data, and it can be loaded into
  780. the current location's register with a single regular
  781. load }
  782. else if (sizeleft in [1,2{$ifndef cpu16bitalu},4{$endif}{$ifdef cpu64bitalu},8{$endif}]) then
  783. begin
  784. a_load_ref_reg(list,int_cgsize(sizeleft),location^.size,tmpref,location^.register);
  785. if location^.shiftval<0 then
  786. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  787. end
  788. { we're at the end of the data, and we need multiple loads
  789. to get it in the register because it's an irregular size }
  790. else
  791. begin
  792. { should be the last part }
  793. if assigned(location^.next) then
  794. internalerror(2010052907);
  795. { load the value piecewise to get it into the register }
  796. orgsizeleft:=sizeleft;
  797. reghasvalue:=false;
  798. {$ifdef cpu64bitalu}
  799. if sizeleft>=4 then
  800. begin
  801. a_load_ref_reg(list,OS_32,location^.size,tmpref,location^.register);
  802. dec(sizeleft,4);
  803. if target_info.endian=endian_big then
  804. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,location^.register);
  805. inc(tmpref.offset,4);
  806. reghasvalue:=true;
  807. end;
  808. {$endif cpu64bitalu}
  809. if sizeleft>=2 then
  810. begin
  811. tmpreg:=getintregister(list,location^.size);
  812. a_load_ref_reg(list,OS_16,location^.size,tmpref,tmpreg);
  813. dec(sizeleft,2);
  814. if reghasvalue then
  815. begin
  816. if target_info.endian=endian_big then
  817. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg)
  818. else
  819. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+2))*8,tmpreg);
  820. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register);
  821. end
  822. else
  823. begin
  824. if target_info.endian=endian_big then
  825. a_op_const_reg_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg,location^.register)
  826. else
  827. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  828. end;
  829. inc(tmpref.offset,2);
  830. reghasvalue:=true;
  831. end;
  832. if sizeleft=1 then
  833. begin
  834. tmpreg:=getintregister(list,location^.size);
  835. a_load_ref_reg(list,OS_8,location^.size,tmpref,tmpreg);
  836. dec(sizeleft,1);
  837. if reghasvalue then
  838. begin
  839. if target_info.endian=endian_little then
  840. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+1))*8,tmpreg);
  841. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register)
  842. end
  843. else
  844. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  845. inc(tmpref.offset);
  846. end;
  847. if location^.shiftval<0 then
  848. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  849. { the loop will already adjust the offset and sizeleft }
  850. dec(tmpref.offset,orgsizeleft);
  851. sizeleft:=orgsizeleft;
  852. end;
  853. end;
  854. LOC_REFERENCE,LOC_CREFERENCE:
  855. begin
  856. if assigned(location^.next) then
  857. internalerror(2010052906);
  858. reference_reset_base(ref,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft));
  859. if (size <> OS_NO) and
  860. (tcgsize2size[size] <= sizeof(aint)) then
  861. a_load_ref_ref(list,size,location^.size,tmpref,ref)
  862. else
  863. { use concatcopy, because the parameter can be larger than }
  864. { what the OS_* constants can handle }
  865. g_concatcopy(list,tmpref,ref,sizeleft);
  866. end;
  867. LOC_MMREGISTER,LOC_CMMREGISTER:
  868. begin
  869. case location^.size of
  870. OS_F32,
  871. OS_F64,
  872. OS_F128:
  873. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
  874. OS_M8..OS_M128,
  875. OS_MS8..OS_MS128:
  876. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
  877. else
  878. internalerror(2010053101);
  879. end;
  880. end
  881. else
  882. internalerror(2010053111);
  883. end;
  884. inc(tmpref.offset,tcgsize2size[location^.size]);
  885. dec(sizeleft,tcgsize2size[location^.size]);
  886. location:=location^.next;
  887. end;
  888. end;
  889. procedure tcg.a_load_loc_cgpara(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  890. begin
  891. case l.loc of
  892. LOC_REGISTER,
  893. LOC_CREGISTER :
  894. a_load_reg_cgpara(list,l.size,l.register,cgpara);
  895. LOC_CONSTANT :
  896. a_load_const_cgpara(list,l.size,l.value,cgpara);
  897. LOC_CREFERENCE,
  898. LOC_REFERENCE :
  899. a_load_ref_cgpara(list,l.size,l.reference,cgpara);
  900. else
  901. internalerror(2002032211);
  902. end;
  903. end;
  904. procedure tcg.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);
  905. var
  906. hr : tregister;
  907. begin
  908. cgpara.check_simple_location;
  909. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  910. begin
  911. paramanager.allocparaloc(list,cgpara.location);
  912. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  913. end
  914. else
  915. begin
  916. hr:=getaddressregister(list);
  917. a_loadaddr_ref_reg(list,r,hr);
  918. a_load_reg_cgpara(list,OS_ADDR,hr,cgpara);
  919. end;
  920. end;
  921. procedure tcg.a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  922. var
  923. href : treference;
  924. hreg : tregister;
  925. cgsize: tcgsize;
  926. begin
  927. case paraloc.loc of
  928. LOC_REGISTER :
  929. begin
  930. hreg:=paraloc.register;
  931. cgsize:=paraloc.size;
  932. if paraloc.shiftval>0 then
  933. a_op_const_reg_reg(list,OP_SHL,OS_INT,paraloc.shiftval,paraloc.register,paraloc.register)
  934. else if (paraloc.shiftval<0) and
  935. (sizeleft in [1,2,4]) then
  936. begin
  937. a_op_const_reg_reg(list,OP_SHR,OS_INT,-paraloc.shiftval,paraloc.register,paraloc.register);
  938. { convert to a register of 1/2/4 bytes in size, since the
  939. original register had to be made larger to be able to hold
  940. the shifted value }
  941. cgsize:=int_cgsize(tcgsize2size[OS_INT]-(-paraloc.shiftval div 8));
  942. hreg:=getintregister(list,cgsize);
  943. a_load_reg_reg(list,OS_INT,cgsize,paraloc.register,hreg);
  944. end;
  945. a_load_reg_ref(list,paraloc.size,cgsize,hreg,ref);
  946. end;
  947. LOC_MMREGISTER :
  948. begin
  949. case paraloc.size of
  950. OS_F32,
  951. OS_F64,
  952. OS_F128:
  953. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
  954. OS_M8..OS_M128,
  955. OS_MS8..OS_MS128:
  956. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
  957. else
  958. internalerror(2010053102);
  959. end;
  960. end;
  961. LOC_FPUREGISTER :
  962. cg.a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  963. LOC_REFERENCE :
  964. begin
  965. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  966. { use concatcopy, because it can also be a float which fails when
  967. load_ref_ref is used. Don't copy data when the references are equal }
  968. if not((href.base=ref.base) and (href.offset=ref.offset)) then
  969. g_concatcopy(list,href,ref,sizeleft);
  970. end;
  971. else
  972. internalerror(2002081302);
  973. end;
  974. end;
  975. procedure tcg.a_load_cgparaloc_anyreg(list: TAsmList;regsize: tcgsize;const paraloc: TCGParaLocation;reg: tregister;align: longint);
  976. var
  977. href : treference;
  978. begin
  979. case paraloc.loc of
  980. LOC_REGISTER :
  981. begin
  982. if paraloc.shiftval<0 then
  983. a_op_const_reg_reg(list,OP_SHR,OS_INT,-paraloc.shiftval,paraloc.register,paraloc.register);
  984. case getregtype(reg) of
  985. R_INTREGISTER:
  986. a_load_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  987. R_MMREGISTER:
  988. a_loadmm_intreg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  989. else
  990. internalerror(2009112422);
  991. end;
  992. end;
  993. LOC_MMREGISTER :
  994. begin
  995. case getregtype(reg) of
  996. R_INTREGISTER:
  997. a_loadmm_reg_intreg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  998. R_MMREGISTER:
  999. begin
  1000. case paraloc.size of
  1001. OS_F32,
  1002. OS_F64,
  1003. OS_F128:
  1004. a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1005. OS_M8..OS_M128,
  1006. OS_MS8..OS_MS128:
  1007. a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
  1008. else
  1009. internalerror(2010053102);
  1010. end;
  1011. end;
  1012. else
  1013. internalerror(2010053104);
  1014. end;
  1015. end;
  1016. LOC_FPUREGISTER :
  1017. a_loadfpu_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1018. LOC_REFERENCE :
  1019. begin
  1020. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  1021. case getregtype(reg) of
  1022. R_INTREGISTER :
  1023. a_load_ref_reg(list,paraloc.size,regsize,href,reg);
  1024. R_FPUREGISTER :
  1025. a_loadfpu_ref_reg(list,paraloc.size,regsize,href,reg);
  1026. R_MMREGISTER :
  1027. { not paraloc.size, because it may be OS_64 instead of
  1028. OS_F64 in case the parameter is passed using integer
  1029. conventions (e.g., on ARM) }
  1030. a_loadmm_ref_reg(list,regsize,regsize,href,reg,mms_movescalar);
  1031. else
  1032. internalerror(2004101012);
  1033. end;
  1034. end;
  1035. else
  1036. internalerror(2002081302);
  1037. end;
  1038. end;
  1039. {****************************************************************************
  1040. some generic implementations
  1041. ****************************************************************************}
  1042. { memory/register loading }
  1043. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1044. var
  1045. tmpref : treference;
  1046. tmpreg : tregister;
  1047. i : longint;
  1048. begin
  1049. if ref.alignment<tcgsize2size[fromsize] then
  1050. begin
  1051. tmpref:=ref;
  1052. { we take care of the alignment now }
  1053. tmpref.alignment:=0;
  1054. case FromSize of
  1055. OS_16,OS_S16:
  1056. begin
  1057. tmpreg:=getintregister(list,OS_16);
  1058. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1059. if target_info.endian=endian_big then
  1060. inc(tmpref.offset);
  1061. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1062. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1063. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1064. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1065. if target_info.endian=endian_big then
  1066. dec(tmpref.offset)
  1067. else
  1068. inc(tmpref.offset);
  1069. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1070. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1071. end;
  1072. OS_32,OS_S32:
  1073. begin
  1074. { could add an optimised case for ref.alignment=2 }
  1075. tmpreg:=getintregister(list,OS_32);
  1076. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1077. if target_info.endian=endian_big then
  1078. inc(tmpref.offset,3);
  1079. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1080. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1081. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1082. for i:=1 to 3 do
  1083. begin
  1084. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1085. if target_info.endian=endian_big then
  1086. dec(tmpref.offset)
  1087. else
  1088. inc(tmpref.offset);
  1089. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1090. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1091. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1092. end;
  1093. end
  1094. else
  1095. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1096. end;
  1097. end
  1098. else
  1099. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1100. end;
  1101. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1102. var
  1103. tmpref : treference;
  1104. tmpreg,
  1105. tmpreg2 : tregister;
  1106. i : longint;
  1107. begin
  1108. if ref.alignment in [1,2] then
  1109. begin
  1110. tmpref:=ref;
  1111. { we take care of the alignment now }
  1112. tmpref.alignment:=0;
  1113. case FromSize of
  1114. OS_16,OS_S16:
  1115. if ref.alignment=2 then
  1116. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1117. else
  1118. begin
  1119. { first load in tmpreg, because the target register }
  1120. { may be used in ref as well }
  1121. if target_info.endian=endian_little then
  1122. inc(tmpref.offset);
  1123. tmpreg:=getintregister(list,OS_8);
  1124. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1125. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1126. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1127. if target_info.endian=endian_little then
  1128. dec(tmpref.offset)
  1129. else
  1130. inc(tmpref.offset);
  1131. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1132. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1133. end;
  1134. OS_32,OS_S32:
  1135. if ref.alignment=2 then
  1136. begin
  1137. if target_info.endian=endian_little then
  1138. inc(tmpref.offset,2);
  1139. tmpreg:=getintregister(list,OS_32);
  1140. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1141. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1142. if target_info.endian=endian_little then
  1143. dec(tmpref.offset,2)
  1144. else
  1145. inc(tmpref.offset,2);
  1146. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1147. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1148. end
  1149. else
  1150. begin
  1151. if target_info.endian=endian_little then
  1152. inc(tmpref.offset,3);
  1153. tmpreg:=getintregister(list,OS_32);
  1154. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1155. tmpreg2:=getintregister(list,OS_32);
  1156. for i:=1 to 3 do
  1157. begin
  1158. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1159. if target_info.endian=endian_little then
  1160. dec(tmpref.offset)
  1161. else
  1162. inc(tmpref.offset);
  1163. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1164. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1165. end;
  1166. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1167. end
  1168. else
  1169. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1170. end;
  1171. end
  1172. else
  1173. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1174. end;
  1175. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1176. var
  1177. tmpreg: tregister;
  1178. begin
  1179. { verify if we have the same reference }
  1180. if references_equal(sref,dref) then
  1181. exit;
  1182. tmpreg:=getintregister(list,tosize);
  1183. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1184. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1185. end;
  1186. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);
  1187. var
  1188. tmpreg: tregister;
  1189. begin
  1190. tmpreg:=getintregister(list,size);
  1191. a_load_const_reg(list,size,a,tmpreg);
  1192. a_load_reg_ref(list,size,size,tmpreg,ref);
  1193. end;
  1194. procedure tcg.a_load_const_loc(list : TAsmList;a : tcgint;const loc: tlocation);
  1195. begin
  1196. case loc.loc of
  1197. LOC_REFERENCE,LOC_CREFERENCE:
  1198. a_load_const_ref(list,loc.size,a,loc.reference);
  1199. LOC_REGISTER,LOC_CREGISTER:
  1200. a_load_const_reg(list,loc.size,a,loc.register);
  1201. else
  1202. internalerror(200203272);
  1203. end;
  1204. end;
  1205. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1206. begin
  1207. case loc.loc of
  1208. LOC_REFERENCE,LOC_CREFERENCE:
  1209. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1210. LOC_REGISTER,LOC_CREGISTER:
  1211. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1212. LOC_MMREGISTER,LOC_CMMREGISTER:
  1213. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  1214. else
  1215. internalerror(200203271);
  1216. end;
  1217. end;
  1218. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1219. begin
  1220. case loc.loc of
  1221. LOC_REFERENCE,LOC_CREFERENCE:
  1222. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1223. LOC_REGISTER,LOC_CREGISTER:
  1224. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1225. LOC_CONSTANT:
  1226. a_load_const_reg(list,tosize,loc.value,reg);
  1227. else
  1228. internalerror(200109092);
  1229. end;
  1230. end;
  1231. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1232. begin
  1233. case loc.loc of
  1234. LOC_REFERENCE,LOC_CREFERENCE:
  1235. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1236. LOC_REGISTER,LOC_CREGISTER:
  1237. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1238. LOC_CONSTANT:
  1239. a_load_const_ref(list,tosize,loc.value,ref);
  1240. else
  1241. internalerror(200109302);
  1242. end;
  1243. end;
  1244. procedure tcg.optimize_op_const(var op: topcg; var a : tcgint);
  1245. var
  1246. powerval : longint;
  1247. begin
  1248. case op of
  1249. OP_OR :
  1250. begin
  1251. { or with zero returns same result }
  1252. if a = 0 then
  1253. op:=OP_NONE
  1254. else
  1255. { or with max returns max }
  1256. if a = -1 then
  1257. op:=OP_MOVE;
  1258. end;
  1259. OP_AND :
  1260. begin
  1261. { and with max returns same result }
  1262. if (a = -1) then
  1263. op:=OP_NONE
  1264. else
  1265. { and with 0 returns 0 }
  1266. if a=0 then
  1267. op:=OP_MOVE;
  1268. end;
  1269. OP_DIV :
  1270. begin
  1271. { division by 1 returns result }
  1272. if a = 1 then
  1273. op:=OP_NONE
  1274. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1275. begin
  1276. a := powerval;
  1277. op:= OP_SHR;
  1278. end;
  1279. end;
  1280. OP_IDIV:
  1281. begin
  1282. if a = 1 then
  1283. op:=OP_NONE;
  1284. end;
  1285. OP_MUL,OP_IMUL:
  1286. begin
  1287. if a = 1 then
  1288. op:=OP_NONE
  1289. else
  1290. if a=0 then
  1291. op:=OP_MOVE
  1292. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1293. begin
  1294. a := powerval;
  1295. op:= OP_SHL;
  1296. end;
  1297. end;
  1298. OP_ADD,OP_SUB:
  1299. begin
  1300. if a = 0 then
  1301. op:=OP_NONE;
  1302. end;
  1303. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  1304. begin
  1305. if a = 0 then
  1306. op:=OP_NONE;
  1307. end;
  1308. end;
  1309. end;
  1310. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  1311. begin
  1312. case loc.loc of
  1313. LOC_REFERENCE, LOC_CREFERENCE:
  1314. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1315. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1316. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  1317. else
  1318. internalerror(200203301);
  1319. end;
  1320. end;
  1321. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  1322. begin
  1323. case loc.loc of
  1324. LOC_REFERENCE, LOC_CREFERENCE:
  1325. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1326. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1327. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1328. else
  1329. internalerror(48991);
  1330. end;
  1331. end;
  1332. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  1333. var
  1334. reg: tregister;
  1335. regsize: tcgsize;
  1336. begin
  1337. if (fromsize>=tosize) then
  1338. regsize:=fromsize
  1339. else
  1340. regsize:=tosize;
  1341. reg:=getfpuregister(list,regsize);
  1342. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  1343. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  1344. end;
  1345. procedure tcg.a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1346. var
  1347. ref : treference;
  1348. begin
  1349. paramanager.alloccgpara(list,cgpara);
  1350. case cgpara.location^.loc of
  1351. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1352. begin
  1353. cgpara.check_simple_location;
  1354. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  1355. end;
  1356. LOC_REFERENCE,LOC_CREFERENCE:
  1357. begin
  1358. cgpara.check_simple_location;
  1359. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  1360. a_loadfpu_reg_ref(list,size,size,r,ref);
  1361. end;
  1362. LOC_REGISTER,LOC_CREGISTER:
  1363. begin
  1364. { paramfpu_ref does the check_simpe_location check here if necessary }
  1365. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  1366. a_loadfpu_reg_ref(list,size,size,r,ref);
  1367. a_loadfpu_ref_cgpara(list,size,ref,cgpara);
  1368. tg.Ungettemp(list,ref);
  1369. end;
  1370. else
  1371. internalerror(2010053112);
  1372. end;
  1373. end;
  1374. procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1375. var
  1376. href : treference;
  1377. hsize: tcgsize;
  1378. begin
  1379. case cgpara.location^.loc of
  1380. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1381. begin
  1382. cgpara.check_simple_location;
  1383. paramanager.alloccgpara(list,cgpara);
  1384. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  1385. end;
  1386. LOC_REFERENCE,LOC_CREFERENCE:
  1387. begin
  1388. cgpara.check_simple_location;
  1389. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  1390. { concatcopy should choose the best way to copy the data }
  1391. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1392. end;
  1393. LOC_REGISTER,LOC_CREGISTER:
  1394. begin
  1395. { force integer size }
  1396. hsize:=int_cgsize(tcgsize2size[size]);
  1397. {$ifndef cpu64bitalu}
  1398. if (hsize in [OS_S64,OS_64]) then
  1399. cg64.a_load64_ref_cgpara(list,ref,cgpara)
  1400. else
  1401. {$endif not cpu64bitalu}
  1402. begin
  1403. cgpara.check_simple_location;
  1404. a_load_ref_cgpara(list,hsize,ref,cgpara)
  1405. end;
  1406. end
  1407. else
  1408. internalerror(200402201);
  1409. end;
  1410. end;
  1411. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference);
  1412. var
  1413. tmpreg : tregister;
  1414. begin
  1415. tmpreg:=getintregister(list,size);
  1416. a_load_ref_reg(list,size,size,ref,tmpreg);
  1417. a_op_const_reg(list,op,size,a,tmpreg);
  1418. a_load_reg_ref(list,size,size,tmpreg,ref);
  1419. end;
  1420. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  1421. begin
  1422. case loc.loc of
  1423. LOC_REGISTER, LOC_CREGISTER:
  1424. a_op_const_reg(list,op,loc.size,a,loc.register);
  1425. LOC_REFERENCE, LOC_CREFERENCE:
  1426. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1427. else
  1428. internalerror(200109061);
  1429. end;
  1430. end;
  1431. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1432. var
  1433. tmpreg : tregister;
  1434. begin
  1435. tmpreg:=getintregister(list,size);
  1436. a_load_ref_reg(list,size,size,ref,tmpreg);
  1437. a_op_reg_reg(list,op,size,reg,tmpreg);
  1438. a_load_reg_ref(list,size,size,tmpreg,ref);
  1439. end;
  1440. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1441. var
  1442. tmpreg: tregister;
  1443. begin
  1444. case op of
  1445. OP_NOT,OP_NEG:
  1446. { handle it as "load ref,reg; op reg" }
  1447. begin
  1448. a_load_ref_reg(list,size,size,ref,reg);
  1449. a_op_reg_reg(list,op,size,reg,reg);
  1450. end;
  1451. else
  1452. begin
  1453. tmpreg:=getintregister(list,size);
  1454. a_load_ref_reg(list,size,size,ref,tmpreg);
  1455. a_op_reg_reg(list,op,size,tmpreg,reg);
  1456. end;
  1457. end;
  1458. end;
  1459. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1460. begin
  1461. case loc.loc of
  1462. LOC_REGISTER, LOC_CREGISTER:
  1463. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1464. LOC_REFERENCE, LOC_CREFERENCE:
  1465. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1466. else
  1467. internalerror(200109061);
  1468. end;
  1469. end;
  1470. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1471. var
  1472. tmpreg: tregister;
  1473. begin
  1474. case loc.loc of
  1475. LOC_REGISTER,LOC_CREGISTER:
  1476. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1477. LOC_REFERENCE,LOC_CREFERENCE:
  1478. begin
  1479. tmpreg:=getintregister(list,loc.size);
  1480. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1481. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1482. end;
  1483. else
  1484. internalerror(200109061);
  1485. end;
  1486. end;
  1487. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1488. a:tcgint;src,dst:Tregister);
  1489. begin
  1490. a_load_reg_reg(list,size,size,src,dst);
  1491. a_op_const_reg(list,op,size,a,dst);
  1492. end;
  1493. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1494. size: tcgsize; src1, src2, dst: tregister);
  1495. var
  1496. tmpreg: tregister;
  1497. begin
  1498. if (dst<>src1) then
  1499. begin
  1500. a_load_reg_reg(list,size,size,src2,dst);
  1501. a_op_reg_reg(list,op,size,src1,dst);
  1502. end
  1503. else
  1504. begin
  1505. { can we do a direct operation on the target register ? }
  1506. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  1507. a_op_reg_reg(list,op,size,src2,dst)
  1508. else
  1509. begin
  1510. tmpreg:=getintregister(list,size);
  1511. a_load_reg_reg(list,size,size,src2,tmpreg);
  1512. a_op_reg_reg(list,op,size,src1,tmpreg);
  1513. a_load_reg_reg(list,size,size,tmpreg,dst);
  1514. end;
  1515. end;
  1516. end;
  1517. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1518. begin
  1519. a_op_const_reg_reg(list,op,size,a,src,dst);
  1520. ovloc.loc:=LOC_VOID;
  1521. end;
  1522. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1523. begin
  1524. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1525. ovloc.loc:=LOC_VOID;
  1526. end;
  1527. procedure tcg.a_cmp_const_reg_label(list: TAsmList; size: tcgsize;
  1528. cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
  1529. var
  1530. tmpreg: tregister;
  1531. begin
  1532. tmpreg:=getintregister(list,size);
  1533. a_load_const_reg(list,size,a,tmpreg);
  1534. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1535. end;
  1536. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  1537. l : tasmlabel);
  1538. var
  1539. tmpreg: tregister;
  1540. begin
  1541. tmpreg:=getintregister(list,size);
  1542. a_load_ref_reg(list,size,size,ref,tmpreg);
  1543. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1544. end;
  1545. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const loc : tlocation;
  1546. l : tasmlabel);
  1547. begin
  1548. case loc.loc of
  1549. LOC_REGISTER,LOC_CREGISTER:
  1550. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1551. LOC_REFERENCE,LOC_CREFERENCE:
  1552. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1553. else
  1554. internalerror(200109061);
  1555. end;
  1556. end;
  1557. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1558. var
  1559. tmpreg: tregister;
  1560. begin
  1561. tmpreg:=getintregister(list,size);
  1562. a_load_ref_reg(list,size,size,ref,tmpreg);
  1563. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1564. end;
  1565. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1566. var
  1567. tmpreg: tregister;
  1568. begin
  1569. tmpreg:=getintregister(list,size);
  1570. a_load_ref_reg(list,size,size,ref,tmpreg);
  1571. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1572. end;
  1573. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1574. begin
  1575. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1576. end;
  1577. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1578. begin
  1579. case loc.loc of
  1580. LOC_REGISTER,
  1581. LOC_CREGISTER:
  1582. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1583. LOC_REFERENCE,
  1584. LOC_CREFERENCE :
  1585. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1586. LOC_CONSTANT:
  1587. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1588. else
  1589. internalerror(200203231);
  1590. end;
  1591. end;
  1592. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1593. l : tasmlabel);
  1594. var
  1595. tmpreg: tregister;
  1596. begin
  1597. case loc.loc of
  1598. LOC_REGISTER,LOC_CREGISTER:
  1599. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1600. LOC_REFERENCE,LOC_CREFERENCE:
  1601. begin
  1602. tmpreg:=getintregister(list,size);
  1603. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1604. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1605. end;
  1606. else
  1607. internalerror(200109061);
  1608. end;
  1609. end;
  1610. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1611. var
  1612. tmpreg: tregister;
  1613. begin
  1614. case loc.loc of
  1615. LOC_MMREGISTER,LOC_CMMREGISTER:
  1616. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1617. LOC_REFERENCE,LOC_CREFERENCE:
  1618. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1619. LOC_REGISTER,LOC_CREGISTER:
  1620. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1621. else
  1622. internalerror(200310121);
  1623. end;
  1624. end;
  1625. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1626. begin
  1627. case loc.loc of
  1628. LOC_MMREGISTER,LOC_CMMREGISTER:
  1629. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1630. LOC_REFERENCE,LOC_CREFERENCE:
  1631. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1632. else
  1633. internalerror(200310122);
  1634. end;
  1635. end;
  1636. procedure tcg.a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  1637. var
  1638. href : treference;
  1639. {$ifndef cpu64bitalu}
  1640. tmpreg : tregister;
  1641. reg64 : tregister64;
  1642. {$endif not cpu64bitalu}
  1643. begin
  1644. {$ifndef cpu64bitalu}
  1645. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  1646. (size<>OS_F64) then
  1647. {$endif not cpu64bitalu}
  1648. cgpara.check_simple_location;
  1649. paramanager.alloccgpara(list,cgpara);
  1650. case cgpara.location^.loc of
  1651. LOC_MMREGISTER,LOC_CMMREGISTER:
  1652. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  1653. LOC_REFERENCE,LOC_CREFERENCE:
  1654. begin
  1655. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  1656. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  1657. end;
  1658. LOC_REGISTER,LOC_CREGISTER:
  1659. begin
  1660. if assigned(shuffle) and
  1661. not shufflescalar(shuffle) then
  1662. internalerror(2009112510);
  1663. {$ifndef cpu64bitalu}
  1664. if (size=OS_F64) then
  1665. begin
  1666. if not assigned(cgpara.location^.next) or
  1667. assigned(cgpara.location^.next^.next) then
  1668. internalerror(2009112512);
  1669. case cgpara.location^.next^.loc of
  1670. LOC_REGISTER,LOC_CREGISTER:
  1671. tmpreg:=cgpara.location^.next^.register;
  1672. LOC_REFERENCE,LOC_CREFERENCE:
  1673. tmpreg:=getintregister(list,OS_32);
  1674. else
  1675. internalerror(2009112910);
  1676. end;
  1677. if (target_info.endian=ENDIAN_BIG) then
  1678. begin
  1679. { paraloc^ -> high
  1680. paraloc^.next -> low }
  1681. reg64.reghi:=cgpara.location^.register;
  1682. reg64.reglo:=tmpreg;
  1683. end
  1684. else
  1685. begin
  1686. { paraloc^ -> low
  1687. paraloc^.next -> high }
  1688. reg64.reglo:=cgpara.location^.register;
  1689. reg64.reghi:=tmpreg;
  1690. end;
  1691. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  1692. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1693. begin
  1694. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  1695. internalerror(2009112911);
  1696. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  1697. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  1698. end;
  1699. end
  1700. else
  1701. {$endif not cpu64bitalu}
  1702. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  1703. end
  1704. else
  1705. internalerror(200310123);
  1706. end;
  1707. end;
  1708. procedure tcg.a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  1709. var
  1710. hr : tregister;
  1711. hs : tmmshuffle;
  1712. begin
  1713. cgpara.check_simple_location;
  1714. hr:=getmmregister(list,cgpara.location^.size);
  1715. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  1716. if realshuffle(shuffle) then
  1717. begin
  1718. hs:=shuffle^;
  1719. removeshuffles(hs);
  1720. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,@hs);
  1721. end
  1722. else
  1723. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,shuffle);
  1724. end;
  1725. procedure tcg.a_loadmm_loc_cgpara(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  1726. begin
  1727. case loc.loc of
  1728. LOC_MMREGISTER,LOC_CMMREGISTER:
  1729. a_loadmm_reg_cgpara(list,loc.size,loc.register,cgpara,shuffle);
  1730. LOC_REFERENCE,LOC_CREFERENCE:
  1731. a_loadmm_ref_cgpara(list,loc.size,loc.reference,cgpara,shuffle);
  1732. else
  1733. internalerror(200310123);
  1734. end;
  1735. end;
  1736. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1737. var
  1738. hr : tregister;
  1739. hs : tmmshuffle;
  1740. begin
  1741. hr:=getmmregister(list,size);
  1742. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1743. if realshuffle(shuffle) then
  1744. begin
  1745. hs:=shuffle^;
  1746. removeshuffles(hs);
  1747. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1748. end
  1749. else
  1750. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1751. end;
  1752. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1753. var
  1754. hr : tregister;
  1755. hs : tmmshuffle;
  1756. begin
  1757. hr:=getmmregister(list,size);
  1758. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1759. if realshuffle(shuffle) then
  1760. begin
  1761. hs:=shuffle^;
  1762. removeshuffles(hs);
  1763. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1764. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1765. end
  1766. else
  1767. begin
  1768. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1769. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1770. end;
  1771. end;
  1772. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  1773. var
  1774. tmpref: treference;
  1775. begin
  1776. if (tcgsize2size[fromsize]<>4) or
  1777. (tcgsize2size[tosize]<>4) then
  1778. internalerror(2009112503);
  1779. tg.gettemp(list,4,4,tt_normal,tmpref);
  1780. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  1781. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  1782. tg.ungettemp(list,tmpref);
  1783. end;
  1784. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  1785. var
  1786. tmpref: treference;
  1787. begin
  1788. if (tcgsize2size[fromsize]<>4) or
  1789. (tcgsize2size[tosize]<>4) then
  1790. internalerror(2009112504);
  1791. tg.gettemp(list,8,8,tt_normal,tmpref);
  1792. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  1793. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  1794. tg.ungettemp(list,tmpref);
  1795. end;
  1796. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1797. begin
  1798. case loc.loc of
  1799. LOC_CMMREGISTER,LOC_MMREGISTER:
  1800. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1801. LOC_CREFERENCE,LOC_REFERENCE:
  1802. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1803. else
  1804. internalerror(200312232);
  1805. end;
  1806. end;
  1807. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);
  1808. begin
  1809. g_concatcopy(list,source,dest,len);
  1810. end;
  1811. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  1812. var
  1813. cgpara1,cgpara2,cgpara3 : TCGPara;
  1814. begin
  1815. cgpara1.init;
  1816. cgpara2.init;
  1817. cgpara3.init;
  1818. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1819. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1820. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1821. a_loadaddr_ref_cgpara(list,dest,cgpara3);
  1822. a_loadaddr_ref_cgpara(list,source,cgpara2);
  1823. a_load_const_cgpara(list,OS_INT,len,cgpara1);
  1824. paramanager.freecgpara(list,cgpara3);
  1825. paramanager.freecgpara(list,cgpara2);
  1826. paramanager.freecgpara(list,cgpara1);
  1827. allocallcpuregisters(list);
  1828. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  1829. deallocallcpuregisters(list);
  1830. cgpara3.done;
  1831. cgpara2.done;
  1832. cgpara1.done;
  1833. end;
  1834. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  1835. var
  1836. cgpara1,cgpara2 : TCGPara;
  1837. begin
  1838. cgpara1.init;
  1839. cgpara2.init;
  1840. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1841. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1842. a_loadaddr_ref_cgpara(list,dest,cgpara2);
  1843. a_loadaddr_ref_cgpara(list,source,cgpara1);
  1844. paramanager.freecgpara(list,cgpara2);
  1845. paramanager.freecgpara(list,cgpara1);
  1846. allocallcpuregisters(list);
  1847. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  1848. deallocallcpuregisters(list);
  1849. cgpara2.done;
  1850. cgpara1.done;
  1851. end;
  1852. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  1853. var
  1854. href : treference;
  1855. incrfunc : string;
  1856. cgpara1,cgpara2 : TCGPara;
  1857. begin
  1858. cgpara1.init;
  1859. cgpara2.init;
  1860. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1861. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1862. if is_interfacecom_or_dispinterface(t) then
  1863. incrfunc:='FPC_INTF_INCR_REF'
  1864. else if is_ansistring(t) then
  1865. incrfunc:='FPC_ANSISTR_INCR_REF'
  1866. else if is_widestring(t) then
  1867. incrfunc:='FPC_WIDESTR_INCR_REF'
  1868. else if is_unicodestring(t) then
  1869. incrfunc:='FPC_UNICODESTR_INCR_REF'
  1870. else if is_dynamic_array(t) then
  1871. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1872. else
  1873. incrfunc:='';
  1874. { call the special incr function or the generic addref }
  1875. if incrfunc<>'' then
  1876. begin
  1877. { widestrings aren't ref. counted on all platforms so we need the address
  1878. to create a real copy }
  1879. if is_widestring(t) then
  1880. a_loadaddr_ref_cgpara(list,ref,cgpara1)
  1881. else
  1882. { these functions get the pointer by value }
  1883. a_load_ref_cgpara(list,OS_ADDR,ref,cgpara1);
  1884. paramanager.freecgpara(list,cgpara1);
  1885. allocallcpuregisters(list);
  1886. a_call_name(list,incrfunc,false);
  1887. deallocallcpuregisters(list);
  1888. end
  1889. else
  1890. begin
  1891. if is_open_array(t) then
  1892. InternalError(201103054);
  1893. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  1894. a_loadaddr_ref_cgpara(list,href,cgpara2);
  1895. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1896. paramanager.freecgpara(list,cgpara1);
  1897. paramanager.freecgpara(list,cgpara2);
  1898. allocallcpuregisters(list);
  1899. a_call_name(list,'FPC_ADDREF',false);
  1900. deallocallcpuregisters(list);
  1901. end;
  1902. cgpara2.done;
  1903. cgpara1.done;
  1904. end;
  1905. procedure tcg.g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation; const name: string);
  1906. var
  1907. cgpara1,cgpara2,cgpara3: TCGPara;
  1908. href: TReference;
  1909. hreg, lenreg: TRegister;
  1910. begin
  1911. cgpara1.init;
  1912. cgpara2.init;
  1913. cgpara3.init;
  1914. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1915. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1916. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1917. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  1918. if highloc.loc=LOC_CONSTANT then
  1919. a_load_const_cgpara(list,OS_INT,highloc.value+1,cgpara3)
  1920. else
  1921. begin
  1922. if highloc.loc in [LOC_REGISTER,LOC_CREGISTER] then
  1923. hreg:=highloc.register
  1924. else
  1925. begin
  1926. hreg:=getintregister(list,OS_INT);
  1927. a_load_loc_reg(list,OS_INT,highloc,hreg);
  1928. end;
  1929. { increment, converts high(x) to length(x) }
  1930. lenreg:=getintregister(list,OS_INT);
  1931. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,hreg,lenreg);
  1932. a_load_reg_cgpara(list,OS_INT,lenreg,cgpara3);
  1933. end;
  1934. a_loadaddr_ref_cgpara(list,href,cgpara2);
  1935. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1936. paramanager.freecgpara(list,cgpara1);
  1937. paramanager.freecgpara(list,cgpara2);
  1938. paramanager.freecgpara(list,cgpara3);
  1939. allocallcpuregisters(list);
  1940. a_call_name(list,name,false);
  1941. deallocallcpuregisters(list);
  1942. cgpara3.done;
  1943. cgpara2.done;
  1944. cgpara1.done;
  1945. end;
  1946. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  1947. var
  1948. href : treference;
  1949. cgpara1,cgpara2 : TCGPara;
  1950. begin
  1951. cgpara1.init;
  1952. cgpara2.init;
  1953. if is_ansistring(t) or
  1954. is_widestring(t) or
  1955. is_unicodestring(t) or
  1956. is_interfacecom_or_dispinterface(t) or
  1957. is_dynamic_array(t) then
  1958. a_load_const_ref(list,OS_ADDR,0,ref)
  1959. else if t.typ=variantdef then
  1960. begin
  1961. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1962. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1963. paramanager.freecgpara(list,cgpara1);
  1964. allocallcpuregisters(list);
  1965. a_call_name(list,'FPC_VARIANT_INIT',false);
  1966. deallocallcpuregisters(list);
  1967. end
  1968. else
  1969. begin
  1970. if is_open_array(t) then
  1971. InternalError(201103052);
  1972. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1973. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1974. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  1975. a_loadaddr_ref_cgpara(list,href,cgpara2);
  1976. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1977. paramanager.freecgpara(list,cgpara1);
  1978. paramanager.freecgpara(list,cgpara2);
  1979. allocallcpuregisters(list);
  1980. a_call_name(list,'FPC_INITIALIZE',false);
  1981. deallocallcpuregisters(list);
  1982. end;
  1983. cgpara1.done;
  1984. cgpara2.done;
  1985. end;
  1986. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  1987. var
  1988. href : treference;
  1989. cgpara1,cgpara2 : TCGPara;
  1990. decrfunc : string;
  1991. begin
  1992. if is_interfacecom_or_dispinterface(t) then
  1993. decrfunc:='FPC_INTF_DECR_REF'
  1994. else if is_ansistring(t) then
  1995. decrfunc:='FPC_ANSISTR_DECR_REF'
  1996. else if is_widestring(t) then
  1997. decrfunc:='FPC_WIDESTR_DECR_REF'
  1998. else if is_unicodestring(t) then
  1999. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2000. else if t.typ=variantdef then
  2001. decrfunc:='FPC_VARIANT_CLEAR'
  2002. else
  2003. begin
  2004. cgpara1.init;
  2005. cgpara2.init;
  2006. if is_open_array(t) then
  2007. InternalError(201103051);
  2008. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2009. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2010. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2011. a_loadaddr_ref_cgpara(list,href,cgpara2);
  2012. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  2013. paramanager.freecgpara(list,cgpara1);
  2014. paramanager.freecgpara(list,cgpara2);
  2015. if is_dynamic_array(t) then
  2016. g_call(list,'FPC_DYNARRAY_CLEAR')
  2017. else
  2018. g_call(list,'FPC_FINALIZE');
  2019. cgpara1.done;
  2020. cgpara2.done;
  2021. exit;
  2022. end;
  2023. cgpara1.init;
  2024. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2025. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  2026. paramanager.freecgpara(list,cgpara1);
  2027. g_call(list,decrfunc);
  2028. cgpara1.done;
  2029. end;
  2030. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2031. begin
  2032. g_overflowCheck(list,loc,def);
  2033. end;
  2034. {$ifdef cpuflags}
  2035. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2036. var
  2037. tmpreg : tregister;
  2038. begin
  2039. tmpreg:=getintregister(list,size);
  2040. g_flags2reg(list,size,f,tmpreg);
  2041. a_load_reg_ref(list,size,size,tmpreg,ref);
  2042. end;
  2043. {$endif cpuflags}
  2044. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2045. var
  2046. OKLabel : tasmlabel;
  2047. cgpara1 : TCGPara;
  2048. begin
  2049. if (cs_check_object in current_settings.localswitches) or
  2050. (cs_check_range in current_settings.localswitches) then
  2051. begin
  2052. current_asmdata.getjumplabel(oklabel);
  2053. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2054. cgpara1.init;
  2055. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2056. a_load_const_cgpara(list,OS_INT,tcgint(210),cgpara1);
  2057. paramanager.freecgpara(list,cgpara1);
  2058. a_call_name(list,'FPC_HANDLEERROR',false);
  2059. a_label(list,oklabel);
  2060. cgpara1.done;
  2061. end;
  2062. end;
  2063. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2064. var
  2065. hrefvmt : treference;
  2066. cgpara1,cgpara2 : TCGPara;
  2067. begin
  2068. cgpara1.init;
  2069. cgpara2.init;
  2070. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2071. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2072. if (cs_check_object in current_settings.localswitches) then
  2073. begin
  2074. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  2075. a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
  2076. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  2077. paramanager.freecgpara(list,cgpara1);
  2078. paramanager.freecgpara(list,cgpara2);
  2079. allocallcpuregisters(list);
  2080. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  2081. deallocallcpuregisters(list);
  2082. end
  2083. else
  2084. if (cs_check_range in current_settings.localswitches) then
  2085. begin
  2086. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  2087. paramanager.freecgpara(list,cgpara1);
  2088. allocallcpuregisters(list);
  2089. a_call_name(list,'FPC_CHECK_OBJECT',false);
  2090. deallocallcpuregisters(list);
  2091. end;
  2092. cgpara1.done;
  2093. cgpara2.done;
  2094. end;
  2095. {*****************************************************************************
  2096. Entry/Exit Code Functions
  2097. *****************************************************************************}
  2098. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);
  2099. var
  2100. sizereg,sourcereg,lenreg : tregister;
  2101. cgpara1,cgpara2,cgpara3 : TCGPara;
  2102. begin
  2103. { because some abis don't support dynamic stack allocation properly
  2104. open array value parameters are copied onto the heap
  2105. }
  2106. { calculate necessary memory }
  2107. { read/write operations on one register make the life of the register allocator hard }
  2108. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2109. begin
  2110. lenreg:=getintregister(list,OS_INT);
  2111. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2112. end
  2113. else
  2114. lenreg:=lenloc.register;
  2115. sizereg:=getintregister(list,OS_INT);
  2116. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2117. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2118. { load source }
  2119. sourcereg:=getaddressregister(list);
  2120. a_loadaddr_ref_reg(list,ref,sourcereg);
  2121. { do getmem call }
  2122. cgpara1.init;
  2123. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2124. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara1);
  2125. paramanager.freecgpara(list,cgpara1);
  2126. allocallcpuregisters(list);
  2127. a_call_name(list,'FPC_GETMEM',false);
  2128. deallocallcpuregisters(list);
  2129. cgpara1.done;
  2130. { return the new address }
  2131. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2132. { do move call }
  2133. cgpara1.init;
  2134. cgpara2.init;
  2135. cgpara3.init;
  2136. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2137. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2138. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2139. { load size }
  2140. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara3);
  2141. { load destination }
  2142. a_load_reg_cgpara(list,OS_ADDR,destreg,cgpara2);
  2143. { load source }
  2144. a_load_reg_cgpara(list,OS_ADDR,sourcereg,cgpara1);
  2145. paramanager.freecgpara(list,cgpara3);
  2146. paramanager.freecgpara(list,cgpara2);
  2147. paramanager.freecgpara(list,cgpara1);
  2148. allocallcpuregisters(list);
  2149. a_call_name(list,'FPC_MOVE',false);
  2150. deallocallcpuregisters(list);
  2151. cgpara3.done;
  2152. cgpara2.done;
  2153. cgpara1.done;
  2154. end;
  2155. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2156. var
  2157. cgpara1 : TCGPara;
  2158. begin
  2159. { do move call }
  2160. cgpara1.init;
  2161. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2162. { load source }
  2163. a_load_loc_cgpara(list,l,cgpara1);
  2164. paramanager.freecgpara(list,cgpara1);
  2165. allocallcpuregisters(list);
  2166. a_call_name(list,'FPC_FREEMEM',false);
  2167. deallocallcpuregisters(list);
  2168. cgpara1.done;
  2169. end;
  2170. procedure tcg.g_save_registers(list:TAsmList);
  2171. var
  2172. href : treference;
  2173. size : longint;
  2174. r : integer;
  2175. begin
  2176. { calculate temp. size }
  2177. size:=0;
  2178. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2179. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2180. inc(size,sizeof(aint));
  2181. { mm registers }
  2182. if uses_registers(R_MMREGISTER) then
  2183. begin
  2184. { Make sure we reserve enough space to do the alignment based on the offset
  2185. later on. We can't use the size for this, because the alignment of the start
  2186. of the temp is smaller than needed for an OS_VECTOR }
  2187. inc(size,tcgsize2size[OS_VECTOR]);
  2188. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  2189. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  2190. inc(size,tcgsize2size[OS_VECTOR]);
  2191. end;
  2192. if size>0 then
  2193. begin
  2194. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  2195. include(current_procinfo.flags,pi_has_saved_regs);
  2196. { Copy registers to temp }
  2197. href:=current_procinfo.save_regs_ref;
  2198. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2199. begin
  2200. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2201. begin
  2202. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2203. inc(href.offset,sizeof(aint));
  2204. end;
  2205. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2206. end;
  2207. if uses_registers(R_MMREGISTER) then
  2208. begin
  2209. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  2210. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  2211. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  2212. begin
  2213. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  2214. begin
  2215. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  2216. inc(href.offset,tcgsize2size[OS_VECTOR]);
  2217. end;
  2218. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  2219. end;
  2220. end;
  2221. end;
  2222. end;
  2223. procedure tcg.g_restore_registers(list:TAsmList);
  2224. var
  2225. href : treference;
  2226. r : integer;
  2227. hreg : tregister;
  2228. begin
  2229. if not(pi_has_saved_regs in current_procinfo.flags) then
  2230. exit;
  2231. { Copy registers from temp }
  2232. href:=current_procinfo.save_regs_ref;
  2233. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2234. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2235. begin
  2236. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2237. { Allocate register so the optimizer does not remove the load }
  2238. a_reg_alloc(list,hreg);
  2239. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2240. inc(href.offset,sizeof(aint));
  2241. end;
  2242. if uses_registers(R_MMREGISTER) then
  2243. begin
  2244. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  2245. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  2246. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  2247. begin
  2248. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  2249. begin
  2250. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  2251. { Allocate register so the optimizer does not remove the load }
  2252. a_reg_alloc(list,hreg);
  2253. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  2254. inc(href.offset,tcgsize2size[OS_VECTOR]);
  2255. end;
  2256. end;
  2257. end;
  2258. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2259. end;
  2260. procedure tcg.g_profilecode(list : TAsmList);
  2261. begin
  2262. end;
  2263. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2264. begin
  2265. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2266. end;
  2267. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);
  2268. begin
  2269. a_load_const_ref(list, OS_INT, a, href);
  2270. end;
  2271. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2272. begin
  2273. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  2274. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2275. end;
  2276. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);
  2277. var
  2278. hsym : tsym;
  2279. href : treference;
  2280. paraloc : Pcgparalocation;
  2281. begin
  2282. { calculate the parameter info for the procdef }
  2283. procdef.init_paraloc_info(callerside);
  2284. hsym:=tsym(procdef.parast.Find('self'));
  2285. if not(assigned(hsym) and
  2286. (hsym.typ=paravarsym)) then
  2287. internalerror(200305251);
  2288. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  2289. while paraloc<>nil do
  2290. with paraloc^ do
  2291. begin
  2292. case loc of
  2293. LOC_REGISTER:
  2294. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  2295. LOC_REFERENCE:
  2296. begin
  2297. { offset in the wrapper needs to be adjusted for the stored
  2298. return address }
  2299. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  2300. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  2301. end
  2302. else
  2303. internalerror(200309189);
  2304. end;
  2305. paraloc:=next;
  2306. end;
  2307. end;
  2308. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  2309. begin
  2310. a_jmp_name(list,externalname);
  2311. end;
  2312. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2313. begin
  2314. a_call_name(list,s,false);
  2315. end;
  2316. procedure tcg.a_call_ref(list : TAsmList;ref: treference);
  2317. var
  2318. tempreg : TRegister;
  2319. begin
  2320. tempreg := getintregister(list, OS_ADDR);
  2321. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  2322. a_call_reg(list,tempreg);
  2323. end;
  2324. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;
  2325. var
  2326. l: tasmsymbol;
  2327. ref: treference;
  2328. nlsymname: string;
  2329. begin
  2330. result := NR_NO;
  2331. case target_info.system of
  2332. system_powerpc_darwin,
  2333. system_i386_darwin,
  2334. system_i386_iphonesim,
  2335. system_powerpc64_darwin,
  2336. system_arm_darwin:
  2337. begin
  2338. nlsymname:='L'+symname+'$non_lazy_ptr';
  2339. l:=current_asmdata.getasmsymbol(nlsymname);
  2340. if not(assigned(l)) then
  2341. begin
  2342. new_section(current_asmdata.asmlists[al_picdata],sec_data_nonlazy,'',sizeof(pint));
  2343. l:=current_asmdata.DefineAsmSymbol(nlsymname,AB_LOCAL,AT_DATA);
  2344. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2345. if not(is_weak in flags) then
  2346. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  2347. else
  2348. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  2349. {$ifdef cpu64bitaddr}
  2350. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  2351. {$else cpu64bitaddr}
  2352. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2353. {$endif cpu64bitaddr}
  2354. end;
  2355. result := getaddressregister(list);
  2356. reference_reset_symbol(ref,l,0,sizeof(pint));
  2357. { a_load_ref_reg will turn this into a pic-load if needed }
  2358. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2359. end;
  2360. end;
  2361. end;
  2362. procedure tcg.g_maybe_got_init(list: TAsmList);
  2363. begin
  2364. end;
  2365. procedure tcg.g_call(list: TAsmList;const s: string);
  2366. begin
  2367. allocallcpuregisters(list);
  2368. a_call_name(list,s,false);
  2369. deallocallcpuregisters(list);
  2370. end;
  2371. procedure tcg.g_local_unwind(list: TAsmList; l: TAsmLabel);
  2372. begin
  2373. a_jmp_always(list,l);
  2374. end;
  2375. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  2376. begin
  2377. internalerror(200807231);
  2378. end;
  2379. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  2380. begin
  2381. internalerror(200807232);
  2382. end;
  2383. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  2384. begin
  2385. internalerror(200807233);
  2386. end;
  2387. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  2388. begin
  2389. internalerror(200807234);
  2390. end;
  2391. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  2392. begin
  2393. Result:=TRegister(0);
  2394. internalerror(200807238);
  2395. end;
  2396. {*****************************************************************************
  2397. TCG64
  2398. *****************************************************************************}
  2399. {$ifndef cpu64bitalu}
  2400. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2401. begin
  2402. a_load64_reg_reg(list,regsrc,regdst);
  2403. a_op64_const_reg(list,op,size,value,regdst);
  2404. end;
  2405. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2406. var
  2407. tmpreg64 : tregister64;
  2408. begin
  2409. { when src1=dst then we need to first create a temp to prevent
  2410. overwriting src1 with src2 }
  2411. if (regsrc1.reghi=regdst.reghi) or
  2412. (regsrc1.reglo=regdst.reghi) or
  2413. (regsrc1.reghi=regdst.reglo) or
  2414. (regsrc1.reglo=regdst.reglo) then
  2415. begin
  2416. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2417. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2418. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2419. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2420. a_load64_reg_reg(list,tmpreg64,regdst);
  2421. end
  2422. else
  2423. begin
  2424. a_load64_reg_reg(list,regsrc2,regdst);
  2425. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2426. end;
  2427. end;
  2428. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2429. var
  2430. tmpreg64 : tregister64;
  2431. begin
  2432. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2433. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2434. a_load64_subsetref_reg(list,sref,tmpreg64);
  2435. a_op64_const_reg(list,op,size,a,tmpreg64);
  2436. a_load64_reg_subsetref(list,tmpreg64,sref);
  2437. end;
  2438. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  2439. var
  2440. tmpreg64 : tregister64;
  2441. begin
  2442. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2443. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2444. a_load64_subsetref_reg(list,sref,tmpreg64);
  2445. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  2446. a_load64_reg_subsetref(list,tmpreg64,sref);
  2447. end;
  2448. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  2449. var
  2450. tmpreg64 : tregister64;
  2451. begin
  2452. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2453. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2454. a_load64_subsetref_reg(list,sref,tmpreg64);
  2455. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  2456. a_load64_reg_subsetref(list,tmpreg64,sref);
  2457. end;
  2458. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  2459. var
  2460. tmpreg64 : tregister64;
  2461. begin
  2462. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2463. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2464. a_load64_subsetref_reg(list,ssref,tmpreg64);
  2465. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  2466. end;
  2467. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2468. begin
  2469. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2470. ovloc.loc:=LOC_VOID;
  2471. end;
  2472. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2473. begin
  2474. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2475. ovloc.loc:=LOC_VOID;
  2476. end;
  2477. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  2478. begin
  2479. case l.loc of
  2480. LOC_REFERENCE, LOC_CREFERENCE:
  2481. a_load64_ref_subsetref(list,l.reference,sref);
  2482. LOC_REGISTER,LOC_CREGISTER:
  2483. a_load64_reg_subsetref(list,l.register64,sref);
  2484. LOC_CONSTANT :
  2485. a_load64_const_subsetref(list,l.value64,sref);
  2486. LOC_SUBSETREF,LOC_CSUBSETREF:
  2487. a_load64_subsetref_subsetref(list,l.sref,sref);
  2488. else
  2489. internalerror(2006082210);
  2490. end;
  2491. end;
  2492. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  2493. begin
  2494. case l.loc of
  2495. LOC_REFERENCE, LOC_CREFERENCE:
  2496. a_load64_subsetref_ref(list,sref,l.reference);
  2497. LOC_REGISTER,LOC_CREGISTER:
  2498. a_load64_subsetref_reg(list,sref,l.register64);
  2499. LOC_SUBSETREF,LOC_CSUBSETREF:
  2500. a_load64_subsetref_subsetref(list,sref,l.sref);
  2501. else
  2502. internalerror(2006082211);
  2503. end;
  2504. end;
  2505. {$endif cpu64bitalu}
  2506. function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
  2507. begin
  2508. result:=[];
  2509. if sym.typ<>AT_FUNCTION then
  2510. include(result,is_data);
  2511. if sym.bind=AB_WEAK_EXTERNAL then
  2512. include(result,is_weak);
  2513. end;
  2514. procedure destroy_codegen;
  2515. begin
  2516. cg.free;
  2517. cg:=nil;
  2518. {$ifndef cpu64bitalu}
  2519. cg64.free;
  2520. cg64:=nil;
  2521. {$endif cpu64bitalu}
  2522. end;
  2523. end.