ncgset.pas 66 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic assembler for in set/case labels
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgset;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,globals,constexp,symtype,
  22. node,nset,cpubase,cgbase,cgutils,cgobj,aasmbase,aasmtai,aasmdata;
  23. type
  24. tcgsetelementnode = class(tsetelementnode)
  25. procedure pass_generate_code;override;
  26. end;
  27. Tsetpart=record
  28. range : boolean; {Part is a range.}
  29. start,stop : byte; {Start/stop when range; Stop=element when an element.}
  30. end;
  31. Tsetparts=array[1..8] of Tsetpart;
  32. { tcginnode }
  33. tcginnode = class(tinnode)
  34. procedure in_smallset(opdef: tdef; setbase: aint); virtual;
  35. function pass_1: tnode;override;
  36. procedure pass_generate_code;override;
  37. protected
  38. function checkgenjumps(out setparts: Tsetparts; out numparts: byte; out use_small: boolean): boolean; virtual;
  39. function analizeset(const Aset:Tconstset;out setparts: Tsetparts; out numparts: byte;is_small:boolean):boolean;virtual;
  40. procedure in_reg_const(uopdef: tdef; opsize: tcgsize);virtual;
  41. end;
  42. tcgcasenode = class(tcasenode)
  43. {
  44. Emits the case node statement. Contrary to the intel
  45. 80x86 version, this version does not emit jump tables,
  46. because of portability problems.
  47. }
  48. procedure pass_generate_code;override;
  49. protected
  50. with_sign : boolean;
  51. opsize : tdef;
  52. jmp_gt,jmp_lt,jmp_le : topcmp;
  53. { register with case expression }
  54. hregister,hregister2 : tregister;
  55. endlabel,elselabel : tasmlabel;
  56. { true, if we can omit the range check of the jump table }
  57. jumptable_no_range : boolean;
  58. { has the implementation jumptable support }
  59. min_label : tconstexprint;
  60. function GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  61. function blocklabel(id:longint):tasmlabel;
  62. procedure optimizevalues(var max_linear_list:int64;var max_dist:qword);virtual;
  63. function has_jumptable : boolean;virtual;
  64. procedure genjumptable(hp : pcaselabel;min_,max_ : int64); virtual;
  65. procedure genlinearlist(hp : pcaselabel); virtual;
  66. procedure genlinearcmplist(hp : pcaselabel); virtual;
  67. procedure genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt); virtual;
  68. procedure genjmptree(root : pcaselabel); virtual;
  69. end;
  70. implementation
  71. uses
  72. verbose,
  73. cutils,
  74. symconst,symdef,symsym,defutil,
  75. pass_2,tgobj,
  76. nbas,ncon,ncgflw,
  77. {$ifdef WASM}
  78. hlcgcpu,aasmcpu,
  79. {$endif WASM}
  80. ncgutil,hlcgobj;
  81. {*****************************************************************************
  82. TCGSETELEMENTNODE
  83. *****************************************************************************}
  84. procedure tcgsetelementnode.pass_generate_code;
  85. begin
  86. { load the set element's value }
  87. secondpass(left);
  88. { also a second value ? }
  89. if assigned(right) then
  90. internalerror(2015111106);
  91. { we don't modify the left side, we only check the location type; our
  92. parent node (an add-node) will use the resulting location to perform
  93. the set operation without creating an intermediate set }
  94. location_copy(location,left.location);
  95. end;
  96. {*****************************************************************************
  97. *****************************************************************************}
  98. function tcginnode.analizeset(const Aset:Tconstset; out setparts:tsetparts; out numparts: byte; is_small:boolean):boolean;
  99. var
  100. compares,maxcompares:word;
  101. i:byte;
  102. begin
  103. analizeset:=false;
  104. fillchar(setparts,sizeof(setparts),0);
  105. numparts:=0;
  106. compares:=0;
  107. { Lots of comparisions take a lot of time, so do not allow
  108. too much comparisions. 8 comparisions are, however, still
  109. smalller than emitting the set }
  110. if cs_opt_size in current_settings.optimizerswitches then
  111. maxcompares:=8
  112. else
  113. maxcompares:=5;
  114. { when smallset is possible allow only 3 compares the smallset
  115. code is for littlesize also smaller when more compares are used }
  116. if is_small then
  117. maxcompares:=3;
  118. for i:=0 to 255 do
  119. if i in Aset then
  120. begin
  121. if (numparts=0) or (i<>setparts[numparts].stop+1) then
  122. begin
  123. {Set element is a separate element.}
  124. inc(compares);
  125. if compares>maxcompares then
  126. exit;
  127. inc(numparts);
  128. setparts[numparts].range:=false;
  129. setparts[numparts].stop:=i;
  130. end
  131. else
  132. {Set element is part of a range.}
  133. if not setparts[numparts].range then
  134. begin
  135. {Transform an element into a range.}
  136. setparts[numparts].range:=true;
  137. setparts[numparts].start:=setparts[numparts].stop;
  138. setparts[numparts].stop:=i;
  139. { there's only one compare per range anymore. Only a }
  140. { sub is added, but that's much faster than a }
  141. { cmp/jcc combo so neglect its effect }
  142. { inc(compares);
  143. if compares>maxcompares then
  144. exit; }
  145. end
  146. else
  147. begin
  148. {Extend a range.}
  149. setparts[numparts].stop:=i;
  150. end;
  151. end;
  152. analizeset:=true;
  153. end;
  154. procedure tcginnode.in_reg_const(uopdef: tdef; opsize: tcgsize);
  155. var
  156. hr: tregister;
  157. begin
  158. { emit bit test operation -- warning: do not use
  159. location_force_reg() to force a set into a register, except
  160. to a register of the same size as the set. The reason is
  161. that on big endian systems, this would require moving the
  162. set to the most significant part of the new register,
  163. and location_force_register can't do that (it does not
  164. know the type).
  165. a_bit_test_reg_loc_reg() properly takes into account the
  166. size of the set to adjust the register index to test }
  167. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,
  168. uopdef, right.resultdef, uopdef,
  169. left.location.register, right.location, location.register);
  170. { this may have resulted in an undefined value if left.location.register
  171. was >= size of right.location, but we'll mask the value to zero below
  172. in that case -> okay }
  173. hlcg.g_undefined_ok(current_asmdata.CurrAsmList,uopdef,location.register);
  174. { now zero the result if left > nr_of_bits_in_right_register }
  175. hr := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  176. { if left > tcgsize2size[opsize]*8 then hr := 0 else hr := $ffffffff }
  177. { (left.location.size = location.size at this point) }
  178. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList, OP_SUB, uopdef,
  179. tcgsize2size[opsize]*8, left.location.register, hr);
  180. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SAR, uopdef, (tcgsize2size
  181. [opsize]*8)-1, hr);
  182. { if left > tcgsize2size[opsize]*8-1, then result := 0 else result := result of bit test }
  183. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList, OP_AND, uopdef, hr,
  184. location.register);
  185. end;
  186. procedure tcginnode.in_smallset(opdef: tdef; setbase: aint);
  187. begin
  188. { location is always LOC_REGISTER }
  189. location_reset(location, LOC_REGISTER, def_cgsize(resultdef));
  190. { allocate a register for the result }
  191. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, resultdef);
  192. {**************************** SMALL SET **********************}
  193. if left.location.loc=LOC_CONSTANT then
  194. begin
  195. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,
  196. right.resultdef, resultdef,
  197. left.location.value-setbase, right.location,
  198. location.register);
  199. end
  200. else
  201. begin
  202. hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location,
  203. left.resultdef, opdef, true);
  204. register_maybe_adjust_setbase(current_asmdata.CurrAsmList, opdef, left.location,
  205. setbase);
  206. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList, opdef,
  207. right.resultdef, resultdef, left.location.register, right.location,
  208. location.register);
  209. end;
  210. end;
  211. function tcginnode.checkgenjumps(out setparts: Tsetparts; out numparts: byte;out use_small: boolean): boolean;
  212. begin
  213. { check if we can use smallset operation using btl which is limited
  214. to 32 bits, the left side may also not contain higher values !! }
  215. use_small:=is_smallset(right.resultdef) and
  216. not is_signed(left.resultdef) and
  217. ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high<32) or
  218. (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
  219. { Can we generate jumps? Possible for all types of sets }
  220. checkgenjumps:=(right.nodetype=setconstn) and
  221. analizeset(Tsetconstnode(right).value_set^,setparts,numparts,use_small);
  222. end;
  223. function tcginnode.pass_1: tnode;
  224. var
  225. setparts: Tsetparts;
  226. numparts: byte;
  227. use_small: boolean;
  228. begin
  229. result := inherited pass_1;
  230. if not(assigned(result)) and
  231. checkgenjumps(setparts,numparts,use_small) then
  232. expectloc := LOC_JUMP;
  233. end;
  234. procedure tcginnode.pass_generate_code;
  235. var
  236. adjustment,
  237. setbase : {$ifdef CPU8BITALU}smallint{$else}aint{$endif};
  238. l, l2 : tasmlabel;
  239. hr,
  240. pleftreg : tregister;
  241. setparts : Tsetparts;
  242. opsize : tcgsize;
  243. opdef : tdef;
  244. uopsize : tcgsize;
  245. uopdef : tdef;
  246. orgopsize : tcgsize;
  247. genjumps,
  248. use_small : boolean;
  249. i,numparts : byte;
  250. needslabel : Boolean;
  251. begin
  252. l2:=nil;
  253. { We check first if we can generate jumps, this can be done
  254. because the resultdef is already set in firstpass }
  255. genjumps := checkgenjumps(setparts,numparts,use_small);
  256. orgopsize := def_cgsize(left.resultdef);
  257. {$if defined(cpu8bitalu)}
  258. if (tsetdef(right.resultdef).setbase>=-128) and
  259. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=256) then
  260. begin
  261. uopsize := OS_8;
  262. uopdef := u8inttype;
  263. if is_signed(left.resultdef) then
  264. begin
  265. opsize := OS_S8;
  266. opdef := s8inttype;
  267. end
  268. else
  269. begin
  270. opsize := uopsize;
  271. opdef := uopdef;
  272. end;
  273. end
  274. {$endif defined(cpu8bitalu)}
  275. {$if defined(cpu8bitalu)}
  276. { this should be also enabled for 16 bit CPUs, however, I have no proper testing facility for 16 bit, my
  277. testing results using Dosbox are no reliable }
  278. { $if defined(cpu8bitalu) or defined(cpu16bitalu)}
  279. else if (tsetdef(right.resultdef).setbase>=-32768) and
  280. (tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase+1<=65536) then
  281. begin
  282. uopsize := OS_16;
  283. uopdef := u16inttype;
  284. if is_signed(left.resultdef) then
  285. begin
  286. opsize := OS_S16;
  287. opdef := s16inttype;
  288. end
  289. else
  290. begin
  291. opsize := uopsize;
  292. opdef := uopdef;
  293. end;
  294. end
  295. else
  296. {$endif defined(cpu8bitalu)}
  297. begin
  298. uopsize := OS_32;
  299. uopdef := u32inttype;
  300. if is_signed(left.resultdef) then
  301. begin
  302. opsize := OS_S32;
  303. opdef := s32inttype;
  304. end
  305. else
  306. begin
  307. opsize := uopsize;
  308. opdef := uopdef;
  309. end;
  310. end;
  311. needslabel := false;
  312. if not genjumps then
  313. { calculate both operators }
  314. { the complex one first }
  315. { not in case of genjumps, because then we don't secondpass }
  316. { right at all (so we have to make sure that "right" really is }
  317. { "right" and not "swapped left" in that case) }
  318. firstcomplex(self);
  319. secondpass(left);
  320. if (left.expectloc=LOC_JUMP)<>
  321. (left.location.loc=LOC_JUMP) then
  322. internalerror(2007070101);
  323. { Only process the right if we are not generating jumps }
  324. if not genjumps then
  325. secondpass(right);
  326. if codegenerror then
  327. exit;
  328. { ofcourse not commutative }
  329. if nf_swapped in flags then
  330. swapleftright;
  331. setbase:=tsetdef(right.resultdef).setbase;
  332. if genjumps then
  333. begin
  334. { location is always LOC_JUMP }
  335. current_asmdata.getjumplabel(l);
  336. current_asmdata.getjumplabel(l2);
  337. location_reset_jump(location,l,l2);
  338. { If register is used, use only lower 8 bits }
  339. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
  340. pleftreg := left.location.register;
  341. { how much have we already substracted from the x in the }
  342. { "x in [y..z]" expression }
  343. adjustment := 0;
  344. hr:=NR_NO;
  345. for i:=1 to numparts do
  346. if setparts[i].range then
  347. { use fact that a <= x <= b <=> aword(x-a) <= aword(b-a) }
  348. begin
  349. { is the range different from all legal values? }
  350. if (setparts[i].stop-setparts[i].start <> 255) or not (orgopsize = OS_8) then
  351. begin
  352. { yes, is the lower bound <> 0? }
  353. if (setparts[i].start <> 0) then
  354. { we're going to substract from the left register, }
  355. { so in case of a LOC_CREGISTER first move the value }
  356. { to edi (not done before because now we can do the }
  357. { move and substract in one instruction with LEA) }
  358. if (left.location.loc = LOC_CREGISTER) and
  359. (hr<>pleftreg) then
  360. begin
  361. { don't change this back to a_op_const_reg/a_load_reg_reg, since pleftreg must not be modified }
  362. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,opdef);
  363. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,setparts[i].start,pleftreg,hr);
  364. pleftreg:=hr;
  365. end
  366. else
  367. begin
  368. { otherwise, the value is already in a register }
  369. { that can be modified }
  370. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SUB,opdef,
  371. setparts[i].start-adjustment,pleftreg)
  372. end;
  373. { new total value substracted from x: }
  374. { adjustment + (setparts[i].start - adjustment) }
  375. adjustment := setparts[i].start;
  376. { check if result < b-a+1 (not "result <= b-a", since }
  377. { we need a carry in case the element is in the range }
  378. { (this will never overflow since we check at the }
  379. { beginning whether stop-start <> 255) }
  380. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, uopdef, OC_B,
  381. setparts[i].stop-setparts[i].start+1,pleftreg,location.truelabel);
  382. end
  383. else
  384. { if setparts[i].start = 0 and setparts[i].stop = 255, }
  385. { it's always true since "in" is only allowed for bytes }
  386. begin
  387. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.truelabel);
  388. end;
  389. end
  390. else
  391. begin
  392. { Emit code to check if left is an element }
  393. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_EQ,
  394. setparts[i].stop-adjustment,pleftreg,location.truelabel);
  395. end;
  396. { To compensate for not doing a second pass }
  397. right.location.reference.symbol:=nil;
  398. hlcg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
  399. end
  400. else
  401. {*****************************************************************}
  402. { NO JUMP TABLE GENERATION }
  403. {*****************************************************************}
  404. begin
  405. { We will now generated code to check the set itself, no jmps,
  406. handle smallsets separate, because it allows faster checks }
  407. if use_small then
  408. begin
  409. in_smallset(opdef, setbase);
  410. end
  411. else
  412. {************************** NOT SMALL SET ********************}
  413. begin
  414. { location is always LOC_REGISTER }
  415. location_reset(location, LOC_REGISTER, uopsize{def_cgsize(resultdef)});
  416. { allocate a register for the result }
  417. location.register := hlcg.getintregister(current_asmdata.CurrAsmList, uopdef);
  418. if right.location.loc=LOC_CONSTANT then
  419. begin
  420. { can it actually occur currently? CEC }
  421. { yes: "if bytevar in [1,3,5,7,9,11,13,15]" (JM) }
  422. { note: this code assumes that left in [0..255], which is a valid }
  423. { assumption (other cases will be caught by range checking) (JM) }
  424. { load left in register }
  425. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,uopdef,true);
  426. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,uopdef,left.location,setbase);
  427. in_reg_const(uopdef, opsize);
  428. end { of right.location.loc=LOC_CONSTANT }
  429. { do search in a normal set which could have >32 elements
  430. but also used if the left side contains higher values > 32 }
  431. else if (left.location.loc=LOC_CONSTANT) then
  432. begin
  433. if (left.location.value < setbase) or (((left.location.value-setbase) shr 3) >= right.resultdef.size) then
  434. {should be caught earlier }
  435. internalerror(2007020402);
  436. hlcg.a_bit_test_const_loc_reg(current_asmdata.CurrAsmList,right.resultdef,uopdef,left.location.value-setbase,
  437. right.location,location.register);
  438. end
  439. else
  440. begin
  441. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
  442. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,opdef,left.location,setbase);
  443. pleftreg := left.location.register;
  444. if (opsize >= OS_S8) or { = if signed }
  445. ((left.resultdef.typ=orddef) and
  446. ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
  447. (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
  448. ((left.resultdef.typ=enumdef) and
  449. ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
  450. (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
  451. begin
  452. {$ifdef WASM}
  453. needslabel := True;
  454. thlcgwasm(hlcg).a_cmp_const_reg_stack(current_asmdata.CurrAsmList, opdef, OC_A, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg);
  455. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_if));
  456. thlcgwasm(hlcg).decstack(current_asmdata.CurrAsmList,1);
  457. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  458. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_else));
  459. {$else WASM}
  460. current_asmdata.getjumplabel(l);
  461. current_asmdata.getjumplabel(l2);
  462. needslabel := True;
  463. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opdef, OC_BE, tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase, pleftreg, l);
  464. hlcg.a_load_const_reg(current_asmdata.CurrAsmList, uopdef, 0, location.register);
  465. hlcg.a_jmp_always(current_asmdata.CurrAsmList, l2);
  466. hlcg.a_label(current_asmdata.CurrAsmList, l);
  467. {$endif WASM}
  468. end;
  469. hlcg.a_bit_test_reg_loc_reg(current_asmdata.CurrAsmList,opdef,right.resultdef,uopdef,
  470. pleftreg,right.location,location.register);
  471. if needslabel then
  472. begin
  473. {$ifdef WASM}
  474. current_asmdata.CurrAsmList.concat(taicpu.op_none(a_end_if));
  475. {$else WASM}
  476. hlcg.a_label(current_asmdata.CurrAsmList, l2);
  477. {$endif WASM}
  478. end
  479. end;
  480. {$ifndef cpuhighleveltarget}
  481. location.size := def_cgsize(resultdef);
  482. location.register := cg.makeregsize(current_asmdata.CurrAsmList, location.register, location.size);
  483. {$else not cpuhighleveltarget}
  484. hr:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  485. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,uopdef,resultdef,location.register,hr);
  486. location.register:=hr;
  487. location.size := def_cgsize(resultdef);
  488. {$endif not cpuhighleveltarget}
  489. end;
  490. end;
  491. location_freetemp(current_asmdata.CurrAsmList, right.location);
  492. end;
  493. {*****************************************************************************
  494. TCGCASENODE
  495. *****************************************************************************}
  496. { Analyse the nodes following the else label - if empty, change to end label }
  497. function tcgcasenode.GetBranchLabel(Block: TNode; out _Label: TAsmLabel): Boolean;
  498. var
  499. LabelSym: TLabelSym;
  500. begin
  501. Result := True;
  502. if not Assigned(Block) then
  503. begin
  504. { Block doesn't exist / is empty }
  505. _Label := endlabel;
  506. Exit;
  507. end;
  508. { These optimisations aren't particularly debugger friendly }
  509. if not (cs_opt_level2 in current_settings.optimizerswitches) then
  510. begin
  511. Result := False;
  512. current_asmdata.getjumplabel(_Label);
  513. Exit;
  514. end;
  515. while Assigned(Block) do
  516. begin
  517. case Block.nodetype of
  518. nothingn:
  519. begin
  520. _Label := endlabel;
  521. Exit;
  522. end;
  523. goton:
  524. begin
  525. LabelSym := TCGGotoNode(Block).labelsym;
  526. if not Assigned(LabelSym) then
  527. InternalError(2018121131);
  528. _Label := TCGLabelNode(TCGGotoNode(Block).labelnode).getasmlabel;
  529. if Assigned(_Label) then
  530. { Keep tabs on the fact that an actual 'goto' was used }
  531. Include(flowcontrol,fc_gotolabel)
  532. else
  533. Break;
  534. Exit;
  535. end;
  536. blockn:
  537. begin
  538. Block := TBlockNode(Block).Left;
  539. Continue;
  540. end;
  541. statementn:
  542. begin
  543. { If the right node is assigned, then it's a compound block
  544. that can't be simplified, so fall through, set Result to
  545. False and make a new label }
  546. if Assigned(TStatementNode(Block).right) then
  547. Break;
  548. Block := TStatementNode(Block).Left;
  549. Continue;
  550. end;
  551. else
  552. ;
  553. end;
  554. Break;
  555. end;
  556. { Create unique label }
  557. Result := False;
  558. current_asmdata.getjumplabel(_Label);
  559. end;
  560. function tcgcasenode.blocklabel(id:longint):tasmlabel;
  561. begin
  562. if not assigned(blocks[id]) then
  563. internalerror(200411301);
  564. result:=pcaseblock(blocks[id])^.blocklabel;
  565. end;
  566. procedure tcgcasenode.optimizevalues(var max_linear_list:int64;var max_dist:qword);
  567. begin
  568. { no changes by default }
  569. end;
  570. function tcgcasenode.has_jumptable : boolean;
  571. begin
  572. { No jumptable support in the default implementation }
  573. has_jumptable:=false;
  574. end;
  575. procedure tcgcasenode.genjumptable(hp : pcaselabel;min_,max_ : int64);
  576. begin
  577. internalerror(200209161);
  578. end;
  579. procedure tcgcasenode.genlinearlist(hp : pcaselabel);
  580. var
  581. first : boolean;
  582. last : TConstExprInt;
  583. scratch_reg: tregister;
  584. newsize: tcgsize;
  585. newdef: tdef;
  586. procedure gensub(value:tcgint);
  587. begin
  588. { here, since the sub and cmp are separate we need
  589. to move the result before subtract to help
  590. the register allocator
  591. }
  592. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList, opsize, opsize, hregister, scratch_reg);
  593. hlcg.a_op_const_reg(current_asmdata.CurrAsmList, OP_SUB, opsize, value, hregister);
  594. end;
  595. procedure genitem(t : pcaselabel);
  596. begin
  597. if assigned(t^.less) then
  598. genitem(t^.less);
  599. { do we need to test the first value? }
  600. if first and (t^._low>get_min_value(left.resultdef)) then
  601. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,tcgint(t^._low.svalue),hregister,elselabel);
  602. if t^._low=t^._high then
  603. begin
  604. if t^._low-last=0 then
  605. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_EQ,0,hregister,blocklabel(t^.blockid))
  606. else
  607. begin
  608. gensub(tcgint(t^._low.svalue-last.svalue));
  609. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,
  610. OC_EQ,tcgint(t^._low.svalue-last.svalue),scratch_reg,blocklabel(t^.blockid));
  611. end;
  612. last:=t^._low;
  613. end
  614. else
  615. begin
  616. { it begins with the smallest label, if the value }
  617. { is even smaller then jump immediately to the }
  618. { ELSE-label }
  619. if first then
  620. begin
  621. { have we to ajust the first value ? }
  622. if (t^._low>get_min_value(left.resultdef)) or (get_min_value(left.resultdef)<>0) then
  623. gensub(tcgint(t^._low.svalue));
  624. end
  625. else
  626. begin
  627. { if there is no unused label between the last and the }
  628. { present label then the lower limit can be checked }
  629. { immediately. else check the range in between: }
  630. gensub(tcgint(t^._low.svalue-last.svalue));
  631. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize,jmp_lt,tcgint(t^._low.svalue-last.svalue),scratch_reg,elselabel);
  632. end;
  633. gensub(tcgint(t^._high.svalue-t^._low.svalue));
  634. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_le,tcgint(t^._high.svalue-t^._low.svalue),scratch_reg,blocklabel(t^.blockid));
  635. last:=t^._high;
  636. end;
  637. first:=false;
  638. if assigned(t^.greater) then
  639. genitem(t^.greater);
  640. end;
  641. begin
  642. { do we need to generate cmps? }
  643. if (with_sign and (min_label<0)) then
  644. genlinearcmplist(hp)
  645. else
  646. begin
  647. { sign/zero extend the value to a full register before starting to
  648. subtract values, so that on platforms that don't have
  649. subregisters of the same size as the value we don't generate
  650. sign/zero-extensions after every subtraction
  651. make newsize always signed, since we only do this if the size in
  652. bytes of the register is larger than the original opsize, so
  653. the value can always be represented by a larger signed type }
  654. newsize:=tcgsize2signed[reg_cgsize(hregister)];
  655. if tcgsize2size[newsize]>opsize.size then
  656. begin
  657. newdef:=cgsize_orddef(newsize);
  658. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,newdef);
  659. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,newdef,hregister,scratch_reg);
  660. hregister:=scratch_reg;
  661. opsize:=newdef;
  662. end;
  663. if (labelcnt>1) or not(cs_opt_level1 in current_settings.optimizerswitches) then
  664. begin
  665. last:=0;
  666. first:=true;
  667. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  668. genitem(hp);
  669. end
  670. else
  671. begin
  672. { If only one label exists, we can greatly simplify the checks to a simple comparison }
  673. if hp^._low=hp^._high then
  674. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  675. else
  676. begin
  677. scratch_reg:=hlcg.getintregister(current_asmdata.CurrAsmList,opsize);
  678. gensub(tcgint(hp^._low.svalue));
  679. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_BE, tcgint(hp^._high.svalue-hp^._low.svalue), hregister, blocklabel(hp^.blockid))
  680. end;
  681. end;
  682. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  683. end;
  684. end;
  685. procedure tcgcasenode.genlinearcmplist(hp : pcaselabel);
  686. var
  687. last : TConstExprInt;
  688. lastwasrange: boolean;
  689. procedure genitem(t : pcaselabel);
  690. {$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
  691. var
  692. l1 : tasmlabel;
  693. {$endif not cpu64bitalu and not cpuhighleveltarget}
  694. begin
  695. if assigned(t^.less) then
  696. genitem(t^.less);
  697. if t^._low=t^._high then
  698. begin
  699. {$ifndef cpuhighleveltarget}
  700. {$if defined(cpu32bitalu)}
  701. if def_cgsize(opsize) in [OS_S64,OS_64] then
  702. begin
  703. current_asmdata.getjumplabel(l1);
  704. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_NE, aint(hi(int64(t^._low.svalue))),hregister2,l1);
  705. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_EQ, aint(lo(int64(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  706. cg.a_label(current_asmdata.CurrAsmList,l1);
  707. end
  708. else
  709. {$elseif defined(cpu16bitalu)}
  710. if def_cgsize(opsize) in [OS_S64,OS_64] then
  711. begin
  712. current_asmdata.getjumplabel(l1);
  713. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),cg.GetNextReg(hregister2),l1);
  714. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
  715. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  716. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  717. cg.a_label(current_asmdata.CurrAsmList,l1);
  718. end
  719. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  720. begin
  721. current_asmdata.getjumplabel(l1);
  722. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  723. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  724. cg.a_label(current_asmdata.CurrAsmList,l1);
  725. end
  726. else
  727. {$elseif defined(cpu8bitalu)}
  728. if def_cgsize(opsize) in [OS_S64,OS_64] then
  729. begin
  730. current_asmdata.getjumplabel(l1);
  731. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  732. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  733. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  734. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  735. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  736. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  737. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  738. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,blocklabel(t^.blockid));
  739. cg.a_label(current_asmdata.CurrAsmList,l1);
  740. end
  741. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  742. begin
  743. current_asmdata.getjumplabel(l1);
  744. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  745. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  746. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  747. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(lo(int32(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
  748. cg.a_label(current_asmdata.CurrAsmList,l1);
  749. end
  750. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  751. begin
  752. current_asmdata.getjumplabel(l1);
  753. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_NE, aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  754. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8, OC_EQ, aint(lo(int16(t^._low.svalue))),hregister, blocklabel(t^.blockid));
  755. cg.a_label(current_asmdata.CurrAsmList,l1);
  756. end
  757. else
  758. {$endif}
  759. {$endif cpuhighleveltarget}
  760. begin
  761. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, tcgint(t^._low.svalue),hregister, blocklabel(t^.blockid));
  762. end;
  763. { Reset last here, because we've only checked for one value and need to compare
  764. for the next range both the lower and upper bound }
  765. lastwasrange := false;
  766. end
  767. else
  768. begin
  769. { it begins with the smallest label, if the value }
  770. { is even smaller then jump immediately to the }
  771. { ELSE-label }
  772. if not lastwasrange or (t^._low-last>1) then
  773. begin
  774. {$ifndef cpuhighleveltarget}
  775. {$if defined(cpu32bitalu)}
  776. if def_cgsize(opsize) in [OS_64,OS_S64] then
  777. begin
  778. current_asmdata.getjumplabel(l1);
  779. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._low.svalue))),
  780. hregister2, elselabel);
  781. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._low.svalue))),
  782. hregister2, l1);
  783. { the comparisation of the low dword must be always unsigned! }
  784. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_B, aint(lo(int64(t^._low.svalue))), hregister, elselabel);
  785. cg.a_label(current_asmdata.CurrAsmList,l1);
  786. end
  787. else
  788. {$elseif defined(cpu16bitalu)}
  789. if def_cgsize(opsize) in [OS_64,OS_S64] then
  790. begin
  791. current_asmdata.getjumplabel(l1);
  792. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
  793. cg.GetNextReg(hregister2), elselabel);
  794. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
  795. cg.GetNextReg(hregister2), l1);
  796. { the comparison of the low words must be always unsigned! }
  797. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
  798. hregister2, elselabel);
  799. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
  800. hregister2, l1);
  801. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
  802. cg.GetNextReg(hregister), elselabel);
  803. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
  804. cg.GetNextReg(hregister), l1);
  805. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
  806. cg.a_label(current_asmdata.CurrAsmList,l1);
  807. end
  808. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  809. begin
  810. current_asmdata.getjumplabel(l1);
  811. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
  812. cg.GetNextReg(hregister), elselabel);
  813. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
  814. cg.GetNextReg(hregister), l1);
  815. { the comparisation of the low dword must be always unsigned! }
  816. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
  817. cg.a_label(current_asmdata.CurrAsmList,l1);
  818. end
  819. else
  820. {$elseif defined(cpu8bitalu)}
  821. if def_cgsize(opsize) in [OS_64,OS_S64] then
  822. begin
  823. current_asmdata.getjumplabel(l1);
  824. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),elselabel);
  825. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  826. { the comparison of the low words must be always unsigned! }
  827. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),elselabel);
  828. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  829. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),elselabel);
  830. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._low.svalue))))),cg.GetNextReg(hregister2),l1);
  831. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,elselabel);
  832. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._low.svalue))))),hregister2,l1);
  833. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  834. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  835. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  836. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._low.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  837. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),elselabel);
  838. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._low.svalue))))),cg.GetNextReg(hregister),l1);
  839. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(lo(int64(t^._low.svalue))))),hregister,elselabel);
  840. cg.a_label(current_asmdata.CurrAsmList,l1);
  841. end
  842. else if def_cgsize(opsize) in [OS_32,OS_S32] then
  843. begin
  844. current_asmdata.getjumplabel(l1);
  845. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),elselabel);
  846. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_8,jmp_gt,aint(hi(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  847. { the comparison of the low words must be always unsigned! }
  848. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),elselabel);
  849. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._low.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  850. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),elselabel);
  851. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._low.svalue)))),cg.GetNextReg(hregister),l1);
  852. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(int32(t^._low.svalue)))),hregister,elselabel);
  853. cg.a_label(current_asmdata.CurrAsmList,l1);
  854. end
  855. else if def_cgsize(opsize) in [OS_16,OS_S16] then
  856. begin
  857. current_asmdata.getjumplabel(l1);
  858. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),elselabel);
  859. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._low.svalue))),cg.GetNextReg(hregister),l1);
  860. { the comparisation of the low dword must be always unsigned! }
  861. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(int16(t^._low.svalue))),hregister,elselabel);
  862. cg.a_label(current_asmdata.CurrAsmList,l1);
  863. end
  864. else
  865. {$endif}
  866. {$endif cpuhighleveltarget}
  867. begin
  868. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, tcgint(t^._low.svalue), hregister,
  869. elselabel);
  870. end;
  871. end;
  872. {$ifndef cpuhighleveltarget}
  873. {$if defined(cpu32bitalu)}
  874. if def_cgsize(opsize) in [OS_S64,OS_64] then
  875. begin
  876. current_asmdata.getjumplabel(l1);
  877. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_lt, aint(hi(int64(t^._high.svalue))), hregister2,
  878. blocklabel(t^.blockid));
  879. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, jmp_gt, aint(hi(int64(t^._high.svalue))), hregister2,
  880. l1);
  881. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_32, OC_BE, aint(lo(int64(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  882. cg.a_label(current_asmdata.CurrAsmList,l1);
  883. end
  884. else
  885. {$elseif defined(cpu16bitalu)}
  886. if def_cgsize(opsize) in [OS_S64,OS_64] then
  887. begin
  888. current_asmdata.getjumplabel(l1);
  889. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  890. blocklabel(t^.blockid));
  891. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), cg.GetNextReg(hregister2),
  892. l1);
  893. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  894. blocklabel(t^.blockid));
  895. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
  896. l1);
  897. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  898. blocklabel(t^.blockid));
  899. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), cg.GetNextReg(hregister),
  900. l1);
  901. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
  902. cg.a_label(current_asmdata.CurrAsmList,l1);
  903. end
  904. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  905. begin
  906. current_asmdata.getjumplabel(l1);
  907. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  908. blocklabel(t^.blockid));
  909. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), cg.GetNextReg(hregister),
  910. l1);
  911. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
  912. cg.a_label(current_asmdata.CurrAsmList,l1);
  913. end
  914. else
  915. {$elseif defined(cpu8bitalu)}
  916. if def_cgsize(opsize) in [OS_S64,OS_64] then
  917. begin
  918. current_asmdata.getjumplabel(l1);
  919. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),blocklabel(t^.blockid));
  920. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister2))),l1);
  921. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),blocklabel(t^.blockid));
  922. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(hi(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister2)),l1);
  923. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),blocklabel(t^.blockid));
  924. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(hi(int64(t^._high.svalue))))),cg.GetNextReg(hregister2),l1);
  925. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,blocklabel(t^.blockid));
  926. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(lo(hi(int64(t^._high.svalue))))),hregister2,l1);
  927. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  928. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  929. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  930. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(lo(int64(t^._high.svalue))))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  931. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  932. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(lo(int64(t^._high.svalue))))),cg.GetNextReg(hregister),l1);
  933. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(lo(int64(t^._high.svalue))))),hregister,blocklabel(t^.blockid));
  934. cg.a_label(current_asmdata.CurrAsmList,l1);
  935. end
  936. else if def_cgsize(opsize) in [OS_S32,OS_32] then
  937. begin
  938. current_asmdata.getjumplabel(l1);
  939. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),blocklabel(t^.blockid));
  940. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(hregister))),l1);
  941. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),blocklabel(t^.blockid));
  942. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(lo(hi(int32(t^._high.svalue)))),cg.GetNextReg(cg.GetNextReg(hregister)),l1);
  943. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_B,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  944. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_A,aint(hi(lo(int32(t^._high.svalue)))),cg.GetNextReg(hregister),l1);
  945. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(lo(int32(t^._high.svalue)))),hregister,blocklabel(t^.blockid));
  946. cg.a_label(current_asmdata.CurrAsmList,l1);
  947. end
  948. else if def_cgsize(opsize) in [OS_S16,OS_16] then
  949. begin
  950. current_asmdata.getjumplabel(l1);
  951. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_lt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),blocklabel(t^.blockid));
  952. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,jmp_gt,aint(hi(int16(t^._high.svalue))),cg.GetNextReg(hregister),l1);
  953. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_8,OC_BE,aint(lo(int16(t^._high.svalue))),hregister,blocklabel(t^.blockid));
  954. cg.a_label(current_asmdata.CurrAsmList,l1);
  955. end
  956. else
  957. {$endif}
  958. {$endif cpuhighleveltarget}
  959. begin
  960. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, tcgint(t^._high.svalue), hregister, blocklabel(t^.blockid));
  961. end;
  962. last:=t^._high;
  963. lastwasrange := true;
  964. end;
  965. if assigned(t^.greater) then
  966. genitem(t^.greater);
  967. end;
  968. begin
  969. last:=0;
  970. lastwasrange:=false;
  971. genitem(hp);
  972. hlcg.a_jmp_always(current_asmdata.CurrAsmList,elselabel);
  973. end;
  974. procedure tcgcasenode.genjmptreeentry(p : pcaselabel;parentvalue : TConstExprInt);
  975. var
  976. lesslabel,greaterlabel : tasmlabel;
  977. begin
  978. current_asmdata.CurrAsmList.concat(cai_align.Create(current_settings.alignment.jumpalign));
  979. cg.a_label(current_asmdata.CurrAsmList,p^.labellabel);
  980. { calculate labels for left and right }
  981. if p^.less=nil then
  982. lesslabel:=elselabel
  983. else
  984. lesslabel:=p^.less^.labellabel;
  985. if p^.greater=nil then
  986. greaterlabel:=elselabel
  987. else
  988. greaterlabel:=p^.greater^.labellabel;
  989. { calculate labels for left and right }
  990. { no range label: }
  991. if p^._low=p^._high then
  992. begin
  993. if greaterlabel=lesslabel then
  994. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_NE,p^._low,hregister, lesslabel)
  995. else
  996. begin
  997. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_lt,p^._low,hregister, lesslabel);
  998. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize, jmp_gt,p^._low,hregister, greaterlabel);
  999. end;
  1000. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  1001. end
  1002. else
  1003. begin
  1004. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_lt,p^._low, hregister, lesslabel);
  1005. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,jmp_gt,p^._high,hregister, greaterlabel);
  1006. hlcg.a_jmp_always(current_asmdata.CurrAsmList,blocklabel(p^.blockid));
  1007. end;
  1008. if assigned(p^.less) then
  1009. genjmptreeentry(p^.less,p^._low);
  1010. if assigned(p^.greater) then
  1011. genjmptreeentry(p^.greater,p^._high);
  1012. end;
  1013. procedure tcgcasenode.genjmptree(root : pcaselabel);
  1014. type
  1015. tlabelarrayentry = record
  1016. caselabel : pcaselabel;
  1017. asmlabel : TAsmLabel;
  1018. end;
  1019. tlabelarray = array of tlabelarrayentry;
  1020. var
  1021. labelarray : tlabelarray;
  1022. var
  1023. nextarrayentry : int64;
  1024. i : longint;
  1025. procedure addarrayentry(entry : pcaselabel);
  1026. begin
  1027. if assigned(entry^.less) then
  1028. addarrayentry(entry^.less);
  1029. with labelarray[nextarrayentry] do
  1030. begin
  1031. caselabel:=entry;
  1032. current_asmdata.getjumplabel(asmlabel);
  1033. end;
  1034. inc(nextarrayentry);
  1035. if assigned(entry^.greater) then
  1036. addarrayentry(entry^.greater);
  1037. end;
  1038. { rebuild the label tree balanced }
  1039. procedure rebuild(first,last : int64;var p : pcaselabel);
  1040. var
  1041. current : int64;
  1042. begin
  1043. current:=(first+last) div 2;
  1044. p:=labelarray[current].caselabel;
  1045. if first<current then
  1046. rebuild(first,current-1,p^.less)
  1047. else
  1048. p^.less:=nil;
  1049. if last>current then
  1050. rebuild(current+1,last,p^.greater)
  1051. else
  1052. p^.greater:=nil;
  1053. end;
  1054. begin
  1055. labelarray:=nil;
  1056. SetLength(labelarray,labelcnt);
  1057. nextarrayentry:=0;
  1058. addarrayentry(root);
  1059. rebuild(0,high(labelarray),root);
  1060. for i:=0 to high(labelarray) do
  1061. current_asmdata.getjumplabel(labelarray[i].caselabel^.labellabel);
  1062. genjmptreeentry(root,root^._high+10);
  1063. end;
  1064. procedure tcgcasenode.pass_generate_code;
  1065. var
  1066. oldflowcontrol: tflowcontrol;
  1067. i : longint;
  1068. dist : asizeuint;
  1069. distv,
  1070. lv,hv,
  1071. max_label: tconstexprint;
  1072. max_linear_list : int64;
  1073. max_dist : qword;
  1074. ShortcutElse: Boolean;
  1075. begin
  1076. location_reset(location,LOC_VOID,OS_NO);
  1077. oldflowcontrol := flowcontrol;
  1078. include(flowcontrol,fc_inflowcontrol);
  1079. { Allocate labels }
  1080. current_asmdata.getjumplabel(endlabel);
  1081. { Do some optimisation to deal with empty else blocks }
  1082. ShortcutElse := GetBranchLabel(elseblock, elselabel);
  1083. for i:=0 to blocks.count-1 do
  1084. with pcaseblock(blocks[i])^ do
  1085. shortcut := GetBranchLabel(statement, blocklabel);
  1086. with_sign:=is_signed(left.resultdef);
  1087. if with_sign then
  1088. begin
  1089. jmp_gt:=OC_GT;
  1090. jmp_lt:=OC_LT;
  1091. jmp_le:=OC_LTE;
  1092. end
  1093. else
  1094. begin
  1095. jmp_gt:=OC_A;
  1096. jmp_lt:=OC_B;
  1097. jmp_le:=OC_BE;
  1098. end;
  1099. secondpass(left);
  1100. if (left.expectloc=LOC_JUMP)<>
  1101. (left.location.loc=LOC_JUMP) then
  1102. internalerror(2006050501);
  1103. { determines the size of the operand }
  1104. opsize:=left.resultdef;
  1105. { copy the case expression to a register }
  1106. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opsize,false);
  1107. {$if not defined(cpu64bitalu)}
  1108. if def_cgsize(opsize) in [OS_S64,OS_64] then
  1109. begin
  1110. hregister:=left.location.register64.reglo;
  1111. hregister2:=left.location.register64.reghi;
  1112. end
  1113. else
  1114. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1115. hregister:=left.location.register;
  1116. { we need the min_label always to choose between }
  1117. { cmps and subs/decs }
  1118. min_label:=case_get_min(labels);
  1119. { Generate the jumps }
  1120. {$if not defined(cpu64bitalu)}
  1121. if def_cgsize(opsize) in [OS_64,OS_S64] then
  1122. genlinearcmplist(labels)
  1123. else
  1124. {$endif not cpu64bitalu and not cpuhighleveltarget}
  1125. begin
  1126. if cs_opt_level1 in current_settings.optimizerswitches then
  1127. begin
  1128. { procedures are empirically passed on }
  1129. { consumption can also be calculated }
  1130. { but does it pay on the different }
  1131. { processors? }
  1132. { moreover can the size only be appro- }
  1133. { ximated as it is not known if rel8, }
  1134. { rel16 or rel32 jumps are used }
  1135. max_label := case_get_max(labels);
  1136. { can we omit the range check of the jump table ? }
  1137. getrange(left.resultdef,lv,hv);
  1138. jumptable_no_range:=(lv=min_label) and (hv=max_label);
  1139. distv:=max_label-min_label;
  1140. if distv>=0 then
  1141. dist:=min(distv.uvalue,high(dist))
  1142. else
  1143. dist:=min(asizeuint(-distv.svalue),high(dist));
  1144. { optimize for size ? }
  1145. if cs_opt_size in current_settings.optimizerswitches then
  1146. begin
  1147. if has_jumptable and
  1148. (min_label>=int64(low(aint))) and
  1149. (max_label<=high(aint)) and
  1150. not((labelcnt<=2) or
  1151. (distv.svalue<0) or
  1152. (dist>3*labelcnt)) then
  1153. begin
  1154. { if the labels less or more a continuum then }
  1155. genjumptable(labels,min_label.svalue,max_label.svalue);
  1156. end
  1157. else
  1158. begin
  1159. { a linear list is always smaller than a jump tree }
  1160. genlinearlist(labels);
  1161. end;
  1162. end
  1163. else
  1164. begin
  1165. max_dist:=4*labelcoverage;
  1166. { Don't allow jump tables to get too large }
  1167. if max_dist>4*labelcnt then
  1168. max_dist:=min(max_dist,2048);
  1169. if jumptable_no_range then
  1170. max_linear_list:=4
  1171. else
  1172. max_linear_list:=2;
  1173. { allow processor specific values }
  1174. optimizevalues(max_linear_list,max_dist);
  1175. if (labelcnt<=max_linear_list) then
  1176. genlinearlist(labels)
  1177. else
  1178. begin
  1179. if (has_jumptable) and
  1180. (dist<max_dist) and
  1181. (min_label>=int64(low(aint))) and
  1182. (max_label<=high(aint)) then
  1183. genjumptable(labels,min_label.svalue,max_label.svalue)
  1184. { value has been determined on an i7-4770 using a random case with random values
  1185. if more values are known, this can be handled depending on the target CPU
  1186. Testing on a Core 2 Duo E6850 as well as on a Raspi3 showed also, that 64 is
  1187. a good value }
  1188. else if labelcnt>=64 then
  1189. genjmptree(labels)
  1190. else
  1191. genlinearlist(labels);
  1192. end;
  1193. end;
  1194. end
  1195. else
  1196. { it's always not bad }
  1197. genlinearlist(labels);
  1198. end;
  1199. { generate the instruction blocks }
  1200. for i:=0 to blocks.count-1 do with pcaseblock(blocks[i])^ do
  1201. begin
  1202. { If the labels are not equal, then the block label has been shortcut to point elsewhere,
  1203. so there's no need to implement it }
  1204. if not shortcut then
  1205. begin
  1206. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1207. cg.a_label(current_asmdata.CurrAsmList,blocklabel);
  1208. secondpass(statement);
  1209. { don't come back to case line }
  1210. current_filepos:=current_asmdata.CurrAsmList.getlasttaifilepos^;
  1211. hlcg.a_jmp_always(current_asmdata.CurrAsmList,endlabel);
  1212. end;
  1213. end;
  1214. { ...and the else block }
  1215. if not ShortcutElse then
  1216. begin
  1217. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1218. hlcg.a_label(current_asmdata.CurrAsmList,elselabel);
  1219. end;
  1220. if Assigned(elseblock) then
  1221. begin
  1222. secondpass(elseblock);
  1223. end;
  1224. current_asmdata.CurrAsmList.concat(cai_align.create(current_settings.alignment.jumpalign));
  1225. hlcg.a_label(current_asmdata.CurrAsmList,endlabel);
  1226. { Reset labels }
  1227. for i:=0 to blocks.count-1 do
  1228. pcaseblock(blocks[i])^.blocklabel:=nil;
  1229. flowcontrol := oldflowcontrol + (flowcontrol - [fc_inflowcontrol]);
  1230. end;
  1231. begin
  1232. csetelementnode:=tcgsetelementnode;
  1233. cinnode:=tcginnode;
  1234. ccasenode:=tcgcasenode;
  1235. end.