cgcpu.pas 66 KB

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  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_call_ref(list : TAsmList;ref: treference);override;
  43. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  44. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  45. { move instructions }
  46. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  47. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  48. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  49. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  50. { fpu move instructions }
  51. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  52. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  53. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  54. { comparison operations }
  55. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  56. l : tasmlabel);override;
  57. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  58. procedure a_jmp_name(list : TAsmList;const s : string); override;
  59. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  60. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  61. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  62. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  63. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  64. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  65. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  66. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  67. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  68. procedure g_save_registers(list : TAsmList);override;
  69. procedure g_restore_registers(list : TAsmList);override;
  70. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  71. procedure fixref(list : TAsmList;var ref : treference);
  72. function normalize_ref(list : TAsmList;ref : treference;
  73. tmpreg : tregister) : treference;
  74. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  75. procedure g_stackpointer_alloc(list : TAsmList;size : longint);override;
  76. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  77. procedure a_adjust_sp(list: TAsmList; value: longint);
  78. function GetLoad(const ref : treference) : tasmop;
  79. function GetStore(const ref: treference): tasmop;
  80. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister); override;
  81. protected
  82. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  83. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  84. end;
  85. tcg64favr = class(tcg64f32)
  86. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  87. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  88. end;
  89. procedure create_codegen;
  90. const
  91. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  92. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  93. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  94. implementation
  95. uses
  96. globals,verbose,systems,cutils,
  97. fmodule,
  98. symconst,symsym,symtable,
  99. tgobj,rgobj,
  100. procinfo,cpupi,
  101. paramgr;
  102. procedure tcgavr.init_register_allocators;
  103. begin
  104. inherited init_register_allocators;
  105. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  106. [RS_R8,RS_R9,
  107. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  108. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  109. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  110. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  111. [RS_R26,RS_R30],first_int_imreg,[]); }
  112. end;
  113. procedure tcgavr.done_register_allocators;
  114. begin
  115. rg[R_INTREGISTER].free;
  116. // rg[R_ADDRESSREGISTER].free;
  117. inherited done_register_allocators;
  118. end;
  119. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  120. var
  121. tmp1,tmp2,tmp3 : TRegister;
  122. begin
  123. case size of
  124. OS_8,OS_S8:
  125. Result:=inherited getintregister(list, size);
  126. OS_16,OS_S16:
  127. begin
  128. Result:=inherited getintregister(list, OS_8);
  129. { ensure that the high register can be retrieved by
  130. GetNextReg
  131. }
  132. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  133. internalerror(2011021331);
  134. end;
  135. OS_32,OS_S32:
  136. begin
  137. Result:=inherited getintregister(list, OS_8);
  138. tmp1:=inherited getintregister(list, OS_8);
  139. { ensure that the high register can be retrieved by
  140. GetNextReg
  141. }
  142. if tmp1<>GetNextReg(Result) then
  143. internalerror(2011021332);
  144. tmp2:=inherited getintregister(list, OS_8);
  145. { ensure that the upper register can be retrieved by
  146. GetNextReg
  147. }
  148. if tmp2<>GetNextReg(tmp1) then
  149. internalerror(2011021333);
  150. tmp3:=inherited getintregister(list, OS_8);
  151. { ensure that the upper register can be retrieved by
  152. GetNextReg
  153. }
  154. if tmp3<>GetNextReg(tmp2) then
  155. internalerror(2011021334);
  156. end;
  157. else
  158. internalerror(2011021330);
  159. end;
  160. end;
  161. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  162. begin
  163. Result:=getintregister(list,OS_ADDR);
  164. end;
  165. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  166. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  167. var
  168. ref : treference;
  169. begin
  170. paramanager.allocparaloc(list,paraloc);
  171. case paraloc^.loc of
  172. LOC_REGISTER,LOC_CREGISTER:
  173. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  174. LOC_REFERENCE,LOC_CREFERENCE:
  175. begin
  176. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  177. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  178. end;
  179. else
  180. internalerror(2002071004);
  181. end;
  182. end;
  183. var
  184. i : longint;
  185. hp : PCGParaLocation;
  186. begin
  187. { if use_push(cgpara) then
  188. begin
  189. if tcgsize2size[cgpara.Size] > 2 then
  190. begin
  191. if tcgsize2size[cgpara.Size] <> 4 then
  192. internalerror(2013031101);
  193. if cgpara.location^.Next = nil then
  194. begin
  195. if tcgsize2size[cgpara.location^.size] <> 4 then
  196. internalerror(2013031101);
  197. end
  198. else
  199. begin
  200. if tcgsize2size[cgpara.location^.size] <> 2 then
  201. internalerror(2013031101);
  202. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  203. internalerror(2013031101);
  204. if cgpara.location^.Next^.Next <> nil then
  205. internalerror(2013031101);
  206. end;
  207. if tcgsize2size[cgpara.size]>cgpara.alignment then
  208. pushsize:=cgpara.size
  209. else
  210. pushsize:=int_cgsize(cgpara.alignment);
  211. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  212. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  213. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  214. end
  215. else
  216. begin
  217. cgpara.check_simple_location;
  218. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  219. pushsize:=cgpara.location^.size
  220. else
  221. pushsize:=int_cgsize(cgpara.alignment);
  222. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  223. end;
  224. end
  225. else }
  226. begin
  227. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  228. internalerror(2014011101);
  229. hp:=cgpara.location;
  230. for i:=1 to tcgsize2size[cgpara.Size] do
  231. begin
  232. if not(assigned(hp)) or
  233. (tcgsize2size[hp^.size]<>1) or
  234. (hp^.shiftval<>0) then
  235. internalerror(2014011102);
  236. load_para_loc(r,hp);
  237. hp:=hp^.Next;
  238. r:=GetNextReg(r);
  239. end;
  240. if assigned(hp) then
  241. internalerror(2014011103);
  242. end;
  243. end;
  244. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  245. var
  246. i : longint;
  247. hp : PCGParaLocation;
  248. begin
  249. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  250. internalerror(2014011101);
  251. hp:=paraloc.location;
  252. for i:=1 to tcgsize2size[paraloc.Size] do
  253. begin
  254. if not(assigned(hp)) or
  255. (tcgsize2size[hp^.size]<>1) or
  256. (hp^.shiftval<>0) then
  257. internalerror(2014011105);
  258. case hp^.loc of
  259. LOC_REGISTER,LOC_CREGISTER:
  260. a_load_const_reg(list,hp^.size,(a shr (i-1)) and $ff,hp^.register);
  261. LOC_REFERENCE,LOC_CREFERENCE:
  262. begin
  263. list.concat(taicpu.op_const(A_PUSH,(a shr (i-1)) and $ff));
  264. end;
  265. else
  266. internalerror(2002071004);
  267. end;
  268. hp:=hp^.Next;
  269. end;
  270. if assigned(hp) then
  271. internalerror(2014011104);
  272. end;
  273. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  274. var
  275. tmpref, ref: treference;
  276. location: pcgparalocation;
  277. sizeleft: tcgint;
  278. begin
  279. location := paraloc.location;
  280. tmpref := r;
  281. sizeleft := paraloc.intsize;
  282. while assigned(location) do
  283. begin
  284. paramanager.allocparaloc(list,location);
  285. case location^.loc of
  286. LOC_REGISTER,LOC_CREGISTER:
  287. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  288. LOC_REFERENCE:
  289. begin
  290. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  291. { doubles in softemu mode have a strange order of registers and references }
  292. if location^.size=OS_32 then
  293. g_concatcopy(list,tmpref,ref,4)
  294. else
  295. begin
  296. g_concatcopy(list,tmpref,ref,sizeleft);
  297. if assigned(location^.next) then
  298. internalerror(2005010710);
  299. end;
  300. end;
  301. LOC_VOID:
  302. begin
  303. // nothing to do
  304. end;
  305. else
  306. internalerror(2002081103);
  307. end;
  308. inc(tmpref.offset,tcgsize2size[location^.size]);
  309. dec(sizeleft,tcgsize2size[location^.size]);
  310. location := location^.next;
  311. end;
  312. end;
  313. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  314. var
  315. tmpreg: tregister;
  316. begin
  317. tmpreg:=getaddressregister(list);
  318. a_loadaddr_ref_reg(list,r,tmpreg);
  319. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  320. end;
  321. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  322. begin
  323. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  324. {
  325. the compiler does not properly set this flag anymore in pass 1, and
  326. for now we only need it after pass 2 (I hope) (JM)
  327. if not(pi_do_call in current_procinfo.flags) then
  328. internalerror(2003060703);
  329. }
  330. include(current_procinfo.flags,pi_do_call);
  331. end;
  332. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  333. begin
  334. a_reg_alloc(list,NR_ZLO);
  335. a_reg_alloc(list,NR_ZHI);
  336. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  337. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  338. list.concat(taicpu.op_none(A_ICALL));
  339. a_reg_dealloc(list,NR_ZLO);
  340. a_reg_dealloc(list,NR_ZHI);
  341. include(current_procinfo.flags,pi_do_call);
  342. end;
  343. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  344. begin
  345. a_reg_alloc(list,NR_ZLO);
  346. a_reg_alloc(list,NR_ZHI);
  347. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  348. list.concat(taicpu.op_none(A_ICALL));
  349. a_reg_dealloc(list,NR_ZLO);
  350. a_reg_dealloc(list,NR_ZHI);
  351. include(current_procinfo.flags,pi_do_call);
  352. end;
  353. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  354. begin
  355. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  356. internalerror(2012102403);
  357. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  358. end;
  359. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  360. begin
  361. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  362. internalerror(2012102401);
  363. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  364. end;
  365. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  366. var
  367. countreg,
  368. tmpreg: tregister;
  369. i : integer;
  370. instr : taicpu;
  371. paraloc1,paraloc2,paraloc3 : TCGPara;
  372. l1,l2 : tasmlabel;
  373. pd : tprocdef;
  374. procedure NextSrcDst;
  375. begin
  376. if i=5 then
  377. begin
  378. dst:=dsthi;
  379. src:=srchi;
  380. end
  381. else
  382. begin
  383. dst:=GetNextReg(dst);
  384. src:=GetNextReg(src);
  385. end;
  386. end;
  387. { iterates TmpReg through all registers of dst }
  388. procedure NextTmp;
  389. begin
  390. if i=5 then
  391. tmpreg:=dsthi
  392. else
  393. tmpreg:=GetNextReg(tmpreg);
  394. end;
  395. begin
  396. case op of
  397. OP_ADD:
  398. begin
  399. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  400. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  401. begin
  402. for i:=2 to tcgsize2size[size] do
  403. begin
  404. NextSrcDst;
  405. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  406. end;
  407. end;
  408. end;
  409. OP_SUB:
  410. begin
  411. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  412. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  413. begin
  414. for i:=2 to tcgsize2size[size] do
  415. begin
  416. NextSrcDst;
  417. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  418. end;
  419. end;
  420. end;
  421. OP_NEG:
  422. begin
  423. if src<>dst then
  424. a_load_reg_reg(list,size,size,src,dst);
  425. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  426. begin
  427. tmpreg:=GetNextReg(dst);
  428. for i:=2 to tcgsize2size[size] do
  429. begin
  430. list.concat(taicpu.op_reg(A_COM,tmpreg));
  431. NextTmp;
  432. end;
  433. list.concat(taicpu.op_reg(A_NEG,dst));
  434. tmpreg:=GetNextReg(dst);
  435. for i:=2 to tcgsize2size[size] do
  436. begin
  437. list.concat(taicpu.op_reg_const(A_SBCI,dst,-1));
  438. NextTmp;
  439. end;
  440. end;
  441. end;
  442. OP_NOT:
  443. begin
  444. for i:=1 to tcgsize2size[size] do
  445. begin
  446. if src<>dst then
  447. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  448. list.concat(taicpu.op_reg(A_COM,dst));
  449. NextSrcDst;
  450. end;
  451. end;
  452. OP_MUL,OP_IMUL:
  453. begin
  454. if size in [OS_8,OS_S8] then
  455. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  456. else if size=OS_16 then
  457. begin
  458. pd:=search_system_proc('fpc_mul_word');
  459. paraloc1.init;
  460. paraloc2.init;
  461. paraloc3.init;
  462. paramanager.getintparaloc(pd,1,paraloc1);
  463. paramanager.getintparaloc(pd,2,paraloc2);
  464. paramanager.getintparaloc(pd,3,paraloc3);
  465. a_load_const_cgpara(list,OS_8,0,paraloc3);
  466. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  467. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  468. paramanager.freecgpara(list,paraloc3);
  469. paramanager.freecgpara(list,paraloc2);
  470. paramanager.freecgpara(list,paraloc1);
  471. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  472. a_call_name(list,'FPC_MUL_WORD',false);
  473. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  474. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  475. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  476. paraloc3.done;
  477. paraloc2.done;
  478. paraloc1.done;
  479. end
  480. else
  481. internalerror(2011022002);
  482. end;
  483. OP_DIV,OP_IDIV:
  484. { special stuff, needs separate handling inside code }
  485. { generator }
  486. internalerror(2011022001);
  487. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  488. begin
  489. current_asmdata.getjumplabel(l1);
  490. current_asmdata.getjumplabel(l2);
  491. countreg:=getintregister(list,OS_8);
  492. a_load_reg_reg(list,size,OS_8,src,countreg);
  493. list.concat(taicpu.op_reg_const(A_CP,countreg,0));
  494. a_jmp_flags(list,F_EQ,l2);
  495. cg.a_label(list,l1);
  496. case op of
  497. OP_SHR:
  498. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  499. OP_SHL:
  500. list.concat(taicpu.op_reg(A_LSL,dst));
  501. OP_SAR:
  502. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  503. OP_ROR:
  504. begin
  505. { load carry? }
  506. if not(size in [OS_8,OS_S8]) then
  507. begin
  508. list.concat(taicpu.op_none(A_CLC));
  509. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  510. list.concat(taicpu.op_none(A_SEC));
  511. end;
  512. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  513. end;
  514. OP_ROL:
  515. begin
  516. { load carry? }
  517. if not(size in [OS_8,OS_S8]) then
  518. begin
  519. list.concat(taicpu.op_none(A_CLC));
  520. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  521. list.concat(taicpu.op_none(A_SEC));
  522. end;
  523. list.concat(taicpu.op_reg(A_ROL,dst))
  524. end;
  525. else
  526. internalerror(2011030901);
  527. end;
  528. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  529. begin
  530. for i:=2 to tcgsize2size[size] do
  531. begin
  532. case op of
  533. OP_ROR,
  534. OP_SHR:
  535. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  536. OP_ROL,
  537. OP_SHL:
  538. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  539. OP_SAR:
  540. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  541. else
  542. internalerror(2011030902);
  543. end;
  544. end;
  545. end;
  546. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  547. a_jmp_flags(list,F_NE,l1);
  548. // keep registers alive
  549. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  550. cg.a_label(list,l2);
  551. end;
  552. OP_AND,OP_OR,OP_XOR:
  553. begin
  554. for i:=1 to tcgsize2size[size] do
  555. begin
  556. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  557. NextSrcDst;
  558. end;
  559. end;
  560. else
  561. internalerror(2011022004);
  562. end;
  563. end;
  564. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  565. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  566. var
  567. mask : qword;
  568. shift : byte;
  569. i : byte;
  570. tmpreg : tregister;
  571. tmpreg64 : tregister64;
  572. procedure NextReg;
  573. begin
  574. if i=5 then
  575. reg:=reghi
  576. else
  577. reg:=GetNextReg(reg);
  578. end;
  579. begin
  580. mask:=$ff;
  581. shift:=0;
  582. case op of
  583. OP_OR:
  584. begin
  585. for i:=1 to tcgsize2size[size] do
  586. begin
  587. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  588. NextReg;
  589. mask:=mask shl 8;
  590. inc(shift,8);
  591. end;
  592. end;
  593. OP_AND:
  594. begin
  595. for i:=1 to tcgsize2size[size] do
  596. begin
  597. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  598. NextReg;
  599. mask:=mask shl 8;
  600. inc(shift,8);
  601. end;
  602. end;
  603. OP_SUB:
  604. begin
  605. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  606. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  607. begin
  608. for i:=2 to tcgsize2size[size] do
  609. begin
  610. NextReg;
  611. mask:=mask shl 8;
  612. inc(shift,8);
  613. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  614. end;
  615. end;
  616. end;
  617. else
  618. begin
  619. if size in [OS_64,OS_S64] then
  620. begin
  621. tmpreg64.reglo:=getintregister(list,OS_32);
  622. tmpreg64.reghi:=getintregister(list,OS_32);
  623. cg64.a_load64_const_reg(list,a,tmpreg64);
  624. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  625. end
  626. else
  627. begin
  628. tmpreg:=getintregister(list,size);
  629. a_load_const_reg(list,size,a,tmpreg);
  630. a_op_reg_reg(list,op,size,tmpreg,reg);
  631. end;
  632. end;
  633. end;
  634. end;
  635. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  636. var
  637. mask : qword;
  638. shift : byte;
  639. i : byte;
  640. begin
  641. mask:=$ff;
  642. shift:=0;
  643. for i:=1 to tcgsize2size[size] do
  644. begin
  645. if ((qword(a) and mask) shr shift)=0 then
  646. emit_mov(list,reg,NR_R1)
  647. else
  648. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  649. mask:=mask shl 8;
  650. inc(shift,8);
  651. reg:=GetNextReg(reg);
  652. end;
  653. end;
  654. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  655. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  656. begin
  657. { allocate the register only, if a cpu register is passed }
  658. if getsupreg(reg)<first_int_imreg then
  659. getcpuregister(list,reg);
  660. end;
  661. var
  662. tmpref : treference;
  663. l : tasmlabel;
  664. begin
  665. Result:=ref;
  666. if ref.addressmode<>AM_UNCHANGED then
  667. internalerror(2011021701);
  668. { Be sure to have a base register }
  669. if (ref.base=NR_NO) then
  670. begin
  671. { only symbol+offset? }
  672. if ref.index=NR_NO then
  673. exit;
  674. ref.base:=ref.index;
  675. ref.index:=NR_NO;
  676. end;
  677. if assigned(ref.symbol) or (ref.offset<>0) then
  678. begin
  679. reference_reset(tmpref,0);
  680. tmpref.symbol:=ref.symbol;
  681. tmpref.offset:=ref.offset;
  682. tmpref.refaddr:=addr_lo8;
  683. maybegetcpuregister(list,tmpreg);
  684. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  685. tmpref.refaddr:=addr_hi8;
  686. maybegetcpuregister(list,GetNextReg(tmpreg));
  687. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  688. if (ref.base<>NR_NO) then
  689. begin
  690. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  691. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  692. end;
  693. if (ref.index<>NR_NO) then
  694. begin
  695. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  696. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  697. end;
  698. ref.symbol:=nil;
  699. ref.offset:=0;
  700. ref.base:=tmpreg;
  701. ref.index:=NR_NO;
  702. end
  703. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  704. begin
  705. maybegetcpuregister(list,tmpreg);
  706. emit_mov(list,tmpreg,ref.index);
  707. maybegetcpuregister(list,GetNextReg(tmpreg));
  708. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  709. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  710. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  711. ref.base:=tmpreg;
  712. ref.index:=NR_NO;
  713. end
  714. else if (ref.base<>NR_NO) then
  715. begin
  716. maybegetcpuregister(list,tmpreg);
  717. emit_mov(list,tmpreg,ref.base);
  718. maybegetcpuregister(list,GetNextReg(tmpreg));
  719. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  720. ref.base:=tmpreg;
  721. ref.index:=NR_NO;
  722. end
  723. else if (ref.index<>NR_NO) then
  724. begin
  725. maybegetcpuregister(list,tmpreg);
  726. emit_mov(list,tmpreg,ref.index);
  727. maybegetcpuregister(list,GetNextReg(tmpreg));
  728. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  729. ref.base:=tmpreg;
  730. ref.index:=NR_NO;
  731. end;
  732. Result:=ref;
  733. end;
  734. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  735. var
  736. href : treference;
  737. conv_done: boolean;
  738. tmpreg : tregister;
  739. i : integer;
  740. QuickRef : Boolean;
  741. begin
  742. QuickRef:=false;
  743. if not((Ref.addressmode=AM_UNCHANGED) and
  744. (Ref.symbol=nil) and
  745. ((Ref.base=NR_R28) or
  746. (Ref.base=NR_R29)) and
  747. (Ref.Index=NR_No) and
  748. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  749. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  750. href:=normalize_ref(list,Ref,NR_R30)
  751. else
  752. begin
  753. QuickRef:=true;
  754. href:=Ref;
  755. end;
  756. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  757. internalerror(2011021307);
  758. conv_done:=false;
  759. if tosize<>fromsize then
  760. begin
  761. conv_done:=true;
  762. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  763. fromsize:=tosize;
  764. case fromsize of
  765. OS_8:
  766. begin
  767. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  768. href.addressmode:=AM_POSTINCREMENT;
  769. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  770. for i:=2 to tcgsize2size[tosize] do
  771. begin
  772. if QuickRef then
  773. inc(href.offset);
  774. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  775. href.addressmode:=AM_POSTINCREMENT
  776. else
  777. href.addressmode:=AM_UNCHANGED;
  778. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  779. end;
  780. end;
  781. OS_S8:
  782. begin
  783. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  784. href.addressmode:=AM_POSTINCREMENT;
  785. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  786. if tcgsize2size[tosize]>1 then
  787. begin
  788. tmpreg:=getintregister(list,OS_8);
  789. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  790. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  791. list.concat(taicpu.op_reg(A_COM,tmpreg));
  792. for i:=2 to tcgsize2size[tosize] do
  793. begin
  794. if QuickRef then
  795. inc(href.offset);
  796. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  797. href.addressmode:=AM_POSTINCREMENT
  798. else
  799. href.addressmode:=AM_UNCHANGED;
  800. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  801. end;
  802. end;
  803. end;
  804. OS_16:
  805. begin
  806. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  807. href.addressmode:=AM_POSTINCREMENT;
  808. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  809. if QuickRef then
  810. inc(href.offset)
  811. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  812. href.addressmode:=AM_POSTINCREMENT
  813. else
  814. href.addressmode:=AM_UNCHANGED;
  815. reg:=GetNextReg(reg);
  816. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  817. for i:=3 to tcgsize2size[tosize] do
  818. begin
  819. if QuickRef then
  820. inc(href.offset);
  821. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  822. href.addressmode:=AM_POSTINCREMENT
  823. else
  824. href.addressmode:=AM_UNCHANGED;
  825. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  826. end;
  827. end;
  828. OS_S16:
  829. begin
  830. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  831. href.addressmode:=AM_POSTINCREMENT;
  832. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  833. if QuickRef then
  834. inc(href.offset)
  835. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  836. href.addressmode:=AM_POSTINCREMENT
  837. else
  838. href.addressmode:=AM_UNCHANGED;
  839. reg:=GetNextReg(reg);
  840. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  841. if tcgsize2size[tosize]>2 then
  842. begin
  843. tmpreg:=getintregister(list,OS_8);
  844. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  845. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  846. list.concat(taicpu.op_reg(A_COM,tmpreg));
  847. for i:=3 to tcgsize2size[tosize] do
  848. begin
  849. if QuickRef then
  850. inc(href.offset);
  851. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  852. href.addressmode:=AM_POSTINCREMENT
  853. else
  854. href.addressmode:=AM_UNCHANGED;
  855. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  856. end;
  857. end;
  858. end;
  859. else
  860. conv_done:=false;
  861. end;
  862. end;
  863. if not conv_done then
  864. begin
  865. for i:=1 to tcgsize2size[fromsize] do
  866. begin
  867. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  868. href.addressmode:=AM_POSTINCREMENT
  869. else
  870. href.addressmode:=AM_UNCHANGED;
  871. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  872. if QuickRef then
  873. inc(href.offset);
  874. reg:=GetNextReg(reg);
  875. end;
  876. end;
  877. if not(QuickRef) then
  878. begin
  879. ungetcpuregister(list,href.base);
  880. ungetcpuregister(list,GetNextReg(href.base));
  881. end;
  882. end;
  883. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  884. const Ref : treference;reg : tregister);
  885. var
  886. href : treference;
  887. conv_done: boolean;
  888. tmpreg : tregister;
  889. i : integer;
  890. QuickRef : boolean;
  891. begin
  892. QuickRef:=false;
  893. if not((Ref.addressmode=AM_UNCHANGED) and
  894. (Ref.symbol=nil) and
  895. ((Ref.base=NR_R28) or
  896. (Ref.base=NR_R29)) and
  897. (Ref.Index=NR_No) and
  898. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  899. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  900. href:=normalize_ref(list,Ref,NR_R30)
  901. else
  902. begin
  903. QuickRef:=true;
  904. href:=Ref;
  905. end;
  906. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  907. internalerror(2011021307);
  908. conv_done:=false;
  909. if tosize<>fromsize then
  910. begin
  911. conv_done:=true;
  912. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  913. fromsize:=tosize;
  914. case fromsize of
  915. OS_8:
  916. begin
  917. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  918. for i:=2 to tcgsize2size[tosize] do
  919. begin
  920. reg:=GetNextReg(reg);
  921. list.concat(taicpu.op_reg(A_CLR,reg));
  922. end;
  923. end;
  924. OS_S8:
  925. begin
  926. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  927. tmpreg:=reg;
  928. if tcgsize2size[tosize]>1 then
  929. begin
  930. reg:=GetNextReg(reg);
  931. list.concat(taicpu.op_reg(A_CLR,reg));
  932. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  933. list.concat(taicpu.op_reg(A_COM,reg));
  934. tmpreg:=reg;
  935. for i:=3 to tcgsize2size[tosize] do
  936. begin
  937. reg:=GetNextReg(reg);
  938. emit_mov(list,reg,tmpreg);
  939. end;
  940. end;
  941. end;
  942. OS_16:
  943. begin
  944. if not(QuickRef) then
  945. href.addressmode:=AM_POSTINCREMENT;
  946. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  947. if QuickRef then
  948. inc(href.offset);
  949. href.addressmode:=AM_UNCHANGED;
  950. reg:=GetNextReg(reg);
  951. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  952. for i:=3 to tcgsize2size[tosize] do
  953. begin
  954. reg:=GetNextReg(reg);
  955. list.concat(taicpu.op_reg(A_CLR,reg));
  956. end;
  957. end;
  958. OS_S16:
  959. begin
  960. if not(QuickRef) then
  961. href.addressmode:=AM_POSTINCREMENT;
  962. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  963. if QuickRef then
  964. inc(href.offset);
  965. href.addressmode:=AM_UNCHANGED;
  966. reg:=GetNextReg(reg);
  967. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  968. tmpreg:=reg;
  969. reg:=GetNextReg(reg);
  970. list.concat(taicpu.op_reg(A_CLR,reg));
  971. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  972. list.concat(taicpu.op_reg(A_COM,reg));
  973. tmpreg:=reg;
  974. for i:=4 to tcgsize2size[tosize] do
  975. begin
  976. reg:=GetNextReg(reg);
  977. emit_mov(list,reg,tmpreg);
  978. end;
  979. end;
  980. else
  981. conv_done:=false;
  982. end;
  983. end;
  984. if not conv_done then
  985. begin
  986. for i:=1 to tcgsize2size[fromsize] do
  987. begin
  988. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  989. href.addressmode:=AM_POSTINCREMENT
  990. else
  991. href.addressmode:=AM_UNCHANGED;
  992. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  993. if QuickRef then
  994. inc(href.offset);
  995. reg:=GetNextReg(reg);
  996. end;
  997. end;
  998. if not(QuickRef) then
  999. begin
  1000. ungetcpuregister(list,href.base);
  1001. ungetcpuregister(list,GetNextReg(href.base));
  1002. end;
  1003. end;
  1004. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1005. var
  1006. conv_done: boolean;
  1007. tmpreg : tregister;
  1008. i : integer;
  1009. begin
  1010. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1011. internalerror(2011021310);
  1012. conv_done:=false;
  1013. if tosize<>fromsize then
  1014. begin
  1015. conv_done:=true;
  1016. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1017. fromsize:=tosize;
  1018. case fromsize of
  1019. OS_8:
  1020. begin
  1021. emit_mov(list,reg2,reg1);
  1022. for i:=2 to tcgsize2size[tosize] do
  1023. begin
  1024. reg2:=GetNextReg(reg2);
  1025. list.concat(taicpu.op_reg(A_CLR,reg2));
  1026. end;
  1027. end;
  1028. OS_S8:
  1029. begin
  1030. emit_mov(list,reg2,reg1);
  1031. if tcgsize2size[tosize]>1 then
  1032. begin
  1033. reg2:=GetNextReg(reg2);
  1034. list.concat(taicpu.op_reg(A_CLR,reg2));
  1035. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1036. list.concat(taicpu.op_reg(A_COM,reg2));
  1037. tmpreg:=reg2;
  1038. for i:=3 to tcgsize2size[tosize] do
  1039. begin
  1040. reg2:=GetNextReg(reg2);
  1041. emit_mov(list,reg2,tmpreg);
  1042. end;
  1043. end;
  1044. end;
  1045. OS_16:
  1046. begin
  1047. emit_mov(list,reg2,reg1);
  1048. reg1:=GetNextReg(reg1);
  1049. reg2:=GetNextReg(reg2);
  1050. emit_mov(list,reg2,reg1);
  1051. for i:=3 to tcgsize2size[tosize] do
  1052. begin
  1053. reg2:=GetNextReg(reg2);
  1054. list.concat(taicpu.op_reg(A_CLR,reg2));
  1055. end;
  1056. end;
  1057. OS_S16:
  1058. begin
  1059. emit_mov(list,reg2,reg1);
  1060. reg1:=GetNextReg(reg1);
  1061. reg2:=GetNextReg(reg2);
  1062. emit_mov(list,reg2,reg1);
  1063. if tcgsize2size[tosize]>2 then
  1064. begin
  1065. reg2:=GetNextReg(reg2);
  1066. list.concat(taicpu.op_reg(A_CLR,reg2));
  1067. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1068. list.concat(taicpu.op_reg(A_COM,reg2));
  1069. tmpreg:=reg2;
  1070. for i:=4 to tcgsize2size[tosize] do
  1071. begin
  1072. reg2:=GetNextReg(reg2);
  1073. emit_mov(list,reg2,tmpreg);
  1074. end;
  1075. end;
  1076. end;
  1077. else
  1078. conv_done:=false;
  1079. end;
  1080. end;
  1081. if not conv_done and (reg1<>reg2) then
  1082. begin
  1083. for i:=1 to tcgsize2size[fromsize] do
  1084. begin
  1085. emit_mov(list,reg2,reg1);
  1086. reg1:=GetNextReg(reg1);
  1087. reg2:=GetNextReg(reg2);
  1088. end;
  1089. end;
  1090. end;
  1091. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1092. begin
  1093. internalerror(2012010702);
  1094. end;
  1095. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1096. begin
  1097. internalerror(2012010703);
  1098. end;
  1099. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1100. begin
  1101. internalerror(2012010704);
  1102. end;
  1103. { comparison operations }
  1104. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1105. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1106. var
  1107. swapped : boolean;
  1108. tmpreg : tregister;
  1109. i : byte;
  1110. begin
  1111. if a=0 then
  1112. begin
  1113. swapped:=false;
  1114. { swap parameters? }
  1115. case cmp_op of
  1116. OC_GT:
  1117. begin
  1118. swapped:=true;
  1119. cmp_op:=OC_LT;
  1120. end;
  1121. OC_LTE:
  1122. begin
  1123. swapped:=true;
  1124. cmp_op:=OC_GTE;
  1125. end;
  1126. OC_BE:
  1127. begin
  1128. swapped:=true;
  1129. cmp_op:=OC_AE;
  1130. end;
  1131. OC_A:
  1132. begin
  1133. swapped:=true;
  1134. cmp_op:=OC_B;
  1135. end;
  1136. end;
  1137. if swapped then
  1138. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1139. else
  1140. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1141. for i:=2 to tcgsize2size[size] do
  1142. begin
  1143. reg:=GetNextReg(reg);
  1144. if swapped then
  1145. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1146. else
  1147. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1148. end;
  1149. a_jmp_cond(list,cmp_op,l);
  1150. end
  1151. else
  1152. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1153. end;
  1154. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1155. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1156. var
  1157. swapped : boolean;
  1158. tmpreg : tregister;
  1159. i : byte;
  1160. begin
  1161. swapped:=false;
  1162. { swap parameters? }
  1163. case cmp_op of
  1164. OC_GT:
  1165. begin
  1166. swapped:=true;
  1167. cmp_op:=OC_LT;
  1168. end;
  1169. OC_LTE:
  1170. begin
  1171. swapped:=true;
  1172. cmp_op:=OC_GTE;
  1173. end;
  1174. OC_BE:
  1175. begin
  1176. swapped:=true;
  1177. cmp_op:=OC_AE;
  1178. end;
  1179. OC_A:
  1180. begin
  1181. swapped:=true;
  1182. cmp_op:=OC_B;
  1183. end;
  1184. end;
  1185. if swapped then
  1186. begin
  1187. tmpreg:=reg1;
  1188. reg1:=reg2;
  1189. reg2:=tmpreg;
  1190. end;
  1191. list.concat(taicpu.op_reg_reg(A_CP,reg1,reg2));
  1192. for i:=2 to tcgsize2size[size] do
  1193. begin
  1194. reg1:=GetNextReg(reg1);
  1195. reg2:=GetNextReg(reg2);
  1196. list.concat(taicpu.op_reg_reg(A_CPC,reg1,reg2));
  1197. end;
  1198. a_jmp_cond(list,cmp_op,l);
  1199. end;
  1200. procedure tcgavr.a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister);
  1201. begin
  1202. Comment(V_Error,'tcgarm.a_bit_scan_reg_reg method not implemented');
  1203. end;
  1204. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1205. var
  1206. ai : taicpu;
  1207. begin
  1208. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s));
  1209. ai.is_jmp:=true;
  1210. list.concat(ai);
  1211. end;
  1212. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1213. var
  1214. ai : taicpu;
  1215. begin
  1216. ai:=taicpu.op_sym(A_JMP,l);
  1217. ai.is_jmp:=true;
  1218. list.concat(ai);
  1219. end;
  1220. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1221. var
  1222. ai : taicpu;
  1223. begin
  1224. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1225. ai.is_jmp:=true;
  1226. list.concat(ai);
  1227. end;
  1228. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1229. var
  1230. l : TAsmLabel;
  1231. tmpflags : TResFlags;
  1232. begin
  1233. current_asmdata.getjumplabel(l);
  1234. {
  1235. if flags_to_cond(f) then
  1236. begin
  1237. tmpflags:=f;
  1238. inverse_flags(tmpflags);
  1239. list.concat(taicpu.op_reg(A_CLR,reg));
  1240. a_jmp_flags(list,tmpflags,l);
  1241. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1242. end
  1243. else
  1244. }
  1245. begin
  1246. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1247. a_jmp_flags(list,f,l);
  1248. list.concat(taicpu.op_reg(A_CLR,reg));
  1249. end;
  1250. cg.a_label(list,l);
  1251. end;
  1252. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1253. var
  1254. i : integer;
  1255. begin
  1256. case value of
  1257. 0:
  1258. ;
  1259. -14..-1:
  1260. begin
  1261. if ((-value) mod 2)<>0 then
  1262. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1263. for i:=1 to (-value) div 2 do
  1264. list.concat(taicpu.op_const(A_RCALL,0));
  1265. end;
  1266. 1..7:
  1267. begin
  1268. for i:=1 to value do
  1269. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1270. end;
  1271. else
  1272. begin
  1273. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1274. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1275. // get SREG
  1276. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1277. // block interrupts
  1278. list.concat(taicpu.op_none(A_CLI));
  1279. // write high SP
  1280. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1281. // release interrupts
  1282. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1283. // write low SP
  1284. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1285. end;
  1286. end;
  1287. end;
  1288. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1289. begin
  1290. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1291. result:=A_LDS
  1292. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1293. result:=A_LDD
  1294. else
  1295. result:=A_LD;
  1296. end;
  1297. function tcgavr.GetStore(const ref: treference) : tasmop;
  1298. begin
  1299. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1300. result:=A_STS
  1301. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1302. result:=A_STD
  1303. else
  1304. result:=A_ST;
  1305. end;
  1306. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1307. var
  1308. regs : tcpuregisterset;
  1309. reg : tsuperregister;
  1310. begin
  1311. if not(nostackframe) then
  1312. begin
  1313. { save int registers }
  1314. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1315. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1316. regs:=regs+[RS_R28,RS_R29];
  1317. for reg:=RS_R31 downto RS_R0 do
  1318. if reg in regs then
  1319. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1320. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1321. begin
  1322. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1323. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1324. end
  1325. else
  1326. { the framepointer cannot be omitted on avr because sp
  1327. is not a register but part of the i/o map
  1328. }
  1329. internalerror(2011021901);
  1330. a_adjust_sp(list,-localsize);
  1331. end;
  1332. end;
  1333. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1334. var
  1335. regs : tcpuregisterset;
  1336. reg : TSuperRegister;
  1337. LocalSize : longint;
  1338. begin
  1339. if not(nostackframe) then
  1340. begin
  1341. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1342. begin
  1343. LocalSize:=current_procinfo.calc_stackframe_size;
  1344. a_adjust_sp(list,LocalSize);
  1345. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1346. for reg:=RS_R0 to RS_R31 do
  1347. if reg in regs then
  1348. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1349. end
  1350. else
  1351. { the framepointer cannot be omitted on avr because sp
  1352. is not a register but part of the i/o map
  1353. }
  1354. internalerror(2011021902);
  1355. end;
  1356. list.concat(taicpu.op_none(A_RET));
  1357. end;
  1358. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1359. var
  1360. tmpref : treference;
  1361. begin
  1362. if ref.addressmode<>AM_UNCHANGED then
  1363. internalerror(2011021701);
  1364. if assigned(ref.symbol) or (ref.offset<>0) then
  1365. begin
  1366. reference_reset(tmpref,0);
  1367. tmpref.symbol:=ref.symbol;
  1368. tmpref.offset:=ref.offset;
  1369. tmpref.refaddr:=addr_lo8;
  1370. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1371. tmpref.refaddr:=addr_hi8;
  1372. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1373. if (ref.base<>NR_NO) then
  1374. begin
  1375. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1376. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1377. end;
  1378. if (ref.index<>NR_NO) then
  1379. begin
  1380. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1381. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1382. end;
  1383. end
  1384. else if (ref.base<>NR_NO)then
  1385. begin
  1386. emit_mov(list,r,ref.base);
  1387. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1388. if (ref.index<>NR_NO) then
  1389. begin
  1390. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1391. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1392. end;
  1393. end
  1394. else if (ref.index<>NR_NO) then
  1395. begin
  1396. emit_mov(list,r,ref.index);
  1397. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1398. end;
  1399. end;
  1400. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1401. begin
  1402. internalerror(2011021320);
  1403. end;
  1404. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1405. var
  1406. paraloc1,paraloc2,paraloc3 : TCGPara;
  1407. pd : tprocdef;
  1408. begin
  1409. pd:=search_system_proc('MOVE');
  1410. paraloc1.init;
  1411. paraloc2.init;
  1412. paraloc3.init;
  1413. paramanager.getintparaloc(pd,1,paraloc1);
  1414. paramanager.getintparaloc(pd,2,paraloc2);
  1415. paramanager.getintparaloc(pd,3,paraloc3);
  1416. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1417. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1418. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1419. paramanager.freecgpara(list,paraloc3);
  1420. paramanager.freecgpara(list,paraloc2);
  1421. paramanager.freecgpara(list,paraloc1);
  1422. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1423. a_call_name_static(list,'FPC_MOVE');
  1424. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1425. paraloc3.done;
  1426. paraloc2.done;
  1427. paraloc1.done;
  1428. end;
  1429. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1430. var
  1431. countreg,tmpreg : tregister;
  1432. srcref,dstref : treference;
  1433. copysize,countregsize : tcgsize;
  1434. l : TAsmLabel;
  1435. i : longint;
  1436. SrcQuickRef, DestQuickRef : Boolean;
  1437. begin
  1438. if len>16 then
  1439. begin
  1440. current_asmdata.getjumplabel(l);
  1441. reference_reset(srcref,0);
  1442. reference_reset(dstref,0);
  1443. srcref.base:=NR_R30;
  1444. srcref.addressmode:=AM_POSTINCREMENT;
  1445. dstref.base:=NR_R26;
  1446. dstref.addressmode:=AM_POSTINCREMENT;
  1447. copysize:=OS_8;
  1448. if len<256 then
  1449. countregsize:=OS_8
  1450. else if len<65536 then
  1451. countregsize:=OS_16
  1452. else
  1453. internalerror(2011022007);
  1454. countreg:=getintregister(list,countregsize);
  1455. a_load_const_reg(list,countregsize,len,countreg);
  1456. a_loadaddr_ref_reg(list,source,NR_R30);
  1457. tmpreg:=getaddressregister(list);
  1458. a_loadaddr_ref_reg(list,dest,tmpreg);
  1459. { X is used for spilling code so we can load it
  1460. only by a push/pop sequence, this can be
  1461. optimized later on by the peephole optimizer
  1462. }
  1463. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1464. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1465. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1466. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1467. cg.a_label(list,l);
  1468. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1469. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1470. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1471. a_jmp_flags(list,F_NE,l);
  1472. // keep registers alive
  1473. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1474. end
  1475. else
  1476. begin
  1477. SrcQuickRef:=false;
  1478. DestQuickRef:=false;
  1479. if not((source.addressmode=AM_UNCHANGED) and
  1480. (source.symbol=nil) and
  1481. ((source.base=NR_R28) or
  1482. (source.base=NR_R29)) and
  1483. (source.Index=NR_NO) and
  1484. (source.Offset in [0..64-len])) and
  1485. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1486. srcref:=normalize_ref(list,source,NR_R30)
  1487. else
  1488. begin
  1489. SrcQuickRef:=true;
  1490. srcref:=source;
  1491. end;
  1492. if not((dest.addressmode=AM_UNCHANGED) and
  1493. (dest.symbol=nil) and
  1494. ((dest.base=NR_R28) or
  1495. (dest.base=NR_R29)) and
  1496. (dest.Index=NR_No) and
  1497. (dest.Offset in [0..64-len])) and
  1498. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1499. begin
  1500. if not(SrcQuickRef) then
  1501. begin
  1502. tmpreg:=getaddressregister(list);
  1503. dstref:=normalize_ref(list,dest,tmpreg);
  1504. { X is used for spilling code so we can load it
  1505. only by a push/pop sequence, this can be
  1506. optimized later on by the peephole optimizer
  1507. }
  1508. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1509. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1510. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1511. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1512. dstref.base:=NR_R26;
  1513. end
  1514. else
  1515. dstref:=normalize_ref(list,dest,NR_R30);
  1516. end
  1517. else
  1518. begin
  1519. DestQuickRef:=true;
  1520. dstref:=dest;
  1521. end;
  1522. for i:=1 to len do
  1523. begin
  1524. if not(SrcQuickRef) and (i<len) then
  1525. srcref.addressmode:=AM_POSTINCREMENT
  1526. else
  1527. srcref.addressmode:=AM_UNCHANGED;
  1528. if not(DestQuickRef) and (i<len) then
  1529. dstref.addressmode:=AM_POSTINCREMENT
  1530. else
  1531. dstref.addressmode:=AM_UNCHANGED;
  1532. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1533. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1534. if SrcQuickRef then
  1535. inc(srcref.offset);
  1536. if DestQuickRef then
  1537. inc(dstref.offset);
  1538. end;
  1539. if not(SrcQuickRef) then
  1540. begin
  1541. ungetcpuregister(list,srcref.base);
  1542. ungetcpuregister(list,GetNextReg(srcref.base));
  1543. end;
  1544. end;
  1545. end;
  1546. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1547. var
  1548. hl : tasmlabel;
  1549. ai : taicpu;
  1550. cond : TAsmCond;
  1551. begin
  1552. if not(cs_check_overflow in current_settings.localswitches) then
  1553. exit;
  1554. current_asmdata.getjumplabel(hl);
  1555. if not ((def.typ=pointerdef) or
  1556. ((def.typ=orddef) and
  1557. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1558. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1559. cond:=C_VC
  1560. else
  1561. cond:=C_CC;
  1562. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1563. ai.SetCondition(cond);
  1564. ai.is_jmp:=true;
  1565. list.concat(ai);
  1566. a_call_name(list,'FPC_OVERFLOW',false);
  1567. a_label(list,hl);
  1568. end;
  1569. procedure tcgavr.g_save_registers(list: TAsmList);
  1570. begin
  1571. { this is done by the entry code }
  1572. end;
  1573. procedure tcgavr.g_restore_registers(list: TAsmList);
  1574. begin
  1575. { this is done by the exit code }
  1576. end;
  1577. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1578. var
  1579. ai1,ai2 : taicpu;
  1580. hl : TAsmLabel;
  1581. begin
  1582. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1583. ai1.is_jmp:=true;
  1584. hl:=nil;
  1585. case cond of
  1586. OC_EQ:
  1587. ai1.SetCondition(C_EQ);
  1588. OC_GT:
  1589. begin
  1590. { emulate GT }
  1591. current_asmdata.getjumplabel(hl);
  1592. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1593. ai2.SetCondition(C_EQ);
  1594. ai2.is_jmp:=true;
  1595. list.concat(ai2);
  1596. ai1.SetCondition(C_GE);
  1597. end;
  1598. OC_LT:
  1599. ai1.SetCondition(C_LT);
  1600. OC_GTE:
  1601. ai1.SetCondition(C_GE);
  1602. OC_LTE:
  1603. begin
  1604. { emulate LTE }
  1605. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1606. ai2.SetCondition(C_EQ);
  1607. ai2.is_jmp:=true;
  1608. list.concat(ai2);
  1609. ai1.SetCondition(C_LT);
  1610. end;
  1611. OC_NE:
  1612. ai1.SetCondition(C_NE);
  1613. OC_BE:
  1614. begin
  1615. { emulate BE }
  1616. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1617. ai2.SetCondition(C_EQ);
  1618. ai2.is_jmp:=true;
  1619. list.concat(ai2);
  1620. ai1.SetCondition(C_LO);
  1621. end;
  1622. OC_B:
  1623. ai1.SetCondition(C_LO);
  1624. OC_AE:
  1625. ai1.SetCondition(C_SH);
  1626. OC_A:
  1627. begin
  1628. { emulate A (unsigned GT) }
  1629. current_asmdata.getjumplabel(hl);
  1630. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1631. ai2.SetCondition(C_EQ);
  1632. ai2.is_jmp:=true;
  1633. list.concat(ai2);
  1634. ai1.SetCondition(C_SH);
  1635. end;
  1636. else
  1637. internalerror(2011082501);
  1638. end;
  1639. list.concat(ai1);
  1640. if assigned(hl) then
  1641. a_label(list,hl);
  1642. end;
  1643. procedure tcgavr.g_stackpointer_alloc(list: TAsmList; size: longint);
  1644. begin
  1645. internalerror(201201071);
  1646. end;
  1647. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1648. begin
  1649. internalerror(2011021324);
  1650. end;
  1651. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1652. var
  1653. instr: taicpu;
  1654. begin
  1655. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1656. list.Concat(instr);
  1657. { Notify the register allocator that we have written a move instruction so
  1658. it can try to eliminate it. }
  1659. add_move_instruction(instr);
  1660. end;
  1661. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1662. begin
  1663. if not(size in [OS_S64,OS_64]) then
  1664. internalerror(2012102402);
  1665. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1666. end;
  1667. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1668. begin
  1669. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1670. end;
  1671. procedure create_codegen;
  1672. begin
  1673. cg:=tcgavr.create;
  1674. cg64:=tcg64favr.create;
  1675. end;
  1676. end.