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aoptcpu.pas 32 KB

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  1. {
  2. Copyright (c) 1998-2004 by Jonas Maebe
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for sparc
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses
  22. cgbase, cpubase, aoptobj, aoptcpub, aopt, aasmtai, aasmcpu;
  23. Type
  24. TAsmOpSet = set of TAsmOp;
  25. TCpuAsmOptimizer = class(TAsmOptimizer)
  26. function RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean; override;
  27. function GetNextInstructionUsingReg(Current: tai;
  28. var Next: tai; reg: TRegister): Boolean;
  29. function TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  30. function TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  31. function TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2; override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,globtype,globals,aasmbase,cpuinfo,verbose;
  38. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  39. begin
  40. result :=
  41. (instr.typ = ait_instruction) and
  42. (taicpu(instr).opcode = op);
  43. end;
  44. function MatchOperand(const oper: TOper; reg: TRegister): boolean;
  45. begin
  46. result:=(oper.typ=top_reg) and (oper.reg=reg);
  47. end;
  48. function IsSameReg(this,next: taicpu): boolean;
  49. begin
  50. result:=(next.oper[0]^.typ=top_reg) and
  51. (next.oper[1]^.typ=top_reg) and
  52. (next.oper[0]^.reg=next.oper[1]^.reg) and
  53. (next.oper[0]^.reg=this.oper[0]^.reg);
  54. end;
  55. function regLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  56. var
  57. p: taicpu;
  58. begin
  59. p:=taicpu(hp);
  60. result:=false;
  61. if not ((assigned(hp)) and (hp.typ=ait_instruction)) then
  62. exit;
  63. case p.opcode of
  64. { These instructions do not write into a register at all }
  65. A_NOP,
  66. A_C_EQ_D,A_C_EQ_S,A_C_LE_D,A_C_LE_S,A_C_LT_D,A_C_LT_S,
  67. A_BA,A_BC,
  68. A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
  69. exit;
  70. end;
  71. result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
  72. (p.oper[0]^.reg=reg);
  73. end;
  74. function CanBeCMOV(p: tai; condreg: tregister): boolean;
  75. begin
  76. result:=assigned(p) and (p.typ=ait_instruction) and
  77. ((taicpu(p).opcode in [A_MOV_D,A_MOV_S]) or
  78. (
  79. { register with condition must not be overwritten }
  80. (taicpu(p).opcode=A_MOVE) and
  81. (taicpu(p).oper[0]^.reg<>condreg)
  82. ));
  83. end;
  84. procedure ChangeToCMOV(p: taicpu; cond: tasmcond; reg: tregister);
  85. begin
  86. case cond of
  87. C_COP1TRUE:
  88. case p.opcode of
  89. A_MOV_D: p.opcode:=A_MOVT_D;
  90. A_MOV_S: p.opcode:=A_MOVT_S;
  91. A_MOVE: p.opcode:=A_MOVT;
  92. else
  93. InternalError(2014061701);
  94. end;
  95. C_COP1FALSE:
  96. case p.opcode of
  97. A_MOV_D: p.opcode:=A_MOVF_D;
  98. A_MOV_S: p.opcode:=A_MOVF_S;
  99. A_MOVE: p.opcode:=A_MOVF;
  100. else
  101. InternalError(2014061702);
  102. end;
  103. C_EQ:
  104. case p.opcode of
  105. A_MOV_D: p.opcode:=A_MOVZ_D;
  106. A_MOV_S: p.opcode:=A_MOVZ_S;
  107. A_MOVE: p.opcode:=A_MOVZ;
  108. else
  109. InternalError(2014061703);
  110. end;
  111. C_NE:
  112. case p.opcode of
  113. A_MOV_D: p.opcode:=A_MOVN_D;
  114. A_MOV_S: p.opcode:=A_MOVN_S;
  115. A_MOVE: p.opcode:=A_MOVN;
  116. else
  117. InternalError(2014061704);
  118. end;
  119. else
  120. InternalError(2014061705);
  121. end;
  122. p.ops:=3;
  123. p.loadreg(2,reg);
  124. end;
  125. function instructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  126. var
  127. p: taicpu;
  128. i: longint;
  129. begin
  130. result:=false;
  131. if not (assigned(hp) and (hp.typ=ait_instruction)) then
  132. exit;
  133. p:=taicpu(hp);
  134. i:=1;
  135. while(i<p.ops) do
  136. begin
  137. case p.oper[I]^.typ of
  138. top_reg:
  139. result:=(p.oper[I]^.reg=reg) and (I<2);
  140. top_ref:
  141. result:=
  142. (p.oper[I]^.ref^.base=reg) or
  143. (p.oper[I]^.ref^.index=reg);
  144. end;
  145. if result then exit; {Bailout if we found something}
  146. Inc(I);
  147. end;
  148. end;
  149. function TCpuAsmOptimizer.RegModifiedByInstruction(Reg: TRegister; p1: tai): boolean;
  150. var
  151. i : Longint;
  152. begin
  153. result:=false;
  154. for i:=0 to taicpu(p1).ops-1 do
  155. if (taicpu(p1).oper[i]^.typ=top_reg) and (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
  156. begin
  157. result:=true;
  158. exit;
  159. end;
  160. end;
  161. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  162. var Next: tai; reg: TRegister): Boolean;
  163. begin
  164. Next:=Current;
  165. repeat
  166. Result:=GetNextInstruction(Next,Next);
  167. until {not(cs_opt_level3 in current_settings.optimizerswitches) or} not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  168. (is_calljmp(taicpu(Next).opcode));
  169. if Result and (next.typ=ait_instruction) and is_calljmp(taicpu(next).opcode) then
  170. begin
  171. result:=false;
  172. next:=nil;
  173. end;
  174. end;
  175. function TCpuAsmOptimizer.TryRemoveMov(var p: tai; opcode: TAsmOp): boolean;
  176. var
  177. next,hp1: tai;
  178. alloc,dealloc: tai_regalloc;
  179. begin
  180. { Fold
  181. op $reg1,...
  182. opcode $reg2,$reg1
  183. dealloc $reg1
  184. into
  185. op $reg2,...
  186. opcode may be A_MOVE, A_MOV_s, A_MOV_d, etc.
  187. }
  188. result:=false;
  189. if (taicpu(p).ops>0) and
  190. GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  191. MatchInstruction(next,opcode) and
  192. MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  193. { the destination register of mov cannot be used between p and next }
  194. (not RegUsedBetween(taicpu(next).oper[0]^.reg,p,next)) then
  195. begin
  196. dealloc:=FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.Next));
  197. if assigned(dealloc) then
  198. begin
  199. { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
  200. and remove it if possible }
  201. GetLastInstruction(p,hp1);
  202. asml.Remove(dealloc);
  203. alloc:=FindRegAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  204. if assigned(alloc) then
  205. begin
  206. asml.Remove(alloc);
  207. alloc.free;
  208. dealloc.free;
  209. end
  210. else
  211. asml.InsertAfter(dealloc,p);
  212. { try to move the allocation of the target register }
  213. GetLastInstruction(next,hp1);
  214. alloc:=FindRegAlloc(taicpu(next).oper[0]^.reg,tai(hp1.Next));
  215. if assigned(alloc) then
  216. begin
  217. asml.Remove(alloc);
  218. asml.InsertBefore(alloc,p);
  219. { adjust used regs }
  220. IncludeRegInUsedRegs(taicpu(next).oper[0]^.reg,UsedRegs);
  221. end;
  222. { finally get rid of the mov }
  223. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  224. asml.remove(next);
  225. next.free;
  226. result:=true;
  227. end
  228. else // no dealloc found
  229. begin
  230. { try to optimize the typical call sequence
  231. lw $reg, (whatever)
  232. <alloc volatile registers>
  233. move $t9,$reg
  234. jalr $t9
  235. Do not do so if the used register might contain a
  236. register variable. }
  237. if (opcode=A_MOVE) and
  238. not(cs_opt_regvar in current_settings.optimizerswitches) and
  239. (taicpu(next).oper[0]^.reg=NR_R25) and
  240. GetNextInstruction(next,hp1) and
  241. MatchInstruction(hp1,A_JALR) and
  242. MatchOperand(taicpu(hp1).oper[0]^,NR_R25) then
  243. begin
  244. taicpu(p).loadreg(0,taicpu(next).oper[0]^.reg);
  245. asml.remove(next);
  246. next.free;
  247. result:=true;
  248. end;
  249. end;
  250. end;
  251. end;
  252. function TCpuAsmOptimizer.TryRemoveMovBeforeStore(var p: tai; next: taicpu; const storeops: TAsmOpSet): boolean;
  253. begin
  254. result:=(next.opcode in storeops) and
  255. MatchOperand(next.oper[0]^,taicpu(p).oper[0]^.reg) and
  256. { Ry cannot be modified between move and store }
  257. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  258. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  259. if result then
  260. begin
  261. next.loadreg(0,taicpu(p).oper[1]^.reg);
  262. asml.remove(p);
  263. p.free;
  264. p:=next;
  265. end;
  266. end;
  267. function TCpuAsmOptimizer.TryRemoveMovToRefIndex(var p: tai; next: taicpu): boolean;
  268. begin
  269. result:=(next.oper[1]^.typ=top_ref) and
  270. (next.oper[1]^.ref^.base=taicpu(p).oper[0]^.reg) and
  271. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  272. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next)));
  273. if result then
  274. begin
  275. next.oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  276. asml.remove(p);
  277. p.free;
  278. p:=next;
  279. end;
  280. end;
  281. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  282. var
  283. next,next2: tai;
  284. begin
  285. result:=false;
  286. case p.typ of
  287. ait_instruction:
  288. begin
  289. case taicpu(p).opcode of
  290. A_SEH:
  291. begin
  292. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  293. MatchInstruction(next,A_SH) and
  294. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) and
  295. (not RegUsedBetween(taicpu(p).oper[1]^.reg,p,next)) and
  296. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  297. begin
  298. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  299. asml.remove(p);
  300. p.free;
  301. p:=next;
  302. end
  303. else
  304. TryRemoveMov(p,A_MOVE);
  305. end;
  306. A_SEB:
  307. { TODO: can be handled similar to A_SEH, but it's almost never encountered }
  308. TryRemoveMov(p,A_MOVE);
  309. A_SLL:
  310. begin
  311. { if this is a sign extension... }
  312. if (taicpu(p).oper[2]^.typ=top_const) and
  313. GetNextInstruction(p,next) and
  314. MatchInstruction(next,A_SRA) and
  315. IsSameReg(taicpu(p),taicpu(next)) and
  316. (taicpu(next).oper[2]^.typ=top_const) and
  317. (taicpu(next).oper[2]^.val=taicpu(p).oper[2]^.val) and
  318. (taicpu(next).oper[2]^.val=16) and
  319. { ...followed by 16-bit store (possibly with PIC simplification, etc. in between) }
  320. GetNextInstructionUsingReg(next,next2,taicpu(p).oper[0]^.reg) and
  321. MatchInstruction(next2,A_SH) and
  322. (taicpu(next2).oper[0]^.typ=top_reg) and
  323. (taicpu(next2).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  324. { the initial register may not be reused }
  325. (not RegUsedBetween(taicpu(p).oper[1]^.reg,next,next2)) then
  326. begin
  327. if Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next2.next))) then
  328. begin
  329. taicpu(next2).loadreg(0,taicpu(p).oper[1]^.reg);
  330. asml.remove(p);
  331. asml.remove(next);
  332. p.free;
  333. next.free;
  334. p:=next2;
  335. end;
  336. end
  337. else
  338. TryRemoveMov(p,A_MOVE);
  339. end;
  340. A_SRL:
  341. begin
  342. { TODO: also kill sign-extensions that follow, both SLL+SRA and SEB/SEH versions }
  343. { Remove 'andi' in sequences
  344. srl Rx,Ry,16
  345. andi Rx,Rx,65535
  346. srl Rx,Ry,24
  347. andi Rx,Rx,255
  348. since 'srl' clears all relevant upper bits }
  349. if (taicpu(p).oper[2]^.typ=top_const) and
  350. GetNextInstruction(p,next) and
  351. MatchInstruction(next,A_ANDI) and
  352. IsSameReg(taicpu(p),taicpu(next)) and
  353. (taicpu(next).oper[2]^.typ=top_const) and
  354. ((
  355. (taicpu(p).oper[2]^.val>=16) and
  356. (taicpu(next).oper[2]^.val=65535)
  357. ) or (
  358. (taicpu(p).oper[2]^.val>=24) and
  359. (taicpu(next).oper[2]^.val=255)
  360. )) then
  361. begin
  362. asml.remove(next);
  363. next.free;
  364. end
  365. else
  366. TryRemoveMov(p,A_MOVE);
  367. end;
  368. A_ANDI:
  369. begin
  370. { Remove sign extension after 'andi' if bit 7/15 of const operand is clear }
  371. if (taicpu(p).oper[2]^.typ=top_const) and
  372. GetNextInstruction(p,next) and
  373. MatchInstruction(next,A_SLL) and
  374. GetNextInstruction(next,next2) and
  375. MatchInstruction(next2,A_SRA) and
  376. IsSameReg(taicpu(p),taicpu(next)) and
  377. IsSameReg(taicpu(p),taicpu(next2)) and
  378. (taicpu(next).oper[2]^.typ=top_const) and
  379. (taicpu(next2).oper[2]^.typ=top_const) and
  380. (taicpu(next).oper[2]^.val=taicpu(next2).oper[2]^.val) and
  381. ((
  382. (taicpu(p).oper[2]^.val<=$7fff) and
  383. (taicpu(next).oper[2]^.val=16)
  384. ) or (
  385. (taicpu(p).oper[2]^.val<=$7f) and
  386. (taicpu(next).oper[2]^.val=24)
  387. )) then
  388. begin
  389. asml.remove(next);
  390. asml.remove(next2);
  391. next.free;
  392. next2.free;
  393. end
  394. { Remove zero extension if register is used only for byte/word memory store }
  395. else if (taicpu(p).oper[2]^.typ=top_const) and
  396. GetNextInstruction(p,next) and
  397. ((taicpu(p).oper[2]^.val=255) and MatchInstruction(next,A_SB)) or
  398. ((taicpu(p).oper[2]^.val=65535) and MatchInstruction(next,A_SH)) and
  399. (taicpu(next).oper[0]^.typ=top_reg) and
  400. (taicpu(next).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  401. assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  402. begin
  403. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  404. asml.remove(p);
  405. p.free;
  406. p:=next;
  407. end
  408. else
  409. TryRemoveMov(p,A_MOVE);
  410. end;
  411. A_MOV_S:
  412. begin
  413. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  414. (next.typ=ait_instruction) then
  415. begin
  416. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SWC1]) then
  417. { optimization successful };
  418. end;
  419. end;
  420. A_MOV_D:
  421. begin
  422. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  423. (next.typ=ait_instruction) then
  424. begin
  425. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SDC1]) then
  426. { optimization successful };
  427. end;
  428. end;
  429. A_MOVE:
  430. begin
  431. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  432. (next.typ=ait_instruction) and
  433. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  434. begin
  435. { MOVE Rx,Ry; store Rx,(ref); dealloc Rx ==> store Ry,(ref) }
  436. if TryRemoveMovBeforeStore(p,taicpu(next),[A_SB,A_SH,A_SW]) then
  437. { optimization successful }
  438. else if TryRemoveMovToRefIndex(p,taicpu(next)) then
  439. { successful as well }
  440. { MOVE Rx,Ry; opcode Rx,Rx,any ==> opcode Rx,Ry,any
  441. MOVE Rx,Ry; opcode Rx,Rz,Rx ==> opcode Rx,Rz,Ry }
  442. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU]) and
  443. MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  444. begin
  445. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) and
  446. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  447. begin
  448. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  449. asml.remove(p);
  450. p.free;
  451. p:=next;
  452. end
  453. { TODO: if Ry=NR_R0, this effectively changes instruction into MOVE,
  454. providing further optimization possibilities }
  455. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) and
  456. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  457. begin
  458. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  459. asml.remove(p);
  460. p.free;
  461. p:=next;
  462. end;
  463. end
  464. { MOVE Rx,Ry; opcode Rz,Rx,any; dealloc Rx ==> opcode Rz,Ry,any }
  465. else if (taicpu(next).opcode in [A_ADD,A_ADDU,A_ADDI,A_ADDIU,A_SUB,A_SUBU,A_SLT,A_SLTU,A_DIV,A_DIVU]) and
  466. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  467. begin
  468. if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  469. begin
  470. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  471. asml.remove(p);
  472. p.free;
  473. p:=next;
  474. end
  475. else if MatchOperand(taicpu(next).oper[2]^,taicpu(p).oper[0]^.reg) then
  476. begin
  477. taicpu(next).loadreg(2,taicpu(p).oper[1]^.reg);
  478. asml.remove(p);
  479. p.free;
  480. p:=next;
  481. end;
  482. end
  483. { MULT[U] must be handled separately due to different operand numbers }
  484. else if (taicpu(next).opcode in [A_MULT,A_MULTU]) and
  485. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) then
  486. begin
  487. if MatchOperand(taicpu(next).oper[0]^,taicpu(p).oper[0]^.reg) then
  488. begin
  489. taicpu(next).loadreg(0,taicpu(p).oper[1]^.reg);
  490. asml.remove(p);
  491. p.free;
  492. p:=next;
  493. end
  494. else if MatchOperand(taicpu(next).oper[1]^,taicpu(p).oper[0]^.reg) then
  495. begin
  496. taicpu(next).loadreg(1,taicpu(p).oper[1]^.reg);
  497. asml.remove(p);
  498. p.free;
  499. p:=next;
  500. end;
  501. end
  502. else if TryRemoveMov(p,A_MOVE) then
  503. begin
  504. { Ended up with move between same register? Suicide then. }
  505. if (taicpu(p).oper[0]^.reg=taicpu(p).oper[1]^.reg) then
  506. begin
  507. GetNextInstruction(p,next);
  508. asml.remove(p);
  509. p.free;
  510. p:=next;
  511. end;
  512. end;
  513. { TODO: MOVE Rx,Ry; Bcc Rx,Rz,label; dealloc Rx ==> Bcc Ry,Rz,label }
  514. end;
  515. end;
  516. A_ADDIU:
  517. begin
  518. { ADDIU Rx,Ry,const; load/store Rz,(Rx); dealloc Rx ==> load/store Rz,const(Ry)
  519. ADDIU Rx,Ry,%lo(sym); load/store Rz,(Rx); dealloc Rx ==> load/store Rz,%lo(sym)(Ry)
  520. ADDIU Rx,Ry,const; load Rx,(Rx) ==> load Rx,const(Ry)
  521. ADDIU Rx,Ry,%lo(sym); load Rx,(Rx) ==> load Rx,%lo(sym)(Ry) }
  522. if GetNextInstructionUsingReg(p,next,taicpu(p).oper[0]^.reg) and
  523. (next.typ=ait_instruction) and
  524. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW,A_SB,A_SH,A_SW]) and
  525. (taicpu(p).oper[0]^.reg=taicpu(next).oper[1]^.ref^.base) and
  526. (taicpu(next).oper[1]^.ref^.offset=0) and
  527. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  528. (
  529. Assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(next.next))) or
  530. (
  531. (taicpu(p).oper[0]^.reg=taicpu(next).oper[0]^.reg) and
  532. (taicpu(next).opcode in [A_LB,A_LBU,A_LH,A_LHU,A_LW])
  533. )
  534. ) and
  535. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,next)) then
  536. begin
  537. case taicpu(p).oper[2]^.typ of
  538. top_const:
  539. taicpu(next).oper[1]^.ref^.offset:=taicpu(p).oper[2]^.val;
  540. top_ref:
  541. taicpu(next).oper[1]^.ref^:=taicpu(p).oper[2]^.ref^;
  542. else
  543. InternalError(2014100401);
  544. end;
  545. taicpu(next).oper[1]^.ref^.base:=taicpu(p).oper[1]^.reg;
  546. asml.remove(p);
  547. p.free;
  548. p:=next;
  549. result:=true;
  550. end
  551. else
  552. result:=TryRemoveMov(p,A_MOVE);
  553. end;
  554. A_LB,A_LBU,A_LH,A_LHU,A_LW,
  555. A_ADD,A_ADDU,
  556. A_ADDI,
  557. A_SUB,A_SUBU,
  558. A_SRA,A_SRAV,
  559. A_SRLV,
  560. A_SLLV,
  561. A_MFLO,A_MFHI,
  562. A_AND,A_OR,A_XOR,A_ORI,A_XORI:
  563. TryRemoveMov(p,A_MOVE);
  564. A_LWC1,
  565. A_ADD_s, A_SUB_s, A_MUL_s, A_DIV_s,
  566. A_ABS_s, A_NEG_s, A_SQRT_s,
  567. A_CVT_s_w, A_CVT_s_l, A_CVT_s_d:
  568. TryRemoveMov(p,A_MOV_s);
  569. A_LDC1,
  570. A_ADD_d, A_SUB_d, A_MUL_d, A_DIV_d,
  571. A_ABS_d, A_NEG_d, A_SQRT_d,
  572. A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
  573. TryRemoveMov(p,A_MOV_d);
  574. end;
  575. end;
  576. end;
  577. end;
  578. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  579. var
  580. p: tai;
  581. l: longint;
  582. hp1,hp2,hp3: tai;
  583. condition: tasmcond;
  584. condreg: tregister;
  585. begin
  586. { Currently, everything below is mips4+ }
  587. if (current_settings.cputype<cpu_mips4) then
  588. exit;
  589. p:=BlockStart;
  590. ClearUsedRegs;
  591. while (p<>BlockEnd) Do
  592. begin
  593. UpdateUsedRegs(tai(p.next));
  594. case p.typ of
  595. ait_instruction:
  596. begin
  597. case taicpu(p).opcode of
  598. A_BC:
  599. begin
  600. condreg:=NR_NO;
  601. if (taicpu(p).condition in [C_COP1TRUE,C_COP1FALSE]) then
  602. { TODO: must be taken from "p" if/when codegen makes use of multiple %fcc }
  603. condreg:=NR_FCC0
  604. else if (taicpu(p).condition in [C_EQ,C_NE]) then
  605. begin
  606. if (taicpu(p).oper[0]^.reg=NR_R0) then
  607. condreg:=taicpu(p).oper[1]^.reg
  608. else if (taicpu(p).oper[1]^.reg=NR_R0) then
  609. condreg:=taicpu(p).oper[0]^.reg
  610. end;
  611. if (condreg<>NR_NO) then
  612. begin
  613. { check for
  614. bCC xxx
  615. <several movs>
  616. xxx:
  617. }
  618. l:=0;
  619. GetNextInstruction(p, hp1);
  620. while CanBeCMOV(hp1,condreg) do // CanBeCMOV returns False for nil or labels
  621. begin
  622. inc(l);
  623. GetNextInstruction(hp1,hp1);
  624. end;
  625. if assigned(hp1) then
  626. begin
  627. if FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  628. begin
  629. if (l<=4) and (l>0) then
  630. begin
  631. condition:=inverse_cond(taicpu(p).condition);
  632. hp2:=p;
  633. GetNextInstruction(p,hp1);
  634. p:=hp1;
  635. repeat
  636. ChangeToCMOV(taicpu(hp1),condition,condreg);
  637. GetNextInstruction(hp1,hp1);
  638. until not CanBeCMOV(hp1,condreg);
  639. { wait with removing else GetNextInstruction could
  640. ignore the label if it was the only usage in the
  641. jump moved away }
  642. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  643. RemoveDelaySlot(hp2);
  644. asml.remove(hp2);
  645. hp2.free;
  646. continue;
  647. end;
  648. end
  649. else
  650. begin
  651. { check further for
  652. bCC xxx
  653. <several movs 1>
  654. b yyy
  655. xxx:
  656. <several movs 2>
  657. yyy:
  658. }
  659. { hp2 points to jmp yyy }
  660. hp2:=hp1;
  661. { skip hp1 to xxx }
  662. GetNextInstruction(hp1, hp1);
  663. if assigned(hp2) and
  664. assigned(hp1) and
  665. (l<=3) and
  666. (hp2.typ=ait_instruction) and
  667. (taicpu(hp2).opcode=A_BA) and
  668. { real label and jump, no further references to the
  669. label are allowed }
  670. (tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol).getrefs<=2) and
  671. FindLabel(tasmlabel(taicpu(p).oper[taicpu(p).ops-1]^.ref^.symbol),hp1) then
  672. begin
  673. l:=0;
  674. { skip hp1 to <several moves 2> }
  675. GetNextInstruction(hp1, hp1);
  676. while CanBeCMOV(hp1,condreg) do
  677. begin
  678. inc(l);
  679. GetNextInstruction(hp1, hp1);
  680. end;
  681. { hp1 points to yyy: }
  682. if assigned(hp1) and
  683. FindLabel(tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol),hp1) then
  684. begin
  685. condition:=inverse_cond(taicpu(p).condition);
  686. GetNextInstruction(p,hp1);
  687. hp3:=p;
  688. p:=hp1;
  689. repeat
  690. ChangeToCMOV(taicpu(hp1),condition,condreg);
  691. GetNextInstruction(hp1,hp1);
  692. until not CanBeCMOV(hp1,condreg);
  693. { hp2 is still at b yyy }
  694. GetNextInstruction(hp2,hp1);
  695. { hp2 is now at xxx: }
  696. condition:=inverse_cond(condition);
  697. GetNextInstruction(hp1,hp1);
  698. { hp1 is now at <several movs 2> }
  699. repeat
  700. ChangeToCMOV(taicpu(hp1),condition,condreg);
  701. GetNextInstruction(hp1,hp1);
  702. until not CanBeCMOV(hp1,condreg);
  703. { remove bCC }
  704. tasmlabel(taicpu(hp3).oper[taicpu(hp3).ops-1]^.ref^.symbol).decrefs;
  705. RemoveDelaySlot(hp3);
  706. asml.remove(hp3);
  707. hp3.free;
  708. { remove jmp }
  709. tasmlabel(taicpu(hp2).oper[taicpu(hp2).ops-1]^.ref^.symbol).decrefs;
  710. RemoveDelaySlot(hp2);
  711. asml.remove(hp2);
  712. hp2.free;
  713. continue;
  714. end;
  715. end;
  716. end;
  717. end;
  718. end;
  719. end;
  720. end;
  721. end;
  722. end;
  723. UpdateUsedRegs(p);
  724. p:=tai(p.next);
  725. end;
  726. end;
  727. begin
  728. casmoptimizer:=TCpuAsmOptimizer;
  729. end.