aoptcpu.pas 41 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode);
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result:=oper1.typ=oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op);
  83. end;
  84. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  85. begin
  86. result :=
  87. (instr.typ = ait_instruction) and
  88. (taicpu(instr).opcode in ops);
  89. end;
  90. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  91. begin
  92. result :=
  93. (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode in ops) and
  95. (taicpu(instr).ops=opcount);
  96. end;
  97. {$ifdef DEBUG_AOPTCPU}
  98. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  99. begin
  100. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  101. end;
  102. {$else DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  104. begin
  105. end;
  106. {$endif DEBUG_AOPTCPU}
  107. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  108. begin
  109. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  110. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  111. Result:=true
  112. else
  113. Result:=inherited RegInInstruction(Reg, p1);
  114. end;
  115. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  116. var Next: tai; reg: TRegister): Boolean;
  117. begin
  118. Next:=Current;
  119. repeat
  120. Result:=GetNextInstruction(Next,Next);
  121. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  122. (is_calljmp(taicpu(Next).opcode));
  123. end;
  124. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  125. var
  126. p: taicpu;
  127. begin
  128. if not assigned(hp) or
  129. (hp.typ <> ait_instruction) then
  130. begin
  131. Result := false;
  132. exit;
  133. end;
  134. p := taicpu(hp);
  135. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  136. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  137. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  138. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  139. end;
  140. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  141. var
  142. p: taicpu;
  143. i: longint;
  144. begin
  145. Result := false;
  146. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  147. exit;
  148. p:=taicpu(hp);
  149. i:=0;
  150. { we do not care about the stack pointer }
  151. if p.opcode in [A_POP] then
  152. exit;
  153. { first operand only written?
  154. then skip it }
  155. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  156. i:=1;
  157. while i<p.ops do
  158. begin
  159. case p.oper[i]^.typ of
  160. top_reg:
  161. Result := (p.oper[i]^.reg = reg) or
  162. { MOVW }
  163. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  164. top_ref:
  165. Result :=
  166. (p.oper[i]^.ref^.base = reg) or
  167. (p.oper[i]^.ref^.index = reg);
  168. end;
  169. { Bailout if we found something }
  170. if Result then
  171. exit;
  172. Inc(i);
  173. end;
  174. end;
  175. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  176. var
  177. hp1,hp2,hp3,hp4,hp5: tai;
  178. alloc, dealloc: tai_regalloc;
  179. i: integer;
  180. l: TAsmLabel;
  181. TmpUsedRegs : TAllUsedRegs;
  182. begin
  183. result := false;
  184. case p.typ of
  185. ait_instruction:
  186. begin
  187. {
  188. change
  189. <op> reg,x,y
  190. cp reg,r1
  191. into
  192. <op>s reg,x,y
  193. }
  194. { this optimization can applied only to the currently enabled operations because
  195. the other operations do not update all flags and FPC does not track flag usage }
  196. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  197. A_INC,A_LSL,A_LSR,
  198. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  199. GetNextInstruction(p, hp1) and
  200. ((MatchInstruction(hp1, A_CP) and
  201. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  202. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  203. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  204. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  205. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  206. A_LSL,A_LSR,
  207. A_OR,A_ORI,A_ROL,A_ROR])))) or
  208. (MatchInstruction(hp1, A_CPI) and
  209. (taicpu(p).opcode = A_ANDI) and
  210. (taicpu(p).oper[1]^.typ=top_const) and
  211. (taicpu(hp1).oper[1]^.typ=top_const) and
  212. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  213. GetNextInstruction(hp1, hp2) and
  214. { be careful here, following instructions could use other flags
  215. however after a jump fpc never depends on the value of flags }
  216. { All above instructions set Z and N according to the following
  217. Z := result = 0;
  218. N := result[31];
  219. EQ = Z=1; NE = Z=0;
  220. MI = N=1; PL = N=0; }
  221. MatchInstruction(hp2, A_BRxx) and
  222. (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) { and
  223. no flag allocation tracking implemented yet on avr
  224. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  225. begin
  226. { move flag allocation if possible }
  227. { no flag allocation tracking implemented yet on avr
  228. GetLastInstruction(hp1, hp2);
  229. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  230. if assigned(hp2) then
  231. begin
  232. asml.Remove(hp2);
  233. asml.insertbefore(hp2, p);
  234. end;
  235. }
  236. // If we compare to the same value we are masking then invert the comparison
  237. if (taicpu(hp1).opcode=A_CPI) then
  238. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  239. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  240. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  241. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  242. DebugMsg('Peephole OpCp2Op performed', p);
  243. asml.remove(hp1);
  244. hp1.free;
  245. Result:=true;
  246. end
  247. else
  248. case taicpu(p).opcode of
  249. A_LDI:
  250. begin
  251. { turn
  252. ldi reg0, imm
  253. cp/mov reg1, reg0
  254. dealloc reg0
  255. into
  256. cpi/ldi reg1, imm
  257. }
  258. if MatchOpType(taicpu(p),top_reg,top_const) and
  259. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  260. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  261. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  262. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  263. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  264. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  265. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  266. begin
  267. CopyUsedRegs(TmpUsedRegs);
  268. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  269. begin
  270. case taicpu(hp1).opcode of
  271. A_CP:
  272. taicpu(hp1).opcode:=A_CPI;
  273. A_MOV:
  274. taicpu(hp1).opcode:=A_LDI;
  275. else
  276. internalerror(2016111901);
  277. end;
  278. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  279. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  280. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  281. if assigned(alloc) and assigned(dealloc) then
  282. begin
  283. asml.Remove(alloc);
  284. alloc.Free;
  285. asml.Remove(dealloc);
  286. dealloc.Free;
  287. end;
  288. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  289. GetNextInstruction(p,hp1);
  290. asml.Remove(p);
  291. p.Free;
  292. p:=hp1;
  293. end;
  294. ReleaseUsedRegs(TmpUsedRegs);
  295. end;
  296. end;
  297. A_STS:
  298. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  299. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  300. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  301. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  302. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  303. (taicpu(p).oper[0]^.ref^.offset>=32) and
  304. (taicpu(p).oper[0]^.ref^.offset<=95) then
  305. begin
  306. DebugMsg('Peephole Sts2Out performed', p);
  307. taicpu(p).opcode:=A_OUT;
  308. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  309. end;
  310. A_LDS:
  311. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  312. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  313. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  314. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  315. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  316. (taicpu(p).oper[1]^.ref^.offset>=32) and
  317. (taicpu(p).oper[1]^.ref^.offset<=95) then
  318. begin
  319. DebugMsg('Peephole Lds2In performed', p);
  320. taicpu(p).opcode:=A_IN;
  321. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  322. end;
  323. A_IN:
  324. if GetNextInstruction(p,hp1) then
  325. begin
  326. {
  327. in rX,Y
  328. ori rX,n
  329. out Y,rX
  330. into
  331. sbi rX,lg(n)
  332. }
  333. if (taicpu(p).oper[1]^.val<=31) and
  334. MatchInstruction(hp1,A_ORI) and
  335. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  336. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  337. GetNextInstruction(hp1,hp2) and
  338. MatchInstruction(hp2,A_OUT) and
  339. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  340. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  341. begin
  342. DebugMsg('Peephole InOriOut2Sbi performed', p);
  343. taicpu(p).opcode:=A_SBI;
  344. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  345. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  346. asml.Remove(hp1);
  347. hp1.Free;
  348. asml.Remove(hp2);
  349. hp2.Free;
  350. result:=true;
  351. end
  352. {
  353. in rX,Y
  354. andi rX,not(n)
  355. out Y,rX
  356. into
  357. cbi rX,lg(n)
  358. }
  359. else if (taicpu(p).oper[1]^.val<=31) and
  360. MatchInstruction(hp1,A_ANDI) and
  361. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  362. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  363. GetNextInstruction(hp1,hp2) and
  364. MatchInstruction(hp2,A_OUT) and
  365. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  366. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  367. begin
  368. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  369. taicpu(p).opcode:=A_CBI;
  370. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  371. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  372. asml.Remove(hp1);
  373. hp1.Free;
  374. asml.Remove(hp2);
  375. hp2.Free;
  376. result:=true;
  377. end
  378. {
  379. in rX,Y
  380. andi rX,n
  381. breq/brne L1
  382. into
  383. sbis/sbic Y,lg(n)
  384. jmp L1
  385. .Ltemp:
  386. }
  387. else if (taicpu(p).oper[1]^.val<=31) and
  388. MatchInstruction(hp1,A_ANDI) and
  389. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  390. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  391. GetNextInstruction(hp1,hp2) and
  392. MatchInstruction(hp2,A_BRxx) and
  393. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  394. begin
  395. if taicpu(hp2).condition=C_EQ then
  396. taicpu(p).opcode:=A_SBIS
  397. else
  398. taicpu(p).opcode:=A_SBIC;
  399. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  400. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  401. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  402. asml.Remove(hp1);
  403. hp1.Free;
  404. taicpu(hp2).condition:=C_None;
  405. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  406. taicpu(hp2).opcode:=A_JMP
  407. else
  408. taicpu(hp2).opcode:=A_RJMP;
  409. current_asmdata.getjumplabel(l);
  410. l.increfs;
  411. asml.InsertAfter(tai_label.create(l), hp2);
  412. result:=true;
  413. end;
  414. end;
  415. A_ANDI:
  416. begin
  417. {
  418. Turn
  419. andi rx, #pow2
  420. brne l
  421. <op>
  422. l:
  423. Into
  424. sbrs rx, #(1 shl imm)
  425. <op>
  426. l:
  427. }
  428. if (taicpu(p).ops=2) and
  429. (taicpu(p).oper[1]^.typ=top_const) and
  430. ispowerof2(taicpu(p).oper[1]^.val,i) and
  431. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  432. GetNextInstruction(p,hp1) and
  433. (hp1.typ=ait_instruction) and
  434. (taicpu(hp1).opcode=A_BRxx) and
  435. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  436. (taicpu(hp1).ops>0) and
  437. (taicpu(hp1).oper[0]^.typ = top_ref) and
  438. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  439. GetNextInstruction(hp1,hp2) and
  440. (hp2.typ=ait_instruction) and
  441. GetNextInstruction(hp2,hp3) and
  442. (hp3.typ=ait_label) and
  443. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  444. begin
  445. DebugMsg('Peephole AndiBr2Sbr performed', p);
  446. taicpu(p).oper[1]^.val:=i;
  447. if taicpu(hp1).condition=C_NE then
  448. taicpu(p).opcode:=A_SBRS
  449. else
  450. taicpu(p).opcode:=A_SBRC;
  451. asml.Remove(hp1);
  452. hp1.free;
  453. result:=true;
  454. end
  455. {
  456. Remove
  457. andi rx, #y
  458. dealloc rx
  459. }
  460. else if (taicpu(p).ops=2) and
  461. (taicpu(p).oper[0]^.typ=top_reg) and
  462. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  463. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  464. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  465. begin
  466. DebugMsg('Redundant Andi removed', p);
  467. GetNextInstruction(p,hp1);
  468. AsmL.Remove(p);
  469. p.free;
  470. p:=hp1;
  471. result:=true;
  472. end;
  473. end;
  474. A_CLR:
  475. begin
  476. { turn the common
  477. clr rX
  478. mov/ld rX, rY
  479. into
  480. mov/ld rX, rY
  481. }
  482. if (taicpu(p).ops=1) and
  483. (taicpu(p).oper[0]^.typ=top_reg) and
  484. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  485. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  486. (hp1.typ=ait_instruction) and
  487. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  488. (taicpu(hp1).ops>0) and
  489. (taicpu(hp1).oper[0]^.typ=top_reg) and
  490. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  491. begin
  492. DebugMsg('Peephole ClrMov2Mov performed', p);
  493. asml.Remove(p);
  494. p.Free;
  495. p:=hp1;
  496. result:=true;
  497. end
  498. { turn
  499. clr rX
  500. ...
  501. adc rY, rX
  502. into
  503. ...
  504. adc rY, r1
  505. }
  506. else if (taicpu(p).ops=1) and
  507. (taicpu(p).oper[0]^.typ=top_reg) and
  508. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  509. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  510. (hp1.typ=ait_instruction) and
  511. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  512. (taicpu(hp1).ops=2) and
  513. (taicpu(hp1).oper[1]^.typ=top_reg) and
  514. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  515. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  516. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  517. begin
  518. DebugMsg('Peephole ClrAdc2Adc performed', p);
  519. taicpu(hp1).oper[1]^.reg:=NR_R1;
  520. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  521. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  522. if assigned(alloc) and assigned(dealloc) then
  523. begin
  524. asml.Remove(alloc);
  525. alloc.Free;
  526. asml.Remove(dealloc);
  527. dealloc.Free;
  528. end;
  529. GetNextInstruction(p,hp1);
  530. asml.Remove(p);
  531. p.free;
  532. p:=hp1;
  533. result:=true;
  534. end;
  535. end;
  536. A_PUSH:
  537. begin
  538. { turn
  539. push reg0
  540. push reg1
  541. pop reg3
  542. pop reg2
  543. into
  544. movw reg2,reg0
  545. or
  546. mov reg3,reg1
  547. mov reg2,reg0
  548. }
  549. if GetNextInstruction(p,hp1) and
  550. MatchInstruction(hp1,A_PUSH) and
  551. GetNextInstruction(hp1,hp2) and
  552. MatchInstruction(hp2,A_POP) and
  553. GetNextInstruction(hp2,hp3) and
  554. MatchInstruction(hp3,A_POP) then
  555. begin
  556. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  557. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  558. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  559. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  560. begin
  561. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  562. taicpu(p).ops:=2;
  563. taicpu(p).opcode:=A_MOVW;
  564. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  565. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  566. asml.Remove(hp1);
  567. hp1.Free;
  568. asml.Remove(hp2);
  569. hp2.Free;
  570. asml.Remove(hp3);
  571. hp3.Free;
  572. result:=true;
  573. end
  574. else
  575. begin
  576. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  577. taicpu(p).ops:=2;
  578. taicpu(p).opcode:=A_MOV;
  579. taicpu(hp1).ops:=2;
  580. taicpu(hp1).opcode:=A_MOV;
  581. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  582. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  583. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  584. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  585. asml.Remove(hp2);
  586. hp2.Free;
  587. asml.Remove(hp3);
  588. hp3.Free;
  589. result:=true;
  590. end
  591. end;
  592. end;
  593. A_CALL:
  594. if (cs_opt_level4 in current_settings.optimizerswitches) and
  595. GetNextInstruction(p,hp1) and
  596. MatchInstruction(hp1,A_RET) then
  597. begin
  598. DebugMsg('Peephole CallReg2Jmp performed', p);
  599. taicpu(p).opcode:=A_JMP;
  600. asml.Remove(hp1);
  601. hp1.Free;
  602. result:=true;
  603. end;
  604. A_MOV:
  605. begin
  606. { turn
  607. mov reg0, reg1
  608. <op> reg2,reg0
  609. dealloc reg0
  610. into
  611. <op> reg2,reg1
  612. }
  613. if MatchOpType(taicpu(p),top_reg,top_reg) and
  614. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  615. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  616. MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  617. A_STD,A_ST,
  618. A_OUT,A_IN]) and
  619. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  620. {(taicpu(hp1).ops=1) and
  621. (taicpu(hp1).oper[0]^.typ = top_reg) and
  622. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  623. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  624. begin
  625. DebugMsg('Peephole MovOp2Op performed', p);
  626. for i := 0 to taicpu(hp1).ops-1 do
  627. if taicpu(hp1).oper[i]^.typ=top_reg then
  628. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  629. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  630. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  631. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  632. if assigned(alloc) and assigned(dealloc) then
  633. begin
  634. asml.Remove(alloc);
  635. alloc.Free;
  636. asml.Remove(dealloc);
  637. dealloc.Free;
  638. end;
  639. GetNextInstruction(p,hp1);
  640. asml.Remove(p);
  641. p.free;
  642. p:=hp1;
  643. result:=true;
  644. end
  645. { remove
  646. mov reg0,reg0
  647. }
  648. else if (taicpu(p).ops=2) and
  649. (taicpu(p).oper[0]^.typ = top_reg) and
  650. (taicpu(p).oper[1]^.typ = top_reg) and
  651. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  652. begin
  653. DebugMsg('Peephole RedundantMov performed', p);
  654. GetNextInstruction(p,hp1);
  655. asml.remove(p);
  656. p.free;
  657. p:=hp1;
  658. result:=true;
  659. end
  660. {
  661. Turn
  662. mov rx,ry
  663. op rx,rz
  664. mov ry, rx
  665. Into
  666. op ry,rz
  667. }
  668. else if (taicpu(p).ops=2) and
  669. MatchOpType(taicpu(p),top_reg,top_reg) and
  670. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  671. (hp1.typ=ait_instruction) and
  672. (taicpu(hp1).ops >= 1) and
  673. (taicpu(hp1).oper[0]^.typ = top_reg) and
  674. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  675. MatchInstruction(hp2,A_MOV) and
  676. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  677. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  678. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  679. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  680. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  681. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  682. A_INC,A_DEC,
  683. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  684. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  685. begin
  686. DebugMsg('Peephole MovOpMov2Op performed', p);
  687. if (taicpu(hp1).ops=2) and
  688. (taicpu(hp1).oper[1]^.typ=top_reg) and
  689. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  690. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  691. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  692. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  693. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  694. if assigned(alloc) and assigned(dealloc) then
  695. begin
  696. asml.Remove(alloc);
  697. alloc.Free;
  698. asml.Remove(dealloc);
  699. dealloc.Free;
  700. end;
  701. GetNextInstruction(p,hp1);
  702. asml.remove(p);
  703. p.free;
  704. asml.remove(hp2);
  705. hp2.free;
  706. p:=hp1;
  707. result:=true;
  708. end
  709. {
  710. Turn
  711. mov rx,ry
  712. op rx,rw
  713. mov rw,rx
  714. Into
  715. op rw,ry
  716. }
  717. else if (taicpu(p).ops=2) and
  718. MatchOpType(taicpu(p),top_reg,top_reg) and
  719. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  720. (hp1.typ=ait_instruction) and
  721. (taicpu(hp1).ops = 2) and
  722. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  723. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  724. (hp2.typ=ait_instruction) and
  725. (taicpu(hp2).opcode=A_MOV) and
  726. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  727. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  728. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  729. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  730. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  731. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  732. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  733. begin
  734. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  735. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  736. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  737. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  738. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  739. if assigned(alloc) and assigned(dealloc) then
  740. begin
  741. asml.Remove(alloc);
  742. alloc.Free;
  743. asml.Remove(dealloc);
  744. dealloc.Free;
  745. end;
  746. GetNextInstruction(p,hp1);
  747. asml.remove(p);
  748. p.free;
  749. asml.remove(hp2);
  750. hp2.free;
  751. p:=hp1;
  752. result:=true;
  753. end
  754. { fold
  755. mov reg2,reg0
  756. mov reg3,reg1
  757. to
  758. movw reg2,reg0
  759. }
  760. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  761. (taicpu(p).ops=2) and
  762. (taicpu(p).oper[0]^.typ = top_reg) and
  763. (taicpu(p).oper[1]^.typ = top_reg) and
  764. getnextinstruction(p,hp1) and
  765. (hp1.typ = ait_instruction) and
  766. (taicpu(hp1).opcode = A_MOV) and
  767. (taicpu(hp1).ops=2) and
  768. (taicpu(hp1).oper[0]^.typ = top_reg) and
  769. (taicpu(hp1).oper[1]^.typ = top_reg) and
  770. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  771. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  772. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  773. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  774. begin
  775. DebugMsg('Peephole MovMov2Movw performed', p);
  776. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  777. if assigned(alloc) then
  778. begin
  779. asml.Remove(alloc);
  780. asml.InsertBefore(alloc,p);
  781. end;
  782. taicpu(p).opcode:=A_MOVW;
  783. asml.remove(hp1);
  784. hp1.free;
  785. result:=true;
  786. end
  787. {
  788. This removes the first mov from
  789. mov rX,...
  790. mov rX,...
  791. }
  792. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  793. while MatchInstruction(hp1,A_MOV) and
  794. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  795. { don't remove the first mov if the second is a mov rX,rX }
  796. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  797. begin
  798. DebugMsg('Peephole MovMov2Mov performed', p);
  799. asml.remove(p);
  800. p.free;
  801. p:=hp1;
  802. GetNextInstruction(hp1,hp1);
  803. result:=true;
  804. if not assigned(hp1) then
  805. break;
  806. end;
  807. end;
  808. A_SBIC,
  809. A_SBIS:
  810. begin
  811. {
  812. Turn
  813. sbic/sbis X, y
  814. jmp .L1
  815. op
  816. .L1:
  817. into
  818. sbis/sbic X,y
  819. op
  820. .L1:
  821. }
  822. if GetNextInstruction(p, hp1) and
  823. (hp1.typ=ait_instruction) and
  824. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  825. (taicpu(hp1).ops>0) and
  826. (taicpu(hp1).oper[0]^.typ = top_ref) and
  827. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  828. GetNextInstruction(hp1, hp2) and
  829. (hp2.typ=ait_instruction) and
  830. (not taicpu(hp2).is_jmp) and
  831. GetNextInstruction(hp2, hp3) and
  832. (hp3.typ=ait_label) and
  833. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  834. begin
  835. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  836. if taicpu(p).opcode=A_SBIC then
  837. taicpu(p).opcode:=A_SBIS
  838. else
  839. taicpu(p).opcode:=A_SBIC;
  840. tai_label(hp3).labsym.decrefs;
  841. AsmL.remove(hp1);
  842. taicpu(hp1).Free;
  843. result:=true;
  844. end
  845. {
  846. Turn
  847. sbiX X, y
  848. jmp .L1
  849. jmp .L2
  850. .L1:
  851. op
  852. .L2:
  853. into
  854. sbiX X,y
  855. .L1:
  856. op
  857. .L2:
  858. }
  859. else if GetNextInstruction(p, hp1) and
  860. (hp1.typ=ait_instruction) and
  861. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  862. (taicpu(hp1).ops>0) and
  863. (taicpu(hp1).oper[0]^.typ = top_ref) and
  864. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  865. GetNextInstruction(hp1, hp2) and
  866. (hp2.typ=ait_instruction) and
  867. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  868. (taicpu(hp2).ops>0) and
  869. (taicpu(hp2).oper[0]^.typ = top_ref) and
  870. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  871. GetNextInstruction(hp2, hp3) and
  872. (hp3.typ=ait_label) and
  873. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  874. GetNextInstruction(hp3, hp4) and
  875. (hp4.typ=ait_instruction) and
  876. GetNextInstruction(hp4, hp5) and
  877. (hp3.typ=ait_label) and
  878. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  879. begin
  880. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  881. tai_label(hp3).labsym.decrefs;
  882. tai_label(hp5).labsym.decrefs;
  883. AsmL.remove(hp1);
  884. taicpu(hp1).Free;
  885. AsmL.remove(hp2);
  886. taicpu(hp2).Free;
  887. result:=true;
  888. end;
  889. end;
  890. end;
  891. end;
  892. end;
  893. end;
  894. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  895. begin
  896. end;
  897. begin
  898. casmoptimizer:=TCpuAsmOptimizer;
  899. End.