cgobj.pas 179 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. should be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. This must be overriden for each CPU target.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overriden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. @param(size size of the operand in constant)
  113. @param(a value of constant to send)
  114. @param(cgpara where the parameter will be stored)
  115. }
  116. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  117. {# Pass the value of a parameter, which is located in memory, to a routine.
  118. A generic version is provided. This routine should
  119. be overriden for optimization purposes if the cpu
  120. permits directly sending this type of parameter.
  121. @param(size size of the operand in constant)
  122. @param(r Memory reference of value to send)
  123. @param(cgpara where the parameter will be stored)
  124. }
  125. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  126. {# Pass the value of a parameter, which can be located either in a register or memory location,
  127. to a routine.
  128. A generic version is provided.
  129. @param(l location of the operand to send)
  130. @param(nr parameter number (starting from one) of routine (from left to right))
  131. @param(cgpara where the parameter will be stored)
  132. }
  133. procedure a_load_loc_cgpara(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  134. {# Pass the address of a reference to a routine. This routine
  135. will calculate the address of the reference, and pass this
  136. calculated address as a parameter.
  137. A generic version is provided. This routine should
  138. be overriden for optimization purposes if the cpu
  139. permits directly sending this type of parameter.
  140. @param(r reference to get address from)
  141. @param(nr parameter number (starting from one) of routine (from left to right))
  142. }
  143. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  144. {# Load a cgparaloc into a memory reference.
  145. @param(paraloc the source parameter sublocation)
  146. @param(ref the destination reference)
  147. @param(sizeleft indicates the total number of bytes left in all of
  148. the remaining sublocations of this parameter (the current
  149. sublocation and all of the sublocations coming after it).
  150. In case this location is also a reference, it is assumed
  151. to be the final part sublocation of the parameter and that it
  152. contains all of the "sizeleft" bytes).)
  153. @param(align the alignment of the paraloc in case it's a reference)
  154. }
  155. procedure a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : aint;align : longint);
  156. {# Load a cgparaloc into any kind of register (int, fp, mm).
  157. @param(regsize the size of the destination register)
  158. @param(paraloc the source parameter sublocation)
  159. @param(reg the destination register)
  160. @param(align the alignment of the paraloc in case it's a reference)
  161. }
  162. procedure a_load_cgparaloc_anyreg(list : TAsmList;regsize : tcgsize;const paraloc : TCGParaLocation;reg : tregister;align : longint);
  163. { Remarks:
  164. * If a method specifies a size you have only to take care
  165. of that number of bits, i.e. load_const_reg with OP_8 must
  166. only load the lower 8 bit of the specified register
  167. the rest of the register can be undefined
  168. if necessary the compiler will call a method
  169. to zero or sign extend the register
  170. * The a_load_XX_XX with OP_64 needn't to be
  171. implemented for 32 bit
  172. processors, the code generator takes care of that
  173. * the addr size is for work with the natural pointer
  174. size
  175. * the procedures without fpu/mm are only for integer usage
  176. * normally the first location is the source and the
  177. second the destination
  178. }
  179. {# Emits instruction to call the method specified by symbol name.
  180. This routine must be overriden for each new target cpu.
  181. There is no a_call_ref because loading the reference will use
  182. a temp register on most cpu's resulting in conflicts with the
  183. registers used for the parameters (PFV)
  184. }
  185. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  186. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  187. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  188. { same as a_call_name, might be overriden on certain architectures to emit
  189. static calls without usage of a got trampoline }
  190. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  191. { move instructions }
  192. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  193. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  194. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  195. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  196. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  197. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  198. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  199. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  200. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  201. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  202. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  203. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  204. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  205. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  206. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  207. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  208. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  209. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  210. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  211. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  212. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  213. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  214. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  215. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  216. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  217. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  218. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  219. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  220. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  221. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  222. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  223. { bit test instructions }
  224. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  225. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  226. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  227. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  228. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  229. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  230. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  231. { bit set/clear instructions }
  232. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  233. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  234. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  235. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  236. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  237. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  238. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  239. { fpu move instructions }
  240. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  241. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  242. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  243. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  244. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  245. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  246. procedure a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  247. procedure a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  248. { vector register move instructions }
  249. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  250. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  251. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  252. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  253. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  254. procedure a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  255. procedure a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  256. procedure a_loadmm_loc_cgpara(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  257. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  258. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  259. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  260. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  261. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  262. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  263. { basic arithmetic operations }
  264. { note: for operators which require only one argument (not, neg), use }
  265. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  266. { that in this case the *second* operand is used as both source and }
  267. { destination (JM) }
  268. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  269. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  270. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  271. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  272. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  273. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  274. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  275. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  276. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  277. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  278. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  279. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  280. { trinary operations for processors that support them, 'emulated' }
  281. { on others. None with "ref" arguments since I don't think there }
  282. { are any processors that support it (JM) }
  283. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  284. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  285. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  286. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  287. { comparison operations }
  288. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  289. l : tasmlabel);virtual; abstract;
  290. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  291. l : tasmlabel); virtual;
  292. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  293. l : tasmlabel);
  294. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  295. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  296. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  297. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  298. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  299. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  300. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  301. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  302. l : tasmlabel);
  303. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  304. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  305. {$ifdef cpuflags}
  306. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  307. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  308. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  309. }
  310. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  311. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  312. {$endif cpuflags}
  313. {
  314. This routine tries to optimize the op_const_reg/ref opcode, and should be
  315. called at the start of a_op_const_reg/ref. It returns the actual opcode
  316. to emit, and the constant value to emit. This function can opcode OP_NONE to
  317. remove the opcode and OP_MOVE to replace it with a simple load
  318. @param(op The opcode to emit, returns the opcode which must be emitted)
  319. @param(a The constant which should be emitted, returns the constant which must
  320. be emitted)
  321. }
  322. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  323. {#
  324. This routine is used in exception management nodes. It should
  325. save the exception reason currently in the FUNCTION_RETURN_REG. The
  326. save should be done either to a temp (pointed to by href).
  327. or on the stack (pushing the value on the stack).
  328. The size of the value to save is OS_S32. The default version
  329. saves the exception reason to a temp. memory area.
  330. }
  331. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  332. {#
  333. This routine is used in exception management nodes. It should
  334. save the exception reason constant. The
  335. save should be done either to a temp (pointed to by href).
  336. or on the stack (pushing the value on the stack).
  337. The size of the value to save is OS_S32. The default version
  338. saves the exception reason to a temp. memory area.
  339. }
  340. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  341. {#
  342. This routine is used in exception management nodes. It should
  343. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  344. should either be in the temp. area (pointed to by href , href should
  345. *NOT* be freed) or on the stack (the value should be popped).
  346. The size of the value to save is OS_S32. The default version
  347. saves the exception reason to a temp. memory area.
  348. }
  349. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  350. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  351. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  352. {# This should emit the opcode to copy len bytes from the source
  353. to destination.
  354. It must be overriden for each new target processor.
  355. @param(source Source reference of copy)
  356. @param(dest Destination reference of copy)
  357. }
  358. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  359. {# This should emit the opcode to copy len bytes from the an unaligned source
  360. to destination.
  361. It must be overriden for each new target processor.
  362. @param(source Source reference of copy)
  363. @param(dest Destination reference of copy)
  364. }
  365. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  366. {# This should emit the opcode to a shortrstring from the source
  367. to destination.
  368. @param(source Source reference of copy)
  369. @param(dest Destination reference of copy)
  370. }
  371. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  372. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  373. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  374. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  375. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  376. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  377. {# Generates range checking code. It is to note
  378. that this routine does not need to be overriden,
  379. as it takes care of everything.
  380. @param(p Node which contains the value to check)
  381. @param(todef Type definition of node to range check)
  382. }
  383. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  384. {# Generates overflow checking code for a node }
  385. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  386. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  387. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  388. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  389. {# Emits instructions when compilation is done in profile
  390. mode (this is set as a command line option). The default
  391. behavior does nothing, should be overriden as required.
  392. }
  393. procedure g_profilecode(list : TAsmList);virtual;
  394. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  395. @param(size Number of bytes to allocate)
  396. }
  397. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  398. {# Emits instruction for allocating the locals in entry
  399. code of a routine. This is one of the first
  400. routine called in @var(genentrycode).
  401. @param(localsize Number of bytes to allocate as locals)
  402. }
  403. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  404. {# Emits instructions for returning from a subroutine.
  405. Should also restore the framepointer and stack.
  406. @param(parasize Number of bytes of parameters to deallocate from stack)
  407. }
  408. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  409. {# This routine is called when generating the code for the entry point
  410. of a routine. It should save all registers which are not used in this
  411. routine, and which should be declared as saved in the std_saved_registers
  412. set.
  413. This routine is mainly used when linking to code which is generated
  414. by ABI-compliant compilers (like GCC), to make sure that the reserved
  415. registers of that ABI are not clobbered.
  416. @param(usedinproc Registers which are used in the code of this routine)
  417. }
  418. procedure g_save_registers(list:TAsmList);virtual;
  419. {# This routine is called when generating the code for the exit point
  420. of a routine. It should restore all registers which were previously
  421. saved in @var(g_save_standard_registers).
  422. @param(usedinproc Registers which are used in the code of this routine)
  423. }
  424. procedure g_restore_registers(list:TAsmList);virtual;
  425. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  426. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  427. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  428. { generate a stub which only purpose is to pass control the given external method,
  429. setting up any additional environment before doing so (if required).
  430. The default implementation issues a jump instruction to the external name. }
  431. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  432. { initialize the pic/got register }
  433. procedure g_maybe_got_init(list: TAsmList); virtual;
  434. protected
  435. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  436. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  437. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  438. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  439. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  440. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  441. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  442. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  443. end;
  444. {$ifndef cpu64bitalu}
  445. {# @abstract(Abstract code generator for 64 Bit operations)
  446. This class implements an abstract code generator class
  447. for 64 Bit operations.
  448. }
  449. tcg64 = class
  450. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  451. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  452. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  453. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  454. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  455. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  456. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  457. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  458. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  459. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  460. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  461. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  462. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  463. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  464. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  465. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  466. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  467. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  468. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  469. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  470. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  471. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  472. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  473. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  474. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  475. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  476. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  477. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  478. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  479. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  480. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  481. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  482. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  483. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  484. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  485. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  486. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  487. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  488. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  489. procedure a_load64_reg_cgpara(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  490. procedure a_load64_const_cgpara(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  491. procedure a_load64_ref_cgpara(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  492. procedure a_load64_loc_cgpara(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  493. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  494. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  495. {
  496. This routine tries to optimize the const_reg opcode, and should be
  497. called at the start of a_op64_const_reg. It returns the actual opcode
  498. to emit, and the constant value to emit. If this routine returns
  499. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  500. @param(op The opcode to emit, returns the opcode which must be emitted)
  501. @param(a The constant which should be emitted, returns the constant which must
  502. be emitted)
  503. @param(reg The register to emit the opcode with, returns the register with
  504. which the opcode will be emitted)
  505. }
  506. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  507. { override to catch 64bit rangechecks }
  508. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  509. end;
  510. {$endif cpu64bitalu}
  511. var
  512. {# Main code generator class }
  513. cg : tcg;
  514. {$ifndef cpu64bitalu}
  515. {# Code generator class for all operations working with 64-Bit operands }
  516. cg64 : tcg64;
  517. {$endif cpu64bitalu}
  518. procedure destroy_codegen;
  519. implementation
  520. uses
  521. globals,options,systems,
  522. verbose,defutil,paramgr,symsym,
  523. tgobj,cutils,procinfo,
  524. ncgrtti;
  525. {*****************************************************************************
  526. basic functionallity
  527. ******************************************************************************}
  528. constructor tcg.create;
  529. begin
  530. end;
  531. {*****************************************************************************
  532. register allocation
  533. ******************************************************************************}
  534. procedure tcg.init_register_allocators;
  535. begin
  536. fillchar(rg,sizeof(rg),0);
  537. add_reg_instruction_hook:=@add_reg_instruction;
  538. executionweight:=1;
  539. end;
  540. procedure tcg.done_register_allocators;
  541. begin
  542. { Safety }
  543. fillchar(rg,sizeof(rg),0);
  544. add_reg_instruction_hook:=nil;
  545. end;
  546. {$ifdef flowgraph}
  547. procedure Tcg.init_flowgraph;
  548. begin
  549. aktflownode:=0;
  550. end;
  551. procedure Tcg.done_flowgraph;
  552. begin
  553. end;
  554. {$endif}
  555. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  556. begin
  557. if not assigned(rg[R_INTREGISTER]) then
  558. internalerror(200312122);
  559. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  560. end;
  561. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  562. begin
  563. if not assigned(rg[R_FPUREGISTER]) then
  564. internalerror(200312123);
  565. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  566. end;
  567. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  568. begin
  569. if not assigned(rg[R_MMREGISTER]) then
  570. internalerror(2003121214);
  571. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  572. end;
  573. function tcg.getaddressregister(list:TAsmList):Tregister;
  574. begin
  575. if assigned(rg[R_ADDRESSREGISTER]) then
  576. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  577. else
  578. begin
  579. if not assigned(rg[R_INTREGISTER]) then
  580. internalerror(200312121);
  581. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  582. end;
  583. end;
  584. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  585. var
  586. subreg:Tsubregister;
  587. begin
  588. subreg:=cgsize2subreg(getregtype(reg),size);
  589. result:=reg;
  590. setsubreg(result,subreg);
  591. { notify RA }
  592. if result<>reg then
  593. list.concat(tai_regalloc.resize(result));
  594. end;
  595. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  596. begin
  597. if not assigned(rg[getregtype(r)]) then
  598. internalerror(200312125);
  599. rg[getregtype(r)].getcpuregister(list,r);
  600. end;
  601. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  602. begin
  603. if not assigned(rg[getregtype(r)]) then
  604. internalerror(200312126);
  605. rg[getregtype(r)].ungetcpuregister(list,r);
  606. end;
  607. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  608. begin
  609. if assigned(rg[rt]) then
  610. rg[rt].alloccpuregisters(list,r)
  611. else
  612. internalerror(200310092);
  613. end;
  614. procedure tcg.allocallcpuregisters(list:TAsmList);
  615. begin
  616. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  617. {$ifndef i386}
  618. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  619. {$ifdef cpumm}
  620. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  621. {$endif cpumm}
  622. {$endif i386}
  623. end;
  624. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  625. begin
  626. if assigned(rg[rt]) then
  627. rg[rt].dealloccpuregisters(list,r)
  628. else
  629. internalerror(200310093);
  630. end;
  631. procedure tcg.deallocallcpuregisters(list:TAsmList);
  632. begin
  633. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  634. {$ifndef i386}
  635. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  636. {$ifdef cpumm}
  637. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  638. {$endif cpumm}
  639. {$endif i386}
  640. end;
  641. function tcg.uses_registers(rt:Tregistertype):boolean;
  642. begin
  643. if assigned(rg[rt]) then
  644. result:=rg[rt].uses_registers
  645. else
  646. result:=false;
  647. end;
  648. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  649. var
  650. rt : tregistertype;
  651. begin
  652. rt:=getregtype(r);
  653. { Only add it when a register allocator is configured.
  654. No IE can be generated, because the VMT is written
  655. without a valid rg[] }
  656. if assigned(rg[rt]) then
  657. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  658. end;
  659. procedure tcg.add_move_instruction(instr:Taicpu);
  660. var
  661. rt : tregistertype;
  662. begin
  663. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  664. if assigned(rg[rt]) then
  665. rg[rt].add_move_instruction(instr)
  666. else
  667. internalerror(200310095);
  668. end;
  669. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  670. var
  671. rt : tregistertype;
  672. begin
  673. for rt:=low(rg) to high(rg) do
  674. begin
  675. if assigned(rg[rt]) then
  676. rg[rt].live_range_direction:=dir;
  677. end;
  678. end;
  679. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  680. var
  681. rt : tregistertype;
  682. begin
  683. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  684. begin
  685. if assigned(rg[rt]) then
  686. rg[rt].do_register_allocation(list,headertai);
  687. end;
  688. { running the other register allocator passes could require addition int/addr. registers
  689. when spilling so run int/addr register allocation at the end }
  690. if assigned(rg[R_INTREGISTER]) then
  691. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  692. if assigned(rg[R_ADDRESSREGISTER]) then
  693. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  694. end;
  695. procedure tcg.translate_register(var reg : tregister);
  696. begin
  697. rg[getregtype(reg)].translate_register(reg);
  698. end;
  699. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  700. begin
  701. list.concat(tai_regalloc.alloc(r,nil));
  702. end;
  703. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  704. begin
  705. list.concat(tai_regalloc.dealloc(r,nil));
  706. end;
  707. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  708. var
  709. instr : tai;
  710. begin
  711. instr:=tai_regalloc.sync(r);
  712. list.concat(instr);
  713. add_reg_instruction(instr,r);
  714. end;
  715. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  716. begin
  717. list.concat(tai_label.create(l));
  718. end;
  719. {*****************************************************************************
  720. for better code generation these methods should be overridden
  721. ******************************************************************************}
  722. procedure tcg.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  723. var
  724. ref : treference;
  725. begin
  726. cgpara.check_simple_location;
  727. case cgpara.location^.loc of
  728. LOC_REGISTER,LOC_CREGISTER:
  729. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  730. LOC_REFERENCE,LOC_CREFERENCE:
  731. begin
  732. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  733. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  734. end
  735. else
  736. internalerror(2002071004);
  737. end;
  738. end;
  739. procedure tcg.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  740. var
  741. ref : treference;
  742. begin
  743. cgpara.check_simple_location;
  744. case cgpara.location^.loc of
  745. LOC_REGISTER,LOC_CREGISTER:
  746. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  747. LOC_REFERENCE,LOC_CREFERENCE:
  748. begin
  749. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  750. a_load_const_ref(list,cgpara.location^.size,a,ref);
  751. end
  752. else
  753. internalerror(2002071004);
  754. end;
  755. end;
  756. procedure tcg.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  757. var
  758. ref : treference;
  759. begin
  760. cgpara.check_simple_location;
  761. case cgpara.location^.loc of
  762. LOC_REGISTER,LOC_CREGISTER:
  763. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  764. LOC_REFERENCE,LOC_CREFERENCE:
  765. begin
  766. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  767. if (size <> OS_NO) and
  768. (tcgsize2size[size] < sizeof(aint)) then
  769. begin
  770. if (cgpara.size = OS_NO) or
  771. assigned(cgpara.location^.next) then
  772. internalerror(2006052401);
  773. a_load_ref_ref(list,size,cgpara.size,r,ref);
  774. end
  775. else
  776. { use concatcopy, because the parameter can be larger than }
  777. { what the OS_* constants can handle }
  778. g_concatcopy(list,r,ref,cgpara.intsize);
  779. end
  780. else
  781. internalerror(2002071004);
  782. end;
  783. end;
  784. procedure tcg.a_load_loc_cgpara(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  785. begin
  786. case l.loc of
  787. LOC_REGISTER,
  788. LOC_CREGISTER :
  789. a_load_reg_cgpara(list,l.size,l.register,cgpara);
  790. LOC_CONSTANT :
  791. a_load_const_cgpara(list,l.size,l.value,cgpara);
  792. LOC_CREFERENCE,
  793. LOC_REFERENCE :
  794. a_load_ref_cgpara(list,l.size,l.reference,cgpara);
  795. else
  796. internalerror(2002032211);
  797. end;
  798. end;
  799. procedure tcg.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);
  800. var
  801. hr : tregister;
  802. begin
  803. cgpara.check_simple_location;
  804. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  805. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  806. else
  807. begin
  808. hr:=getaddressregister(list);
  809. a_loadaddr_ref_reg(list,r,hr);
  810. a_load_reg_cgpara(list,OS_ADDR,hr,cgpara);
  811. end;
  812. end;
  813. procedure tcg.a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : aint;align : longint);
  814. var
  815. href : treference;
  816. begin
  817. case paraloc.loc of
  818. LOC_REGISTER :
  819. begin
  820. {$IFDEF POWERPC64}
  821. if (paraloc.shiftval <> 0) then
  822. a_op_const_reg_reg(list, OP_SHL, OS_INT, paraloc.shiftval, paraloc.register, paraloc.register);
  823. {$ENDIF POWERPC64}
  824. a_load_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  825. end;
  826. LOC_MMREGISTER :
  827. cg.a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
  828. LOC_FPUREGISTER :
  829. cg.a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  830. LOC_REFERENCE :
  831. begin
  832. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  833. { use concatcopy, because it can also be a float which fails when
  834. load_ref_ref is used. Don't copy data when the references are equal }
  835. if not((href.base=ref.base) and (href.offset=ref.offset)) then
  836. cg.g_concatcopy(list,href,ref,sizeleft);
  837. end;
  838. else
  839. internalerror(2002081302);
  840. end;
  841. end;
  842. procedure tcg.a_load_cgparaloc_anyreg(list: TAsmList;regsize: tcgsize;const paraloc: TCGParaLocation;reg: tregister;align: longint);
  843. var
  844. href : treference;
  845. begin
  846. case paraloc.loc of
  847. LOC_REGISTER :
  848. begin
  849. case getregtype(reg) of
  850. R_INTREGISTER:
  851. a_load_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  852. R_MMREGISTER:
  853. a_loadmm_intreg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  854. else
  855. internalerror(2009112422);
  856. end;
  857. end;
  858. LOC_MMREGISTER :
  859. a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  860. LOC_FPUREGISTER :
  861. a_loadfpu_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  862. LOC_REFERENCE :
  863. begin
  864. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  865. case getregtype(reg) of
  866. R_INTREGISTER :
  867. a_load_ref_reg(list,paraloc.size,regsize,href,reg);
  868. R_FPUREGISTER :
  869. a_loadfpu_ref_reg(list,paraloc.size,regsize,href,reg);
  870. R_MMREGISTER :
  871. { not paraloc.size, because it may be OS_64 instead of
  872. OS_F64 in case the parameter is passed using integer
  873. conventions (e.g., on ARM) }
  874. a_loadmm_ref_reg(list,regsize,regsize,href,reg,mms_movescalar);
  875. else
  876. internalerror(2004101012);
  877. end;
  878. end;
  879. else
  880. internalerror(2002081302);
  881. end;
  882. end;
  883. {****************************************************************************
  884. some generic implementations
  885. ****************************************************************************}
  886. {$ifopt r+}
  887. {$define rangeon}
  888. {$r-}
  889. {$endif}
  890. {$ifopt q+}
  891. {$define overflowon}
  892. {$q-}
  893. {$endif}
  894. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  895. var
  896. bitmask: aword;
  897. tmpreg: tregister;
  898. stopbit: byte;
  899. begin
  900. tmpreg:=getintregister(list,sreg.subsetregsize);
  901. if (subsetsize in [OS_S8..OS_S128]) then
  902. begin
  903. { sign extend in case the value has a bitsize mod 8 <> 0 }
  904. { both instructions will be optimized away if not }
  905. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  906. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  907. end
  908. else
  909. begin
  910. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  911. stopbit := sreg.startbit + sreg.bitlen;
  912. // on x86(64), 1 shl 32(64) = 1 instead of 0
  913. // use aword to prevent overflow with 1 shl 31
  914. if (stopbit - sreg.startbit <> AIntBits) then
  915. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  916. else
  917. bitmask := high(aword);
  918. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  919. end;
  920. tmpreg := makeregsize(list,tmpreg,subsetsize);
  921. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  922. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  923. end;
  924. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  925. begin
  926. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  927. end;
  928. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  929. var
  930. bitmask: aword;
  931. tmpreg: tregister;
  932. stopbit: byte;
  933. begin
  934. stopbit := sreg.startbit + sreg.bitlen;
  935. // on x86(64), 1 shl 32(64) = 1 instead of 0
  936. if (stopbit <> AIntBits) then
  937. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  938. else
  939. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  940. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  941. begin
  942. tmpreg:=getintregister(list,sreg.subsetregsize);
  943. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  944. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  945. if (slopt <> SL_REGNOSRCMASK) then
  946. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  947. end;
  948. if (slopt <> SL_SETMAX) then
  949. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  950. case slopt of
  951. SL_SETZERO : ;
  952. SL_SETMAX :
  953. if (sreg.bitlen <> AIntBits) then
  954. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  955. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  956. sreg.subsetreg)
  957. else
  958. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  959. else
  960. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  961. end;
  962. end;
  963. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  964. var
  965. tmpreg: tregister;
  966. bitmask: aword;
  967. stopbit: byte;
  968. begin
  969. if (fromsreg.bitlen >= tosreg.bitlen) then
  970. begin
  971. tmpreg := getintregister(list,tosreg.subsetregsize);
  972. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  973. if (fromsreg.startbit <= tosreg.startbit) then
  974. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  975. else
  976. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  977. stopbit := tosreg.startbit + tosreg.bitlen;
  978. // on x86(64), 1 shl 32(64) = 1 instead of 0
  979. if (stopbit <> AIntBits) then
  980. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  981. else
  982. bitmask := (aword(1) shl tosreg.startbit) - 1;
  983. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  984. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  985. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  986. end
  987. else
  988. begin
  989. tmpreg := getintregister(list,tosubsetsize);
  990. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  991. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  992. end;
  993. end;
  994. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  995. var
  996. tmpreg: tregister;
  997. begin
  998. tmpreg := getintregister(list,tosize);
  999. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  1000. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1001. end;
  1002. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  1003. var
  1004. tmpreg: tregister;
  1005. begin
  1006. tmpreg := getintregister(list,subsetsize);
  1007. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1008. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  1009. end;
  1010. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  1011. var
  1012. bitmask: aword;
  1013. stopbit: byte;
  1014. begin
  1015. stopbit := sreg.startbit + sreg.bitlen;
  1016. // on x86(64), 1 shl 32(64) = 1 instead of 0
  1017. if (stopbit <> AIntBits) then
  1018. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  1019. else
  1020. bitmask := (aword(1) shl sreg.startbit) - 1;
  1021. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  1022. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  1023. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  1024. end;
  1025. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  1026. begin
  1027. case loc.loc of
  1028. LOC_REFERENCE,LOC_CREFERENCE:
  1029. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  1030. LOC_REGISTER,LOC_CREGISTER:
  1031. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  1032. LOC_CONSTANT:
  1033. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  1034. LOC_SUBSETREG,LOC_CSUBSETREG:
  1035. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  1036. LOC_SUBSETREF,LOC_CSUBSETREF:
  1037. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  1038. else
  1039. internalerror(200608053);
  1040. end;
  1041. end;
  1042. (*
  1043. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  1044. in memory. They are like a regular reference, but contain an extra bit
  1045. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  1046. and a bit length (always constant).
  1047. Bit packed values are stored differently in memory depending on whether we
  1048. are on a big or a little endian system (compatible with at least GPC). The
  1049. size of the basic working unit is always the smallest power-of-2 byte size
  1050. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  1051. bytes, 17..32 bits -> 4 bytes etc).
  1052. On a big endian, 5-bit: values are stored like this:
  1053. 11111222 22333334 44445555 56666677 77788888
  1054. The leftmost bit of each 5-bit value corresponds to the most significant
  1055. bit.
  1056. On little endian, it goes like this:
  1057. 22211111 43333322 55554444 77666665 88888777
  1058. In this case, per byte the left-most bit is more significant than those on
  1059. the right, but the bits in the next byte are all more significant than
  1060. those in the previous byte (e.g., the 222 in the first byte are the low
  1061. three bits of that value, while the 22 in the second byte are the upper
  1062. two bits.
  1063. Big endian, 9 bit values:
  1064. 11111111 12222222 22333333 33344444 ...
  1065. Little endian, 9 bit values:
  1066. 11111111 22222221 33333322 44444333 ...
  1067. This is memory representation and the 16 bit values are byteswapped.
  1068. Similarly as in the previous case, the 2222222 string contains the lower
  1069. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  1070. registers (two 16 bit registers in the current implementation, although a
  1071. single 32 bit register would be possible too, in particular if 32 bit
  1072. alignment can be guaranteed), this becomes:
  1073. 22222221 11111111 44444333 33333322 ...
  1074. (l)ow u l l u l u
  1075. The startbit/bitindex in a subsetreference always refers to
  1076. a) on big endian: the most significant bit of the value
  1077. (bits counted from left to right, both memory an registers)
  1078. b) on little endian: the least significant bit when the value
  1079. is loaded in a register (bit counted from right to left)
  1080. Although a) results in more complex code for big endian systems, it's
  1081. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  1082. Apple's universal interfaces which depend on these layout differences).
  1083. Note: when changing the loadsize calculated in get_subsetref_load_info,
  1084. make sure the appropriate alignment is guaranteed, at least in case of
  1085. {$defined cpurequiresproperalignment}.
  1086. *)
  1087. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  1088. var
  1089. intloadsize: aint;
  1090. begin
  1091. intloadsize := packedbitsloadsize(sref.bitlen);
  1092. if (intloadsize = 0) then
  1093. internalerror(2006081310);
  1094. if (intloadsize > sizeof(aint)) then
  1095. intloadsize := sizeof(aint);
  1096. loadsize := int_cgsize(intloadsize);
  1097. if (loadsize = OS_NO) then
  1098. internalerror(2006081311);
  1099. if (sref.bitlen > sizeof(aint)*8) then
  1100. internalerror(2006081312);
  1101. extra_load :=
  1102. (sref.bitlen <> 1) and
  1103. ((sref.bitindexreg <> NR_NO) or
  1104. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1105. end;
  1106. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1107. var
  1108. restbits: byte;
  1109. begin
  1110. if (target_info.endian = endian_big) then
  1111. begin
  1112. { valuereg contains the upper bits, extra_value_reg the lower }
  1113. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1114. if (subsetsize in [OS_S8..OS_S128]) then
  1115. begin
  1116. { sign extend }
  1117. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1118. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1119. end
  1120. else
  1121. begin
  1122. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1123. { mask other bits }
  1124. if (sref.bitlen <> AIntBits) then
  1125. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1126. end;
  1127. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1128. end
  1129. else
  1130. begin
  1131. { valuereg contains the lower bits, extra_value_reg the upper }
  1132. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1133. if (subsetsize in [OS_S8..OS_S128]) then
  1134. begin
  1135. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1136. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1137. end
  1138. else
  1139. begin
  1140. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1141. { mask other bits }
  1142. if (sref.bitlen <> AIntBits) then
  1143. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1144. end;
  1145. end;
  1146. { merge }
  1147. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1148. end;
  1149. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1150. var
  1151. hl: tasmlabel;
  1152. tmpref: treference;
  1153. extra_value_reg,
  1154. tmpreg: tregister;
  1155. begin
  1156. tmpreg := getintregister(list,OS_INT);
  1157. tmpref := sref.ref;
  1158. inc(tmpref.offset,loadbitsize div 8);
  1159. extra_value_reg := getintregister(list,OS_INT);
  1160. if (target_info.endian = endian_big) then
  1161. begin
  1162. { since this is a dynamic index, it's possible that the value }
  1163. { is entirely in valuereg. }
  1164. { get the data in valuereg in the right place }
  1165. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1166. if (subsetsize in [OS_S8..OS_S128]) then
  1167. begin
  1168. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1169. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1170. end
  1171. else
  1172. begin
  1173. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1174. if (loadbitsize <> AIntBits) then
  1175. { mask left over bits }
  1176. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1177. end;
  1178. tmpreg := getintregister(list,OS_INT);
  1179. { ensure we don't load anything past the end of the array }
  1180. current_asmdata.getjumplabel(hl);
  1181. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1182. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1183. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1184. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1185. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1186. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1187. { load next "loadbitsize" bits of the array }
  1188. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1189. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1190. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1191. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1192. { => extra_value_reg is now 0 }
  1193. { merge }
  1194. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1195. { no need to mask, necessary masking happened earlier on }
  1196. a_label(list,hl);
  1197. end
  1198. else
  1199. begin
  1200. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1201. { ensure we don't load anything past the end of the array }
  1202. current_asmdata.getjumplabel(hl);
  1203. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1204. { Y-x = -(Y-x) }
  1205. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1206. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1207. { load next "loadbitsize" bits of the array }
  1208. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1209. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1210. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1211. { merge }
  1212. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1213. a_label(list,hl);
  1214. { sign extend or mask other bits }
  1215. if (subsetsize in [OS_S8..OS_S128]) then
  1216. begin
  1217. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1218. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1219. end
  1220. else
  1221. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1222. end;
  1223. end;
  1224. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1225. var
  1226. tmpref: treference;
  1227. valuereg,extra_value_reg: tregister;
  1228. tosreg: tsubsetregister;
  1229. loadsize: tcgsize;
  1230. loadbitsize: byte;
  1231. extra_load: boolean;
  1232. begin
  1233. get_subsetref_load_info(sref,loadsize,extra_load);
  1234. loadbitsize := tcgsize2size[loadsize]*8;
  1235. { load the (first part) of the bit sequence }
  1236. valuereg := getintregister(list,OS_INT);
  1237. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1238. if not extra_load then
  1239. begin
  1240. { everything is guaranteed to be in a single register of loadsize }
  1241. if (sref.bitindexreg = NR_NO) then
  1242. begin
  1243. { use subsetreg routine, it may have been overridden with an optimized version }
  1244. tosreg.subsetreg := valuereg;
  1245. tosreg.subsetregsize := OS_INT;
  1246. { subsetregs always count bits from right to left }
  1247. if (target_info.endian = endian_big) then
  1248. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1249. else
  1250. tosreg.startbit := sref.startbit;
  1251. tosreg.bitlen := sref.bitlen;
  1252. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1253. exit;
  1254. end
  1255. else
  1256. begin
  1257. if (sref.startbit <> 0) then
  1258. internalerror(2006081510);
  1259. if (target_info.endian = endian_big) then
  1260. begin
  1261. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1262. if (subsetsize in [OS_S8..OS_S128]) then
  1263. begin
  1264. { sign extend to entire register }
  1265. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1266. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1267. end
  1268. else
  1269. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1270. end
  1271. else
  1272. begin
  1273. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1274. if (subsetsize in [OS_S8..OS_S128]) then
  1275. begin
  1276. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1277. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1278. end
  1279. end;
  1280. { mask other bits/sign extend }
  1281. if not(subsetsize in [OS_S8..OS_S128]) then
  1282. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1283. end
  1284. end
  1285. else
  1286. begin
  1287. { load next value as well }
  1288. extra_value_reg := getintregister(list,OS_INT);
  1289. if (sref.bitindexreg = NR_NO) then
  1290. begin
  1291. tmpref := sref.ref;
  1292. inc(tmpref.offset,loadbitsize div 8);
  1293. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1294. { can be overridden to optimize }
  1295. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1296. end
  1297. else
  1298. begin
  1299. if (sref.startbit <> 0) then
  1300. internalerror(2006080610);
  1301. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1302. end;
  1303. end;
  1304. { store in destination }
  1305. { avoid unnecessary sign extension and zeroing }
  1306. valuereg := makeregsize(list,valuereg,OS_INT);
  1307. destreg := makeregsize(list,destreg,OS_INT);
  1308. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1309. destreg := makeregsize(list,destreg,tosize);
  1310. end;
  1311. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1312. begin
  1313. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1314. end;
  1315. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1316. var
  1317. hl: tasmlabel;
  1318. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1319. tosreg, fromsreg: tsubsetregister;
  1320. tmpref: treference;
  1321. bitmask: aword;
  1322. loadsize: tcgsize;
  1323. loadbitsize: byte;
  1324. extra_load: boolean;
  1325. begin
  1326. { the register must be able to contain the requested value }
  1327. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1328. internalerror(2006081613);
  1329. get_subsetref_load_info(sref,loadsize,extra_load);
  1330. loadbitsize := tcgsize2size[loadsize]*8;
  1331. { load the (first part) of the bit sequence }
  1332. valuereg := getintregister(list,OS_INT);
  1333. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1334. { constant offset of bit sequence? }
  1335. if not extra_load then
  1336. begin
  1337. if (sref.bitindexreg = NR_NO) then
  1338. begin
  1339. { use subsetreg routine, it may have been overridden with an optimized version }
  1340. tosreg.subsetreg := valuereg;
  1341. tosreg.subsetregsize := OS_INT;
  1342. { subsetregs always count bits from right to left }
  1343. if (target_info.endian = endian_big) then
  1344. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1345. else
  1346. tosreg.startbit := sref.startbit;
  1347. tosreg.bitlen := sref.bitlen;
  1348. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1349. end
  1350. else
  1351. begin
  1352. if (sref.startbit <> 0) then
  1353. internalerror(2006081710);
  1354. { should be handled by normal code and will give wrong result }
  1355. { on x86 for the '1 shl bitlen' below }
  1356. if (sref.bitlen = AIntBits) then
  1357. internalerror(2006081711);
  1358. { zero the bits we have to insert }
  1359. if (slopt <> SL_SETMAX) then
  1360. begin
  1361. maskreg := getintregister(list,OS_INT);
  1362. if (target_info.endian = endian_big) then
  1363. begin
  1364. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1365. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1366. end
  1367. else
  1368. begin
  1369. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1370. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1371. end;
  1372. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1373. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1374. end;
  1375. { insert the value }
  1376. if (slopt <> SL_SETZERO) then
  1377. begin
  1378. tmpreg := getintregister(list,OS_INT);
  1379. if (slopt <> SL_SETMAX) then
  1380. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1381. else if (sref.bitlen <> AIntBits) then
  1382. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1383. else
  1384. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1385. if (target_info.endian = endian_big) then
  1386. begin
  1387. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1388. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1389. begin
  1390. if (loadbitsize <> AIntBits) then
  1391. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1392. else
  1393. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1394. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1395. end;
  1396. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1397. end
  1398. else
  1399. begin
  1400. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1401. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1402. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1403. end;
  1404. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1405. end;
  1406. end;
  1407. { store back to memory }
  1408. valuereg := makeregsize(list,valuereg,loadsize);
  1409. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1410. exit;
  1411. end
  1412. else
  1413. begin
  1414. { load next value }
  1415. extra_value_reg := getintregister(list,OS_INT);
  1416. tmpref := sref.ref;
  1417. inc(tmpref.offset,loadbitsize div 8);
  1418. { should maybe be taken out too, can be done more efficiently }
  1419. { on e.g. i386 with shld/shrd }
  1420. if (sref.bitindexreg = NR_NO) then
  1421. begin
  1422. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1423. fromsreg.subsetreg := fromreg;
  1424. fromsreg.subsetregsize := fromsize;
  1425. tosreg.subsetreg := valuereg;
  1426. tosreg.subsetregsize := OS_INT;
  1427. { transfer first part }
  1428. fromsreg.bitlen := loadbitsize-sref.startbit;
  1429. tosreg.bitlen := fromsreg.bitlen;
  1430. if (target_info.endian = endian_big) then
  1431. begin
  1432. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1433. { upper bits of the value ... }
  1434. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1435. { ... to bit 0 }
  1436. tosreg.startbit := 0
  1437. end
  1438. else
  1439. begin
  1440. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1441. { lower bits of the value ... }
  1442. fromsreg.startbit := 0;
  1443. { ... to startbit }
  1444. tosreg.startbit := sref.startbit;
  1445. end;
  1446. case slopt of
  1447. SL_SETZERO,
  1448. SL_SETMAX:
  1449. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1450. else
  1451. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1452. end;
  1453. valuereg := makeregsize(list,valuereg,loadsize);
  1454. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1455. { transfer second part }
  1456. if (target_info.endian = endian_big) then
  1457. begin
  1458. { extra_value_reg must contain the lower bits of the value at bits }
  1459. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1460. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1461. { - bitlen - startbit }
  1462. fromsreg.startbit := 0;
  1463. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1464. end
  1465. else
  1466. begin
  1467. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1468. fromsreg.startbit := fromsreg.bitlen;
  1469. tosreg.startbit := 0;
  1470. end;
  1471. tosreg.subsetreg := extra_value_reg;
  1472. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1473. tosreg.bitlen := fromsreg.bitlen;
  1474. case slopt of
  1475. SL_SETZERO,
  1476. SL_SETMAX:
  1477. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1478. else
  1479. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1480. end;
  1481. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1482. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1483. exit;
  1484. end
  1485. else
  1486. begin
  1487. if (sref.startbit <> 0) then
  1488. internalerror(2006081812);
  1489. { should be handled by normal code and will give wrong result }
  1490. { on x86 for the '1 shl bitlen' below }
  1491. if (sref.bitlen = AIntBits) then
  1492. internalerror(2006081713);
  1493. { generate mask to zero the bits we have to insert }
  1494. if (slopt <> SL_SETMAX) then
  1495. begin
  1496. maskreg := getintregister(list,OS_INT);
  1497. if (target_info.endian = endian_big) then
  1498. begin
  1499. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1500. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1501. end
  1502. else
  1503. begin
  1504. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1505. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1506. end;
  1507. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1508. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1509. end;
  1510. { insert the value }
  1511. if (slopt <> SL_SETZERO) then
  1512. begin
  1513. tmpreg := getintregister(list,OS_INT);
  1514. if (slopt <> SL_SETMAX) then
  1515. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1516. else if (sref.bitlen <> AIntBits) then
  1517. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1518. else
  1519. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1520. if (target_info.endian = endian_big) then
  1521. begin
  1522. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1523. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1524. { mask left over bits }
  1525. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1526. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1527. end
  1528. else
  1529. begin
  1530. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1531. { mask left over bits }
  1532. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1533. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1534. end;
  1535. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1536. end;
  1537. valuereg := makeregsize(list,valuereg,loadsize);
  1538. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1539. { make sure we do not read/write past the end of the array }
  1540. current_asmdata.getjumplabel(hl);
  1541. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1542. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1543. tmpindexreg := getintregister(list,OS_INT);
  1544. { load current array value }
  1545. if (slopt <> SL_SETZERO) then
  1546. begin
  1547. tmpreg := getintregister(list,OS_INT);
  1548. if (slopt <> SL_SETMAX) then
  1549. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1550. else if (sref.bitlen <> AIntBits) then
  1551. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1552. else
  1553. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1554. end;
  1555. { generate mask to zero the bits we have to insert }
  1556. if (slopt <> SL_SETMAX) then
  1557. begin
  1558. maskreg := getintregister(list,OS_INT);
  1559. if (target_info.endian = endian_big) then
  1560. begin
  1561. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1562. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1563. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1564. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1565. end
  1566. else
  1567. begin
  1568. { Y-x = -(x-Y) }
  1569. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1570. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1571. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1572. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1573. end;
  1574. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1575. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1576. end;
  1577. if (slopt <> SL_SETZERO) then
  1578. begin
  1579. if (target_info.endian = endian_big) then
  1580. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1581. else
  1582. begin
  1583. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1584. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1585. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1586. end;
  1587. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1588. end;
  1589. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1590. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1591. a_label(list,hl);
  1592. end;
  1593. end;
  1594. end;
  1595. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1596. var
  1597. tmpreg: tregister;
  1598. begin
  1599. tmpreg := getintregister(list,tosubsetsize);
  1600. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1601. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1602. end;
  1603. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1604. var
  1605. tmpreg: tregister;
  1606. begin
  1607. tmpreg := getintregister(list,tosize);
  1608. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1609. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1610. end;
  1611. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1612. var
  1613. tmpreg: tregister;
  1614. begin
  1615. tmpreg := getintregister(list,subsetsize);
  1616. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1617. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1618. end;
  1619. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1620. var
  1621. tmpreg: tregister;
  1622. slopt: tsubsetloadopt;
  1623. begin
  1624. { perform masking of the source value in advance }
  1625. slopt := SL_REGNOSRCMASK;
  1626. if (sref.bitlen <> AIntBits) then
  1627. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1628. if (
  1629. { broken x86 "x shl regbitsize = x" }
  1630. ((sref.bitlen <> AIntBits) and
  1631. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1632. ((sref.bitlen = AIntBits) and
  1633. (a = -1))
  1634. ) then
  1635. slopt := SL_SETMAX
  1636. else if (a = 0) then
  1637. slopt := SL_SETZERO;
  1638. tmpreg := getintregister(list,subsetsize);
  1639. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1640. a_load_const_reg(list,subsetsize,a,tmpreg);
  1641. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1642. end;
  1643. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1644. begin
  1645. case loc.loc of
  1646. LOC_REFERENCE,LOC_CREFERENCE:
  1647. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1648. LOC_REGISTER,LOC_CREGISTER:
  1649. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1650. LOC_SUBSETREG,LOC_CSUBSETREG:
  1651. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1652. LOC_SUBSETREF,LOC_CSUBSETREF:
  1653. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1654. else
  1655. internalerror(200608054);
  1656. end;
  1657. end;
  1658. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1659. var
  1660. tmpreg: tregister;
  1661. begin
  1662. tmpreg := getintregister(list,tosubsetsize);
  1663. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1664. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1665. end;
  1666. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1667. var
  1668. tmpreg: tregister;
  1669. begin
  1670. tmpreg := getintregister(list,tosubsetsize);
  1671. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1672. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1673. end;
  1674. {$ifdef rangeon}
  1675. {$r+}
  1676. {$undef rangeon}
  1677. {$endif}
  1678. {$ifdef overflowon}
  1679. {$q+}
  1680. {$undef overflowon}
  1681. {$endif}
  1682. { generic bit address calculation routines }
  1683. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1684. begin
  1685. result.ref:=ref;
  1686. inc(result.ref.offset,bitnumber div 8);
  1687. result.bitindexreg:=NR_NO;
  1688. result.startbit:=bitnumber mod 8;
  1689. result.bitlen:=1;
  1690. end;
  1691. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1692. begin
  1693. result.subsetreg:=setreg;
  1694. result.subsetregsize:=setregsize;
  1695. { subsetregs always count from the least significant to the most significant bit }
  1696. if (target_info.endian=endian_big) then
  1697. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1698. else
  1699. result.startbit:=bitnumber;
  1700. result.bitlen:=1;
  1701. end;
  1702. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1703. var
  1704. tmpreg,
  1705. tmpaddrreg: tregister;
  1706. begin
  1707. result.ref:=ref;
  1708. result.startbit:=0;
  1709. result.bitlen:=1;
  1710. tmpreg:=getintregister(list,bitnumbersize);
  1711. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1712. tmpaddrreg:=getaddressregister(list);
  1713. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1714. if (result.ref.base=NR_NO) then
  1715. result.ref.base:=tmpaddrreg
  1716. else if (result.ref.index=NR_NO) then
  1717. result.ref.index:=tmpaddrreg
  1718. else
  1719. begin
  1720. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1721. result.ref.index:=tmpaddrreg;
  1722. end;
  1723. tmpreg:=getintregister(list,OS_INT);
  1724. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1725. result.bitindexreg:=tmpreg;
  1726. end;
  1727. { bit testing routines }
  1728. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1729. var
  1730. tmpvalue: tregister;
  1731. begin
  1732. tmpvalue:=getintregister(list,valuesize);
  1733. if (target_info.endian=endian_little) then
  1734. begin
  1735. { rotate value register "bitnumber" bits to the right }
  1736. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1737. { extract the bit we want }
  1738. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1739. end
  1740. else
  1741. begin
  1742. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1743. { bit in uppermost position, then move it to the lowest position }
  1744. { "and" is not necessary since combination of shl/shr will clear }
  1745. { all other bits }
  1746. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1747. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1748. end;
  1749. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1750. end;
  1751. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1752. begin
  1753. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1754. end;
  1755. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1756. begin
  1757. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1758. end;
  1759. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1760. var
  1761. tmpsreg: tsubsetregister;
  1762. begin
  1763. { the first parameter is used to calculate the bit offset in }
  1764. { case of big endian, and therefore must be the size of the }
  1765. { set and not of the whole subsetreg }
  1766. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1767. { now fix the size of the subsetreg }
  1768. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1769. { correct offset of the set in the subsetreg }
  1770. inc(tmpsreg.startbit,setreg.startbit);
  1771. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1772. end;
  1773. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1774. begin
  1775. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1776. end;
  1777. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1778. var
  1779. tmpreg: tregister;
  1780. begin
  1781. case loc.loc of
  1782. LOC_REFERENCE,LOC_CREFERENCE:
  1783. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1784. LOC_REGISTER,LOC_CREGISTER,
  1785. LOC_SUBSETREG,LOC_CSUBSETREG,
  1786. LOC_CONSTANT:
  1787. begin
  1788. case loc.loc of
  1789. LOC_REGISTER,LOC_CREGISTER:
  1790. tmpreg:=loc.register;
  1791. LOC_SUBSETREG,LOC_CSUBSETREG:
  1792. begin
  1793. tmpreg:=getintregister(list,loc.size);
  1794. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1795. end;
  1796. LOC_CONSTANT:
  1797. begin
  1798. tmpreg:=getintregister(list,loc.size);
  1799. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1800. end;
  1801. end;
  1802. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1803. end;
  1804. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1805. else
  1806. internalerror(2007051701);
  1807. end;
  1808. end;
  1809. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1810. begin
  1811. case loc.loc of
  1812. LOC_REFERENCE,LOC_CREFERENCE:
  1813. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1814. LOC_REGISTER,LOC_CREGISTER:
  1815. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1816. LOC_SUBSETREG,LOC_CSUBSETREG:
  1817. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1818. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1819. else
  1820. internalerror(2007051702);
  1821. end;
  1822. end;
  1823. { bit setting/clearing routines }
  1824. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1825. var
  1826. tmpvalue: tregister;
  1827. begin
  1828. tmpvalue:=getintregister(list,destsize);
  1829. if (target_info.endian=endian_little) then
  1830. begin
  1831. a_load_const_reg(list,destsize,1,tmpvalue);
  1832. { rotate bit "bitnumber" bits to the left }
  1833. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1834. end
  1835. else
  1836. begin
  1837. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1838. { shr bitnumber" results in correct mask }
  1839. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1840. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1841. end;
  1842. { set/clear the bit we want }
  1843. if (doset) then
  1844. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1845. else
  1846. begin
  1847. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1848. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1849. end;
  1850. end;
  1851. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1852. begin
  1853. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1854. end;
  1855. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1856. begin
  1857. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1858. end;
  1859. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1860. var
  1861. tmpsreg: tsubsetregister;
  1862. begin
  1863. { the first parameter is used to calculate the bit offset in }
  1864. { case of big endian, and therefore must be the size of the }
  1865. { set and not of the whole subsetreg }
  1866. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1867. { now fix the size of the subsetreg }
  1868. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1869. { correct offset of the set in the subsetreg }
  1870. inc(tmpsreg.startbit,destreg.startbit);
  1871. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1872. end;
  1873. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1874. begin
  1875. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1876. end;
  1877. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1878. var
  1879. tmpreg: tregister;
  1880. begin
  1881. case loc.loc of
  1882. LOC_REFERENCE:
  1883. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1884. LOC_CREGISTER:
  1885. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1886. { e.g. a 2-byte set in a record regvar }
  1887. LOC_CSUBSETREG:
  1888. begin
  1889. { hard to do in-place in a generic way, so operate on a copy }
  1890. tmpreg:=getintregister(list,loc.size);
  1891. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1892. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1893. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1894. end;
  1895. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1896. else
  1897. internalerror(2007051703)
  1898. end;
  1899. end;
  1900. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1901. begin
  1902. case loc.loc of
  1903. LOC_REFERENCE:
  1904. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1905. LOC_CREGISTER:
  1906. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1907. LOC_CSUBSETREG:
  1908. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1909. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1910. else
  1911. internalerror(2007051704)
  1912. end;
  1913. end;
  1914. { memory/register loading }
  1915. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1916. var
  1917. tmpref : treference;
  1918. tmpreg : tregister;
  1919. i : longint;
  1920. begin
  1921. if ref.alignment<tcgsize2size[fromsize] then
  1922. begin
  1923. tmpref:=ref;
  1924. { we take care of the alignment now }
  1925. tmpref.alignment:=0;
  1926. case FromSize of
  1927. OS_16,OS_S16:
  1928. begin
  1929. tmpreg:=getintregister(list,OS_16);
  1930. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1931. if target_info.endian=endian_big then
  1932. inc(tmpref.offset);
  1933. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1934. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1935. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1936. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1937. if target_info.endian=endian_big then
  1938. dec(tmpref.offset)
  1939. else
  1940. inc(tmpref.offset);
  1941. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1942. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1943. end;
  1944. OS_32,OS_S32:
  1945. begin
  1946. { could add an optimised case for ref.alignment=2 }
  1947. tmpreg:=getintregister(list,OS_32);
  1948. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1949. if target_info.endian=endian_big then
  1950. inc(tmpref.offset,3);
  1951. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1952. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1953. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1954. for i:=1 to 3 do
  1955. begin
  1956. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1957. if target_info.endian=endian_big then
  1958. dec(tmpref.offset)
  1959. else
  1960. inc(tmpref.offset);
  1961. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1962. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1963. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1964. end;
  1965. end
  1966. else
  1967. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1968. end;
  1969. end
  1970. else
  1971. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1972. end;
  1973. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1974. var
  1975. tmpref : treference;
  1976. tmpreg,
  1977. tmpreg2 : tregister;
  1978. i : longint;
  1979. begin
  1980. if ref.alignment in [1,2] then
  1981. begin
  1982. tmpref:=ref;
  1983. { we take care of the alignment now }
  1984. tmpref.alignment:=0;
  1985. case FromSize of
  1986. OS_16,OS_S16:
  1987. if ref.alignment=2 then
  1988. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1989. else
  1990. begin
  1991. { first load in tmpreg, because the target register }
  1992. { may be used in ref as well }
  1993. if target_info.endian=endian_little then
  1994. inc(tmpref.offset);
  1995. tmpreg:=getintregister(list,OS_8);
  1996. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1997. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1998. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1999. if target_info.endian=endian_little then
  2000. dec(tmpref.offset)
  2001. else
  2002. inc(tmpref.offset);
  2003. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  2004. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  2005. end;
  2006. OS_32,OS_S32:
  2007. if ref.alignment=2 then
  2008. begin
  2009. if target_info.endian=endian_little then
  2010. inc(tmpref.offset,2);
  2011. tmpreg:=getintregister(list,OS_32);
  2012. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  2013. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  2014. if target_info.endian=endian_little then
  2015. dec(tmpref.offset,2)
  2016. else
  2017. inc(tmpref.offset,2);
  2018. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  2019. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  2020. end
  2021. else
  2022. begin
  2023. if target_info.endian=endian_little then
  2024. inc(tmpref.offset,3);
  2025. tmpreg:=getintregister(list,OS_32);
  2026. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  2027. tmpreg2:=getintregister(list,OS_32);
  2028. for i:=1 to 3 do
  2029. begin
  2030. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  2031. if target_info.endian=endian_little then
  2032. dec(tmpref.offset)
  2033. else
  2034. inc(tmpref.offset);
  2035. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  2036. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  2037. end;
  2038. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  2039. end
  2040. else
  2041. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  2042. end;
  2043. end
  2044. else
  2045. a_load_ref_reg(list,fromsize,tosize,ref,register);
  2046. end;
  2047. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  2048. var
  2049. tmpreg: tregister;
  2050. begin
  2051. { verify if we have the same reference }
  2052. if references_equal(sref,dref) then
  2053. exit;
  2054. tmpreg:=getintregister(list,tosize);
  2055. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  2056. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  2057. end;
  2058. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  2059. var
  2060. tmpreg: tregister;
  2061. begin
  2062. tmpreg:=getintregister(list,size);
  2063. a_load_const_reg(list,size,a,tmpreg);
  2064. a_load_reg_ref(list,size,size,tmpreg,ref);
  2065. end;
  2066. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  2067. begin
  2068. case loc.loc of
  2069. LOC_REFERENCE,LOC_CREFERENCE:
  2070. a_load_const_ref(list,loc.size,a,loc.reference);
  2071. LOC_REGISTER,LOC_CREGISTER:
  2072. a_load_const_reg(list,loc.size,a,loc.register);
  2073. LOC_SUBSETREG,LOC_CSUBSETREG:
  2074. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  2075. LOC_SUBSETREF,LOC_CSUBSETREF:
  2076. a_load_const_subsetref(list,loc.size,a,loc.sref);
  2077. else
  2078. internalerror(200203272);
  2079. end;
  2080. end;
  2081. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  2082. begin
  2083. case loc.loc of
  2084. LOC_REFERENCE,LOC_CREFERENCE:
  2085. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2086. LOC_REGISTER,LOC_CREGISTER:
  2087. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2088. LOC_SUBSETREG,LOC_CSUBSETREG:
  2089. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  2090. LOC_SUBSETREF,LOC_CSUBSETREF:
  2091. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  2092. LOC_MMREGISTER,LOC_CMMREGISTER:
  2093. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  2094. else
  2095. internalerror(200203271);
  2096. end;
  2097. end;
  2098. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2099. begin
  2100. case loc.loc of
  2101. LOC_REFERENCE,LOC_CREFERENCE:
  2102. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2103. LOC_REGISTER,LOC_CREGISTER:
  2104. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2105. LOC_CONSTANT:
  2106. a_load_const_reg(list,tosize,loc.value,reg);
  2107. LOC_SUBSETREG,LOC_CSUBSETREG:
  2108. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2109. LOC_SUBSETREF,LOC_CSUBSETREF:
  2110. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2111. else
  2112. internalerror(200109092);
  2113. end;
  2114. end;
  2115. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2116. begin
  2117. case loc.loc of
  2118. LOC_REFERENCE,LOC_CREFERENCE:
  2119. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2120. LOC_REGISTER,LOC_CREGISTER:
  2121. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2122. LOC_CONSTANT:
  2123. a_load_const_ref(list,tosize,loc.value,ref);
  2124. LOC_SUBSETREG,LOC_CSUBSETREG:
  2125. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2126. LOC_SUBSETREF,LOC_CSUBSETREF:
  2127. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2128. else
  2129. internalerror(200109302);
  2130. end;
  2131. end;
  2132. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2133. begin
  2134. case loc.loc of
  2135. LOC_REFERENCE,LOC_CREFERENCE:
  2136. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2137. LOC_REGISTER,LOC_CREGISTER:
  2138. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2139. LOC_CONSTANT:
  2140. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2141. LOC_SUBSETREG,LOC_CSUBSETREG:
  2142. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2143. LOC_SUBSETREF,LOC_CSUBSETREF:
  2144. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2145. else
  2146. internalerror(2006052310);
  2147. end;
  2148. end;
  2149. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2150. begin
  2151. case loc.loc of
  2152. LOC_REFERENCE,LOC_CREFERENCE:
  2153. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2154. LOC_REGISTER,LOC_CREGISTER:
  2155. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2156. LOC_SUBSETREG,LOC_CSUBSETREG:
  2157. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2158. LOC_SUBSETREF,LOC_CSUBSETREF:
  2159. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2160. else
  2161. internalerror(2006051510);
  2162. end;
  2163. end;
  2164. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2165. var
  2166. powerval : longint;
  2167. begin
  2168. case op of
  2169. OP_OR :
  2170. begin
  2171. { or with zero returns same result }
  2172. if a = 0 then
  2173. op:=OP_NONE
  2174. else
  2175. { or with max returns max }
  2176. if a = -1 then
  2177. op:=OP_MOVE;
  2178. end;
  2179. OP_AND :
  2180. begin
  2181. { and with max returns same result }
  2182. if (a = -1) then
  2183. op:=OP_NONE
  2184. else
  2185. { and with 0 returns 0 }
  2186. if a=0 then
  2187. op:=OP_MOVE;
  2188. end;
  2189. OP_DIV :
  2190. begin
  2191. { division by 1 returns result }
  2192. if a = 1 then
  2193. op:=OP_NONE
  2194. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2195. begin
  2196. a := powerval;
  2197. op:= OP_SHR;
  2198. end;
  2199. end;
  2200. OP_IDIV:
  2201. begin
  2202. if a = 1 then
  2203. op:=OP_NONE;
  2204. end;
  2205. OP_MUL,OP_IMUL:
  2206. begin
  2207. if a = 1 then
  2208. op:=OP_NONE
  2209. else
  2210. if a=0 then
  2211. op:=OP_MOVE
  2212. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2213. begin
  2214. a := powerval;
  2215. op:= OP_SHL;
  2216. end;
  2217. end;
  2218. OP_ADD,OP_SUB:
  2219. begin
  2220. if a = 0 then
  2221. op:=OP_NONE;
  2222. end;
  2223. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2224. begin
  2225. if a = 0 then
  2226. op:=OP_NONE;
  2227. end;
  2228. end;
  2229. end;
  2230. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2231. begin
  2232. case loc.loc of
  2233. LOC_REFERENCE, LOC_CREFERENCE:
  2234. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2235. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2236. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2237. else
  2238. internalerror(200203301);
  2239. end;
  2240. end;
  2241. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2242. begin
  2243. case loc.loc of
  2244. LOC_REFERENCE, LOC_CREFERENCE:
  2245. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2246. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2247. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2248. else
  2249. internalerror(48991);
  2250. end;
  2251. end;
  2252. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2253. var
  2254. reg: tregister;
  2255. regsize: tcgsize;
  2256. begin
  2257. if (fromsize>=tosize) then
  2258. regsize:=fromsize
  2259. else
  2260. regsize:=tosize;
  2261. reg:=getfpuregister(list,regsize);
  2262. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2263. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2264. end;
  2265. procedure tcg.a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2266. var
  2267. ref : treference;
  2268. begin
  2269. case cgpara.location^.loc of
  2270. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2271. begin
  2272. cgpara.check_simple_location;
  2273. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2274. end;
  2275. LOC_REFERENCE,LOC_CREFERENCE:
  2276. begin
  2277. cgpara.check_simple_location;
  2278. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2279. a_loadfpu_reg_ref(list,size,size,r,ref);
  2280. end;
  2281. LOC_REGISTER,LOC_CREGISTER:
  2282. begin
  2283. { paramfpu_ref does the check_simpe_location check here if necessary }
  2284. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2285. a_loadfpu_reg_ref(list,size,size,r,ref);
  2286. a_loadfpu_ref_cgpara(list,size,ref,cgpara);
  2287. tg.Ungettemp(list,ref);
  2288. end;
  2289. else
  2290. internalerror(2002071004);
  2291. end;
  2292. end;
  2293. procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2294. var
  2295. href : treference;
  2296. hsize: tcgsize;
  2297. begin
  2298. case cgpara.location^.loc of
  2299. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2300. begin
  2301. cgpara.check_simple_location;
  2302. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2303. end;
  2304. LOC_REFERENCE,LOC_CREFERENCE:
  2305. begin
  2306. cgpara.check_simple_location;
  2307. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2308. { concatcopy should choose the best way to copy the data }
  2309. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2310. end;
  2311. LOC_REGISTER,LOC_CREGISTER:
  2312. begin
  2313. { force integer size }
  2314. hsize:=int_cgsize(tcgsize2size[size]);
  2315. {$ifndef cpu64bitalu}
  2316. if (hsize in [OS_S64,OS_64]) then
  2317. cg64.a_load64_ref_cgpara(list,ref,cgpara)
  2318. else
  2319. {$endif not cpu64bitalu}
  2320. begin
  2321. cgpara.check_simple_location;
  2322. a_load_ref_cgpara(list,hsize,ref,cgpara)
  2323. end;
  2324. end
  2325. else
  2326. internalerror(200402201);
  2327. end;
  2328. end;
  2329. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2330. var
  2331. tmpreg : tregister;
  2332. begin
  2333. tmpreg:=getintregister(list,size);
  2334. a_load_ref_reg(list,size,size,ref,tmpreg);
  2335. a_op_const_reg(list,op,size,a,tmpreg);
  2336. a_load_reg_ref(list,size,size,tmpreg,ref);
  2337. end;
  2338. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2339. var
  2340. tmpreg: tregister;
  2341. begin
  2342. tmpreg := getintregister(list, size);
  2343. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2344. a_op_const_reg(list,op,size,a,tmpreg);
  2345. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2346. end;
  2347. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2348. var
  2349. tmpreg: tregister;
  2350. begin
  2351. tmpreg := getintregister(list, size);
  2352. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2353. a_op_const_reg(list,op,size,a,tmpreg);
  2354. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2355. end;
  2356. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2357. begin
  2358. case loc.loc of
  2359. LOC_REGISTER, LOC_CREGISTER:
  2360. a_op_const_reg(list,op,loc.size,a,loc.register);
  2361. LOC_REFERENCE, LOC_CREFERENCE:
  2362. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2363. LOC_SUBSETREG, LOC_CSUBSETREG:
  2364. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2365. LOC_SUBSETREF, LOC_CSUBSETREF:
  2366. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2367. else
  2368. internalerror(200109061);
  2369. end;
  2370. end;
  2371. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2372. var
  2373. tmpreg : tregister;
  2374. begin
  2375. tmpreg:=getintregister(list,size);
  2376. a_load_ref_reg(list,size,size,ref,tmpreg);
  2377. a_op_reg_reg(list,op,size,reg,tmpreg);
  2378. a_load_reg_ref(list,size,size,tmpreg,ref);
  2379. end;
  2380. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2381. var
  2382. tmpreg: tregister;
  2383. begin
  2384. case op of
  2385. OP_NOT,OP_NEG:
  2386. { handle it as "load ref,reg; op reg" }
  2387. begin
  2388. a_load_ref_reg(list,size,size,ref,reg);
  2389. a_op_reg_reg(list,op,size,reg,reg);
  2390. end;
  2391. else
  2392. begin
  2393. tmpreg:=getintregister(list,size);
  2394. a_load_ref_reg(list,size,size,ref,tmpreg);
  2395. a_op_reg_reg(list,op,size,tmpreg,reg);
  2396. end;
  2397. end;
  2398. end;
  2399. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2400. var
  2401. tmpreg: tregister;
  2402. begin
  2403. tmpreg := getintregister(list, opsize);
  2404. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2405. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2406. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2407. end;
  2408. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2409. var
  2410. tmpreg: tregister;
  2411. begin
  2412. tmpreg := getintregister(list, opsize);
  2413. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2414. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2415. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2416. end;
  2417. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2418. begin
  2419. case loc.loc of
  2420. LOC_REGISTER, LOC_CREGISTER:
  2421. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2422. LOC_REFERENCE, LOC_CREFERENCE:
  2423. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2424. LOC_SUBSETREG, LOC_CSUBSETREG:
  2425. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2426. LOC_SUBSETREF, LOC_CSUBSETREF:
  2427. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2428. else
  2429. internalerror(200109061);
  2430. end;
  2431. end;
  2432. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2433. var
  2434. tmpreg: tregister;
  2435. begin
  2436. case loc.loc of
  2437. LOC_REGISTER,LOC_CREGISTER:
  2438. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2439. LOC_REFERENCE,LOC_CREFERENCE:
  2440. begin
  2441. tmpreg:=getintregister(list,loc.size);
  2442. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2443. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2444. end;
  2445. LOC_SUBSETREG, LOC_CSUBSETREG:
  2446. begin
  2447. tmpreg:=getintregister(list,loc.size);
  2448. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2449. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2450. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2451. end;
  2452. LOC_SUBSETREF, LOC_CSUBSETREF:
  2453. begin
  2454. tmpreg:=getintregister(list,loc.size);
  2455. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2456. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2457. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2458. end;
  2459. else
  2460. internalerror(200109061);
  2461. end;
  2462. end;
  2463. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2464. a:aint;src,dst:Tregister);
  2465. begin
  2466. a_load_reg_reg(list,size,size,src,dst);
  2467. a_op_const_reg(list,op,size,a,dst);
  2468. end;
  2469. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2470. size: tcgsize; src1, src2, dst: tregister);
  2471. var
  2472. tmpreg: tregister;
  2473. begin
  2474. if (dst<>src1) then
  2475. begin
  2476. a_load_reg_reg(list,size,size,src2,dst);
  2477. a_op_reg_reg(list,op,size,src1,dst);
  2478. end
  2479. else
  2480. begin
  2481. { can we do a direct operation on the target register ? }
  2482. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2483. a_op_reg_reg(list,op,size,src2,dst)
  2484. else
  2485. begin
  2486. tmpreg:=getintregister(list,size);
  2487. a_load_reg_reg(list,size,size,src2,tmpreg);
  2488. a_op_reg_reg(list,op,size,src1,tmpreg);
  2489. a_load_reg_reg(list,size,size,tmpreg,dst);
  2490. end;
  2491. end;
  2492. end;
  2493. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2494. begin
  2495. a_op_const_reg_reg(list,op,size,a,src,dst);
  2496. ovloc.loc:=LOC_VOID;
  2497. end;
  2498. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2499. begin
  2500. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2501. ovloc.loc:=LOC_VOID;
  2502. end;
  2503. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2504. l : tasmlabel);
  2505. var
  2506. tmpreg: tregister;
  2507. begin
  2508. tmpreg:=getintregister(list,size);
  2509. a_load_ref_reg(list,size,size,ref,tmpreg);
  2510. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2511. end;
  2512. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2513. l : tasmlabel);
  2514. var
  2515. tmpreg : tregister;
  2516. begin
  2517. case loc.loc of
  2518. LOC_REGISTER,LOC_CREGISTER:
  2519. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2520. LOC_REFERENCE,LOC_CREFERENCE:
  2521. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2522. LOC_SUBSETREG, LOC_CSUBSETREG:
  2523. begin
  2524. tmpreg:=getintregister(list,size);
  2525. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2526. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2527. end;
  2528. LOC_SUBSETREF, LOC_CSUBSETREF:
  2529. begin
  2530. tmpreg:=getintregister(list,size);
  2531. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2532. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2533. end;
  2534. else
  2535. internalerror(200109061);
  2536. end;
  2537. end;
  2538. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2539. var
  2540. tmpreg: tregister;
  2541. begin
  2542. tmpreg:=getintregister(list,size);
  2543. a_load_ref_reg(list,size,size,ref,tmpreg);
  2544. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2545. end;
  2546. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2547. var
  2548. tmpreg: tregister;
  2549. begin
  2550. tmpreg:=getintregister(list,size);
  2551. a_load_ref_reg(list,size,size,ref,tmpreg);
  2552. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2553. end;
  2554. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2555. begin
  2556. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2557. end;
  2558. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2559. begin
  2560. case loc.loc of
  2561. LOC_REGISTER,
  2562. LOC_CREGISTER:
  2563. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2564. LOC_REFERENCE,
  2565. LOC_CREFERENCE :
  2566. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2567. LOC_CONSTANT:
  2568. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2569. LOC_SUBSETREG,
  2570. LOC_CSUBSETREG:
  2571. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2572. LOC_SUBSETREF,
  2573. LOC_CSUBSETREF:
  2574. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2575. else
  2576. internalerror(200203231);
  2577. end;
  2578. end;
  2579. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2580. var
  2581. tmpreg: tregister;
  2582. begin
  2583. tmpreg:=getintregister(list, cmpsize);
  2584. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2585. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2586. end;
  2587. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2588. var
  2589. tmpreg: tregister;
  2590. begin
  2591. tmpreg:=getintregister(list, cmpsize);
  2592. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2593. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2594. end;
  2595. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2596. l : tasmlabel);
  2597. var
  2598. tmpreg: tregister;
  2599. begin
  2600. case loc.loc of
  2601. LOC_REGISTER,LOC_CREGISTER:
  2602. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2603. LOC_REFERENCE,LOC_CREFERENCE:
  2604. begin
  2605. tmpreg:=getintregister(list,size);
  2606. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2607. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2608. end;
  2609. LOC_SUBSETREG, LOC_CSUBSETREG:
  2610. begin
  2611. tmpreg:=getintregister(list, size);
  2612. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2613. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2614. end;
  2615. LOC_SUBSETREF, LOC_CSUBSETREF:
  2616. begin
  2617. tmpreg:=getintregister(list, size);
  2618. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2619. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2620. end;
  2621. else
  2622. internalerror(200109061);
  2623. end;
  2624. end;
  2625. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2626. begin
  2627. case loc.loc of
  2628. LOC_MMREGISTER,LOC_CMMREGISTER:
  2629. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2630. LOC_REFERENCE,LOC_CREFERENCE:
  2631. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2632. LOC_REGISTER,LOC_CREGISTER:
  2633. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2634. else
  2635. internalerror(200310121);
  2636. end;
  2637. end;
  2638. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2639. begin
  2640. case loc.loc of
  2641. LOC_MMREGISTER,LOC_CMMREGISTER:
  2642. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2643. LOC_REFERENCE,LOC_CREFERENCE:
  2644. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2645. else
  2646. internalerror(200310122);
  2647. end;
  2648. end;
  2649. procedure tcg.a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2650. var
  2651. href : treference;
  2652. {$ifndef cpu64bitalu}
  2653. tmpreg : tregister;
  2654. reg64 : tregister64;
  2655. {$endif not cpu64bitalu}
  2656. begin
  2657. {$ifndef cpu64bitalu}
  2658. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  2659. (size<>OS_F64) then
  2660. {$endif not cpu64bitalu}
  2661. cgpara.check_simple_location;
  2662. case cgpara.location^.loc of
  2663. LOC_MMREGISTER,LOC_CMMREGISTER:
  2664. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2665. LOC_REFERENCE,LOC_CREFERENCE:
  2666. begin
  2667. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2668. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2669. end;
  2670. LOC_REGISTER,LOC_CREGISTER:
  2671. begin
  2672. if assigned(shuffle) and
  2673. not shufflescalar(shuffle) then
  2674. internalerror(2009112510);
  2675. {$ifndef cpu64bitalu}
  2676. if (size=OS_F64) then
  2677. begin
  2678. if not assigned(cgpara.location^.next) or
  2679. assigned(cgpara.location^.next^.next) then
  2680. internalerror(2009112512);
  2681. case cgpara.location^.next^.loc of
  2682. LOC_REGISTER,LOC_CREGISTER:
  2683. tmpreg:=cgpara.location^.next^.register;
  2684. LOC_REFERENCE,LOC_CREFERENCE:
  2685. tmpreg:=getintregister(list,OS_32);
  2686. else
  2687. internalerror(2009112910);
  2688. end;
  2689. if (target_info.endian=ENDIAN_BIG) then
  2690. begin
  2691. { paraloc^ -> high
  2692. paraloc^.next -> low }
  2693. reg64.reghi:=cgpara.location^.register;
  2694. reg64.reglo:=tmpreg;
  2695. end
  2696. else
  2697. begin
  2698. { paraloc^ -> low
  2699. paraloc^.next -> high }
  2700. reg64.reglo:=cgpara.location^.register;
  2701. reg64.reghi:=tmpreg;
  2702. end;
  2703. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  2704. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  2705. begin
  2706. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  2707. internalerror(2009112911);
  2708. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  2709. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  2710. end;
  2711. end
  2712. else
  2713. {$endif not cpu64bitalu}
  2714. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  2715. end
  2716. else
  2717. internalerror(200310123);
  2718. end;
  2719. end;
  2720. procedure tcg.a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2721. var
  2722. hr : tregister;
  2723. hs : tmmshuffle;
  2724. begin
  2725. cgpara.check_simple_location;
  2726. hr:=getmmregister(list,cgpara.location^.size);
  2727. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2728. if realshuffle(shuffle) then
  2729. begin
  2730. hs:=shuffle^;
  2731. removeshuffles(hs);
  2732. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,@hs);
  2733. end
  2734. else
  2735. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,shuffle);
  2736. end;
  2737. procedure tcg.a_loadmm_loc_cgpara(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2738. begin
  2739. case loc.loc of
  2740. LOC_MMREGISTER,LOC_CMMREGISTER:
  2741. a_loadmm_reg_cgpara(list,loc.size,loc.register,cgpara,shuffle);
  2742. LOC_REFERENCE,LOC_CREFERENCE:
  2743. a_loadmm_ref_cgpara(list,loc.size,loc.reference,cgpara,shuffle);
  2744. else
  2745. internalerror(200310123);
  2746. end;
  2747. end;
  2748. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2749. var
  2750. hr : tregister;
  2751. hs : tmmshuffle;
  2752. begin
  2753. hr:=getmmregister(list,size);
  2754. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2755. if realshuffle(shuffle) then
  2756. begin
  2757. hs:=shuffle^;
  2758. removeshuffles(hs);
  2759. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2760. end
  2761. else
  2762. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2763. end;
  2764. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2765. var
  2766. hr : tregister;
  2767. hs : tmmshuffle;
  2768. begin
  2769. hr:=getmmregister(list,size);
  2770. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2771. if realshuffle(shuffle) then
  2772. begin
  2773. hs:=shuffle^;
  2774. removeshuffles(hs);
  2775. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2776. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2777. end
  2778. else
  2779. begin
  2780. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2781. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2782. end;
  2783. end;
  2784. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  2785. var
  2786. tmpref: treference;
  2787. begin
  2788. if (tcgsize2size[fromsize]<>4) or
  2789. (tcgsize2size[tosize]<>4) then
  2790. internalerror(2009112503);
  2791. tg.gettemp(list,4,4,tt_normal,tmpref);
  2792. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  2793. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  2794. tg.ungettemp(list,tmpref);
  2795. end;
  2796. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  2797. var
  2798. tmpref: treference;
  2799. begin
  2800. if (tcgsize2size[fromsize]<>4) or
  2801. (tcgsize2size[tosize]<>4) then
  2802. internalerror(2009112504);
  2803. tg.gettemp(list,8,8,tt_normal,tmpref);
  2804. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  2805. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  2806. tg.ungettemp(list,tmpref);
  2807. end;
  2808. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2809. begin
  2810. case loc.loc of
  2811. LOC_CMMREGISTER,LOC_MMREGISTER:
  2812. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2813. LOC_CREFERENCE,LOC_REFERENCE:
  2814. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2815. else
  2816. internalerror(200312232);
  2817. end;
  2818. end;
  2819. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2820. begin
  2821. g_concatcopy(list,source,dest,len);
  2822. end;
  2823. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2824. var
  2825. cgpara1,cgpara2,cgpara3 : TCGPara;
  2826. begin
  2827. cgpara1.init;
  2828. cgpara2.init;
  2829. cgpara3.init;
  2830. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2831. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2832. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2833. paramanager.allocparaloc(list,cgpara3);
  2834. a_loadaddr_ref_cgpara(list,dest,cgpara3);
  2835. paramanager.allocparaloc(list,cgpara2);
  2836. a_loadaddr_ref_cgpara(list,source,cgpara2);
  2837. paramanager.allocparaloc(list,cgpara1);
  2838. a_load_const_cgpara(list,OS_INT,len,cgpara1);
  2839. paramanager.freeparaloc(list,cgpara3);
  2840. paramanager.freeparaloc(list,cgpara2);
  2841. paramanager.freeparaloc(list,cgpara1);
  2842. allocallcpuregisters(list);
  2843. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  2844. deallocallcpuregisters(list);
  2845. cgpara3.done;
  2846. cgpara2.done;
  2847. cgpara1.done;
  2848. end;
  2849. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2850. var
  2851. cgpara1,cgpara2 : TCGPara;
  2852. begin
  2853. cgpara1.init;
  2854. cgpara2.init;
  2855. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2856. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2857. paramanager.allocparaloc(list,cgpara2);
  2858. a_loadaddr_ref_cgpara(list,dest,cgpara2);
  2859. paramanager.allocparaloc(list,cgpara1);
  2860. a_loadaddr_ref_cgpara(list,source,cgpara1);
  2861. paramanager.freeparaloc(list,cgpara2);
  2862. paramanager.freeparaloc(list,cgpara1);
  2863. allocallcpuregisters(list);
  2864. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  2865. deallocallcpuregisters(list);
  2866. cgpara2.done;
  2867. cgpara1.done;
  2868. end;
  2869. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2870. var
  2871. href : treference;
  2872. incrfunc : string;
  2873. cgpara1,cgpara2 : TCGPara;
  2874. begin
  2875. cgpara1.init;
  2876. cgpara2.init;
  2877. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2878. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2879. if is_interfacecom(t) then
  2880. incrfunc:='FPC_INTF_INCR_REF'
  2881. else if is_ansistring(t) then
  2882. incrfunc:='FPC_ANSISTR_INCR_REF'
  2883. else if is_widestring(t) then
  2884. incrfunc:='FPC_WIDESTR_INCR_REF'
  2885. else if is_unicodestring(t) then
  2886. incrfunc:='FPC_UNICODESTR_INCR_REF'
  2887. else if is_dynamic_array(t) then
  2888. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2889. else
  2890. incrfunc:='';
  2891. { call the special incr function or the generic addref }
  2892. if incrfunc<>'' then
  2893. begin
  2894. paramanager.allocparaloc(list,cgpara1);
  2895. { widestrings aren't ref. counted on all platforms so we need the address
  2896. to create a real copy }
  2897. if is_widestring(t) then
  2898. a_loadaddr_ref_cgpara(list,ref,cgpara1)
  2899. else
  2900. { these functions get the pointer by value }
  2901. a_load_ref_cgpara(list,OS_ADDR,ref,cgpara1);
  2902. paramanager.freeparaloc(list,cgpara1);
  2903. allocallcpuregisters(list);
  2904. a_call_name(list,incrfunc,false);
  2905. deallocallcpuregisters(list);
  2906. end
  2907. else
  2908. begin
  2909. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2910. paramanager.allocparaloc(list,cgpara2);
  2911. a_loadaddr_ref_cgpara(list,href,cgpara2);
  2912. paramanager.allocparaloc(list,cgpara1);
  2913. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  2914. paramanager.freeparaloc(list,cgpara1);
  2915. paramanager.freeparaloc(list,cgpara2);
  2916. allocallcpuregisters(list);
  2917. a_call_name(list,'FPC_ADDREF',false);
  2918. deallocallcpuregisters(list);
  2919. end;
  2920. cgpara2.done;
  2921. cgpara1.done;
  2922. end;
  2923. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2924. var
  2925. href : treference;
  2926. decrfunc : string;
  2927. needrtti : boolean;
  2928. cgpara1,cgpara2 : TCGPara;
  2929. tempreg1,tempreg2 : TRegister;
  2930. begin
  2931. cgpara1.init;
  2932. cgpara2.init;
  2933. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2934. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2935. needrtti:=false;
  2936. if is_interfacecom(t) then
  2937. decrfunc:='FPC_INTF_DECR_REF'
  2938. else if is_ansistring(t) then
  2939. decrfunc:='FPC_ANSISTR_DECR_REF'
  2940. else if is_widestring(t) then
  2941. decrfunc:='FPC_WIDESTR_DECR_REF'
  2942. else if is_unicodestring(t) then
  2943. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2944. else if is_dynamic_array(t) then
  2945. begin
  2946. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2947. needrtti:=true;
  2948. end
  2949. else
  2950. decrfunc:='';
  2951. { call the special decr function or the generic decref }
  2952. if decrfunc<>'' then
  2953. begin
  2954. if needrtti then
  2955. begin
  2956. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2957. tempreg2:=getaddressregister(list);
  2958. a_loadaddr_ref_reg(list,href,tempreg2);
  2959. end;
  2960. tempreg1:=getaddressregister(list);
  2961. a_loadaddr_ref_reg(list,ref,tempreg1);
  2962. if needrtti then
  2963. begin
  2964. paramanager.allocparaloc(list,cgpara2);
  2965. a_load_reg_cgpara(list,OS_ADDR,tempreg2,cgpara2);
  2966. paramanager.freeparaloc(list,cgpara2);
  2967. end;
  2968. paramanager.allocparaloc(list,cgpara1);
  2969. a_load_reg_cgpara(list,OS_ADDR,tempreg1,cgpara1);
  2970. paramanager.freeparaloc(list,cgpara1);
  2971. allocallcpuregisters(list);
  2972. a_call_name(list,decrfunc,false);
  2973. deallocallcpuregisters(list);
  2974. end
  2975. else
  2976. begin
  2977. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2978. paramanager.allocparaloc(list,cgpara2);
  2979. a_loadaddr_ref_cgpara(list,href,cgpara2);
  2980. paramanager.allocparaloc(list,cgpara1);
  2981. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  2982. paramanager.freeparaloc(list,cgpara1);
  2983. paramanager.freeparaloc(list,cgpara2);
  2984. allocallcpuregisters(list);
  2985. a_call_name(list,'FPC_DECREF',false);
  2986. deallocallcpuregisters(list);
  2987. end;
  2988. cgpara2.done;
  2989. cgpara1.done;
  2990. end;
  2991. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2992. var
  2993. href : treference;
  2994. cgpara1,cgpara2 : TCGPara;
  2995. begin
  2996. cgpara1.init;
  2997. cgpara2.init;
  2998. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2999. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3000. if is_ansistring(t) or
  3001. is_widestring(t) or
  3002. is_unicodestring(t) or
  3003. is_interfacecom(t) or
  3004. is_dynamic_array(t) then
  3005. a_load_const_ref(list,OS_ADDR,0,ref)
  3006. else
  3007. begin
  3008. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3009. paramanager.allocparaloc(list,cgpara2);
  3010. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3011. paramanager.allocparaloc(list,cgpara1);
  3012. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3013. paramanager.freeparaloc(list,cgpara1);
  3014. paramanager.freeparaloc(list,cgpara2);
  3015. allocallcpuregisters(list);
  3016. a_call_name(list,'FPC_INITIALIZE',false);
  3017. deallocallcpuregisters(list);
  3018. end;
  3019. cgpara1.done;
  3020. cgpara2.done;
  3021. end;
  3022. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  3023. var
  3024. href : treference;
  3025. cgpara1,cgpara2 : TCGPara;
  3026. begin
  3027. cgpara1.init;
  3028. cgpara2.init;
  3029. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3030. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3031. if is_ansistring(t) or
  3032. is_widestring(t) or
  3033. is_unicodestring(t) or
  3034. is_interfacecom(t) then
  3035. begin
  3036. g_decrrefcount(list,t,ref);
  3037. a_load_const_ref(list,OS_ADDR,0,ref);
  3038. end
  3039. else
  3040. begin
  3041. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  3042. paramanager.allocparaloc(list,cgpara2);
  3043. a_loadaddr_ref_cgpara(list,href,cgpara2);
  3044. paramanager.allocparaloc(list,cgpara1);
  3045. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  3046. paramanager.freeparaloc(list,cgpara1);
  3047. paramanager.freeparaloc(list,cgpara2);
  3048. allocallcpuregisters(list);
  3049. a_call_name(list,'FPC_FINALIZE',false);
  3050. deallocallcpuregisters(list);
  3051. end;
  3052. cgpara1.done;
  3053. cgpara2.done;
  3054. end;
  3055. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  3056. { generate range checking code for the value at location p. The type }
  3057. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  3058. { is the original type used at that location. When both defs are equal }
  3059. { the check is also insert (needed for succ,pref,inc,dec) }
  3060. const
  3061. aintmax=high(aint);
  3062. var
  3063. neglabel : tasmlabel;
  3064. hreg : tregister;
  3065. lto,hto,
  3066. lfrom,hfrom : TConstExprInt;
  3067. fromsize, tosize: cardinal;
  3068. from_signed, to_signed: boolean;
  3069. begin
  3070. { range checking on and range checkable value? }
  3071. if not(cs_check_range in current_settings.localswitches) or
  3072. not(fromdef.typ in [orddef,enumdef]) or
  3073. { C-style booleans can't really fail range checks, }
  3074. { all values are always valid }
  3075. is_cbool(todef) then
  3076. exit;
  3077. {$ifndef cpu64bitalu}
  3078. { handle 64bit rangechecks separate for 32bit processors }
  3079. if is_64bit(fromdef) or is_64bit(todef) then
  3080. begin
  3081. cg64.g_rangecheck64(list,l,fromdef,todef);
  3082. exit;
  3083. end;
  3084. {$endif cpu64bitalu}
  3085. { only check when assigning to scalar, subranges are different, }
  3086. { when todef=fromdef then the check is always generated }
  3087. getrange(fromdef,lfrom,hfrom);
  3088. getrange(todef,lto,hto);
  3089. from_signed := is_signed(fromdef);
  3090. to_signed := is_signed(todef);
  3091. { check the rangedef of the array, not the array itself }
  3092. { (only change now, since getrange needs the arraydef) }
  3093. if (todef.typ = arraydef) then
  3094. todef := tarraydef(todef).rangedef;
  3095. { no range check if from and to are equal and are both longint/dword }
  3096. { (if we have a 32bit processor) or int64/qword, since such }
  3097. { operations can at most cause overflows (JM) }
  3098. { Note that these checks are mostly processor independent, they only }
  3099. { have to be changed once we introduce 64bit subrange types }
  3100. {$ifdef cpu64bitalu}
  3101. if (fromdef = todef) and
  3102. (fromdef.typ=orddef) and
  3103. (((((torddef(fromdef).ordtype = s64bit) and
  3104. (lfrom = low(int64)) and
  3105. (hfrom = high(int64))) or
  3106. ((torddef(fromdef).ordtype = u64bit) and
  3107. (lfrom = low(qword)) and
  3108. (hfrom = high(qword))) or
  3109. ((torddef(fromdef).ordtype = scurrency) and
  3110. (lfrom = low(int64)) and
  3111. (hfrom = high(int64)))))) then
  3112. exit;
  3113. {$else cpu64bitalu}
  3114. if (fromdef = todef) and
  3115. (fromdef.typ=orddef) and
  3116. (((((torddef(fromdef).ordtype = s32bit) and
  3117. (lfrom = int64(low(longint))) and
  3118. (hfrom = int64(high(longint)))) or
  3119. ((torddef(fromdef).ordtype = u32bit) and
  3120. (lfrom = low(cardinal)) and
  3121. (hfrom = high(cardinal)))))) then
  3122. exit;
  3123. {$endif cpu64bitalu}
  3124. { optimize some range checks away in safe cases }
  3125. fromsize := fromdef.size;
  3126. tosize := todef.size;
  3127. if ((from_signed = to_signed) or
  3128. (not from_signed)) and
  3129. (lto<=lfrom) and (hto>=hfrom) and
  3130. (fromsize <= tosize) then
  3131. begin
  3132. { if fromsize < tosize, and both have the same signed-ness or }
  3133. { fromdef is unsigned, then all bit patterns from fromdef are }
  3134. { valid for todef as well }
  3135. if (fromsize < tosize) then
  3136. exit;
  3137. if (fromsize = tosize) and
  3138. (from_signed = to_signed) then
  3139. { only optimize away if all bit patterns which fit in fromsize }
  3140. { are valid for the todef }
  3141. begin
  3142. {$ifopt Q+}
  3143. {$define overflowon}
  3144. {$Q-}
  3145. {$endif}
  3146. {$ifopt R+}
  3147. {$define rangeon}
  3148. {$R-}
  3149. {$endif}
  3150. if to_signed then
  3151. begin
  3152. { calculation of the low/high ranges must not overflow 64 bit
  3153. otherwise we end up comparing with zero for 64 bit data types on
  3154. 64 bit processors }
  3155. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  3156. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  3157. exit
  3158. end
  3159. else
  3160. begin
  3161. { calculation of the low/high ranges must not overflow 64 bit
  3162. otherwise we end up having all zeros for 64 bit data types on
  3163. 64 bit processors }
  3164. if (lto = 0) and
  3165. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  3166. exit
  3167. end;
  3168. {$ifdef overflowon}
  3169. {$Q+}
  3170. {$undef overflowon}
  3171. {$endif}
  3172. {$ifdef rangeon}
  3173. {$R+}
  3174. {$undef rangeon}
  3175. {$endif}
  3176. end
  3177. end;
  3178. { generate the rangecheck code for the def where we are going to }
  3179. { store the result }
  3180. { use the trick that }
  3181. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  3182. { To be able to do that, we have to make sure however that either }
  3183. { fromdef and todef are both signed or unsigned, or that we leave }
  3184. { the parts < 0 and > maxlongint out }
  3185. if from_signed xor to_signed then
  3186. begin
  3187. if from_signed then
  3188. { from is signed, to is unsigned }
  3189. begin
  3190. { if high(from) < 0 -> always range error }
  3191. if (hfrom < 0) or
  3192. { if low(to) > maxlongint also range error }
  3193. (lto > aintmax) then
  3194. begin
  3195. a_call_name(list,'FPC_RANGEERROR',false);
  3196. exit
  3197. end;
  3198. { from is signed and to is unsigned -> when looking at to }
  3199. { as an signed value, it must be < maxaint (otherwise }
  3200. { it will become negative, which is invalid since "to" is unsigned) }
  3201. if hto > aintmax then
  3202. hto := aintmax;
  3203. end
  3204. else
  3205. { from is unsigned, to is signed }
  3206. begin
  3207. if (lfrom > aintmax) or
  3208. (hto < 0) then
  3209. begin
  3210. a_call_name(list,'FPC_RANGEERROR',false);
  3211. exit
  3212. end;
  3213. { from is unsigned and to is signed -> when looking at to }
  3214. { as an unsigned value, it must be >= 0 (since negative }
  3215. { values are the same as values > maxlongint) }
  3216. if lto < 0 then
  3217. lto := 0;
  3218. end;
  3219. end;
  3220. hreg:=getintregister(list,OS_INT);
  3221. a_load_loc_reg(list,OS_INT,l,hreg);
  3222. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3223. current_asmdata.getjumplabel(neglabel);
  3224. {
  3225. if from_signed then
  3226. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3227. else
  3228. }
  3229. {$ifdef cpu64bitalu}
  3230. if qword(hto-lto)>qword(aintmax) then
  3231. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3232. else
  3233. {$endif cpu64bitalu}
  3234. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3235. a_call_name(list,'FPC_RANGEERROR',false);
  3236. a_label(list,neglabel);
  3237. end;
  3238. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3239. begin
  3240. g_overflowCheck(list,loc,def);
  3241. end;
  3242. {$ifdef cpuflags}
  3243. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3244. var
  3245. tmpreg : tregister;
  3246. begin
  3247. tmpreg:=getintregister(list,size);
  3248. g_flags2reg(list,size,f,tmpreg);
  3249. a_load_reg_ref(list,size,size,tmpreg,ref);
  3250. end;
  3251. {$endif cpuflags}
  3252. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3253. var
  3254. OKLabel : tasmlabel;
  3255. cgpara1 : TCGPara;
  3256. begin
  3257. if (cs_check_object in current_settings.localswitches) or
  3258. (cs_check_range in current_settings.localswitches) then
  3259. begin
  3260. current_asmdata.getjumplabel(oklabel);
  3261. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3262. cgpara1.init;
  3263. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3264. paramanager.allocparaloc(list,cgpara1);
  3265. a_load_const_cgpara(list,OS_INT,210,cgpara1);
  3266. paramanager.freeparaloc(list,cgpara1);
  3267. a_call_name(list,'FPC_HANDLEERROR',false);
  3268. a_label(list,oklabel);
  3269. cgpara1.done;
  3270. end;
  3271. end;
  3272. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3273. var
  3274. hrefvmt : treference;
  3275. cgpara1,cgpara2 : TCGPara;
  3276. begin
  3277. cgpara1.init;
  3278. cgpara2.init;
  3279. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3280. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3281. if (cs_check_object in current_settings.localswitches) then
  3282. begin
  3283. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3284. paramanager.allocparaloc(list,cgpara2);
  3285. a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
  3286. paramanager.allocparaloc(list,cgpara1);
  3287. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3288. paramanager.freeparaloc(list,cgpara1);
  3289. paramanager.freeparaloc(list,cgpara2);
  3290. allocallcpuregisters(list);
  3291. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3292. deallocallcpuregisters(list);
  3293. end
  3294. else
  3295. if (cs_check_range in current_settings.localswitches) then
  3296. begin
  3297. paramanager.allocparaloc(list,cgpara1);
  3298. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  3299. paramanager.freeparaloc(list,cgpara1);
  3300. allocallcpuregisters(list);
  3301. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3302. deallocallcpuregisters(list);
  3303. end;
  3304. cgpara1.done;
  3305. cgpara2.done;
  3306. end;
  3307. {*****************************************************************************
  3308. Entry/Exit Code Functions
  3309. *****************************************************************************}
  3310. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3311. var
  3312. sizereg,sourcereg,lenreg : tregister;
  3313. cgpara1,cgpara2,cgpara3 : TCGPara;
  3314. begin
  3315. { because some abis don't support dynamic stack allocation properly
  3316. open array value parameters are copied onto the heap
  3317. }
  3318. { calculate necessary memory }
  3319. { read/write operations on one register make the life of the register allocator hard }
  3320. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3321. begin
  3322. lenreg:=getintregister(list,OS_INT);
  3323. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3324. end
  3325. else
  3326. lenreg:=lenloc.register;
  3327. sizereg:=getintregister(list,OS_INT);
  3328. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3329. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3330. { load source }
  3331. sourcereg:=getaddressregister(list);
  3332. a_loadaddr_ref_reg(list,ref,sourcereg);
  3333. { do getmem call }
  3334. cgpara1.init;
  3335. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3336. paramanager.allocparaloc(list,cgpara1);
  3337. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara1);
  3338. paramanager.freeparaloc(list,cgpara1);
  3339. allocallcpuregisters(list);
  3340. a_call_name(list,'FPC_GETMEM',false);
  3341. deallocallcpuregisters(list);
  3342. cgpara1.done;
  3343. { return the new address }
  3344. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3345. { do move call }
  3346. cgpara1.init;
  3347. cgpara2.init;
  3348. cgpara3.init;
  3349. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3350. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3351. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3352. { load size }
  3353. paramanager.allocparaloc(list,cgpara3);
  3354. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara3);
  3355. { load destination }
  3356. paramanager.allocparaloc(list,cgpara2);
  3357. a_load_reg_cgpara(list,OS_ADDR,destreg,cgpara2);
  3358. { load source }
  3359. paramanager.allocparaloc(list,cgpara1);
  3360. a_load_reg_cgpara(list,OS_ADDR,sourcereg,cgpara1);
  3361. paramanager.freeparaloc(list,cgpara3);
  3362. paramanager.freeparaloc(list,cgpara2);
  3363. paramanager.freeparaloc(list,cgpara1);
  3364. allocallcpuregisters(list);
  3365. a_call_name(list,'FPC_MOVE',false);
  3366. deallocallcpuregisters(list);
  3367. cgpara3.done;
  3368. cgpara2.done;
  3369. cgpara1.done;
  3370. end;
  3371. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3372. var
  3373. cgpara1 : TCGPara;
  3374. begin
  3375. { do move call }
  3376. cgpara1.init;
  3377. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3378. { load source }
  3379. paramanager.allocparaloc(list,cgpara1);
  3380. a_load_loc_cgpara(list,l,cgpara1);
  3381. paramanager.freeparaloc(list,cgpara1);
  3382. allocallcpuregisters(list);
  3383. a_call_name(list,'FPC_FREEMEM',false);
  3384. deallocallcpuregisters(list);
  3385. cgpara1.done;
  3386. end;
  3387. procedure tcg.g_save_registers(list:TAsmList);
  3388. var
  3389. href : treference;
  3390. size : longint;
  3391. r : integer;
  3392. begin
  3393. { calculate temp. size }
  3394. size:=0;
  3395. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3396. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3397. inc(size,sizeof(aint));
  3398. { mm registers }
  3399. if uses_registers(R_MMREGISTER) then
  3400. begin
  3401. { Make sure we reserve enough space to do the alignment based on the offset
  3402. later on. We can't use the size for this, because the alignment of the start
  3403. of the temp is smaller than needed for an OS_VECTOR }
  3404. inc(size,tcgsize2size[OS_VECTOR]);
  3405. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3406. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3407. inc(size,tcgsize2size[OS_VECTOR]);
  3408. end;
  3409. if size>0 then
  3410. begin
  3411. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3412. include(current_procinfo.flags,pi_has_saved_regs);
  3413. { Copy registers to temp }
  3414. href:=current_procinfo.save_regs_ref;
  3415. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3416. begin
  3417. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3418. begin
  3419. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3420. inc(href.offset,sizeof(aint));
  3421. end;
  3422. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3423. end;
  3424. if uses_registers(R_MMREGISTER) then
  3425. begin
  3426. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3427. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3428. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3429. begin
  3430. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3431. begin
  3432. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3433. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3434. end;
  3435. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3436. end;
  3437. end;
  3438. end;
  3439. end;
  3440. procedure tcg.g_restore_registers(list:TAsmList);
  3441. var
  3442. href : treference;
  3443. r : integer;
  3444. hreg : tregister;
  3445. begin
  3446. if not(pi_has_saved_regs in current_procinfo.flags) then
  3447. exit;
  3448. { Copy registers from temp }
  3449. href:=current_procinfo.save_regs_ref;
  3450. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3451. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3452. begin
  3453. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3454. { Allocate register so the optimizer does not remove the load }
  3455. a_reg_alloc(list,hreg);
  3456. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3457. inc(href.offset,sizeof(aint));
  3458. end;
  3459. if uses_registers(R_MMREGISTER) then
  3460. begin
  3461. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3462. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3463. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3464. begin
  3465. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3466. begin
  3467. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3468. { Allocate register so the optimizer does not remove the load }
  3469. a_reg_alloc(list,hreg);
  3470. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3471. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3472. end;
  3473. end;
  3474. end;
  3475. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3476. end;
  3477. procedure tcg.g_profilecode(list : TAsmList);
  3478. begin
  3479. end;
  3480. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3481. begin
  3482. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3483. end;
  3484. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3485. begin
  3486. a_load_const_ref(list, OS_INT, a, href);
  3487. end;
  3488. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3489. begin
  3490. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3491. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3492. end;
  3493. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3494. var
  3495. hsym : tsym;
  3496. href : treference;
  3497. paraloc : Pcgparalocation;
  3498. begin
  3499. { calculate the parameter info for the procdef }
  3500. if not procdef.has_paraloc_info then
  3501. begin
  3502. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3503. procdef.has_paraloc_info:=true;
  3504. end;
  3505. hsym:=tsym(procdef.parast.Find('self'));
  3506. if not(assigned(hsym) and
  3507. (hsym.typ=paravarsym)) then
  3508. internalerror(200305251);
  3509. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3510. while paraloc<>nil do
  3511. with paraloc^ do
  3512. begin
  3513. case loc of
  3514. LOC_REGISTER:
  3515. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3516. LOC_REFERENCE:
  3517. begin
  3518. { offset in the wrapper needs to be adjusted for the stored
  3519. return address }
  3520. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3521. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3522. end
  3523. else
  3524. internalerror(200309189);
  3525. end;
  3526. paraloc:=next;
  3527. end;
  3528. end;
  3529. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3530. begin
  3531. a_jmp_name(list,externalname);
  3532. end;
  3533. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3534. begin
  3535. a_call_name(list,s,false);
  3536. end;
  3537. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3538. var
  3539. l: tasmsymbol;
  3540. ref: treference;
  3541. begin
  3542. result := NR_NO;
  3543. case target_info.system of
  3544. system_powerpc_darwin,
  3545. system_i386_darwin,
  3546. system_powerpc64_darwin,
  3547. system_arm_darwin:
  3548. begin
  3549. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3550. if not(assigned(l)) then
  3551. begin
  3552. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3553. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3554. if not(weak) then
  3555. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  3556. else
  3557. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  3558. {$ifdef cpu64bitaddr}
  3559. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3560. {$else cpu64bitaddr}
  3561. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3562. {$endif cpu64bitaddr}
  3563. end;
  3564. result := getaddressregister(list);
  3565. reference_reset_symbol(ref,l,0,sizeof(pint));
  3566. { a_load_ref_reg will turn this into a pic-load if needed }
  3567. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3568. end;
  3569. end;
  3570. end;
  3571. procedure tcg.g_maybe_got_init(list: TAsmList);
  3572. begin
  3573. end;
  3574. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3575. begin
  3576. internalerror(200807231);
  3577. end;
  3578. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3579. begin
  3580. internalerror(200807232);
  3581. end;
  3582. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3583. begin
  3584. internalerror(200807233);
  3585. end;
  3586. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3587. begin
  3588. internalerror(200807234);
  3589. end;
  3590. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3591. begin
  3592. Result:=TRegister(0);
  3593. internalerror(200807238);
  3594. end;
  3595. {*****************************************************************************
  3596. TCG64
  3597. *****************************************************************************}
  3598. {$ifndef cpu64bitalu}
  3599. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3600. begin
  3601. a_load64_reg_reg(list,regsrc,regdst);
  3602. a_op64_const_reg(list,op,size,value,regdst);
  3603. end;
  3604. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3605. var
  3606. tmpreg64 : tregister64;
  3607. begin
  3608. { when src1=dst then we need to first create a temp to prevent
  3609. overwriting src1 with src2 }
  3610. if (regsrc1.reghi=regdst.reghi) or
  3611. (regsrc1.reglo=regdst.reghi) or
  3612. (regsrc1.reghi=regdst.reglo) or
  3613. (regsrc1.reglo=regdst.reglo) then
  3614. begin
  3615. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3616. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3617. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3618. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3619. a_load64_reg_reg(list,tmpreg64,regdst);
  3620. end
  3621. else
  3622. begin
  3623. a_load64_reg_reg(list,regsrc2,regdst);
  3624. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3625. end;
  3626. end;
  3627. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3628. var
  3629. tmpreg64 : tregister64;
  3630. begin
  3631. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3632. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3633. a_load64_subsetref_reg(list,sref,tmpreg64);
  3634. a_op64_const_reg(list,op,size,a,tmpreg64);
  3635. a_load64_reg_subsetref(list,tmpreg64,sref);
  3636. end;
  3637. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3638. var
  3639. tmpreg64 : tregister64;
  3640. begin
  3641. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3642. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3643. a_load64_subsetref_reg(list,sref,tmpreg64);
  3644. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3645. a_load64_reg_subsetref(list,tmpreg64,sref);
  3646. end;
  3647. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3648. var
  3649. tmpreg64 : tregister64;
  3650. begin
  3651. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3652. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3653. a_load64_subsetref_reg(list,sref,tmpreg64);
  3654. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3655. a_load64_reg_subsetref(list,tmpreg64,sref);
  3656. end;
  3657. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3658. var
  3659. tmpreg64 : tregister64;
  3660. begin
  3661. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3662. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3663. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3664. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3665. end;
  3666. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3667. begin
  3668. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3669. ovloc.loc:=LOC_VOID;
  3670. end;
  3671. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3672. begin
  3673. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3674. ovloc.loc:=LOC_VOID;
  3675. end;
  3676. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3677. begin
  3678. case l.loc of
  3679. LOC_REFERENCE, LOC_CREFERENCE:
  3680. a_load64_ref_subsetref(list,l.reference,sref);
  3681. LOC_REGISTER,LOC_CREGISTER:
  3682. a_load64_reg_subsetref(list,l.register64,sref);
  3683. LOC_CONSTANT :
  3684. a_load64_const_subsetref(list,l.value64,sref);
  3685. LOC_SUBSETREF,LOC_CSUBSETREF:
  3686. a_load64_subsetref_subsetref(list,l.sref,sref);
  3687. else
  3688. internalerror(2006082210);
  3689. end;
  3690. end;
  3691. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3692. begin
  3693. case l.loc of
  3694. LOC_REFERENCE, LOC_CREFERENCE:
  3695. a_load64_subsetref_ref(list,sref,l.reference);
  3696. LOC_REGISTER,LOC_CREGISTER:
  3697. a_load64_subsetref_reg(list,sref,l.register64);
  3698. LOC_SUBSETREF,LOC_CSUBSETREF:
  3699. a_load64_subsetref_subsetref(list,sref,l.sref);
  3700. else
  3701. internalerror(2006082211);
  3702. end;
  3703. end;
  3704. {$endif cpu64bitalu}
  3705. procedure destroy_codegen;
  3706. begin
  3707. cg.free;
  3708. cg:=nil;
  3709. {$ifndef cpu64bitalu}
  3710. cg64.free;
  3711. cg64:=nil;
  3712. {$endif cpu64bitalu}
  3713. end;
  3714. end.