ncgmem.pas 44 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symdef,symsym,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,nutils,
  70. cgutils,cgobj,
  71. tgobj,ncgutil,objcgutl
  72. ;
  73. {*****************************************************************************
  74. TCGLOADVMTADDRNODE
  75. *****************************************************************************}
  76. procedure tcgloadvmtaddrnode.pass_generate_code;
  77. var
  78. href : treference;
  79. pool : THashSet;
  80. entry : PHashSetItem;
  81. begin
  82. location_reset(location,LOC_REGISTER,OS_ADDR);
  83. if (left.nodetype=typen) then
  84. begin
  85. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  86. if not is_objcclass(left.resultdef) then
  87. begin
  88. reference_reset_symbol(href,
  89. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname),0,
  90. sizeof(pint));
  91. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,location.register);
  92. end
  93. else
  94. begin
  95. if current_asmdata.ConstPools[sp_objcclassnamerefs]=nil then
  96. current_asmdata.ConstPools[sp_objcclassnamerefs]:=THashSet.Create(64, True, False);
  97. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  98. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  99. if (target_info.system in systems_objc_nfabi) then
  100. begin
  101. { find/add necessary classref/classname pool entries }
  102. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  103. end
  104. else
  105. begin
  106. { find/add necessary classref/classname pool entries }
  107. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  108. end;
  109. reference_reset_symbol(href,tasmlabel(entry^.Data),0,sizeof(pint));
  110. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  111. end;
  112. end
  113. else
  114. begin
  115. { left contains self, load vmt from self }
  116. secondpass(left);
  117. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  118. end;
  119. end;
  120. {*****************************************************************************
  121. TCGLOADPARENTFPNODE
  122. *****************************************************************************}
  123. procedure tcgloadparentfpnode.pass_generate_code;
  124. var
  125. currpi : tprocinfo;
  126. hsym : tparavarsym;
  127. href : treference;
  128. begin
  129. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  130. begin
  131. location_reset(location,LOC_REGISTER,OS_ADDR);
  132. location.register:=current_procinfo.framepointer;
  133. end
  134. else
  135. begin
  136. currpi:=current_procinfo;
  137. location_reset(location,LOC_REGISTER,OS_ADDR);
  138. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  139. { load framepointer of current proc }
  140. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  141. if not assigned(hsym) then
  142. internalerror(200309281);
  143. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,hsym.localloc,location.register);
  144. { walk parents }
  145. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  146. begin
  147. currpi:=currpi.parent;
  148. if not assigned(currpi) then
  149. internalerror(200311201);
  150. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  151. if not assigned(hsym) then
  152. internalerror(200309282);
  153. if hsym.localloc.loc<>LOC_REFERENCE then
  154. internalerror(200309283);
  155. reference_reset_base(href,location.register,hsym.localloc.reference.offset,sizeof(pint));
  156. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  157. end;
  158. end;
  159. end;
  160. {*****************************************************************************
  161. TCGADDRNODE
  162. *****************************************************************************}
  163. procedure tcgaddrnode.pass_generate_code;
  164. begin
  165. secondpass(left);
  166. location_reset(location,LOC_REGISTER,OS_ADDR);
  167. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  168. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  169. { on x86_64-win64, array of chars can be returned in registers, however,
  170. when passing these arrays to other functions, the compiler wants to take
  171. the address of the array so when the addrnode has been created internally,
  172. we have to force the data into memory, see also tw14388.pp
  173. }
  174. if nf_internal in flags then
  175. location_force_mem(current_asmdata.CurrAsmList,left.location)
  176. else
  177. internalerror(2006111510);
  178. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
  179. end;
  180. {*****************************************************************************
  181. TCGDEREFNODE
  182. *****************************************************************************}
  183. procedure tcgderefnode.pass_generate_code;
  184. var
  185. paraloc1 : tcgpara;
  186. begin
  187. secondpass(left);
  188. { assume natural alignment, except for packed records }
  189. if not(resultdef.typ in [recorddef,objectdef]) or
  190. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  191. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  192. else
  193. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  194. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  195. location_force_reg(current_asmdata.CurrAsmList,left.location,OS_ADDR,true);
  196. case left.location.loc of
  197. LOC_CREGISTER,
  198. LOC_REGISTER:
  199. begin
  200. maybechangeloadnodereg(current_asmdata.CurrAsmList,left,true);
  201. {$ifdef cpu_uses_separate_address_registers}
  202. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  203. begin
  204. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  205. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  206. location.reference.base);
  207. end
  208. else
  209. {$endif}
  210. location.reference.base := left.location.register;
  211. end;
  212. LOC_CREFERENCE,
  213. LOC_REFERENCE:
  214. begin
  215. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  216. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,left.location,location.reference.base);
  217. end;
  218. LOC_CONSTANT:
  219. begin
  220. location.reference.offset:=left.location.value;
  221. end;
  222. else
  223. internalerror(200507031);
  224. end;
  225. if (cs_use_heaptrc in current_settings.globalswitches) and
  226. (cs_checkpointer in current_settings.localswitches) and
  227. not(cs_compilesystem in current_settings.moduleswitches) and
  228. not(tpointerdef(left.resultdef).is_far) and
  229. not(nf_no_checkpointer in flags) and
  230. { can be NR_NO in case of LOC_CONSTANT }
  231. (location.reference.base<>NR_NO) then
  232. begin
  233. paraloc1.init;
  234. paramanager.getintparaloc(pocall_default,1,paraloc1);
  235. cg.a_load_reg_cgpara(current_asmdata.CurrAsmList, OS_ADDR,location.reference.base,paraloc1);
  236. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  237. paraloc1.done;
  238. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  239. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_CHECKPOINTER',false);
  240. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  241. end;
  242. end;
  243. {*****************************************************************************
  244. TCGSUBSCRIPTNODE
  245. *****************************************************************************}
  246. procedure tcgsubscriptnode.pass_generate_code;
  247. var
  248. sym: tasmsymbol;
  249. paraloc1 : tcgpara;
  250. hreg : tregister;
  251. tmpref: treference;
  252. sref: tsubsetreference;
  253. begin
  254. secondpass(left);
  255. if codegenerror then
  256. exit;
  257. paraloc1.init;
  258. { several object types must be dereferenced implicitly }
  259. if is_implicit_pointer_object_type(left.resultdef) then
  260. begin
  261. if not is_managed_type(left.resultdef) then
  262. begin
  263. { the contents of a class are aligned to a sizeof(pointer) }
  264. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),sizeof(pint));
  265. case left.location.loc of
  266. LOC_CREGISTER,
  267. LOC_REGISTER:
  268. begin
  269. {$ifdef cpu_uses_separate_address_registers}
  270. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  271. begin
  272. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  273. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
  274. left.location.register,location.reference.base);
  275. end
  276. else
  277. {$endif}
  278. location.reference.base := left.location.register;
  279. end;
  280. LOC_CREFERENCE,
  281. LOC_REFERENCE:
  282. begin
  283. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  284. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_ADDR,left.location,location.reference.base);
  285. end;
  286. LOC_CONSTANT:
  287. begin
  288. { can happen with @classtype(pointerconst).field }
  289. location.reference.offset:=left.location.value;
  290. end;
  291. else
  292. internalerror(2009092401);
  293. end;
  294. { implicit deferencing }
  295. if (cs_use_heaptrc in current_settings.globalswitches) and
  296. (cs_checkpointer in current_settings.localswitches) and
  297. not(cs_compilesystem in current_settings.moduleswitches) then
  298. begin
  299. paramanager.getintparaloc(pocall_default,1,paraloc1);
  300. cg.a_load_reg_cgpara(current_asmdata.CurrAsmList, OS_ADDR,location.reference.base,paraloc1);
  301. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  302. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  303. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_CHECKPOINTER',false);
  304. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  305. end;
  306. end
  307. else
  308. { reference-counted implicit pointer object types don't have
  309. fields -> cannot be subscripted (calls are handled via call
  310. nodes) }
  311. internalerror(2011011901);
  312. end
  313. else
  314. begin
  315. location_copy(location,left.location);
  316. { some abi's require that functions return (some) records in }
  317. { registers }
  318. case location.loc of
  319. LOC_REFERENCE,
  320. LOC_CREFERENCE:
  321. ;
  322. LOC_REGISTER,
  323. LOC_CREGISTER,
  324. LOC_MMREGISTER,
  325. LOC_FPUREGISTER:
  326. begin
  327. // in case the result is not something that can be put
  328. // into an integer register (e.g.
  329. // function_returning_record().non_regable_field, or
  330. // a function returning a value > sizeof(intreg))
  331. // -> force to memory
  332. if not tstoreddef(left.resultdef).is_intregable or
  333. not tstoreddef(resultdef).is_intregable or
  334. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER]) then
  335. location_force_mem(current_asmdata.CurrAsmList,location)
  336. else
  337. begin
  338. if (left.location.loc = LOC_REGISTER) then
  339. location.loc := LOC_SUBSETREG
  340. else
  341. location.loc := LOC_CSUBSETREG;
  342. location.size:=def_cgsize(resultdef);
  343. location.sreg.subsetreg := left.location.register;
  344. location.sreg.subsetregsize := left.location.size;
  345. if not is_packed_record_or_object(left.resultdef) then
  346. begin
  347. if (target_info.endian = ENDIAN_BIG) then
  348. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8
  349. else
  350. location.sreg.startbit := (vs.fieldoffset * 8);
  351. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  352. end
  353. else
  354. begin
  355. location.sreg.bitlen := resultdef.packedbitsize;
  356. if (target_info.endian = ENDIAN_BIG) then
  357. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset
  358. else
  359. location.sreg.startbit := vs.fieldoffset;
  360. end;
  361. end;
  362. end;
  363. LOC_SUBSETREG,
  364. LOC_CSUBSETREG:
  365. begin
  366. location.size:=def_cgsize(resultdef);
  367. if not is_packed_record_or_object(left.resultdef) then
  368. begin
  369. if (target_info.endian = ENDIAN_BIG) then
  370. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  371. else
  372. inc(location.sreg.startbit, vs.fieldoffset * 8);
  373. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  374. end
  375. else
  376. begin
  377. location.sreg.bitlen := resultdef.packedbitsize;
  378. if (target_info.endian = ENDIAN_BIG) then
  379. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  380. else
  381. inc(location.sreg.startbit, vs.fieldoffset);
  382. end;
  383. end;
  384. else
  385. internalerror(2006031901);
  386. end;
  387. end;
  388. if is_objc_class_or_protocol(left.resultdef) and
  389. (target_info.system in systems_objc_nfabi) then
  390. begin
  391. if (location.loc<>LOC_REFERENCE) or
  392. (location.reference.index<>NR_NO) then
  393. internalerror(2009092402);
  394. { the actual field offset is stored in memory (to solve the
  395. "fragile base class" problem: this way the layout of base
  396. classes can be changed without breaking programs compiled against
  397. earlier versions)
  398. }
  399. hreg:=cg.g_indirect_sym_load(current_asmdata.CurrAsmList,vs.mangledname,false);
  400. { TODO: clean up. g_indirect_sym_load cannot perform
  401. a plain load for targets that don't need an indirect load
  402. because it's also used in ncgld, but this is not very nice...
  403. }
  404. if (hreg=NR_NO) then
  405. begin
  406. sym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  407. reference_reset_symbol(tmpref,sym,0,sizeof(pint));
  408. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  409. end
  410. else
  411. begin
  412. reference_reset_base(tmpref,hreg,0,sizeof(pint));
  413. location.reference.index:=hreg;
  414. end;
  415. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  416. { always packrecords C -> natural alignment }
  417. location.reference.alignment:=vs.vardef.alignment;
  418. end
  419. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  420. begin
  421. if not is_packed_record_or_object(left.resultdef) then
  422. begin
  423. inc(location.reference.offset,vs.fieldoffset);
  424. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  425. end
  426. else if (vs.fieldoffset mod 8 = 0) and
  427. (resultdef.packedbitsize mod 8 = 0) and
  428. { is different in case of e.g. packenum 2 and an enum }
  429. { which fits in 8 bits }
  430. (resultdef.size*8 = resultdef.packedbitsize) then
  431. begin
  432. inc(location.reference.offset,vs.fieldoffset div 8);
  433. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  434. end
  435. else
  436. begin
  437. sref.ref:=location.reference;
  438. sref.ref.alignment:=1;
  439. sref.bitindexreg:=NR_NO;
  440. inc(sref.ref.offset,vs.fieldoffset div 8);
  441. sref.startbit:=vs.fieldoffset mod 8;
  442. sref.bitlen:=resultdef.packedbitsize;
  443. if (left.location.loc=LOC_REFERENCE) then
  444. location.loc:=LOC_SUBSETREF
  445. else
  446. location.loc:=LOC_CSUBSETREF;
  447. location.sref:=sref;
  448. end;
  449. { also update the size of the location }
  450. location.size:=def_cgsize(resultdef);
  451. end;
  452. paraloc1.done;
  453. end;
  454. {*****************************************************************************
  455. TCGWITHNODE
  456. *****************************************************************************}
  457. procedure tcgwithnode.pass_generate_code;
  458. begin
  459. location_reset(location,LOC_VOID,OS_NO);
  460. if assigned(left) then
  461. secondpass(left);
  462. end;
  463. {*****************************************************************************
  464. TCGVECNODE
  465. *****************************************************************************}
  466. function tcgvecnode.get_mul_size : aint;
  467. begin
  468. if nf_memindex in flags then
  469. get_mul_size:=1
  470. else
  471. begin
  472. if (left.resultdef.typ=arraydef) then
  473. if not is_packed_array(left.resultdef) then
  474. get_mul_size:=tarraydef(left.resultdef).elesize
  475. else
  476. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  477. else
  478. get_mul_size:=resultdef.size;
  479. end
  480. end;
  481. { this routine must, like any other routine, not change the contents }
  482. { of base/index registers of references, as these may be regvars. }
  483. { The register allocator can coalesce one LOC_REGISTER being moved }
  484. { into another (as their live ranges won't overlap), but not a }
  485. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  486. { the live range of the LOC_CREGISTER will most likely overlap the }
  487. { the live range of the target LOC_(C)REGISTER) }
  488. { The passed register may be a LOC_CREGISTER as well. }
  489. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  490. var
  491. hreg: tregister;
  492. begin
  493. if l<>1 then
  494. begin
  495. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  496. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  497. maybe_const_reg:=hreg;
  498. end;
  499. if location.reference.base=NR_NO then
  500. location.reference.base:=maybe_const_reg
  501. else if location.reference.index=NR_NO then
  502. location.reference.index:=maybe_const_reg
  503. else
  504. begin
  505. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  506. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  507. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  508. { insert new index register }
  509. location.reference.index:=maybe_const_reg;
  510. end;
  511. { update alignment }
  512. if (location.reference.alignment=0) then
  513. internalerror(2009020704);
  514. location.reference.alignment:=newalignment(location.reference.alignment,l);
  515. end;
  516. { see remarks for tcgvecnode.update_reference_reg_mul above }
  517. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  518. var
  519. sref: tsubsetreference;
  520. offsetreg, hreg: tregister;
  521. alignpower: aint;
  522. temp : longint;
  523. begin
  524. { only orddefs are bitpacked. Even then we only need special code in }
  525. { case the bitpacked *byte size* is not a power of two, otherwise }
  526. { everything can be handled using the the regular array code. }
  527. if ((l mod 8) = 0) and
  528. (ispowerof2(l div 8,temp) or
  529. not is_ordinal(resultdef)
  530. {$ifndef cpu64bitalu}
  531. or is_64bitint(resultdef)
  532. {$endif not cpu64bitalu}
  533. ) then
  534. begin
  535. update_reference_reg_mul(maybe_const_reg,l div 8);
  536. exit;
  537. end;
  538. if (l > 8*sizeof(aint)) then
  539. internalerror(200608051);
  540. sref.ref := location.reference;
  541. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  542. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  543. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  544. { keep alignment for index }
  545. sref.ref.alignment := left.resultdef.alignment;
  546. if not ispowerof2(sref.ref.alignment,temp) then
  547. internalerror(2006081201);
  548. alignpower:=temp;
  549. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  550. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  551. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  552. if (sref.ref.base = NR_NO) then
  553. sref.ref.base := offsetreg
  554. else if (sref.ref.index = NR_NO) then
  555. sref.ref.index := offsetreg
  556. else
  557. begin
  558. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  559. sref.ref.base := offsetreg;
  560. end;
  561. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  562. sref.bitindexreg := hreg;
  563. sref.startbit := 0;
  564. sref.bitlen := resultdef.packedbitsize;
  565. if (left.location.loc = LOC_REFERENCE) then
  566. location.loc := LOC_SUBSETREF
  567. else
  568. location.loc := LOC_CSUBSETREF;
  569. location.sref := sref;
  570. end;
  571. procedure tcgvecnode.second_wideansistring;
  572. begin
  573. end;
  574. procedure tcgvecnode.second_dynamicarray;
  575. begin
  576. end;
  577. procedure tcgvecnode.rangecheck_array;
  578. var
  579. hightree : tnode;
  580. poslabel,
  581. neglabel : tasmlabel;
  582. hreg : tregister;
  583. paraloc1,paraloc2 : tcgpara;
  584. begin
  585. { omit range checking when this is an array access to a pointer which has been
  586. typecasted from an array }
  587. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  588. exit;
  589. paraloc1.init;
  590. paraloc2.init;
  591. if is_open_array(left.resultdef) or
  592. is_array_of_const(left.resultdef) then
  593. begin
  594. { cdecl functions don't have high() so we can not check the range }
  595. { (can't use current_procdef, since it may be a nested procedure) }
  596. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(left).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  597. begin
  598. { Get high value }
  599. hightree:=load_high_value_node(tparavarsym(tloadnode(left).symtableentry));
  600. { it must be available }
  601. if not assigned(hightree) then
  602. internalerror(200212201);
  603. firstpass(hightree);
  604. secondpass(hightree);
  605. { generate compares }
  606. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  607. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  608. else
  609. begin
  610. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  611. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_INT,right.location,hreg);
  612. end;
  613. current_asmdata.getjumplabel(neglabel);
  614. current_asmdata.getjumplabel(poslabel);
  615. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  616. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  617. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  618. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  619. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  620. { release hightree }
  621. hightree.free;
  622. end;
  623. end
  624. else
  625. if is_dynamic_array(left.resultdef) then
  626. begin
  627. paramanager.getintparaloc(pocall_default,1,paraloc1);
  628. paramanager.getintparaloc(pocall_default,2,paraloc2);
  629. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  630. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  631. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  632. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  633. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  634. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  635. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  636. end;
  637. { for regular arrays, we don't have to do anything because the index has been
  638. type converted to the index type, which already inserted a range check if
  639. necessary }
  640. paraloc1.done;
  641. paraloc2.done;
  642. end;
  643. procedure tcgvecnode.rangecheck_string;
  644. var
  645. paraloc1,
  646. paraloc2: tcgpara;
  647. href: treference;
  648. offsetdec: aint;
  649. begin
  650. paraloc1.init;
  651. paraloc2.init;
  652. case tstringdef(left.resultdef).stringtype of
  653. { it's the same for ansi- and wide strings }
  654. st_unicodestring,
  655. st_widestring,
  656. st_ansistring:
  657. begin
  658. paramanager.getintparaloc(pocall_default,1,paraloc1);
  659. paramanager.getintparaloc(pocall_default,2,paraloc2);
  660. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  661. href:=location.reference;
  662. { Add back the offset which was subtracted to map string[1]->pchar(string)[0] }
  663. { TODO: we'd better rangecheck on the original location, before offsetting it. }
  664. if is_ansistring(left.resultdef) then
  665. offsetdec:=1
  666. else
  667. offsetdec:=2;
  668. if not(tf_winlikewidestring in target_info.flags) or
  669. (tstringdef(left.resultdef).stringtype<>st_widestring) then
  670. begin
  671. dec(href.offset,sizeof(pint)-offsetdec);
  672. cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,OS_ADDR,href,paraloc1);
  673. end
  674. else
  675. begin
  676. { winlike widestrings have a 4 byte length }
  677. dec(href.offset,4-offsetdec);
  678. cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,OS_32,href,paraloc1);
  679. end;
  680. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  681. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  682. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  683. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_'+upper(tstringdef(left.resultdef).stringtypname)+'_RANGECHECK',false);
  684. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  685. end;
  686. st_shortstring:
  687. begin
  688. {!!!!!!!!!!!!!!!!!}
  689. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  690. end;
  691. st_longstring:
  692. begin
  693. {!!!!!!!!!!!!!!!!!}
  694. end;
  695. end;
  696. paraloc1.done;
  697. paraloc2.done;
  698. end;
  699. procedure tcgvecnode.pass_generate_code;
  700. var
  701. offsetdec,
  702. extraoffset : aint;
  703. t : tnode;
  704. otl,ofl : tasmlabel;
  705. newsize : tcgsize;
  706. mulsize,
  707. bytemulsize,
  708. alignpow : aint;
  709. isjump : boolean;
  710. paraloc1,
  711. paraloc2 : tcgpara;
  712. subsetref : tsubsetreference;
  713. temp : longint;
  714. begin
  715. paraloc1.init;
  716. paraloc2.init;
  717. mulsize:=get_mul_size;
  718. if not is_packed_array(left.resultdef) then
  719. bytemulsize:=mulsize
  720. else
  721. bytemulsize:=mulsize div 8;
  722. newsize:=def_cgsize(resultdef);
  723. secondpass(left);
  724. if left.location.loc=LOC_CREFERENCE then
  725. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  726. else
  727. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  728. { an ansistring needs to be dereferenced }
  729. if is_ansistring(left.resultdef) or
  730. is_widestring(left.resultdef) or
  731. is_unicodestring(left.resultdef) then
  732. begin
  733. if nf_callunique in flags then
  734. internalerror(200304236);
  735. {DM!!!!!}
  736. case left.location.loc of
  737. LOC_REGISTER,
  738. LOC_CREGISTER :
  739. begin
  740. {$ifdef m68k}
  741. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  742. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  743. {$else m68k}
  744. location.reference.base:=left.location.register;
  745. {$endif m68k}
  746. end;
  747. LOC_CREFERENCE,
  748. LOC_REFERENCE :
  749. begin
  750. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  751. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.reference,location.reference.base);
  752. end;
  753. else
  754. internalerror(2002032218);
  755. end;
  756. { check for a zero length string,
  757. we can use the ansistring routine here }
  758. if (cs_check_range in current_settings.localswitches) then
  759. begin
  760. paramanager.getintparaloc(pocall_default,1,paraloc1);
  761. cg.a_load_reg_cgpara(current_asmdata.CurrAsmList,OS_ADDR,location.reference.base,paraloc1);
  762. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  763. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  764. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_'+upper(tstringdef(left.resultdef).stringtypname)+'_CHECKZERO',false);
  765. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  766. end;
  767. { in ansistrings/widestrings S[1] is p<w>char(S)[0] !! }
  768. if is_ansistring(left.resultdef) then
  769. offsetdec:=1
  770. else
  771. offsetdec:=2;
  772. location.reference.alignment:=offsetdec;
  773. dec(location.reference.offset,offsetdec);
  774. end
  775. else if is_dynamic_array(left.resultdef) then
  776. begin
  777. case left.location.loc of
  778. LOC_REGISTER,
  779. LOC_CREGISTER :
  780. location.reference.base:=left.location.register;
  781. LOC_REFERENCE,
  782. LOC_CREFERENCE :
  783. begin
  784. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  785. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,
  786. left.location.reference,location.reference.base);
  787. end;
  788. else
  789. internalerror(2002032219);
  790. end;
  791. { a dynarray points to the start of a memory block, which
  792. we assume to be always aligned to a multiple of the
  793. pointer size
  794. }
  795. location.reference.alignment:=sizeof(pint);
  796. end
  797. else
  798. begin
  799. { may happen in case of function results }
  800. case left.location.loc of
  801. LOC_REGISTER,
  802. LOC_MMREGISTER:
  803. location_force_mem(current_asmdata.CurrAsmList,left.location);
  804. end;
  805. location_copy(location,left.location);
  806. end;
  807. { location must be memory }
  808. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  809. internalerror(200411013);
  810. { offset can only differ from 0 if arraydef }
  811. if (left.resultdef.typ=arraydef) and
  812. not(is_dynamic_array(left.resultdef)) and
  813. (not(is_packed_array(left.resultdef)) or
  814. ((mulsize mod 8 = 0) and
  815. ispowerof2(mulsize div 8,temp)) or
  816. { only orddefs are bitpacked }
  817. not is_ordinal(resultdef)
  818. {$ifndef cpu64bitalu}
  819. or is_64bitint(resultdef)
  820. {$endif not cpu64bitalu}
  821. ) then
  822. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  823. if right.nodetype=ordconstn then
  824. begin
  825. { offset can only differ from 0 if arraydef }
  826. if cs_check_range in current_settings.localswitches then
  827. begin
  828. secondpass(right);
  829. case left.resultdef.typ of
  830. arraydef :
  831. rangecheck_array;
  832. stringdef :
  833. rangecheck_string;
  834. end;
  835. end;
  836. if not(is_packed_array(left.resultdef)) or
  837. ((mulsize mod 8 = 0) and
  838. (ispowerof2(mulsize div 8,temp) or
  839. { only orddefs are bitpacked }
  840. not is_ordinal(resultdef))) then
  841. begin
  842. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  843. inc(location.reference.offset,extraoffset);
  844. { adjust alignment after to this change }
  845. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  846. { don't do this for floats etc.; needed to properly set the }
  847. { size for bitpacked arrays (e.g. a bitpacked array of }
  848. { enums who are size 2 but fit in one byte -> in the array }
  849. { they will be one byte and have to be stored like that) }
  850. if is_packed_array(left.resultdef) and
  851. (tcgsize2size[newsize] <> bytemulsize) then
  852. newsize:=int_cgsize(bytemulsize);
  853. end
  854. else
  855. begin
  856. subsetref.ref := location.reference;
  857. subsetref.ref.alignment := left.resultdef.alignment;
  858. if not ispowerof2(subsetref.ref.alignment,temp) then
  859. internalerror(2006081212);
  860. alignpow:=temp;
  861. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  862. subsetref.bitindexreg := NR_NO;
  863. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  864. subsetref.bitlen := resultdef.packedbitsize;
  865. if (left.location.loc = LOC_REFERENCE) then
  866. location.loc := LOC_SUBSETREF
  867. else
  868. location.loc := LOC_CSUBSETREF;
  869. location.sref := subsetref;
  870. end;
  871. end
  872. else
  873. { not nodetype=ordconstn }
  874. begin
  875. if (cs_opt_level1 in current_settings.optimizerswitches) and
  876. { if we do range checking, we don't }
  877. { need that fancy code (it would be }
  878. { buggy) }
  879. not(cs_check_range in current_settings.localswitches) and
  880. (left.resultdef.typ=arraydef) and
  881. not is_packed_array(left.resultdef) then
  882. begin
  883. extraoffset:=0;
  884. if (right.nodetype=addn) then
  885. begin
  886. if taddnode(right).right.nodetype=ordconstn then
  887. begin
  888. extraoffset:=tordconstnode(taddnode(right).right).value.svalue;
  889. t:=taddnode(right).left;
  890. taddnode(right).left:=nil;
  891. right.free;
  892. right:=t;
  893. end
  894. else if taddnode(right).left.nodetype=ordconstn then
  895. begin
  896. extraoffset:=tordconstnode(taddnode(right).left).value.svalue;
  897. t:=taddnode(right).right;
  898. taddnode(right).right:=nil;
  899. right.free;
  900. right:=t;
  901. end;
  902. end
  903. else if (right.nodetype=subn) then
  904. begin
  905. if taddnode(right).right.nodetype=ordconstn then
  906. begin
  907. extraoffset:=-tordconstnode(taddnode(right).right).value.svalue;
  908. t:=taddnode(right).left;
  909. taddnode(right).left:=nil;
  910. right.free;
  911. right:=t;
  912. end;
  913. end;
  914. inc(location.reference.offset,
  915. mulsize*extraoffset);
  916. end;
  917. { calculate from left to right }
  918. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  919. internalerror(200304237);
  920. isjump:=(right.expectloc=LOC_JUMP);
  921. if isjump then
  922. begin
  923. otl:=current_procinfo.CurrTrueLabel;
  924. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  925. ofl:=current_procinfo.CurrFalseLabel;
  926. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  927. end;
  928. secondpass(right);
  929. { if mulsize = 1, we won't have to modify the index }
  930. location_force_reg(current_asmdata.CurrAsmList,right.location,OS_ADDR,true);
  931. if isjump then
  932. begin
  933. current_procinfo.CurrTrueLabel:=otl;
  934. current_procinfo.CurrFalseLabel:=ofl;
  935. end
  936. else if (right.location.loc = LOC_JUMP) then
  937. internalerror(2006010801);
  938. { produce possible range check code: }
  939. if cs_check_range in current_settings.localswitches then
  940. begin
  941. if left.resultdef.typ=arraydef then
  942. rangecheck_array
  943. else if (left.resultdef.typ=stringdef) then
  944. rangecheck_string;
  945. end;
  946. { insert the register and the multiplication factor in the
  947. reference }
  948. if not is_packed_array(left.resultdef) then
  949. update_reference_reg_mul(right.location.register,mulsize)
  950. else
  951. update_reference_reg_packed(right.location.register,mulsize);
  952. end;
  953. location.size:=newsize;
  954. paraloc1.done;
  955. paraloc2.done;
  956. end;
  957. begin
  958. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  959. cloadparentfpnode:=tcgloadparentfpnode;
  960. caddrnode:=tcgaddrnode;
  961. cderefnode:=tcgderefnode;
  962. csubscriptnode:=tcgsubscriptnode;
  963. cwithnode:=tcgwithnode;
  964. cvecnode:=tcgvecnode;
  965. end.